Image sensor and its layout
By designing a pixel unit sharing module in the image sensor, the space limitation problem caused by pixel miniaturization is solved, and a high-performance image sensor design is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SMARTSENS TECH (SHANGHAI) CO LTD
- Filing Date
- 2025-08-27
- Publication Date
- 2026-07-31
AI Technical Summary
As image sensor pixels shrink, existing technologies struggle to meet the demands for high dynamic range and high performance within limited space.
Design an image sensor that optimizes device layout to save pixel area by having the first pixel unit and the second pixel unit share a second reset module, and optionally share a first reset module or a gain module.
It achieves a good performance balance within a limited space, reduces the pixel area occupied, and improves the performance and efficiency of the image sensor.
Smart Images
Figure CN224583260U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of image sensor technology, and in particular to an image sensor and its arrangement structure. Background Technology
[0002] As image sensors continue to evolve, LOFIC (Low Dynamic Range Indicator) solutions to improve dynamic range are becoming increasingly common. Gradually, higher demands are being placed on the image quality of LOFIC solutions. Simultaneously, as pixel sizes shrink, the usable space per pixel is becoming increasingly smaller. Therefore, adapting to the ever-shrinking pixel space while meeting the performance requirements of LOFIC is a pressing technical problem that those skilled in the art urgently need to solve.
[0003] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this utility model and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this utility model. Utility Model Content
[0004] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide an image sensor and its arrangement structure to adapt to the ever-shrinking pixel space and meet the performance requirements of LOFIC.
[0005] To achieve the above and other related objectives, this utility model provides an image sensor, including a first pixel unit and a second pixel unit, wherein: Both the first pixel unit and the second pixel unit include a floating diffusion node, a photosensitive module, an overflow module, a first reset module, and a readout module; The photosensitive module is coupled to the floating diffusion node for accumulating photogenerated electrons and transferring the photogenerated electrons to the floating diffusion node to read out the pixel signal; The overflow module is coupled to the photosensitive module and is used to store the photogenerated electrons overflowing from the photosensitive module in order to read out the overflow signal. The first reset module is coupled to the floating diffusion node and is used to perform a reset operation on the floating diffusion node to read out the reset signal; The readout module is coupled to the floating diffusion node and is used to read out the corresponding signal; The first pixel unit and the second pixel unit also share at least a second reset module, wherein the second reset module is coupled to the two overflow modules respectively, and is used to perform a reset operation on at least the two overflow modules.
[0006] Optionally, both the first pixel unit and the second pixel unit further include a gain module, wherein the gain module is coupled to the floating diffusion node or between the floating diffusion node and the first reset module, and is used to switch between different conversion gains.
[0007] Optionally, when the gain module is coupled between the floating diffusion node and the first reset module, the first pixel unit and the second pixel unit also share the first reset module, wherein the shared first reset module is coupled to two of the gain modules respectively, for resetting at least two of the floating diffusion nodes; or, when the gain module is coupled between the floating diffusion node and the first reset module, the overflow module is changed from being coupled to the photosensitive module to being coupled to the gain module.
[0008] Optionally, the first pixel unit and the second pixel unit are located in the same column, wherein the first pixel unit and the second pixel unit are read out through different column lines, and are respectively read out with adjacent pixel units in the same column through the same column line.
[0009] Optionally, when a gain module is included and the gain module is coupled between the floating diffusion node and the first reset module, a third pixel unit and a fourth pixel unit with identical structures are also included, which do not share the second reset module. In this case, the first pixel unit and the third pixel unit share the first reset module, and the second pixel unit and the fourth pixel unit share the first reset module. The shared first reset module is coupled to the corresponding two gain modules respectively, and is used to perform a reset operation on at least the corresponding two floating diffusion nodes.
[0010] Optionally, the first pixel unit, the second pixel unit, the third pixel unit, and the fourth pixel unit are located in the same column, wherein the first pixel unit and the second pixel unit are read out through different column lines, the first pixel unit and the third pixel unit are read out through the same column line, and the second pixel unit and the fourth pixel unit are read out through the same column line.
[0011] Optionally, the photosensitive module includes a transmission transistor and a photosensitive element, wherein the control terminal of the transmission transistor receives a transmission control signal, the first terminal of the transmission transistor is coupled to the floating diffusion node, and the second terminal of the transmission transistor is coupled to a first potential via the photosensitive element; And / or, the overflow module includes an overflow transistor and an overflow capacitor, wherein the control terminal of the overflow transistor receives an overflow control signal, the first terminal of the overflow transistor is coupled to the photosensitive module, and the second terminal of the overflow transistor is coupled to a second potential via the overflow capacitor; And / or, the first reset module includes a first reset transistor, wherein the control terminal of the first reset transistor receives a first reset control signal, the first terminal of the first reset transistor is coupled to a third potential, and the second terminal of the first reset transistor is coupled to the floating diffusion node; And / or, the readout module includes a source follower transistor and a select transistor, wherein the control terminal of the source follower transistor is coupled to the floating diffusion node, the first terminal of the source follower transistor is coupled to a fourth potential, the second terminal of the source follower transistor is coupled to the first terminal of the select transistor, the control terminal of the select transistor receives a select control signal, and the second terminal of the select transistor outputs a corresponding signal; And / or, the second reset module includes a second reset transistor, wherein the control terminal of the second reset transistor receives a second reset control signal, the first terminal of the second reset transistor is coupled to a fifth potential, and the second terminal of the second reset transistor is coupled to two of the overflow modules respectively; And / or, when a gain module is included, the gain module includes a gain transistor, wherein the control terminal of the gain transistor receives a gain control signal, the first terminal of the gain transistor is coupled to the first reset module or the sixth potential, and the second terminal of the gain transistor is coupled to the floating diffusion node.
[0012] Optionally, when the overflow module includes an overflow capacitor, the overflow capacitors in the first pixel unit and the second pixel unit are coupled to a second potential through the same connection line.
[0013] This utility model also provides an image sensor arrangement structure as described in any one of the above claims, comprising: The photosensitive module in the first pixel unit forms a first region based on a transmission transistor, and the photosensitive module in the second pixel unit forms a second region based on a transmission transistor; The overflow module in the first pixel unit is disposed on the first side of the first region, and the overflow module in the second pixel unit is disposed on the first side of the second region; The first reset module in the first pixel unit is disposed on the second side of the first region, and the first reset module in the second pixel unit is disposed on the second side of the second region; The readout module in the first pixel unit is at least disposed on the fourth side of the first region, and the readout module in the second pixel unit is at least disposed on the fourth side of the second region; The second reset module is disposed between the first region and the second region; In the corresponding region, the second side and the fourth side are arranged opposite to the first side, and the second side is the side of the corresponding region that is closer to the other region.
[0014] Optionally, when a gain module is included, the gain module in the first pixel unit is disposed on the third side of the first region, and the gain module in the second pixel unit is disposed on the third side of the second region, wherein the first side and the third side are disposed opposite to each other in the corresponding regions.
[0015] Optionally, each pixel unit is located in the same column, wherein the first pixel unit and the second pixel unit are two adjacent pixel units in the same column; when a third pixel unit and a fourth pixel unit are included, the third pixel unit, the first pixel unit, the second pixel unit, and the fourth pixel unit are four adjacent pixel units in the same column; and / or, when the first reset module is shared, both the second reset module and the shared first reset module are disposed between the first region and the second region.
[0016] Optionally, the readout module includes a source follower transistor and a selection transistor, wherein: in the first pixel unit, the source follower transistor is disposed in the first region, and the selection transistor is disposed on the fourth side of the first region; in the second pixel unit, the source follower transistor is disposed in the second region, and the selection transistor is disposed on the fourth side of the second region.
[0017] As described above, the image sensor and its arrangement structure of this utility model save pixel physical space, that is, save pixel area, by having the first pixel unit and the second pixel unit share the second reset module, so as to achieve a good performance balance; and further save pixel area by having the first pixel unit and the second pixel unit synchronously share the first reset module or staggeredly share the first reset module. Attached Figure Description
[0018] Figure 1 The diagram shown is a circuit structure schematic of an image sensor according to Embodiment 1 of this utility model.
[0019] Figure 2 This is a schematic diagram of another circuit structure of the image sensor in Embodiment 1 of this utility model.
[0020] Figure 3 This is a schematic diagram of another circuit structure of the image sensor in Embodiment 1 of this utility model.
[0021] Figure 4 Displayed as Figure 3 The diagram shows a circuit structure diagram of two pixel units sharing the first reset module in the image sensor shown.
[0022] Figure 5 This diagram shows another circuit structure of the image sensor in Embodiment 1 of this utility model.
[0023] Figure 6 The diagram shows the arrangement of the image sensor in Embodiment 1 of this utility model.
[0024] Figure 7 The diagram shows the relevant signal waveforms of the image sensor in Embodiment 1 of this utility model.
[0025] Figure 8 The diagram shown is a circuit structure schematic of an image sensor in Embodiment 2 of this utility model.
[0026] Figure 9 The diagram shows the arrangement of the image sensor in Embodiment 2 of this utility model.
[0027] Component designation explanation 110a First pixel unit 110b Second pixel unit 110c Third pixel unit 110d Fourth pixel unit 111 Photosensitive module 112 Overflow module 113 First reset module 114 Read module 115 Second reset module 116 Gain module Detailed Implementation
[0028] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.
[0029] Please see Figures 1 to 9 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Therefore, the illustrations only show the components related to this utility model and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the shape, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex. Example 1
[0030] like Figures 1 to 5 As shown, this embodiment provides an image sensor 100, including a first pixel unit 110a and a second pixel unit 110b. Wherein: like Figure 1 As shown, the first pixel unit 110a and the second pixel unit 110b both include a floating diffusion node FD, a photosensitive module 111, an overflow module 112, a first reset module 113 and a readout module 114. In addition, the first pixel unit 110a and the second pixel unit 110b also share at least a second reset module 115.
[0031] In any pixel unit: The photosensitive module 111 is coupled to a floating diffusion node FD, accumulates photogenerated electrons based on the photoelectric effect, and transfers the photogenerated electrons at least to the floating diffusion node FD to read out the pixel signal. In one embodiment, such as Figure 1 As shown, the photosensitive module 111 includes a transmission transistor M1 and a photosensitive element PD. The control terminal of the transmission transistor M1 receives a transmission control signal TX. The first terminal of the transmission transistor M1 is coupled to a floating diffusion node FD, and the second terminal of the transmission transistor M1 is coupled to a first potential V1 (e.g., ground potential or a negative potential) via the photosensitive element PD. In practical applications, the transmission transistor M1 and the photosensitive element PD are in a one-to-one correspondence; the number of each can be one or more, without limitation.
[0032] The overflow module 112 is coupled to the photosensitive module 111 and is used to store the photogenerated electrons overflowing from the photosensitive module 111 to read out the overflow signal. In practical applications, if the charge of the photogenerated electrons does not exceed the storage capacity of the photosensitive module 111, no photogenerated electrons will overflow from the photosensitive module 111, and no overflow signal will be read out, or in other words, the read-out overflow signal is zero. In one embodiment, such as Figure 1 As shown, the overflow module 112 includes an overflow transistor M2 and an overflow capacitor COF. The control terminal of the overflow transistor M2 receives an overflow control signal OF. The first terminal of the overflow transistor M2 is coupled to the photosensitive module 111 (e.g., the first terminal of the transmission transistor M1), and the second terminal of the overflow transistor M2 is coupled to a second potential V2 (e.g., a variable potential) via the overflow capacitor COF. Alternatively, the overflow capacitor COF in the first pixel unit 110a and the overflow capacitor COF in the second pixel unit 110b can be coupled to the second potential V2 via the same connection line, thus reducing the impact of dark current.
[0033] The first reset module 113 is coupled to the floating diffusion node FD and is used to perform a reset operation on at least the floating diffusion node FD to read out the reset signal; in practical applications, the first reset module 113 also performs a reset operation on the photosensitive module 111. In one embodiment, such as Figure 1 As shown, the first reset module 113 includes a first reset transistor M3; wherein, the control terminal of the first reset transistor M3 receives a first reset control signal RST, the first terminal of the first reset transistor M3 is coupled to a third potential V3 (e.g., power supply potential), and the second terminal of the first reset transistor M3 is coupled to a floating diffusion node FD.
[0034] The readout module 114 is coupled to the floating diffusion node FD and is used to read out the corresponding signal. In one embodiment, such as Figure 1As shown, the readout module 114 includes a source follower transistor M4 and a select transistor M5; wherein, the control terminal of the source follower transistor M4 is coupled to the floating diffusion node FD, the first terminal of the source follower transistor M4 is coupled to the fourth potential V4 (e.g., the power supply potential), the second terminal of the source follower transistor M4 is coupled to the first terminal of the select transistor M5, the control terminal of the select transistor M5 receives the select control signal SEL, and the second terminal of the select transistor M5 outputs the corresponding signal.
[0035] The shared second reset module 115 is coupled to two overflow modules 112, namely the overflow module 112 in the first pixel unit 110a and the overflow module 112 in the second pixel unit 110b, and is used to perform reset operations on at least these two overflow modules 112; of course, the second reset module 115 can also work with the first reset module 113 to perform a reset operation on the photosensitive module 111. In one embodiment, as... Figure 1 As shown, the second reset module 115 includes a second reset transistor M6; wherein, the control terminal of the second reset transistor M6 receives a second reset control signal OF_RST, the first terminal of the second reset transistor M6 is coupled to a fifth potential V5 (e.g., power supply potential), and the second terminal of the second reset transistor M6 is coupled to two overflow modules 112 (e.g., two overflow capacitors COF located away from the end of their respective overflow transistors M2).
[0036] In practical applications, since the third potential V3 and the fifth potential V5 are usually power supply potentials, the first reset module 113 and the second reset module 115 can be coupled to the same potential to reduce the number of connecting lines.
[0037] Furthermore, such as Figures 2 to 5 As shown, both the first pixel unit 110a and the second pixel unit 110b further include a gain module 116, which is coupled to the floating diffusion node FD, or coupled between the floating diffusion node FD and the first reset module 113, for switching between different conversion gains, such as switching between high conversion gain (HCG) and low conversion gain (LCG).
[0038] In a specific example, gain module 116 is coupled to floating diffusion node FD, such as Figure 2 As shown. In any pixel unit: the gain module 116 includes a gain transistor M7; wherein, the control terminal of the gain transistor M7 receives a gain control signal DCG, the first terminal of the gain transistor M7 is coupled to a sixth potential (e.g., a power supply potential), and the second terminal of the gain transistor M7 is coupled to a floating diffusion node FD.
[0039] In another specific example, the gain module 116 is coupled between the floating diffusion node FD and the first reset module 113, such as... Figure 3As shown. In any pixel unit: the gain module 116 includes a gain transistor M7; wherein, the control terminal of the gain transistor M7 receives a gain control signal DCG, the first terminal of the gain transistor M7 is coupled to the first reset module 113 (e.g., the second terminal of the first reset transistor M3), and the second terminal of the gain transistor M7 is coupled to the floating diffusion node FD.
[0040] As an alternative, in the image sensor 100 described above, the first pixel unit 110a and the second pixel unit 110b share the first reset module 113 in addition to sharing the second reset module 115, such as... Figure 4 As shown, the shared first reset module 113 is coupled to two gain modules 116, namely, the gain module 116 in the first pixel unit 110a and the gain module 116 in the second pixel unit 110b. For example, they are coupled to the first terminals of two gain transistors M7, respectively, for resetting at least two floating diffusion nodes FD. This scheme allows the first reset module 113 and the second reset module 115 to be shared simultaneously, and can effectively isolate overflow signals during exposure, effectively preventing the mixing of overflow paths between shared pixel units. In addition, it can also avoid mixing between shared pixel units during overflow signal readout. This implementation can effectively shorten the overflow signal path, which is beneficial to improving dark current performance.
[0041] When the gain module 116 is coupled between the floating diffusion node FD and the first reset module 113, the overflow module 112 can be changed from being coupled to the photosensitive module 111 to being coupled to the gain module 116, as follows: Figure 5 As shown; in any pixel unit: the control terminal of the overflow transistor M2 receives the overflow control signal OF, the first terminal of the overflow transistor M2 is coupled to the gain module 116 (e.g., the first terminal of the gain transistor M7), and the second terminal of the overflow transistor M2 is coupled to the second potential V2 (e.g., a variable potential) via the overflow capacitor COF. As an alternative, the overflow capacitor COF in the first pixel unit 110a and the overflow capacitor COF in the second pixel unit 110b are coupled to the second potential V2 through the same connection line, thus reducing the influence of dark current. It should be noted that when the overflow module 112 is changed from being coupled to the photosensitive module 111 to being coupled to the gain module 116, the first pixel unit 110a and the second pixel unit 110b can only share the second reset module 115 and cannot share the first reset module 113.
[0042] In this embodiment, the first pixel unit 110a and the second pixel unit 110b are located in the same column. For example, the first pixel unit 110a and the second pixel unit 110b are two adjacent pixel units in the same column. Usually, the first pixel unit 110a is located above and the second pixel unit 110b is located below. In practical applications, the column where the first pixel unit 110a and the second pixel unit 110b are located also includes other pixel units, such as multiple pairs of pixel units composed of the first pixel unit 110a and the second pixel unit 110b. In addition, the first pixel unit 110a and the second pixel unit 110b are read out through different column lines. For example, the first pixel unit 110a is read out through the first column line BL1, and the second pixel unit 110b is read out through the second column line BL2. As an alternative, the first pixel unit 110a and the second pixel unit 110b are read out through the same column line with other adjacent pixel units in the same column. For example, the first pixel unit 110a is read out through the same column line with the second pixel unit 110b in the adjacent pixel unit pair in the same column, and the second pixel unit 110b is read out through the same column line with the first pixel unit 110a in the adjacent pixel unit pair in the same column.
[0043] like Figure 6 As shown, this embodiment also provides an arrangement structure for an image sensor 100, including the layout design of each device in each pixel unit, particularly the layout design of each photosensitive element and each transistor; wherein, the image sensor 100 is implemented using the circuit structure described above in this embodiment, which can be found in the following details. Figure 4 The circuit shown includes a first pixel unit 110a and a second pixel unit 110b.
[0044] The photosensitive module 111 in the first pixel unit 110a forms a first region based on the transmission transistor M1 (as shown in the upper dashed box in the figure), and the photosensitive module 111 in the second pixel unit 110b forms a second region based on the transmission transistor M1 (as shown in the lower dashed box in the figure). In this embodiment, the photosensitive module 111 includes four transmission transistors M1 and four photosensitive elements PD, wherein the four transmission transistors M1 are respectively disposed at a specific tilt angle (e.g., 45°) in the corner regions of the four photosensitive elements PD facing each other, so as to form corresponding regions.
[0045] The overflow module 112 in the first pixel unit 110a is disposed on the first side of the first region, for example, the right side of the first region; the overflow module 112 in the second pixel unit 110b is disposed on the first side of the second region, for example, the right side of the second region. It should be noted that the overflow module 112 in this embodiment mainly refers to the overflow transistor M2. In fact, the overflow capacitor COF is not disposed on the layer where the transistor is located, but on another layer, so it is not shown in the figure.
[0046] The first reset module 113 in the first pixel unit 110a is disposed on the second side of the first region, that is, on the side of the first region close to the second region, for example, on the lower side of the first region; the first reset module 113 in the second pixel unit 110b is disposed on the second side of the second region, that is, on the side of the second region close to the first region, for example, on the upper side of the second region.
[0047] In the case where the first pixel unit 110a and the second pixel unit 110b share the first reset module 113, the shared first reset module 113 is located between the first region and the second region. Of course, it is feasible to set it closer to the first region or closer to the second region, and there is no restriction on this.
[0048] The readout module 114 in the first pixel unit 110a is at least disposed on the fourth side of the first region, that is, on the side opposite to the second side adjacent to the first side, for example, on the upper side of the first region; the readout module 114 in the second pixel unit 110b is at least disposed on the fourth side of the second region, that is, on the side opposite to the second side adjacent to the first side, for example, on the lower side of the second region. In this embodiment, the readout module 114 includes a source follower transistor M4 and a select transistor M5, wherein: In the first pixel unit 110a, the source follower transistor M4 is disposed in the first region, for example, at the center of the first region, and the selection transistor M5 is disposed on the fourth side of the first region, for example, on the upper side of the first region; in the second pixel unit 110b, the source follower transistor M4 is disposed in the second region, for example, at the center of the second region, and the selection transistor M5 is disposed on the fourth side of the second region, for example, on the lower side of the second region.
[0049] The first pixel unit 110a and the second pixel unit 110b share the second reset module 115, wherein the shared second reset module 115 is disposed between the first region and the second region. Specifically, when the first pixel unit 110a and the second pixel unit 110b do not share the first reset module 113, the second reset module 115 is disposed between the two first reset modules 113; when the first pixel unit 110a and the second pixel unit 110b share the first reset module 113, both the shared first reset module 113 and the shared reset module 115 are disposed between the first region and the second region. For example, the shared first reset module 113 is disposed closer to the first region, and the shared second reset module 115 is disposed closer to the second region. Alternatively, the shared first reset module 113 can be disposed closer to the second region, and the shared second reset module 115 can be disposed closer to the first region. In a specific implementation, the shared first reset module 113 and the shared second reset module 115 are arranged along the arrangement direction (e.g., column direction) of the first pixel unit 110a and the second pixel unit 110b.
[0050] When the first pixel unit 110a and the second pixel unit 110b further include a gain module 117, the gain module 117 in the first pixel unit 110a is disposed on the third side of the first region, that is, on the side opposite to the first side, for example, on the left side of the first region; the gain module 117 in the second pixel unit 110b is disposed on the third side of the second region, that is, on the side opposite to the first side, for example, on the left side of the second region.
[0051] like Figure 7 As shown, this embodiment also provides a control method for an image sensor 100, wherein the image sensor 100 is implemented using the circuit structure described above in this embodiment; the control method specifically includes a reset stage, an exposure stage, and a quantization stage, wherein the pixel unit to be controlled is denoted as the target pixel unit.
[0052] Reset phase: Reset operation is performed on the floating diffusion node FD, photosensitive module 111 and overflow module 112 corresponding to the target pixel unit.
[0053] Specifically, the overflow module 112, the first reset module 113, and the second reset module 115 corresponding to the target pixel unit are turned on, and the photosensitive module 111 corresponding to the target pixel unit is turned on and then turned off, in order to perform a reset operation on the floating diffusion node FD, the photosensitive module 111, and the overflow module 112 corresponding to the target pixel unit. Afterwards, the second reset module 115 corresponding to the target pixel unit is turned off. In practical applications, the second potential V2 corresponding to the second reset module 115 is a high potential throughout the reset phase to facilitate the rapid reset of the overflow module 112. As an optional solution, the second reset module 115 is turned off before the photosensitive module 111.
[0054] When gain module 116 is included, during the reset phase, gain module 116 corresponding to the target pixel unit is also turned on and then off. As an optional solution, the off time of gain module 116 precedes the off time of the second reset module 115. In practical applications, if the first pixel unit 110a and the second pixel unit 110b do not share the first reset module 113, when performing a reset operation on the target pixel unit, no requirements need to be placed on the other pixel unit; if the first pixel unit 110a and the second pixel unit 110b share the first reset module 113, when performing a reset operation on the target pixel unit, since the two pixel units share a gain node based on the first reset module 113, the gain module 116 corresponding to the other pixel unit is usually turned on and then off synchronously with the gain module 116 corresponding to the target pixel unit.
[0055] Exposure Stage: The overflow module 112 corresponding to the target pixel unit is turned on, and photogenerated electrons are accumulated based on the corresponding photosensitive module 111 to generate a pixel signal and an overflow signal. The pixel signal is stored in the corresponding photosensitive module 111, and the overflow signal is stored in the corresponding overflow module 112. In practical applications, since the overflow module 112 is not turned off after being turned on during the reset stage, it is not necessary to turn it on again during the exposure stage. As an optional solution, before exposure begins, the second potential V2 corresponding to the second reset module 115 is set to a low potential; after exposure ends, the second potential V2 corresponding to the second reset module 115 is set to a high potential.
[0056] When gain module 116 is included, during the exposure stage, since gain module 116 corresponding to the target pixel unit has been turned off during the reset stage, no other control actions are required; it can simply remain off. In practical applications, if the first pixel unit 110a and the second pixel unit 110b do not share the first reset module 113, no requirements need to be placed on the other pixel unit when performing an exposure operation on the target pixel unit. If the first pixel unit 110a and the second pixel unit 110b share the first reset module 113, the gain module 116 corresponding to the other pixel unit can remain off when performing an exposure operation on the target pixel unit. It should be noted that in other implementations of the overflow module 112, for example, where gain module 116 is needed as an overflow path, gain module 116 can also be kept on during the exposure stage to allow charge to overflow to overflow module 112.
[0057] Quantization stage: The overflow module 112 corresponding to the target pixel unit is turned off, and the first reset signal and pixel signal are quantized and read out based on the corresponding floating diffusion node FD; the overflow module 112 corresponding to the target pixel unit is turned on, the overflow signal is transferred to the corresponding floating diffusion node FD, and the floating diffusion node is reset, so as to quantize and read out the second reset signal and overflow signal based on the corresponding floating diffusion node.
[0058] In practical applications, the overflow signal can be quantized and read out first, followed by the second reset signal, or vice versa. As an optional approach, the readout method based on the overflow signal includes: opening the overflow module 112 corresponding to the target pixel unit, transferring the overflow signal to the corresponding floating diffusion node FD for quantization and readout, and then resetting the floating diffusion node FD to quantize and read out the second reset signal.
[0059] Specifically, the overflow module 112 corresponding to the target pixel unit is turned off, and the first reset signal is quantized and read out based on the floating diffusion node FD corresponding to the target pixel unit. Then, the photosensitive module 111 corresponding to the target pixel unit is turned on and then off, and the pixel signal is transferred to the corresponding floating diffusion node FD for quantization and readout. Also, the overflow module 112 corresponding to the target pixel unit is turned on, and the photosensitive module 111 corresponding to the target pixel unit is turned on and then off, and the overflow signal is transferred to the corresponding floating diffusion node FD for quantization and readout. Then, at least the first reset module 113 corresponding to the target pixel unit is turned on and then off, and a reset operation is performed on the floating diffusion node FD to quantize and read out the second reset signal. In practical applications, the first reset module 113 and the second reset module 115 corresponding to the target pixel unit are usually turned on and then off simultaneously to achieve a fast reset of the floating diffusion node FD.
[0060] As an optional approach, before quantization begins, the overflow module 112 and the first reset module 113 corresponding to the target pixel unit are turned off, and the readout module 114 is turned on. The closing time of the overflow module 112 is earlier than or the same as the opening time of the readout module 114, and the closing time of the first reset module 113 is later than the opening time of the readout module 114. During quantization, the readout module 114 can remain on at all times. Alternatively, it can be turned off before the second reset signal is read out and turned on after the first reset module 113 corresponding to the target pixel unit is turned off. Furthermore, the timing sequence between the turning on of the readout module 114 and the turning off of the first reset module 113 corresponds to the corresponding timing sequence in the exposure stage. Additionally, during the quantization of the overflow signal, the opening time of the overflow module 112 is earlier than the opening time of the photosensitive module 111. Moreover, the second potential V2 corresponding to the second reset module 115 remains high throughout the quantization stage.
[0061] When the gain module 116 is included, during the quantization stage, the first reset signal and the pixel signal are quantized and read out under different conversion gains (usually low conversion gain and high conversion gain), and the second reset signal and the overflow signal are quantized and read out under any conversion gain (usually low conversion gain).
[0062] Specifically, the gain module 116 corresponding to the target pixel unit is turned on and then off to quantize and read out the first reset signal under different conversion gains based on the corresponding floating diffusion node FD. Then, the gain module 116 corresponding to the target pixel unit is turned off and then on to quantize and read out the pixel signal under different conversion gains based on the corresponding floating diffusion node FD. For example, the gain module 116 corresponding to the target pixel unit is turned on, so that the target pixel unit operates at a low conversion gain, and the first reset signal (denoted as Lr) under the low conversion gain is quantized and read out based on the corresponding floating diffusion node FD; then the gain module 116 corresponding to the target pixel unit is turned off, so that the target pixel unit operates at a high conversion gain, and the first reset signal (denoted as Hr) under the high conversion gain is quantized and read out based on the corresponding floating diffusion node FD; then, the photosensitive module 111 corresponding to the target pixel unit is turned on and then turned off, the pixel signal is transferred to the corresponding floating diffusion node FD, and the pixel signal (denoted as Hs) under the high conversion gain is quantized and read out based on the corresponding floating diffusion node FD; then, the gain module 116 corresponding to the target pixel unit is turned on again, so that the target pixel unit operates at a low conversion gain, the photosensitive module 111 corresponding to the target pixel unit is turned on and then turned off, the pixel signal is transferred to the corresponding floating diffusion node FD, and the pixel signal (denoted as Ls) under the low conversion gain is quantized and read out based on the corresponding floating diffusion node FD.
[0063] The overflow module 112 and gain module 116 corresponding to the target pixel unit are turned on, and the photosensitive module 111 corresponding to the target pixel unit is turned on and then turned off. The overflow signal is transferred to the corresponding floating diffusion node FD for quantization and readout. Then, at least the first reset module 113 corresponding to the target pixel unit is turned on and then turned off to perform a reset operation on the floating diffusion node FD to quantize and read out the second reset signal. In a further optional scheme, the first reset module 113 and the second reset module 115 corresponding to the target pixel unit are turned on and then turned off simultaneously to achieve rapid reset of the floating diffusion node FD. For example, since the gain module 116 corresponding to the target pixel unit has already been turned on when quantizing and reading out the pixel signal under low conversion gain, no other control action is required, and it can always be turned on; turn on the overflow module 112 corresponding to the target pixel unit, and turn on and then turn off the photosensitive module 111 corresponding to the target pixel unit, transfer the overflow signal to the corresponding floating diffusion node FD, and quantize and read out the overflow signal (denoted as OFs) under low conversion gain based on the corresponding floating diffusion node FD; then, turn on and then turn off the first reset module 113 and the second reset module 115 corresponding to the target pixel unit, perform a reset operation on the floating diffusion node FD, and quantize and read out the second reset signal (denoted as OFr) under low conversion gain based on the floating diffusion node FD.
[0064] As an optional approach, before quantization begins, the overflow module 112 and the first reset module 113 corresponding to the target pixel unit are turned off, and the readout module 114 is turned on. The closing time of the overflow module 112 is earlier than or the same as the opening time of the readout module 114, and the closing time of the first reset module 113 is later than the opening time of the readout module 114. During quantization, the readout module 114 can remain on at all times. Alternatively, it can be turned off before the second reset signal is read out and turned on after the first reset module 113 corresponding to the target pixel unit is turned off. Furthermore, the timing sequence between the turning on of the readout module 114 and the turning off of the first reset module 113 corresponds to the corresponding timing sequence in the exposure stage. Additionally, during the quantization of the overflow signal, the opening time of the overflow module 112 is earlier than the opening time of the photosensitive module 111. Moreover, the second potential V2 corresponding to the second reset module 115 remains high throughout the quantization stage.
[0065] It is important to note that Figure 7 The relevant signal waveform is based on the first pixel unit 110a as the target pixel unit, wherein the signals corresponding to the first pixel unit and the second pixel unit are distinguished by (1) and (2). Example 2
[0066] like Figure 8 As shown, this embodiment provides an image sensor 100, which differs from the first embodiment in that: the first pixel unit 110a and the second pixel unit 110b no longer synchronously share the first reset module 113. Instead, the first pixel unit 110a and the second pixel unit 110b share the first reset module 113 with other pixel units respectively, thereby realizing the staggered sharing of the first reset module 113 and the second reset module 115.
[0067] The image sensor 100 of this embodiment, in addition to including the first pixel unit 110a and the second pixel unit 110b, also includes a third pixel unit 110c and a fourth pixel unit 110d with identical structures. The third pixel unit 110c and the fourth pixel unit 110d do not share the second reset module 115. Furthermore, the first pixel unit 110a and the third pixel unit 110c share the first reset module 113, and the second pixel unit 110b and the fourth pixel unit 110d also share the first reset module 113. It should be noted that "identical structures" means that, disregarding sharing, the equivalent circuit structures of each pixel unit are identical.
[0068] In a specific example, such as Figure 8As shown, each pixel unit includes a photosensitive module 111, an overflow module 112, a readout module 114, and a gain module 116. The overflow module 112 is coupled to the floating diffusion node FD, and the gain module 116 is coupled between the floating diffusion node FD and the first reset module 113. In addition, the first pixel unit 110a and the second pixel unit 110b share the second reset module 115, the third pixel unit 110c shares the second reset module 115 with another pixel unit, the fourth pixel unit 110d shares the second reset module 115 with another pixel unit, the first pixel unit 110a and the third pixel unit 110c share the first reset module 113, and the second pixel unit 110b and the fourth pixel unit 110d share the first reset module 113. The shared first reset module 113 is coupled to the corresponding two gain modules 116 to perform a reset operation on the corresponding floating diffusion node FD.
[0069] In this embodiment, the first pixel unit 110a, the second pixel unit 110b, the third pixel unit 110c, and the fourth pixel unit 110d are located in the same column. For example, the third pixel unit 110c, the first pixel unit 110a, the second pixel unit 110b, and the fourth pixel unit 110d are four adjacent pixel units in the same column. Typically, the first pixel unit 110a is located below the third pixel unit 110c, the second pixel unit 110b is located below the first pixel unit 110a, and the fourth pixel unit 110d is located below the second pixel unit 110b. Of course, in practical applications, the column containing the four pixel units may also include other pixel units, and there is no limitation on this. Furthermore, the first pixel unit 110a and the second pixel unit 110b are read through different column lines. For example, the first pixel unit 110a is read through the first column line BL1, and the second pixel unit 110b is read through the second column line BL2. Also, the first pixel unit 110a and the third pixel unit 110c are read through the same column line, and the second pixel unit 110b and the fourth pixel unit 110d are read through the same column line. For example, the first pixel unit 110a and the third pixel unit 110c are both read through the first column line BL1, and the second pixel unit 110b and the fourth pixel unit 110d are both read through the second column line BL2.
[0070] like Figure 9 As shown, this embodiment also provides an image sensor 100 layout structure, including the layout design of each device in each pixel unit, especially the layout design of each photosensitive element and each transistor; wherein, the image sensor 100 is implemented using the circuit structure described above in this embodiment, including a first pixel unit 110a, a second pixel unit 110b, a third pixel unit 110c and a fourth pixel unit 110d.
[0071] In this embodiment, the arrangement structure of the third pixel unit 110c is the same as that of the second pixel unit 110b, the arrangement structure of the fourth pixel unit 110d is the same as that of the first pixel unit 110a, and the arrangement structure of the first pixel unit 110a and the second pixel unit 110b is the same as that in Embodiment 1. For details, please refer to the above text, and it will not be repeated here.
[0072] This embodiment also provides a control method for an image sensor 100, wherein the image sensor 100 is implemented using the circuit structure described above in this embodiment; one of the first pixel unit 110a, the second pixel unit 110b, the third pixel unit 110c, and the fourth pixel unit 110d is controlled, wherein the pixel unit to be controlled is denoted as the target pixel unit, and the control method specifically includes a reset stage, an exposure stage, and a quantization stage, which are the same as in Embodiment 1. The relevant content can be found above and will not be repeated here.
[0073] In summary, the image sensor and its arrangement structure of this utility model saves pixel physical space, i.e., saves pixel area, by allowing the first pixel unit and the second pixel unit to share the second reset module, thus achieving a good performance balance; further, it saves pixel area by allowing the first pixel unit and the second pixel unit to synchronously share the first reset module or to share the first reset module in a staggered manner. Therefore, this utility model effectively overcomes the various shortcomings of the prior art and has high industrial application value.
[0074] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.
Claims
1. An image sensor, characterized by, It includes a first pixel unit and a second pixel unit, wherein: Both the first pixel unit and the second pixel unit include a floating diffusion node, a photosensitive module, an overflow module, a first reset module, and a readout module; The photosensitive module is coupled to the floating diffusion node for accumulating photogenerated electrons and transferring the photogenerated electrons to the floating diffusion node to read out the pixel signal; The overflow module is coupled to the photosensitive module and is used to store the photogenerated electrons overflowing from the photosensitive module in order to read out the overflow signal. The first reset module is coupled to the floating diffusion node and is used to perform a reset operation on the floating diffusion node to read out the reset signal; The readout module is coupled to the floating diffusion node and is used to read out the corresponding signal; The first pixel unit and the second pixel unit also share at least a second reset module, wherein the second reset module is coupled to the two overflow modules respectively, and is used to perform a reset operation on at least the two overflow modules.
2. The image sensor of claim 1, wherein, Both the first pixel unit and the second pixel unit further include a gain module, wherein the gain module is coupled between the floating diffusion node or between the floating diffusion node and the first reset module, and is used to switch between different conversion gains.
3. The image sensor of claim 2, wherein, When the gain module is coupled between the floating diffusion node and the first reset module, the first pixel unit and the second pixel unit also share the first reset module, wherein the shared first reset module is coupled to two of the gain modules respectively, for resetting at least two of the floating diffusion nodes; or, when the gain module is coupled between the floating diffusion node and the first reset module, the overflow module is changed from being coupled to the photosensitive module to being coupled to the gain module.
4. The image sensor according to any one of claims 1 to 3, characterized by The first pixel unit and the second pixel unit are located in the same column, wherein the first pixel unit and the second pixel unit are read out through different column lines, and are read out through the same column line as adjacent pixel units in the same column.
5. The image sensor of claim 2, wherein, When a gain module is included and the gain module is coupled between the floating diffusion node and the first reset module, a third pixel unit and a fourth pixel unit with the same structure are also included. The two do not share the second reset module, wherein: the first pixel unit and the third pixel unit share the first reset module, and the second pixel unit and the fourth pixel unit share the first reset module; wherein the shared first reset module is coupled to the corresponding two gain modules respectively, and is used to perform a reset operation on at least the corresponding two floating diffusion nodes.
6. The image sensor of claim 5, wherein, The first pixel unit, the second pixel unit, the third pixel unit, and the fourth pixel unit are located in the same column, wherein the first pixel unit and the second pixel unit are read out through different column lines, the first pixel unit and the third pixel unit are read out through the same column line, and the second pixel unit and the fourth pixel unit are read out through the same column line.
7. The image sensor according to claim 1 or 2, wherein The photosensitive module includes a transmission transistor and a photosensitive element, wherein the control terminal of the transmission transistor receives a transmission control signal, the first terminal of the transmission transistor is coupled to the floating diffusion node, and the second terminal of the transmission transistor is coupled to a first potential via the photosensitive element. And / or, the overflow module includes an overflow transistor and an overflow capacitor, wherein the control terminal of the overflow transistor receives an overflow control signal, the first terminal of the overflow transistor is coupled to the photosensitive module, and the second terminal of the overflow transistor is coupled to a second potential via the overflow capacitor; And / or, the first reset module includes a first reset transistor, wherein the control terminal of the first reset transistor receives a first reset control signal, the first terminal of the first reset transistor is coupled to a third potential, and the second terminal of the first reset transistor is coupled to the floating diffusion node; And / or, the readout module includes a source follower transistor and a select transistor, wherein the control terminal of the source follower transistor is coupled to the floating diffusion node, the first terminal of the source follower transistor is coupled to a fourth potential, the second terminal of the source follower transistor is coupled to the first terminal of the select transistor, the control terminal of the select transistor receives a select control signal, and the second terminal of the select transistor outputs a corresponding signal; And / or, the second reset module includes a second reset transistor, wherein the control terminal of the second reset transistor receives a second reset control signal, the first terminal of the second reset transistor is coupled to a fifth potential, and the second terminal of the second reset transistor is coupled to two of the overflow modules respectively; And / or, when a gain module is included, the gain module includes a gain transistor, wherein the control terminal of the gain transistor receives a gain control signal, the first terminal of the gain transistor is coupled to the first reset module or the sixth potential, and the second terminal of the gain transistor is coupled to the floating diffusion node.
8. The image sensor according to claim 7, characterized in that, When the overflow module includes an overflow capacitor, the overflow capacitors in the first pixel unit and the second pixel unit are coupled to a second potential through the same connection line.
9. An image sensor arrangement structure as described in any one of claims 1 to 8, characterized in that, include: The photosensitive module in the first pixel unit forms a first region based on a transmission transistor, and the photosensitive module in the second pixel unit forms a second region based on a transmission transistor; The overflow module in the first pixel unit is disposed on the first side of the first region, and the overflow module in the second pixel unit is disposed on the first side of the second region; The first reset module in the first pixel unit is disposed on the second side of the first region, and the first reset module in the second pixel unit is disposed on the second side of the second region; The readout module in the first pixel unit is at least disposed on the fourth side of the first region, and the readout module in the second pixel unit is at least disposed on the fourth side of the second region; The second reset module is disposed between the first region and the second region; In the corresponding region, the second side and the fourth side are arranged opposite to the first side, and the second side is the side of the corresponding region that is closer to the other region.
10. The image sensor arrangement structure according to claim 9, characterized in that, When a gain module is included, the gain module in the first pixel unit is disposed on the third side of the first region, and the gain module in the second pixel unit is disposed on the third side of the second region, wherein the first side and the third side are disposed opposite to each other in the corresponding regions.
11. The image sensor arrangement structure according to claim 9 or 10, characterized in that, Each pixel unit is located in the same column, wherein the first pixel unit and the second pixel unit are two adjacent pixel units in the same column; when a third pixel unit and a fourth pixel unit are included, the third pixel unit, the first pixel unit, the second pixel unit and the fourth pixel unit are four adjacent pixel units in the same column; and / or, when the first reset module is shared, both the second reset module and the shared first reset module are located between the first region and the second region.
12. The image sensor arrangement structure according to claim 9 or 10, characterized in that, The readout module includes a source follower transistor and a selection transistor, wherein: in the first pixel unit, the source follower transistor is disposed in the first region, and the selection transistor is disposed on the fourth side of the first region; in the second pixel unit, the source follower transistor is disposed in the second region, and the selection transistor is disposed on the fourth side of the second region.