A power supply device and its power management integrated circuit chip circuit board

Abstract

This utility model discloses a power supply device and a circuit board for its power management integrated circuit chip. The circuit board includes a power management integrated circuit chip and surrounding circuitry. The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The surrounding circuitry includes a first surrounding circuit, a second surrounding circuit, and a third surrounding circuit. The first surrounding circuit is connected to the buck-boost adjustment module via corresponding chip pins and is positioned close to the corresponding chip pins. The second surrounding circuit is connected to the buck core module via corresponding chip pins and is positioned close to the corresponding chip pins. The third surrounding circuit is connected to the safety control module via corresponding chip pins and is positioned close to the corresponding chip pins. The third surrounding circuit has a lower priority in proximity to the power management integrated circuit chip than the first and second surrounding circuits, achieving a reasonable layout and wiring of the circuit board, reducing noise and heat generation, and optimizing electromagnetic compatibility.

Description

Technical Field

[0001] This utility model relates to the field of PCB circuit technology, and in particular to a power supply device and a circuit board for its power management integrated circuit chip. Background Technology

[0002] Power management integrated circuits (PMICs) are chips specifically designed to manage the power supply of electronic systems. They are widely used in consumer electronics, communication equipment, automotive electronics, and industrial control. Their core functions include voltage conversion, power distribution, battery management, and power optimization, making them crucial components for the efficient and stable operation of modern electronic devices.

[0003] Power management integrated circuit chips are highly integrated power management chips. If their circuit board layout and wiring are not handled properly, problems such as noise, heat generation and poor electromagnetic compatibility may occur. Utility Model Content

[0004] This invention provides a power supply device and its power management integrated circuit chip circuit board, which reduces noise and heat generation and optimizes electromagnetic compatibility through reasonable layout and wiring of the circuit board.

[0005] According to one aspect of the present invention, a circuit board for a power management integrated circuit chip is provided, comprising: a power management integrated circuit chip and surrounding circuitry;

[0006] The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The peripheral circuit includes a first peripheral circuit, a second peripheral circuit, and a third peripheral circuit. The first peripheral circuit is connected to the buck-boost adjustment module via a corresponding chip pin and is positioned close to the corresponding chip pin. The second peripheral circuit is connected to the buck core module via a corresponding chip pin and is positioned close to the corresponding chip pin. The third peripheral circuit is connected to the safety control module via a corresponding chip pin and is positioned close to the corresponding chip pin.

[0007] The proximity priority of the third surrounding circuit to the power management integrated circuit chip is lower than that of the first surrounding circuit and the second surrounding circuit to the power management integrated circuit chip.

[0008] Optionally, the boost / buck adjustment module includes a buck adjustment unit and a boost adjustment unit;

[0009] The first peripheral circuitry includes a pre-output interface, a boost output interface, a first inductor, a second inductor, a first capacitor, a first resistor, a first diode, a first switching transistor, and a second switching transistor;

[0010] The first and second switching transistors are connected in series between the power supply and the ground terminal; the buck regulator unit is connected to the control terminal of the first switching transistor via the first pin of the chip; the buck regulator unit is also connected to the control terminal of the second switching transistor via the second pin of the chip; the connection point of the first and second switching transistors serves as the first connection point, which is connected to the buck regulator unit via the third pin of the power management integrated circuit chip; the first connection point is also connected to the pre-output interface via the first inductor and the first resistor in sequence; the pre-output interface is also grounded via the first capacitor; the buck regulator unit is also connected to both ends of the first resistor via the fourth and fifth pins of the chip, with the two connection lines arranged in parallel on the same layer.

[0011] The boost regulation unit is connected to the buck regulation unit. The boost regulation unit is also connected to the boost output interface via the sixth pin of the chip. One end of the second inductor is connected to the boost regulation unit via the seventh pin of the chip, and the other end is connected to the pre-output interface. The seventh pin is also connected to the sixth pin and the ground terminal via the first diode. The second inductor is positioned close to the seventh pin, and the first diode is positioned close to the second inductor.

[0012] Optionally, the first circuit formed by the first inductor, the first resistor, the second inductor, the first diode and the ground terminal, and the second circuit formed by the first inductor, the first resistor, the first capacitor and the ground terminal, can withstand a continuous current of not less than 4.5A and a maximum current of not less than 10A.

[0013] Optionally, the second surrounding circuit includes: a microcontroller power supply interface, a microcontroller ground interface, a third inductor, a fourth inductor, and a second capacitor;

[0014] The buck core module is connected to the microcontroller power supply interface via the eighth pin of the chip and the third inductor in sequence; the buck core module is also connected to the microcontroller power supply interface via the ninth pin of the chip and the fourth inductor in sequence, wherein the third inductor is positioned close to the eighth pin and the fourth inductor is positioned close to the ninth pin;

[0015] The microcontroller power supply interface is also grounded via the second capacitor; the step-down core module is connected to the microcontroller power supply interface via the tenth pin of the chip, and is also connected to the microcontroller ground interface via the eleventh pin of the chip, wherein the connection lines via the tenth pin and the eleventh pin are arranged on the same layer and in parallel.

[0016] Optionally, the third peripheral circuit includes: a power interface, a PI-type filter circuit, a third capacitor, a second diode, a third switching transistor, and a fourth switching transistor;

[0017] The power interface is connected to the safety control module via the PI-type filter circuit, the second diode, and the twelfth pin of the chip in sequence; one end of the third capacitor is connected to the twelfth pin, and the other end is grounded.

[0018] The third and fourth switching transistors are connected in series between the PI-type filter circuit and the thirteenth pin of the chip, and the thirteenth pin is also connected to the safety control module; the connection point of the third and fourth switching transistors is connected to the safety control module via the fourteenth pin of the chip; the control terminals of the third and fourth switching transistors are also connected to the safety control module via the fifteenth pin of the chip, wherein the cross-sectional area of ​​the external connection lines of the thirteenth and fourteenth pins is larger than that of the internal connection lines.

[0019] Optionally, the power management integrated circuit chip further includes at least one voltage regulator module; the peripheral circuit further includes a fourth peripheral circuit.

[0020] The fourth surrounding circuit includes a voltage regulator interface and a fourth capacitor corresponding to the voltage regulator module. The voltage regulator module is connected to its corresponding voltage regulator interface via the corresponding fifteenth pin on the chip.

[0021] The fourth capacitor is positioned close to the corresponding fifteenth pin, with one end connected to the corresponding fifteenth pin and the other end grounded.

[0022] Optionally, the power management integrated circuit chip further includes a main control module; the peripheral circuit further includes a fifth peripheral circuit.

[0023] The fifth peripheral circuit includes a serial clock interface, a master transmit / slave receive interface, a master receive / slave transmit interface, a chip select interface, and a reset interface. The serial clock interface is connected to the main control module via pin 16 of the chip. The master transmit / slave receive interface is connected to the main control module via pin 17 of the chip. The master receive / slave transmit interface is connected to the main control module via pin 18 of the chip. The chip select interface is connected to the main control module via pin 19 of the chip. The reset interface is connected to the main control module via pin 20 of the chip. The external chip connection lines via pins 16, 17, and 18 are parallel and wrapped with ground lines, which are grounded at preset intervals.

[0024] Optionally, the external chip connection line via the sixteenth pin is separately grounded; the external chip connection line via the twentieth pin is also grounded.

[0025] Optionally, the power management integrated circuit chip is disposed on the top layer, and the main return ground plane is disposed on the second layer;

[0026] The power management integrated circuit chip on the circuit board has multiple heat dissipation holes in the corresponding pad area.

[0027] According to another aspect of the present invention, a power supply device is provided, the device comprising a circuit board of a power management integrated circuit chip as described in any of the first aspects.

[0028] This utility model proposes a power supply device and a circuit board for its power management integrated circuit chip. The circuit board includes a power management integrated circuit chip and surrounding circuitry. The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The surrounding circuitry includes a first surrounding circuit, a second surrounding circuit, and a third surrounding circuit. The first surrounding circuit is connected to the buck-boost adjustment module via corresponding chip pins and is positioned close to the corresponding chip pins. The second surrounding circuit is connected to the buck core module via corresponding chip pins and is positioned close to the corresponding chip pins. The third surrounding circuit is connected to the safety control module via corresponding chip pins and is positioned close to the corresponding chip pins. The third surrounding circuit has a lower priority in proximity to the power management integrated circuit chip than the first and second surrounding circuits, achieving a reasonable layout and wiring of the circuit board, reducing noise and heat generation, and optimizing electromagnetic compatibility.

[0029] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 A schematic diagram of the circuit board composition of a power management integrated circuit chip provided for an embodiment of this utility model;

[0032] Figure 2 A schematic diagram of the layout of a step-up / step-down voltage regulation module and a first surrounding circuit provided for an embodiment of this utility model;

[0033] Figure 3 A schematic diagram of the layout of a step-down core module and a second surrounding circuit provided for an embodiment of this utility model;

[0034] Figure 4 A schematic diagram of the layout of a safety control module and a third surrounding circuit provided for an embodiment of this utility model;

[0035] Figure 5 A schematic diagram of the layout of a voltage regulator module and a fourth surrounding circuit provided for an embodiment of this utility model;

[0036] Figure 6 A schematic diagram of the layout of a main control module and a fifth surrounding circuit provided for an embodiment of this utility model;

[0037] Figure 7 A schematic diagram illustrating the grounding of four connecting wires provided in an embodiment of this utility model;

[0038] Figure 8 A schematic diagram of the front and back sides of a corresponding area of ​​a pad on a circuit board provided for an embodiment of this utility model;

[0039] Figure 9 This is a schematic diagram of the composition of a power supply device provided in an embodiment of the present utility model. Detailed Implementation

[0040] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0041] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not explicitly listed or inherent to such processes, methods, products, or devices.

[0042] To address the problems mentioned in the background art, this utility model provides a circuit board for a power management integrated circuit chip. Figure 1This is a schematic diagram of the circuit board composition of a power management integrated circuit chip according to an embodiment of the present invention, with reference to... Figure 1 The circuit board 100 of the power management integrated circuit chip 101 includes the power management integrated circuit chip 101 and peripheral circuits 102. The power management integrated circuit chip 101 includes a buck-boost adjustment module 103, a buck core module 104, and a safety control module 105. The peripheral circuits 102 include a first peripheral circuit 106, a second peripheral circuit 107, and a third peripheral circuit 108. The first peripheral circuit 106 is connected to the buck-boost adjustment module 103 via corresponding chip pins and is positioned close to the corresponding chip pins. The second peripheral circuit 107 is connected to the buck core module 104 via corresponding chip pins and is positioned close to the corresponding chip pins. The third peripheral circuit 108 is connected to the safety control module 105 via corresponding chip pins and is positioned close to the corresponding chip pins. The proximity priority of the third peripheral circuit 108 to the power management integrated circuit chip 101 is lower than that of the first peripheral circuit 106 and the second peripheral circuit 107.

[0043] Specifically, the power management integrated circuit chip 101 is a chip used to manage the power supply in electronic devices, responsible for the conversion, distribution, and monitoring of electrical energy. It includes multiple functional circuits, each of which is connected to its corresponding peripheral circuit 102 outside the chip via its corresponding pin. The peripheral circuit 102 is an external auxiliary circuit of the power management integrated circuit chip 101, which can assist the power management integrated circuit chip 101 in completing its corresponding functions.

[0044] The buck-boost module 103, also known as the buck-boost module, is a functional component in the power management integrated circuit chip 101 used to adjust the buck-boost voltage of the connected power supply. Exemplarily, the buck-boost module 103 may include a two-stage adjustment unit: a buck adjustment unit and a boost adjustment unit. The buck adjustment unit performs pre-adjustment of the connected power supply to a lower voltage level, while the boost adjustment unit boosts the lower voltage as needed and outputs a secondary regulated voltage. The first peripheral circuit 106 is an external peripheral circuit 102 corresponding to the buck-boost module 103. It assists the buck-boost module 103 in adjusting the buck-boost levels and providing feedback sampling of the output power supply. It can also utilize the power generated by the buck-boost module 103 to provide external power. Exemplarily, the first peripheral circuit 106 may include two-stage power output interfaces, switching transistors, capacitors, inductors, sampling resistors, and diodes. The buck-boost adjustment module 103 is connected to the first peripheral circuit 106 via the corresponding chip pins. The components in the first peripheral circuit 106 are arranged close to the connected chip pins, which reduces the line length of the first peripheral circuit 106 and makes the component distribution of the first peripheral circuit 106 more concentrated, thereby improving the power supply quality of the buck-boost adjustment module 103 to the external power supply of the chip.

[0045] The buck converter core module 104 refers to the high-efficiency buck conversion circuit component in the power management integrated circuit chip 101. It is specifically designed to power the core control device in the device corresponding to the chip. Based on the buck-boost adjustment module 103, it can step down the power supply connected to the chip to a lower voltage level and adjust the output voltage in real time. For example, the core control device in the corresponding device can be a microcontroller. The second peripheral circuit 107 is the external peripheral circuit 102 corresponding to the buck converter core module 104. It assists the buck converter core module 104 in achieving efficient buck conversion and output voltage adjustment. For example, the second peripheral circuit 107 may include an output interface for the core power supply, inductors, resistors, and capacitors. The chip pins corresponding to the buck converter core module 104 are connected to the second peripheral circuit 107. The components in the second peripheral circuit 107 are positioned close to the connected chip pins, reducing the line length of the second peripheral circuit 107 and making the component distribution of the second peripheral circuit 107 more concentrated, thus improving the power supply quality of the buck converter core module 104 to the external core control device.

[0046] The safety control module 105 refers to the circuit component in the power management integrated circuit chip 101 that performs safety detection and on / off protection on the power supply connected to the chip. It can be located before the buck-boost regulator module 103 and the buck core module 104, performing safety detection on the power supply before it is connected to them. If the power supply is safe, it maintains power supply to the subsequent circuits; otherwise, it triggers a protection mechanism to cut off power supply to the subsequent circuits. The third peripheral circuit 108 is the external peripheral circuit 102 corresponding to the safety control module 105. It assists the safety control module 105 in achieving safety detection of the power supply and on / off protection of the subsequent circuits. For example, the third peripheral circuit 108 may include a filter circuit and on / off control devices. The chip pins corresponding to the safety control module 105 are connected to the third peripheral circuit 108. The components in the third peripheral circuit 108 are positioned close to the connected chip pins, reducing the line length of the third peripheral circuit 108 and making the component distribution of the third peripheral circuit 108 more concentrated, thereby improving the safety detection reliability and on / off control response speed of the safety control module 105.

[0047] The proximity priority of the third surrounding circuit 108 to the power management integrated circuit chip 101 is lower than that of the first surrounding circuit 106 and the second surrounding circuit 107. When the pin pitch of the power management integrated circuit chip 101 is large enough to allow the first surrounding circuit 106, the second surrounding circuit 107, and the third surrounding circuit 108 to be tightly attached to their respective connected chip pins, the three surrounding circuits 102 can be tightly attached to their connected pins. However, in actual production layouts, the pin pitch of the power management integrated circuit chip 101 is often small, making it impossible to ensure that the first surrounding circuit 106, the second surrounding circuit 107, and the third surrounding circuit 108 are all tightly attached to their respective connected chip pins. In this case, priority is given to ensuring that the distance between the first surrounding circuit 106 and the second surrounding circuit 107 and their corresponding chip pins is small enough. The third surrounding circuit 108 can be positioned further away from its corresponding chip pin, and the line length between it and its corresponding chip pin can be longer than that of the first surrounding circuit 106 and the second surrounding circuit 107, to make room for the first surrounding circuit 106 and the second surrounding circuit 107 to be closer to the chip. This configuration can, to a certain extent, guarantee the reliability and stability of the chip's main functional components.

[0048] The power management integrated circuit chip circuit board provided in this embodiment includes a power management integrated circuit chip and surrounding circuitry. The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The surrounding circuitry includes a first surrounding circuit, a second surrounding circuit, and a third surrounding circuit. The first surrounding circuit is connected to the buck-boost adjustment module via corresponding chip pins and is positioned close to those pins. The second surrounding circuit is connected to the buck core module via corresponding chip pins and is positioned close to those pins. The third surrounding circuit is connected to the safety control module via corresponding chip pins and is positioned close to those pins. The third surrounding circuit has a lower proximity priority to the power management integrated circuit chip than the first and second surrounding circuits, achieving a reasonable layout and wiring of the circuit board, reducing noise and heat generation, and optimizing electromagnetic compatibility.

[0049] Optionally, Figure 2 A schematic diagram of the layout of a step-up / step-down voltage regulation module and a first surrounding circuit provided for an embodiment of this utility model, with reference to... Figure 2 The buck-boost adjustment module 103 includes a buck adjustment unit 201 and a boost adjustment unit 202. The first peripheral circuit 106 includes a pre-output interface VPRE, a boost output interface VB, a first inductor L1, a second inductor L2, a first capacitor C1, a first resistor R1, a first diode D1, a first switch Q1, and a second switch Q2. The first switching transistor Q1 and the second switching transistor Q2 are connected in series between the power supply and the ground terminal GND; the buck regulator unit 201 is connected to the control terminal of the first switching transistor Q1 via the first pin R1HS of the chip; the buck regulator unit 201 is also connected to the control terminal of the second switching transistor Q2 via the second pin R1LS of the chip; the connection point of the first switching transistor Q1 and the second switching transistor Q2 serves as the first connection point m1, which is connected to the buck regulator unit 201 via the third pin R1SW of the power management integrated circuit chip; the first connection point m1 is also connected to the pre-output interface VPRE via the first inductor L1 and the first resistor R1 in sequence; the pre-output interface VPRE is also grounded via the first capacitor C1; the buck regulator unit 201 is also connected to the two ends of the first resistor R1 via the fourth pin R1CS1 and the fifth pin R1FB of the chip, with the two connection lines arranged in parallel on the same layer.

[0050] The boost regulator 202 is connected to the buck regulator 201. The boost regulator 202 is also connected to the boost output interface VB via the sixth pin BSFTB of the chip. One end of the second inductor L2 is connected to the boost regulator 202 via the seventh pin BSTI of the chip, and the other end is connected to the pre-output interface VPRE. The seventh pin BSTI is also connected to the sixth pin BSFTB and the ground terminal GND via the first diode D1. The second inductor L2 is positioned close to the seventh pin BSTI, and the first diode D1 is positioned close to the second inductor L2.

[0051] Specifically, the buck regulator 201 and the boost regulator 202 are two-stage adjustment circuits in the buck-boost regulation module 103. The buck regulator 201, also called the Buck pre-regulation unit, pre-regulates the power supply connected to the chip, reducing the voltage to an intermediate level before outputting it. The boost regulator 202, also called the Boost regulator unit, boosts the intermediate voltage as needed and outputs a secondary regulated voltage. Both the first switch Q1 and the second switch Q2 can be NPN transistors. The buck regulator 201 can output a high level via its first pin R1HS, which is applied to the control terminal of the first switch Q1 (the base of the NPN transistor). The buck regulator 201 can also output a low level via its second pin R1LS, which is applied to the control terminal of the second switch Q2 (the base of the NPN transistor). The emitter of the first switching transistor Q1 is connected to the collector of the second switching transistor Q2 as the first connection point m1. The buck regulator 201 can output a switching signal to the first connection point m1 via the third pin R1SW.

[0052] The pre-output interface VPRE is one of the external power supply interfaces of the circuit board, which can output the intermediate voltage generated after the first-stage buck pre-regulation of the connected power supply through the buck regulator unit 201. The boost output interface VB is also one of the external power supply interfaces of the circuit board, which can output the secondary regulated voltage generated after the intermediate voltage is boosted by the second-stage regulator. For example, the intermediate voltage and the secondary regulated voltage can be 3.3V and 5V, respectively.

[0053] The second inductor L2 is positioned close to the sixth pin BSFFB, and the first diode D1 is positioned close to the second inductor L2. The traces forming the first loop (passing through the first inductor L1, first resistor R1, second inductor L2, first diode D1, and ground GND) and the second loop (passing through the first inductor L1, first resistor R1, first capacitor C1, and ground GND) should be as short as possible to concentrate the area of ​​the first surrounding circuit 106 around the chip pins corresponding to the buck-boost adjustment module 103. The first and second loops can withstand a continuous current of not less than 4.5A; for example, the continuous current they can withstand is 4.5A. The first and second loops can withstand a maximum current of not less than 10A; for example, the maximum current they can withstand is 10A. The trace widths of the first and second loops should be considered holistically, taking into account current requirements and the number of copper layers, etc., and will not be elaborated here. The buck regulator 201 is connected to the two connecting lines of the first resistor R1 via the fourth pin R1CS1 and the fifth pin R1FB of the chip. These two connecting lines can be used as sampling signal lines for the voltage across the first resistor R1. Pseudo-differential routing (or pseudo-differential routing) is required. These two signal lines do not cross layers and are set in parallel. Parallel routing means that they are routed in parallel in the same direction to reduce the length difference and environmental differences between the two lines and improve the reliability of the sampling data.

[0054] Optionally, Figure 3 A schematic diagram of the layout of a step-down core module and a second surrounding circuit provided for an embodiment of this utility model, with reference to... Figure 3 The second peripheral circuit 107 includes a microcontroller power supply interface VCORE, a microcontroller ground interface T, a third inductor L3, a fourth inductor L4, and a second capacitor C2. The buck core module 104 is connected to the microcontroller power supply interface VCORE sequentially via the chip's eighth pin R2SW and the third inductor L3; the buck core module 104 is also connected to the microcontroller power supply interface VCORE sequentially via the chip's ninth pin R3SW and the fourth inductor L4, wherein the third inductor L3 is positioned close to the eighth pin R2SW, and the fourth inductor L4 is positioned close to the ninth pin R3SW. The microcontroller power supply interface VCORE is also grounded via the second capacitor C2; the buck core module 104 is connected to the microcontroller power supply interface VCORE via the chip's tenth pin R3FBH, and also connected to the microcontroller ground interface T via the chip's eleventh pin R3FBL, wherein the connection lines via the tenth pin R3FBH and the eleventh pin R3FBL are on the same layer and arranged in parallel.

[0055] Specifically, the VCORE power supply interface is a separate power supply interface for the chip to supply power to the microcontroller, providing a stable power supply for the microcontroller in the application device. The buck core module 104 and its corresponding second peripheral circuit 107 are key components that distinguish the power management integrated circuit chip of this application from other power chips. Existing power chips can only output two voltage levels; for example, a DC-DC power chip can only output 3.3V and 5V. To further power a microcontroller, a low-dropout linear regulator is required. The power management integrated circuit chip of this application incorporates a buck core module 104 within the chip to achieve a stable power supply to the external microcontroller.

[0056] The third inductor L3 is positioned adjacent to the eighth pin R2SW, and the fourth inductor L4 is positioned adjacent to the ninth pin R3SW. The third circuit, consisting of the eighth pin R2SW, the third inductor L3, the second capacitor C2, and the ground terminal, can withstand a continuous current of not less than 5.83A. For example, the return path of the third circuit requires a current of 5.83A. The fourth circuit, consisting of the ninth pin R3SW, the fourth inductor L4, the second capacitor C2, and the ground terminal, can withstand a continuous current of not less than 5.83A. For example, the return path of the fourth circuit requires a current of 5.83A. The connection between the tenth pin R3FBH of the chip and the microcontroller power supply interface VCORE, and the connection between the eleventh pin R3FBL of the chip and the microcontroller ground interface T, can be two analog signal lines connecting the buck converter core module 104 and the microcontroller. Appropriate resistors can be set on these two connecting lines. The wiring should not cross layers and should be set in parallel. Parallel setting means that the wiring should be parallel in the same direction and direction to reduce the length difference between the two lines and the environmental differences, so as to improve the reliability of the sampling data.

[0057] Optionally, Figure 4 A schematic diagram of the layout of a safety control module and a third surrounding circuit provided for an embodiment of this utility model, with reference to... Figure 4The third peripheral circuit 108 includes a power interface Vd, a PI-type filter circuit 401, a third capacitor C3, a second diode D2, a third switch Q3, and a fourth switch Q4. The power interface Vd is connected to the safety control module 105 via the PI-type filter circuit 401, the second diode D2, and the twelfth pin VS of the chip. One end of the third capacitor C3 is connected to the twelfth pin VS, and the other end is grounded. The third switch Q3 and the fourth switch Q4 are connected in series between the PI-type filter circuit 401 and the thirteenth pin SSC-S of the chip. The thirteenth pin SSC-S is also connected to the safety control module 105. The connection point of the third switch Q3 and the fourth switch Q4 is connected to the safety control module 105 via the fourteenth pin SSC-D of the chip. The control terminals of the third switch Q3 and the fourth switch Q4 are also connected to the safety control module 105 via the fifteenth pin SSC-G of the chip. The cross-sectional area of ​​the external connection lines of the thirteenth pin SSC-S and the fourteenth pin SSC-D is larger than that of the internal connection lines.

[0058] Specifically, the power interface Vd refers to the interface through which the power management integrated circuit chip connects to the power supply. For example, the external power supply can be a DC power supply provided by an energy storage battery. The PI-type filter circuit 401 is a pre-filter component before the external power supply enters the subsequent related processing circuit. It includes a fourth inductor and a fourth capacitor and a fifth capacitor respectively located between the two ends of the fourth inductor and the ground terminal. Pin 12 VS can be used as a sampling pin for the external power supply to detect whether the voltage and / or current of the external power supply is normal, thereby controlling the switching of the third switch Q3 and the fourth switch Q4, thus realizing the power-on / off control of the subsequent circuit. For example, the third switch Q3 and the fourth switch Q4 can be field-effect transistors. Pins 13 SSC-S and 14 SSC-D have thickened traces after exiting the chip, capable of withstanding a continuous current greater than 2.41A. For example, the path flow requirement for the external connection lines of pins 13 SSC-S and 14 SSC-D is 2.41A to ensure that the external traces are thick enough to reduce the risk of overheating.

[0059] The third surrounding circuit 108 has a lower priority in terms of distance from the chip than the second and first surrounding circuits. In other words, the third surrounding circuit 108 can be slightly farther away from the chip, and the three lines connected to the chip by pins 13 (SSC-S), 14 (SSC-D), and 15 (SSC-G) can be longer than the two lines connected to the chip by pins 8 and 9, in order to ensure the stability and reliability of the external power supply of the buck-boost regulator module and the buck core module.

[0060] Optionally, Figure 5 A schematic diagram of the layout of a voltage regulator module and a fourth surrounding circuit provided for an embodiment of this utility model, with reference to... Figure 5The power management integrated circuit chip also includes at least one voltage regulator module 501; the peripheral circuitry also includes a fourth peripheral circuit 502. The fourth peripheral circuit 502 includes a regulated power supply interface VQ corresponding to the voltage regulator module 501 and a fourth capacitor C4. The voltage regulator module 501 is connected to its corresponding regulated power supply interface VQ via its corresponding fifteenth pin QUC on the chip. The fourth capacitor C4 is positioned close to its corresponding fifteenth pin QUC, with one end connected to the corresponding fifteenth pin QUC and the other end grounded.

[0061] Specifically, multiple voltage regulator modules 501 can be configured, depending on the needs of the electrical equipment. For example, four voltage regulator modules 501 can be configured. The pre-amplifier power supply circuit of the voltage regulator module 501 can be a buck-boost regulator module. The voltage regulator module 501 is used to further regulate the power supply output to the electrical equipment to ensure the stability and reliability of the output power supply. The regulated power supply interface VQ refers to the interface that provides regulated power to the electrical equipment. One voltage regulator module 501 can correspond to multiple regulated power supply interfaces VQ. The fourth capacitor C4 is a voltage regulator capacitor, which is set between the regulated power supply interface VQ and the ground terminal. The fourth capacitor C4 is set close to the fifteenth pin QUC. The ground terminal GND connected to the fourth capacitor C4 needs to be set in a ground hole corresponding to the number of its corresponding regulated power supply interfaces VQ, thereby forming a stable power supply circuit for the electrical equipment. For example, when the number of regulated power supply interfaces VQ connected to one fourth capacitor C4 is 5, the number of ground holes set on the ground side of the fourth capacitor C4 is also 5.

[0062] Optionally, Figure 6 A schematic diagram of the layout of a main control module and a fifth surrounding circuit provided for an embodiment of this utility model, with reference to... Figure 6 The power management integrated circuit chip also includes a main control module 601; the main control module 601 may include a serial communication unit 603, a microcontroller unit 604, and a restart control unit 605. The peripheral circuitry also includes a fifth peripheral circuit 602. The fifth peripheral circuit 602 includes a serial clock interface x1, a master-slave transmit / receive interface x2, a master-receive / slave transmit interface x3, a chip select interface x4, and a restart interface x5. The serial clock interface x1 is connected to the main control module 601 via pin y1 of the chip. The master-slave transmit / receive interface x2 is connected to the main control module 601 via pin y2 of the chip; the master-receive / slave transmit interface x3 is connected to the main control module 601 via pin y3 of the chip; the chip select interface x4 is connected to the main control module 601 via pin y4 of the chip; and the restart interface x5 is connected to the main control module 601 via pin y5 of the chip. The external connection lines via pins y1, y2, and y3 are parallel and wrapped with ground wires, with the ground wires spaced at a predetermined length.

[0063] Specifically, the main control module 601 refers to the component that enables communication and control connection with the electrical equipment and is the control center of the power management integrated circuit chip. Pins 16 (y1), 17 (y2), and 18 (y3) can also be referred to as the SCK pin, MOSI pin, and MISO pin, respectively. They are connected to the serial communication unit 603 in the main control module 601 within the chip to realize serial communication between the main control module 601 and the electrical equipment. The external connection lines of these three pins are parallel and grounded. The grounding can be that the three external connection lines of pins 16 (y1), 17 (y2), and 18 (y3) are all grounded together, or the three connection lines are grounded separately or in groups.

[0064] Pin 19, y4, can be called the SCN pin. It is connected to the serial communication unit 603 in the main control module 601 within the chip, enabling the device to select the power management integrated circuit chip. The external connection line of pin 19, y4, can be parallel to the three external connection lines of pins 16, y1, y2, and y3 and wrapped with the same ground line, or it can be wrapped with a ground line separately. Figure 7 This is a schematic diagram illustrating the grounding configuration of four connecting wires according to an embodiment of the present invention. Figure 7 The diagram shows the case where the three external connection lines of pins 16 (y1), 17 (y2), and 18 (y3) are all wrapped with ground wire, but the external connection line of pin 19 (y4) is wrapped with ground wire separately. Furthermore, pin 20 (y5), also known as the reset pin, enables the device to control the restart of the power management integrated circuit chip. The external connection line via pin 20 (y5) is also wrapped with ground wire, with 25mm gaps between the ground wires and vias in the ground plane. This grounding significantly reduces crosstalk between signal lines and improves power control accuracy.

[0065] It is important to note that the ground wires are grounded at a preset length, and the grounding point is connected to the main return current ground plane of the circuit board. To further reduce heat dissipation issues on the circuit board, the power management integrated circuit chip is placed on the top layer of the circuit board, and the main return current ground plane is placed on the second layer of the circuit board, ensuring the integrity of the main return current ground plane on the second layer. In other words, the entire second layer is the main return current ground plane and is not divided or partially cut off by metal wires. Figure 8 This utility model provides a front and back schematic diagram of the corresponding area of ​​the pads on a circuit board, combined with... Figure 8The power management integrated circuit chip on the circuit board has multiple heat dissipation holes on its corresponding pad area. These holes are arranged in an array on the pad area, and are left open without being plugged. For example, the heat dissipation holes on the pads are circular, with a diameter of 0.4mm. Heat dissipation holes are also provided in the connection areas corresponding to the power and ground interfaces of the capacitors in the surrounding circuitry. This not only ensures current flow and reduces parasitic inductance, but also effectively dissipates heat through vias and the copper surface, facilitating heat dissipation after drilling and copper pouring.

[0066] This utility model embodiment also provides a power supply device. Figure 9 This is a schematic diagram of the composition of a power supply device provided in an embodiment of the present utility model. Based on the foregoing embodiments, refer to... Figure 9 The power supply device 900 includes a circuit board containing any of the aforementioned power management integrated circuit chips.

[0067] The power supply device and its circuit board for the power management integrated circuit chip provided by this utility model include a power management integrated circuit chip and surrounding circuitry. The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The surrounding circuitry includes a first surrounding circuit, a second surrounding circuit, and a third surrounding circuit. The first surrounding circuit is connected to the buck-boost adjustment module via corresponding chip pins and is positioned close to those pins. The second surrounding circuit is connected to the buck core module via corresponding chip pins and is positioned close to those pins. The third surrounding circuit is connected to the safety control module via corresponding chip pins and is positioned close to those pins. The third surrounding circuit has a lower priority in proximity to the power management integrated circuit chip than the first and second surrounding circuits, achieving a reasonable layout and wiring of the circuit board, reducing noise and heat generation, and optimizing electromagnetic compatibility.

[0068] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A circuit board for a power management integrated circuit chip, characterized by, include: Power management integrated circuit chips and surrounding circuitry; The power management integrated circuit chip includes a buck-boost adjustment module, a buck core module, and a safety control module. The peripheral circuit includes a first peripheral circuit, a second peripheral circuit, and a third peripheral circuit. The first peripheral circuit is connected to the buck-boost adjustment module via a corresponding chip pin and is positioned close to the corresponding chip pin. The second peripheral circuit is connected to the buck core module via a corresponding chip pin and is positioned close to the corresponding chip pin. The third peripheral circuit is connected to the safety control module via a corresponding chip pin and is positioned close to the corresponding chip pin. The proximity priority of the third surrounding circuit to the power management integrated circuit chip is lower than that of the first surrounding circuit and the second surrounding circuit to the power management integrated circuit chip.

2. The circuit board of claim 1, wherein The boost / boost adjustment module includes a buck adjustment unit and a boost adjustment unit; The first peripheral circuitry includes a pre-output interface, a boost output interface, a first inductor, a second inductor, a first capacitor, a first resistor, a first diode, a first switching transistor, and a second switching transistor; The first and second switching transistors are connected in series between the power supply and the ground terminal; the buck regulator unit is connected to the control terminal of the first switching transistor via the first pin of the chip; the buck regulator unit is also connected to the control terminal of the second switching transistor via the second pin of the chip; the connection point of the first and second switching transistors serves as the first connection point, which is connected to the buck regulator unit via the third pin of the power management integrated circuit chip; the first connection point is also connected to the pre-output interface via the first inductor and the first resistor in sequence; the pre-output interface is also grounded via the first capacitor; the buck regulator unit is also connected to both ends of the first resistor via the fourth and fifth pins of the chip, with the two connection lines arranged in parallel on the same layer. The boost regulation unit is connected to the buck regulation unit. The boost regulation unit is also connected to the boost output interface via the sixth pin of the chip. One end of the second inductor is connected to the boost regulation unit via the seventh pin of the chip, and the other end is connected to the pre-output interface. The seventh pin is also connected to the sixth pin and the ground terminal via the first diode. The second inductor is positioned close to the seventh pin, and the first diode is positioned close to the second inductor.

3. The circuit board of claim 2, wherein The first circuit formed by the first inductor, the first resistor, the second inductor, the first diode, and the ground terminal, and the second circuit formed by the first inductor, the first resistor, the first capacitor, and the ground terminal, can withstand a continuous current of not less than 4.5A and a maximum current of not less than 10A.

4. The circuit board of claim 1, wherein The second peripheral circuit includes: a microcontroller power supply interface, a microcontroller grounding interface, a third inductor, a fourth inductor, and a second capacitor; The buck core module is connected to the microcontroller power supply interface via the eighth pin of the chip and the third inductor in sequence; the buck core module is also connected to the microcontroller power supply interface via the ninth pin of the chip and the fourth inductor in sequence, wherein the third inductor is positioned close to the eighth pin and the fourth inductor is positioned close to the ninth pin; The microcontroller power supply interface is also grounded via the second capacitor; the step-down core module is connected to the microcontroller power supply interface via the tenth pin of the chip, and is also connected to the microcontroller ground interface via the eleventh pin of the chip, wherein the connection lines via the tenth pin and the eleventh pin are arranged on the same layer and in parallel.

5. The circuit board of claim 1, wherein The third peripheral circuit includes: a power interface, a PI-type filter circuit, a third capacitor, a second diode, a third switching transistor, and a fourth switching transistor; The power interface is connected to the safety control module via the PI-type filter circuit, the second diode, and the twelfth pin of the chip in sequence; one end of the third capacitor is connected to the twelfth pin, and the other end is grounded. The third and fourth switching transistors are connected in series between the PI-type filter circuit and the thirteenth pin of the chip, and the thirteenth pin is also connected to the safety control module; the connection point of the third and fourth switching transistors is connected to the safety control module via the fourteenth pin of the chip; the control terminals of the third and fourth switching transistors are also connected to the safety control module via the fifteenth pin of the chip, wherein the cross-sectional area of ​​the external connection lines of the thirteenth and fourteenth pins is larger than that of the internal connection lines.

6. The circuit board of claim 1, wherein The power management integrated circuit chip also includes at least one voltage regulator module; the peripheral circuit also includes a fourth peripheral circuit. The fourth surrounding circuit includes a voltage regulator interface and a fourth capacitor corresponding to the voltage regulator module. The voltage regulator module is connected to its corresponding voltage regulator interface via the corresponding fifteenth pin on the chip. The fourth capacitor is positioned close to the corresponding fifteenth pin, with one end connected to the corresponding fifteenth pin and the other end grounded.

7. The circuit board of claim 1, wherein The power management integrated circuit chip also includes a main control module; the peripheral circuit also includes a fifth peripheral circuit. The fifth peripheral circuit includes a serial clock interface, a master transmit / slave receive interface, a master receive / slave transmit interface, a chip select interface, and a reset interface. The serial clock interface is connected to the main control module via pin 16 of the chip. The master transmit / slave receive interface is connected to the main control module via pin 17 of the chip. The master receive / slave transmit interface is connected to the main control module via pin 18 of the chip. The chip select interface is connected to the main control module via pin 19 of the chip. The reset interface is connected to the main control module via pin 20 of the chip. The external chip connection lines via pins 16, 17, and 18 are parallel and wrapped with ground lines, which are grounded at preset intervals.

8. The circuit board of claim 7, wherein, The external connection line of the chip via the sixteenth pin is separately grounded; the external connection line of the chip via the twentieth pin is also grounded.

9. The circuit board of any of claims 1-7, wherein, The power management integrated circuit chip is located on the top layer, and the main return ground plane is located on the second layer; The power management integrated circuit chip on the circuit board has multiple heat dissipation holes in the corresponding pad area.

10. A power supply device, characterized by comprising: A circuit board comprising the power management integrated circuit chip according to any one of claims 1-9.

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