Integrated circuit image sensor structure

Abstract

This utility model relates to an integrated circuit (IC) image sensor having an array of pixel components, specifically an integrated circuit image sensor structure. Each pixel component in the array includes a semiconductor substrate having a first surface and an opposing second surface, a photodetector disposed within the substrate, and a portion of an interconnect structure disposed above the first surface of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in a dielectric layer. The portion of the interconnect structure includes a photodetector gate electrode and a capacitor on the photodetector. The pixel component occupies an area on the first surface. The capacitor occupies an area on the first surface. The footprint of the capacitor covers more than half of the footprint of the pixel component, which provides enhanced protection for the photodetector during manufacturing.

Description

Technical Field

[0001] This utility model relates to an integrated circuit image sensor. Background Technology

[0002] Many electronic devices, such as cameras, mobile phones, laptops, and calculators, include integrated circuit (IC) image sensors. Image sensors use an array of pixel components to convert incident light into electrical signals, which are then used to generate a corresponding digital image. IC image sensors can be fabricated using, for example, complementary metal-oxide-semiconductor (CMOS) technology, resulting in a CMOS image sensor (CIS). Utility Model Content

[0003] Some embodiments relate to integrated circuit (IC) image sensors having an array of pixel components. Each pixel component in the array includes: a semiconductor substrate having a front side and opposing back sides, a photodetector disposed within the semiconductor substrate, and a portion of an interconnect structure disposed on the front side of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in one or more dielectric layers. A portion of the interconnect structure includes a capacitor. The pixel component has a occupied area. The capacitor has a occupied area. The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the pixel component.

[0004] Some embodiments relate to integrated circuit (IC) image sensors having an array of pixel elements. Each pixel element in the array includes: a semiconductor substrate having a front side and opposing back sides, a photodetector disposed within the semiconductor substrate, and a portion of an interconnect structure located on the front side of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in one or more dielectric layers. A portion of the interconnect structure includes a shared capacitor. The capacitor is shared with one or more other pixel elements. The pixel element has a occupied area. The capacitor has a occupied area. The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the corresponding pixel element. Attached Figure Description

[0005] The various aspects of this utility model can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with industry standard practice, the various features are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various features may be arbitrarily increased or decreased.

[0006] Figure 1 A simplified top view of an array of exemplary pixel components according to some embodiments of the present invention is shown.

[0007] Figure 2 A simplified top view of an example foursome of pixel components according to some embodiments of the present invention is shown.

[0008] Figure 3 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0009] Figure 4A Some embodiments according to the present invention are shown. Figure 3 A simplified example cross-section of the four-person group along the first cutting line.

[0010] Figure 4B Some embodiments according to the present invention are shown. Figure 3 A simplified example cross-section of the four-person group along the second cutting line.

[0011] Figure 5 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0012] Figure 6 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0013] Figure 7 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0014] Figure 8 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0015] Figure 9 A simplified top view of an alternative quadrilateral of pixel components according to some embodiments of the present invention is shown.

[0016] Figure 10 It shows Figure 9 The corresponding simplified cross-sectional view of the pixel component group of four.

[0017] Figure 11-27 Simplified cross-sectional views are shown of various exemplary stages in the manufacture of an image sensor pixel component according to some embodiments of the present invention.

[0018] Figure 28 The following illustration shows some embodiments of the present invention corresponding to bonding a second IC device to... Figure 27 A simplified cross-sectional view of a section of a compound device formed by interconnecting wires on the front side of the part.

[0019] Figure 29 This is a flowchart showing a method 2900 for forming a pixel member 102 according to some embodiments of the present invention. Detailed Implementation

[0020] This invention provides numerous different embodiments or examples for implementing various features of the invention. Specific examples of components and arrangements are described below to simplify the invention. These are merely examples and are not intended to be limiting. For instance, the following description of forming a first feature on or above a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may form between the first and second features. Furthermore, reference numerals and / or letters may be repeated in the various examples. This repetition is for simplicity and clarity and does not in itself define the relationship between the various embodiments and / or configurations discussed.

[0021] Furthermore, for ease of description, this document uses spatially related terms such as “below,” “under,” “below,” “lower part,” “above,” “upper part,” and “upper part” to describe the relationship between one component or feature and another component or feature as shown in the figure. In addition to the orientation depicted in the figure, the spatially related terms are intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees, 180 degrees, or otherwise), and the spatially relative descriptions used herein will be interpreted accordingly.

[0022] Furthermore, for ease of description, the terms "first," "second," and "third," etc., may be used herein to distinguish different components of a figure or a series of figures. "First," "second," and "third," etc., are not intended to describe corresponding components but are merely general identifiers. For example, the "first dielectric layer" described in conjunction with the first figure may not necessarily correspond to the "first dielectric layer" described in conjunction with some embodiments, but may correspond to the "second dielectric layer" in other embodiments.

[0023] CMOS image sensors consist of an array of pixel elements. Many CMOS image sensors operate using back illumination and are therefore referred to as backlit image sensors. This is achieved by forming the photodetectors of the pixel elements, corresponding devices (e.g., transistors and capacitors), corresponding conductive interconnects, and corresponding dielectric layers on the front side of a semiconductor substrate. The back side of the substrate can then be thinned to a thickness that allows visible light photons to penetrate the back side of the substrate and reach the photodetector relatively easily. Color filters and optical components for enhancing the optical properties of the image sensor are formed on the thinned back side, through which the image sensor pixel elements receive light. This allows for the design and formation of the front layer of active elements, passive elements, and conductive interconnects without the limitations required by front-illuminated image sensors to allow sufficient light to reach the photodetector elements. It should be noted that, as used herein, the term "light" refers to electromagnetic radiation that generally has wavelengths in or near the visible spectrum, including but not limited to infrared and ultraviolet light.

[0024] Pixel components of CMOS image sensors typically include charge-collecting capacitors to collect the charge generated by the absorption of received photons by the corresponding photodetector. The charge-collecting capacitor may be formed as two parallel metal plates separated by a dielectric layer. To reduce material costs and allow for the placement of other circuit components, the area occupied by the charge-collecting capacitor is typically less than half, and often less than one-third, of the area of ​​the corresponding image sensor. In some image sensors, a set of two pixel components may share a common charge-collecting capacitor, in which case the capacitor's area may be less than one-quarter of the area of ​​the corresponding pixel component. It should be noted that, unless otherwise stated, as used herein, the term "area" referring to IC components means the area of ​​the IC component's footprint, which is the orthographic projection of the IC component onto the surface of the substrate.

[0025] One or more of the capacitor components can be formed using high-energy processing actions, such as dry etching using plasma. High-energy plasma particles (e.g., ions) can cause some damage to the structure in the substrate (e.g., a photodetector), which can lead to a degradation in the performance of the photodetector components of an image sensor. This damage may not be detectable by reverse engineering the affected image sensor using available inspection methods (e.g., unpacking, polishing, and imaging). However, the damage can be inferred from a noticeable degradation in photodetector performance. This degradation can be particularly noticeable in image sensors used for high dynamic range (HDR) image sensing applications, where affected pixel components may be more susceptible to dark currents or white pixels.

[0026] Since the metal plate helps to provide protection from plasma damage during etching, increasing the area of ​​the charge collection capacitor to mostly or completely cover the photodetector will mostly or completely avoid the performance degradation caused by plasma damage mentioned above.

[0027] In some embodiments of this invention, the integrated circuit (IC) image sensor has an array of pixel components. Each pixel component in the array includes a semiconductor substrate having a first surface and an opposing second surface, a photodetector disposed within the substrate, and an interconnect structure located above the first surface of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in a dielectric layer, a photodetector gate electrode of the photodetector, and a charge collection capacitor. The pixel component and the capacitor each have a respective occupied area, wherein the occupied area of ​​the capacitor covers more than half of the occupied area of ​​the pixel component, which provides enhanced protection for the photodetector during the manufacture of the IC image sensor. Specifically, this relative size of the charge collection capacitor provides measurable protection for the image sensor photodetector from plasma damage during dry etching processes, thereby enhancing the operational performance of the resulting IC image sensor.

[0028] Figure 1 A simplified top view of an exemplary array 100 of pixel members 102 according to some embodiments of the present invention is shown. Array 100 may be a subarray of a larger array of pixel members 102. For example, array 100 comprising 32 pixel members 102 may be part of a larger array of millions of pixel members 102. Array 100 is organized into a group of fours 101 corresponding to a 2×2 array of pixel members 102. For example, group 101(1) includes pixel members 102(1), 102(2), 102(3), and 102(4). Each pixel member 102 includes a photodetector 103, such as photodetector 103(1) of pixel member 102(1). For clarity and simplicity, only the members of group 101(1) are shown in the figure; the other groups 101 are substantially the same.

[0029] Figure 2 A simplified top view of an example quadruple group 201 of pixel member 102 according to some embodiments of the present invention is shown. The quadruple group 201 can correspond to Figure 1 The four-person group 101(1). For clarity and simplicity, only the components of pixel components 102(1) and 102(2) are labeled in the figure; the other pixel components 102 of the four-person group 201 are basically the same, except that their respective color filters are referenced below. Figure 2In addition to those described (not shown in the diagram), pixel component 102 includes a photodetector 103, a photodetector gate electrode 205, a portion of a shared floating diffusion (FD) node 206, and a capacitor 204. For example, pixel component 102(2) includes a photodetector 103(2), a photodetector gate electrode 205(2), a capacitor 204(2), and a portion of the FD node 206. The space occupied by capacitor 204 is more than half the space occupied by the corresponding pixel component 102. It is noteworthy that in the illustrated example quad group 201, the area occupied by capacitor 204 also covers the entire area occupied by the corresponding photodetector 103. In some embodiments, the area occupied by capacitor may be between approximately 70% and approximately 90% of the area occupied by pixel component, and between approximately 110% and approximately 160% of the area occupied by photodiode, which provides a useful balance between the benefit of protecting the underlying photodetector 103 and the disadvantages of occupying additional volume that may be used by other IC components and the potential parasitic effects of a large capacitor.

[0030] Figure 3 A simplified top view of an alternative example of a quadruple group 301 of pixel member 102 according to some embodiments of the present invention is shown. The quadruple group 301 may correspond to… Figure 1 The four-person group 101(1). For clarity and simplicity, only the components of pixel components 102(1) and 102(2) are labeled in the figure; the other pixel components 102 of the four-person group 301 are basically the same, except that their respective color filters are referenced below. Figure 3 (Not shown in the image) Other than those described. The exemplary pixel component 102(2) of the quad 301 includes a portion of a photodetector 103(2), a photodetector gate electrode 305(2), a capacitor 204(2), and an FD node 206. Although Figure 2 In the photodetector 103, the photodetector gate electrode 205 of the four-unit group 201 is substantially rectangular (e.g., having a rounded rectangular footprint), while the photodetector gate electrode 305 of the four-unit group 301 is substantially triangular (e.g., having a triangular footprint). The triangular shape of the photodetector gate electrode 305 provides sufficient overlap area for the photodetector 103 while freeing up die-on space for additional components. Figure 2 Similar to the pixel component 102 of the quad-unit 201, the area occupied by the capacitor 204 is more than half the area occupied by the corresponding pixel component 102. Furthermore, in the illustrated quad-unit 301, the area occupied by the capacitor 204 also covers the entire area of ​​the corresponding photodetector 103. Note that the pixel component 102 includes additional components that will be shown in the cross-section below, but these are omitted here for clarity.

[0031] Figure 4A Some embodiments according to the present invention are shown. Figure 3 The four-person group 301 along Figure 3 A simplified example cross-sectional view of the cutting line A-A'. For clarity and simplicity, all icon features of pixel component 102(1) are marked, while only some features of pixel component 102(2) are marked; the other pixel components 102 of the group 301 are substantially the same, except for the description below with reference to their respective color filters 411.

[0032] Pixel component 102(1) includes a semiconductor substrate 414 having a front side 414f and a back side 414b. The semiconductor substrate 414 may include any suitable semiconductor, such as bulk silicon, and may be doped. A photodetector 103(1) is disposed within the semiconductor substrate 414 on the front side 414f. The photodetector 103(1) may include a photodiode, which includes a p-type doped region and an n-type doped region forming a PN junction. The photodetector 103 is configured to generate charge carriers (e.g., electrons) in response to the absorption of incident photons (e.g., from the back side 414b). Pixel component 102(1) may include active components (not shown), such as a transfer transistor and a reset transistor, to transfer the charge accumulated by the photodetector 103(1) in one image capture interval and reset the photodetector 103(1) in a subsequent image capture interval.

[0033] An optional color filter 411(1) for the pixel member 102(1) may cover the back side 414b, and an optional optical lens member 412(1) may be arranged on the color filter 411(1) such that the color filter 411(1) is positioned between the optical lens member 412(1) and the photodetector 103(1). Note that, for example, a monochrome image sensor may forgo having a color filter. The optical lens member 412(1) may be a microlens and has a generally curved outer surface, configured to collect and focus incident light passing through the color filter 411(1) for use in the photodetector 103(1).

[0034] Color filter 411(1) filters incident light, typically allowing light of a specific wavelength band to pass through but not light of other wavelength bands, which is useful for accurately representing colors in a sensed image. Color filter 411(1) may be, for example, a green, red, or blue color filter that allows green, red, or blue light to pass through, respectively. The color filter or pixel array 100 may be arranged in a Bayer pattern. In the Bayer pattern, pixel quartets 101, such as exemplary quartets 201 and 301, include two green color filters 411, one red color filter 411, and one blue color filter 411, wherein the two green color filters 411 are arranged diagonally opposite (or cat-corner) each other, and the quartet pattern is repeated periodically throughout the pixel array. After an image is captured by the pixel array through various filters, interpolation techniques can be used to generate a complete green, red, and blue image spanning the entire pixel array.

[0035] Returning to the front side 414f, an interconnect structure 420 is arranged on the front side 414f of the substrate 414. The interconnect structure 420 includes a photodetector gate electrode 305 and a capacitor 204 (e.g., the photodetector gate electrode 305(1) and capacitor 204(1) in a portion of the interconnect structure 420 of the pixel member 102(1), as well as exemplary metallization lines 409, conductive vias 408, conductive contacts 410, one or more layers of dielectric material 415, and any other suitable front-end (FEOL) and back-end (BEOL) features (not shown). The dielectric material 415 may be an interlayer dielectric (ILD) material, including, for example, low-k dielectrics (e.g., dielectric materials with a dielectric constant less than about 3.9), oxides (e.g., SiO2), nitrides (e.g., SiN), carbides (e.g., SiC), oxynitrides (e.g., SiON), oxides of carbon (e.g., SiOC), undoped silicate glass (USG), doped silicon dioxide (e.g., carbon-doped silicon dioxide), borosilicate glass (BSG), phosphosilicate glass (PSG), borosilicate-phosphosilicate glass (BPSG), fluorinated silicate glass (FSG), spin-coated glass (SOG), etc. The metallization line 409, conductive via 408, and conductive contact 410 may include metals, such as copper, aluminum, or tungsten.

[0036] The photodetector gate electrode 305 may include a gate conductive section 430 and a gate dielectric section 431. The gate conductive section 430 may include doped polysilicon (“poly”), or optionally, a metallic material such as aluminum, titanium, tantalum, tungsten, another metallic material, or any combination thereof. The gate dielectric section 431 may include, for example, silicon dioxide (SiO2), silicon nitride (Si3N4), silicon oxynitride, carbon-doped silicon oxide, other suitable dielectric materials, or combinations thereof. The photodetector gate electrode 305 may control the flow of charge carriers (e.g., electrons) generated by photons absorbed by the photodetector 103 to the charge collection capacitor 204 during the image capture interval. In some embodiments, the photodetector gate electrode 305 may include a polysilicon gate.

[0037] Capacitor 204, such as capacitor 204(1), may be a metal-insulator-metal (MIM) capacitor, comprising a top electrode 406t(1), a corresponding bottom electrode 406b(1), and an insulating layer 407(1) inserted therebetween. MIM capacitors may offer particular advantages in HDR applications because their larger capacitance helps prevent image fading under strong light conditions, where charge carriers can overflow from saturated pixel elements to adjacent pixel elements. Electrode 406 may be a metal plate, including aluminum, copper, ruthenium, tungsten, titanium nitride, tantalum nitride, another conductive material, or any combination of the foregoing. In some embodiments, the thickness of the top electrode 406t and the bottom electrode 406b may be between approximately 300 angstroms and approximately 500 angstroms. The insulating layer 407 may comprise a high-k dielectric material, such as hafnium oxide (HfO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), europium silicon oxide (HfSiO), hafnium silicon oxynitride (HfSiON), hafnium hafnium oxide (HfTaO), hafnium titanium oxide (HfTiO), hafnium titanium tantalum oxide (HfTiTaO), hafnium aluminum oxynitride (HfAlON), hafnium zirconium oxide (HfZrO), other suitable high-k dielectric materials, or combinations thereof. In some embodiments, the thickness of the insulating layer 407 may be between approximately 50 angstroms and approximately 100 angstroms.

[0038] In some alternative embodiments, the capacitors may be three-dimensional MIM (3DMIM) capacitors (not shown), wherein their cross-sections are not flat layers, but rather corrugated, folded, sawtooth, comb-like, notched, or similar shapes. However, the occupied area will remain substantially the same, similarly providing protection for the underlying photodetector 103 from plasma damage during dry etching.

[0039] The pixel components 102 of the pixel array 100 may be separated from each other by an isolation structure, such as an exemplary isolation structure 413 inserted between adjacent pixel components 102. The isolation structure 413 reduces interference between adjacent pixel components, thereby reducing harmful electromagnetic phenomena such as latch-up, crosstalk, leakage current, etc. The isolation structure 413 may be a simple trench filled with an insulating dielectric material, or it may be a more complex trench structure comprising layers and / or segments of differently doped polysilicon materials, metal structures, and / or dielectric materials, wherein the doped polysilicon materials and / or metal structures may be biased to enhance isolation. Figure 4A An isolation structure 413 within the semiconductor substrate 414 is shown; however, alternative embodiments are not limited thereto. In some alternative embodiments of the pixel assembly 301, the isolation structure may extend into the interconnect structure 420. In some alternative embodiments of the assembly 301, the isolation structure may extend beyond the rear side 414b of the substrate 414 and may, for example, separate adjacent color filters 411 and, for example, separate adjacent optical lens components 412.

[0040] Figure 4B Some embodiments according to the present invention are shown. Figure 3 The four-person group 301 along Figure 3 A simplified example cross-sectional view of the cut line B-B'. This cross-sectional view shows a shared floating diffusion region (FD) node 206 shared among the four pixel components 102(1)-(4) of the quad group 301. The FD node 206 may be a suitably doped region of the substrate 414 and / or a semiconductor material grown or deposited. Note that the isolation structure 413 differs from the FD node 206 (e.g., below the FD node 206) and may contain more or fewer features (not shown) than other portions.

[0041] FD node 206 can be electrically connected (not shown) to capacitor 204 via conductive via 408 and metallized line 409. The group 301 can be configured to transfer charge from a selected photodetector (e.g., photodetector 103(1)) to FD node 206 and from there to capacitor 204 by enabling the corresponding photodetector gate electrode 305 (e.g., gate electrode 305(1)) while disabling other photodetector gate electrodes (e.g., gate electrodes 305(2), 305(3), 305(4)). Then, in order to read the value of the next pixel member 102, FD node 206 can be reset (e.g., by clearing the charge on FD node 206) and the photodetector gate electrode 305 of the next pixel member 102 can be enabled while disabling other gate electrodes, and so on.

[0042] Figure 5A simplified top view of an alternative example of a quadruple group 501 of pixel member 102 according to some embodiments of the present invention is shown. The quadruple group 501 may correspond to… Figure 1 The pixel array 100 comprises a quad 101. The quad 501 includes pixel elements 102(1), 102(2), 102(3), and 102(4), wherein pixel elements 102(1) and 102(3) share a single charge collection capacitor 504(1), and pixel elements 102(2) and 102(4) share a charge collection capacitor 504(2). This pair of adjacent pixel elements 102(1) and 102(3) can form a dual photodiode (DPD) pair configured for phase detection autofocus. Similarly, this pair of adjacent pixel elements 102(2) and 102(4) can also form a DPD pair configured for phase detection autofocus. As shown, the area occupied by capacitor 504 covers more than half of the area occupied by the corresponding pixel element 102.

[0043] Figure 6 A simplified top view of an alternative example of a quadruple group 601 of pixel member 102 according to some embodiments of the present invention is shown. The quadruple group 601 may correspond to… Figure 1 The pixel array 100 comprises a quad 101. The quad 601 includes pixel elements 102(1), 102(2), 102(3), and 102(4), wherein pixel elements 102(1) and 102(2) share a single charge collection capacitor 604(1), and pixel elements 102(3) and 102(4) share a charge collection capacitor 604(2). This pair of adjacent pixel elements 102(1) and 102(2) can form a DPD pair configured for phase detection autofocus. Similarly, this pair of adjacent pixel elements 102(3) and 102(4) can also form a DPD pair configured for phase detection autofocus. As shown, the area occupied by capacitor 604 covers more than half of the area occupied by the corresponding pixel element 102.

[0044] Figure 7 A simplified top view of an alternative example of a quadruple group 701 of pixel member 102 according to some embodiments of the present invention is shown. The quadruple group 701 may correspond to… Figure 1The pixel element array 100 comprises a quad 101. The pixel element quad 701 includes pixel elements 102(1), 102(2), 102(3), and 102(4), wherein the four pixel elements share a single charge collection capacitor 704(1). The 2x2 array of the four pixel elements 102(1)-(4) can form a quad photodiode (QPD) group configured for phase detection autofocus. As shown, the area occupied by the capacitor 704(1) covers more than half of the area occupied by the corresponding pixel element quad 102.

[0045] Figure 8 A simplified top view of an alternative example of a quadruple group 801, representing some embodiments of the pixel member 102 according to the present invention, is shown. The quadruple group 801 may correspond to... Figure 1 The pixel element array 100 comprises a quad 101. The pixel element quad 801 includes pixel elements 102(1), 102(2), 102(3), and 102(4), wherein a photodetector gate electrode 805 is used instead of photodetector gate electrodes 205 or 305 in pixel element quads 201, 301, 501, 601, and 701. Specifically, the photodetector gate electrode 805 is hexagonal in shape (as seen in the top view or in terms of footprint) rather than being substantially rectangular or triangular as in some other embodiments. Additionally, as shown, the occupied area of ​​each capacitor 804 (e.g., capacitor 804(1)) covers more than 90% of the occupied area of ​​the corresponding pixel element (e.g., pixel element 102(1)).

[0046] Figure 9 A simplified top view of an alternative example of a quadruple group 901 of pixel component 102 according to some embodiments of the present invention is shown, and Figure 10 It shows along Figure 9 The corresponding simplified cross-sectional view of the pixel component group 901 with cutting line A-A'. Group 901 can correspond to Figure 1 The four-person group 101 (1). For clarity and simplicity, only some components are individually labeled in the figure; the other pixel components 102 of the four-person group 901 are substantially the same, except for those described elsewhere with respect to the corresponding color filters.

[0047] The pixel component 102 of the four-person group 901 is basically similar to Figure 3In addition to the trench isolation structure 413 separating adjacent pixel members 102 in the quad 301 of FIG4, each pixel member 102 of the quad 901 includes its own corresponding isolation ring 913. For example, pixel member 102(1) of the quad 901 includes isolation ring 913(1). The isolation ring 913 may be a simple trench filled with insulating dielectric material, or it may be a finer trench structure comprising layers and / or segments of differently doped polysilicon material, metal structures and / or dielectric materials, wherein the doped polysilicon material and / or metal structures may be biased to reinforce isolation. The isolation ring 913 may extend in and / or beyond the rear side 414b of the substrate 414 in the interconnect structure 420.

[0048] Figure 11-27 Simplified cross-sectional views are shown of various exemplary stages in the manufacture of image sensor pixel components according to some embodiments of the present invention. Although Figure 11-27 The actions are described as a series of actions, but it should be understood that these actions are not limiting, as the order of the actions may be changed in other embodiments, and the disclosed methods are also applicable to other structures. In some embodiments, some actions shown and / or described may be omitted in whole or in part. In some embodiments, additional actions not described herein may also be performed as part of the manufacturing process.

[0049] Figure 11 A simplified cross-sectional view of a portion 1100 of a die is shown, the die including a semiconductor substrate 414 covered on its front side 414f with a mask layer 1101, the mask layer 1101 being a suitable photoresist or hard mask layer deposited by spin coating, deposition, or deposition processes. In embodiments where the mask layer 1101 includes photoresist, a photolithography process can be performed in which the mask layer 1101 is selectively exposed to electromagnetic radiation based on the photomask, thereby altering the solubility of the exposed areas of the mask layer 1101 to define a soluble region 1102.

[0050] Figure 12 A simplified cross-sectional view of part 1200 is shown, corresponding to Figure 11 The portion 1100 is then removed, followed by the removal of the soluble region 1102 of the mask layer 1101 to define an opening 1201 in the mask layer 1101 corresponding to region 1102. In some embodiments, region 1102 can be removed by exposing the mask layer 1101 to the developer of the soluble region 1102.

[0051] Figure 13 A simplified cross-sectional view of part 1300 is shown, corresponding to Figure 12A portion 1200 is then formed, subsequently forming a photodetector 103. The photodetector 103 can be formed by suitably doping the substrate 414 using openings 1201 in the mask layer 1101. The photodetector 103 may comprise a photodiode formed by implanting one or more dopant materials into the front side 414f of the substrate 414. For example, the photodetector 103 can be formed by selectively performing a first implantation process (e.g., according to a shielding layer) to form a first region having a first doping type (e.g., n-type), and subsequently performing a second implantation process. The second implantation process has a second doping type (e.g., p-type) different from the first doping type. In some embodiments, one of the first or second implantation processes may also be used to form a floating diffusion trap (not shown).

[0052] Figure 14A A simplified cross-sectional view of part 1400 is shown, corresponding to Figure 13 In part 1300, the mask layer 1101 is then removed and a mask layer 1401 with an opening 1402 is formed on the front side 414f. The mask layer 1401 and the opening 1402 can be formed in any of the ways described above with reference to the mask layer 1101 and the opening 1201.

[0053] Figure 14B It shows Figure 14A A simplified cross-sectional view of part 1400 is shown, followed by the formation of trench 1403 defined by opening 1402 in mask layer 1401. Trench 1403 can be formed by dry etching semiconductor substrate 414, for example, using a dry etchant such as a gaseous mixture of xenon and fluoride (e.g., XeF6) and sulfur and fluoride (e.g., SF6).

[0054] Figure 15 A simplified cross-sectional view of part 1500 is shown, corresponding to Figure 14B In part 1400, a suitable filler is then deposited in trench 1403 to form isolation structure 413. The filler can be deposited using, for example, chemical vapor deposition (CVD) or any suitable deposition technique. In some embodiments, after depositing the filler in trench 1403, a planarization process may be performed to remove the mask layer (e.g., Figure 14A 1401) and any portion of the filler outside of trench 1403. In some embodiments, the planarization process may include chemical mechanical planarization (CMP) process, etching process, etc.

[0055] Figure 16 The simplified cross-sectional view of part 1600 shown corresponds to Figure 15Part 1500 is then followed by the deposition of a dielectric layer 1601 (including, for example, a high-k dielectric) and a photodetector gate electrode material layer 1602 (including, for example, doped polysilicon) on the front side 414f. The dielectric layer 1601 may be formed by, for example, a CVD process, a physical vapor deposition (PVD) process, or any other suitable growth or deposition process. The gate material layer 1602 may be formed by, for example, a CVD process, a PVD process, or any other suitable growth, deposition, and / or doping process.

[0056] Figure 17 A simplified cross-sectional view of part 1700 is shown, corresponding to Figure 16 Part 1600, and then the photodetector gate electrode 305 is formed from layers 1601 and 1602. The photodetector gate electrode 305 may be formed by performing, for example, suitable masking and etching or any other suitable feature fabrication process on layers 1601 and 1602.

[0057] Figure 18 A simplified cross-sectional view of part 1800 is shown, corresponding to Figure 17 Part 1700, then features of interconnect structure 420 (e.g., one or more layers of dielectric material 415, metallized lines 409, and conductive vias 408) are formed on the front side 414f. Any suitable deposition, etching, filling, and feature formation process can be used to form the features.

[0058] Figure 19 A simplified cross-sectional view of part 1900 is shown, corresponding to Figure 18 Part 1800, followed by deposition of a conductive layer 1901 on the front side 414f. The conductive layer 1901 may comprise a metal deposited using, for example, electroplating, CVD, PVD, atomic layer deposition (ALD) or other suitable processes.

[0059] Figure 20 A simplified cross-sectional view of part 2000 is shown, corresponding to Figure 19 Part 1900, then a dielectric layer 2001 is deposited on the conductive layer 1901 on the front side 414f, which can be deposited using any suitable deposition process.

[0060] Figure 21 A simplified cross-sectional view of part 2100 is shown, corresponding to Figure 20 Part 2000, then a conductive layer 2101 is deposited on the dielectric layer 2001 on the front side 414f, which can be deposited using any suitable deposition process.

[0061] Figure 22 A simplified cross-sectional view of part 2200 is shown, corresponding to Figure 21Part 2100, then a mask layer 2201 is formed on the conductive layer 2101 on the front side 414f, the mask layer 2201 having an opening, such as an opening 2202. The mask layer 2201 is suitable for dry etching of the conductive layers 1901 and 2101 and the dielectric layer 2001 using plasma 2203. Dry etching can be performed in a dry etching chamber using a fluorinated gas such as CF4, where suitable pressure and flow rate can be achieved.

[0062] Figure 23 A simplified cross-sectional view of part 2300 is shown, corresponding to Figure 21 Part 2200 is then etched, followed by etching layers 1901, 2001 and 2101 and removing the mask layer 2201 to form capacitor 204.

[0063] Figure 24 A simplified cross-sectional view of part 2400 is shown, corresponding to Figure 23 Section 2300 subsequently forms some additional features of the interconnect structure 420 (e.g., one or more layers of dielectric material 415, conductive vias 408, and conductive contacts 410), which may be formed using any suitable corresponding action described elsewhere herein. Note that the semiconductor substrate 414 in section 2400 has a thickness T1.

[0064] Figure 25 A simplified cross-sectional view of part 2500 is shown, corresponding to Figure 24 In section 2400, the semiconductor substrate 414 on the back side 414b is then thinned to leave a substrate 414 of thickness T2, which is less than the thickness T1. The substrate 414 can be thinned, for example, by a suitable polishing process. Note that section 2500 is shown as reoriented, with the back side 414b on top and the interconnect structure 420 on the bottom, to correspond to the reorientation of the corresponding grains during manufacturing.

[0065] Figure 26 A simplified cross-sectional view of part 2600 is shown, corresponding to Figure 25 Part 2500, then a color filter 411 is formed on the back side 414b.

[0066] Figure 27 A simplified cross-sectional view of part 2700 is shown, corresponding to Figure 26 Part 2600 then forms an optical lens component 412 on the rear side 414b above the color filter 411. Part 2700 may also correspond to Figure 4A The view of the pixel component group 301.

[0067] Figure 28 A simplified cross-sectional view of portion 2800 is shown, corresponding to a segment of the composite member, by joining the second IC member 2801 to... Figure 27The second IC device 2801 is formed on the interconnect structure 420 on the front side 414f of portion 2700. The second IC device 2801 may provide logic, storage, control and / or other functions for the pixel component 102. The second IC device 2801 may include a substrate 2814, a gate structure 2820, a source / drain region 2821, a doped well 2822, a metal interconnect 2809, a conductive via 2808, a conductive contact 2810 and one or more dielectric layers 2815.

[0068] After completing the above-mentioned die processing, the die can be divided into individual dies corresponding to individual ICs.

[0069] Figure 29 This is a flowchart illustrating a method 2900 for forming a pixel member 102 according to some embodiments of the present invention. Although this and other methods shown and / or described herein are illustrated as a series of actions or events, it should be understood that the present invention is not limited to the shown order or actions. Therefore, in some embodiments, these actions may be performed in a different order than shown, and / or may be performed simultaneously. Furthermore, in some embodiments, the shown actions or events may be subdivided into multiple actions or events that may be performed at separate times or simultaneously with other actions or sub-actions. In some embodiments, some shown actions or events may be omitted, and other actions or events not shown may be included. In some embodiments, an action may correspond, for example, previously... Figure 11-28 The structure shown in the image.

[0070] In action 2901, a photodetector for a pixel component is formed in the front side of a semiconductor substrate, the semiconductor substrate including a rear side opposite to the front side. Figure 13 Cross-sectional views corresponding to some embodiments of action 2901 are shown.

[0071] In action 2902, a photodetector gate electrode is formed on the photodetector. Figure 16-17 Cross-sectional views corresponding to some embodiments of action 2902 are shown.

[0072] In action 2903, conductive interconnects are formed in the dielectric layer on the front side of the semiconductor substrate. Figure 18 Cross-sectional views corresponding to some embodiments of action 2903 are shown.

[0073] In action 2904, a capacitor connected to a conductive interconnect is formed on the front side of a semiconductor substrate, wherein the pixel component has an area, the capacitor has an area, and the area of ​​the capacitor covers more than half of the area of ​​the pixel component. Figure 19-23 Cross-sectional views corresponding to some embodiments of action 2904 are shown.

[0074] Note that multiple subsequent steps (e.g., forming a metallization layer and other line-back-of-line (BEOL) steps) can be performed to produce a usable working IC device.

[0075] Some embodiments relate to integrated circuit (IC) image sensors having an array of pixel components. Each pixel component in the array includes: a semiconductor substrate having a front side and opposing back sides, a photodetector disposed within the semiconductor substrate, and a portion of an interconnect structure disposed on the front side of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in one or more dielectric layers. A portion of the interconnect structure includes a capacitor. The pixel component has a occupied area. The capacitor has a occupied area. The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the pixel component.

[0076] Some embodiments relate to integrated circuit (IC) image sensors having an array of pixel elements. Each pixel element in the array includes: a semiconductor substrate having a front side and opposing back sides, a photodetector disposed within the semiconductor substrate, and a portion of an interconnect structure located on the front side of the semiconductor substrate. The interconnect structure includes conductive interconnects embedded in one or more dielectric layers. A portion of the interconnect structure includes a shared capacitor. The capacitor is shared with one or more other pixel elements. The pixel element has a occupied area. The capacitor has a occupied area. The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the corresponding pixel element.

[0077] In some embodiments, the occupied area of ​​the capacitor covers between 70% and 90% of the occupied area of ​​the pixel member. In some embodiments, the occupied area of ​​the capacitor covers more than 90% of the occupied area of ​​the pixel member. In some embodiments, the photodetector has an occupied area; and the occupied area of ​​the capacitor covers the entire occupied area of ​​the photodetector. In some embodiments, the occupied area of ​​the pixel member corresponds to an orthographic projection of the pixel member onto the front surface of the semiconductor substrate; the occupied area of ​​the capacitor corresponds to an orthographic projection of the capacitor onto the front surface of the semiconductor substrate; and the occupied area of ​​the photodetector corresponds to an orthographic projection of the photodetector onto the front surface of the semiconductor substrate. In some embodiments, the capacitor is a metal-insulator-metal (MIM) capacitor comprising two metal plates separated by an insulating layer. In some embodiments, the integrated circuit image sensor includes a photodetector gate electrode located on the photodetector; the photodetector gate electrode has an occupied area; and the occupied area of ​​the photodetector gate electrode is one of a rectangle, a rounded rectangle, a triangle, and a hexagon. In some embodiments, the image sensor is a backlit image sensor; each pixel element in the array further includes: an optical lens element located on the back side of the semiconductor substrate; and a color filter element located on the back side of the semiconductor substrate, disposed between the optical lens element and the photodetector. In some embodiments, each pixel element further includes an isolation feature located in the semiconductor substrate that separates the pixel element of the array from adjacent pixel elements. In some embodiments, a second integrated circuit die is further included, which is bonded to the interconnect structure, the second integrated circuit die including a semiconductor device configured to operate together with the image sensor integrated circuit.

[0078] Some embodiments relate to a method of forming an integrated circuit (IC) image sensor. The method includes: forming a photodetector or pixel component in a front side of a semiconductor substrate, the semiconductor substrate having a back side opposite the front side; forming a photodetector gate electrode on the photodetector; forming a conductive interconnect in a dielectric layer on the front side of the semiconductor substrate; and forming a capacitor connected to the conductive interconnect on the front side of the semiconductor substrate. The pixel component has a occupied area. The capacitor has a occupied area. The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the pixel component.

[0079] In some embodiments, a pair of adjacent pixel members in the array share the capacitor. In some embodiments, the pair of adjacent pixel members also share an optical lens member; and the pair of adjacent pixel members form a dual photodiode (DPD) pair configured for phase detection autofocus. In some embodiments, four pixel members in a 2×2 group of adjacent pixel members in the array share the capacitor. In some embodiments, the four pixel members in the 2×2 group also share an optical lens; and the four pixel members form a quad photodiode (QPD) group configured for phase detection autofocus.

[0080] The embodiments of this invention are various implementations of an image sensor comprising an array of pixel elements. It should be noted that alternative embodiments may further comprise one or more arrays of conventional pixel elements. For example, an image sensor according to an embodiment of this invention may include (1) a first array of pixel elements, each pixel element including a capacitor whose area covers more than half the area of ​​the pixel element, and (2) a second array of pixel elements, each pixel element not including a capacitor whose area covers more than half the area of ​​the pixel element (e.g., using small-area capacitors or not having capacitors at all). In other words, the term "each" refers to each pixel element in the array, and not necessarily to each pixel element of the image sensor.

[0081] In some embodiments, the capacitor includes an insulator inserted between a bottom electrode and a top electrode; and forming the capacitor includes: depositing a first metal layer of the bottom electrode; depositing a dielectric layer of the insulator; depositing a second metal layer of the top electrode; and etching the first metal layer, the dielectric layer, and the second metal layer to form the capacitor. In some embodiments, the etching includes dry etching using plasma. In some embodiments, the occupied area of ​​the capacitor covers between 70% and 90% of the occupied area of ​​the pixel component. In some embodiments, corresponding color filter components and optical lens components are further formed on the back side of the semiconductor substrate to allow back-side illumination operation of the integrated circuit image sensor.

[0082] It should be understood that in this written description and the appended claims, the terms "first," "second," "third," etc., are merely general designations used for ease of description to distinguish different components in a figure or series of figures. In themselves, these terms do not imply any temporal order or structural proximity of the components and are not intended to describe corresponding components in different illustrated embodiments and / or embodiments not shown. For example, a "first dielectric layer" described in conjunction with the first figure may not necessarily correspond to a "first dielectric layer" described in conjunction with another figure, and may not necessarily correspond to a "first dielectric layer" in an embodiment not shown.

[0083] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of the present invention. Those skilled in the art will understand that they can readily use the present invention as a basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the present invention, and that various changes, substitutions, and modifications can be made without departing from the spirit and scope of the present invention.

Claims

1. An integrated circuit image sensor, comprising: include: An array of pixel components, each pixel component of the array comprising: A semiconductor substrate having a front side and an opposite back side; A photodetector is disposed within the semiconductor substrate; and A portion of the interconnect structure is disposed on the front side of the semiconductor substrate and includes conductive interconnects embedded in one or more dielectric layers, wherein the portion of the interconnect structure includes a capacitor, wherein: The pixel component has an area occupied; The capacitor occupies an area; and The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the pixel component.

2. The integrated circuit image sensor according to claim 1, characterized in that: The optical detector occupies an area; and The occupied area of ​​the capacitor covers the entire occupied area of ​​the photodetector.

3. The integrated circuit image sensor of claim 1, Its characteristics are: The occupied area of ​​the pixel component corresponds to the orthographic projection of the pixel component onto the front surface of the semiconductor substrate; The occupied area of ​​the capacitor corresponds to the orthographic projection of the capacitor onto the surface of the front side of the semiconductor substrate; as well as The occupied area of ​​the photodetector corresponds to the orthographic projection of the photodetector onto the surface of the front side of the semiconductor substrate.

4. The integrated circuit image sensor according to claim 1, characterized in that: The integrated circuit image sensor includes a photodetector gate electrode located on the photodetector; The gate electrode of the photodetector has an area occupied; and The area occupied by the gate electrode of the photodetector is one of a rectangle, a rounded rectangle, a triangle, and a hexagon.

5. The integrated circuit image sensor according to claim 1, characterized in that: The image sensor is a backlight image sensor; Each pixel component in the array also includes: An optical lens component is located on the back side of the semiconductor substrate; and A color filter component is located on the back side of the semiconductor substrate and disposed between the optical lens component and the photodetector.

6. The integrated circuit image sensor of claim 1, wherein, Each pixel element also includes an isolation feature located in the semiconductor substrate that separates the pixel element of the array from adjacent pixel elements.

7. The integrated circuit image sensor of claim 1, further comprising a second integrated circuit die bonded to the interconnect structure, the second integrated circuit die including a semiconductor device configured to operate together with the image sensor integrated circuit.

8. An integrated circuit image sensor, comprising: include: An array of pixel components, each pixel component of the array comprising: A semiconductor substrate having a front side and an opposite back side; A photodetector is disposed within the semiconductor substrate; and A portion of the interconnect structure is disposed on the front side of the semiconductor substrate and includes conductive interconnects embedded in one or more dielectric layers. This portion of the interconnect structure includes a shared capacitor, wherein: The capacitor is shared with one or more other pixel components; The pixel component has an area occupied; The capacitor occupies an area; and The occupied area of ​​the capacitor covers more than half of the occupied area of ​​the corresponding pixel component.

9. The integrated circuit image sensor of claim 8, wherein, A pair of adjacent pixel means in the array share the capacitor.

10. The integrated circuit image sensor of claim 8, wherein, Four of the adjacent pixel means in a 2x2 group of pixel means in the array share the capacitor.

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