A high light efficiency LED chip

Abstract

This invention belongs to the field of LED chip technology and discloses a high-efficiency LED chip, including a substrate. A reflective layer is provided on the back side of the substrate. Multiple raised strips are evenly distributed on the surface of the substrate near the reflective layer, with a groove formed between each pair of adjacent raised strips. The top of the raised strips and the bottom of the groove are both arc-shaped surfaces, giving the vertical cross-section of the substrate surface a wavy structure. The non-planar structure of the substrate back side of this invention can effectively increase the light emission angle, improve the light reflection efficiency of the reflective layer in non-perpendicular directions, and enhance the light extraction efficiency of the LED.

Description

Technical Field

[0001] This utility model belongs to the field of LED chip technology, and specifically relates to a high-efficiency LED chip. Background Technology

[0002] Existing upright LED structures typically involve grinding and polishing the back of a sapphire substrate to a flat surface, then depositing a reflective layer on its surface to improve the light extraction efficiency of the LED chip from the front. However, this reflective layer has low light reflection efficiency in non-perpendicular directions, resulting in some light loss. Therefore, there is an urgent need to optimize the existing LED chip structure to increase the light extraction angle range and further improve the light extraction efficiency of the LED. Utility Model Content

[0003] This invention addresses the shortcomings of the prior art by providing a high-efficiency LED chip with a non-planar back surface of its substrate, which effectively enhances the reflection effect of the DBR reflector, increases the light emission angle range, and improves the light emission efficiency of the LED.

[0004] To achieve the above objectives, the technical solution of this utility model is as follows: A high-efficiency LED chip is characterized in that it includes a substrate, a reflective layer is provided on the back side of the substrate, a plurality of protrusions are evenly spaced on the side surface of the substrate near the reflective layer, a groove is formed between each two adjacent protrusions, and the top of the protrusions and the bottom of the groove are both arc-shaped surfaces, so that the vertical cross section of the substrate surface has a wave-shaped structure.

[0005] Preferably, the plurality of the protrusions are integrally formed with the substrate.

[0006] Preferably, the horizontal cross-section of each of the protrusions and grooves is S-shaped.

[0007] Preferably, the vertical cross-section of each of the protrusions and grooves is V-shaped or semi-circular.

[0008] Preferably, the front side of the substrate is sequentially stacked with a first conductive layer, a light-emitting layer, a second conductive layer, a CBL current spreading layer, and a transparent conductive layer. The top of the first conductive layer and the transparent conductive layer are each provided with an exposed platform and are respectively connected to a first electrode and a second electrode.

[0009] Preferably, the exposed surfaces of the first conductive layer, the second conductive layer, the light-emitting layer, and the transparent conductive layer are covered with a PV passivation layer.

[0010] Preferably, the first electrode and the second electrode are both disposed on the top of the PV passivation layer, and the PV passivation layer has channels inside that match the first electrode and the second electrode.

[0011] Compared with the prior art, the beneficial effects of this utility model are as follows: The substrate of this invention has a non-planar back surface, which can effectively increase the emission angle of light, improve the light reflection efficiency of the reflective layer in the non-perpendicular direction, and improve the light extraction efficiency of the LED. Attached Figure Description

[0012] Other features, objects, and advantages of this invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0013] Figure 1 This is a schematic diagram of the structure of this utility model; Figure 2 This is a three-dimensional structural diagram of the back side of the substrate in Embodiment 1 of this utility model; Figure 3 This utility model Figure 2 A top-view structural diagram; Figure 4 This is a three-dimensional structural diagram of the back side of the substrate in Embodiment 2 of this utility model; Figure 5 This utility model Figure 4 A top-view structural diagram; In the figure: 1. Substrate, 101. Raised strip, 102. Trench, 2. Reflective layer, 3. First conductive layer, 311. First electrode, 4. Light-emitting layer, 5. Second conductive layer, 511. Second electrode, 6. CBL current spreading layer, 7. Transparent conductive layer, 8. PV passivation layer. Detailed Implementation

[0014] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0015] In the description of this utility model, it should be understood that the terms "middle", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0016] Example 1 like Figures 1 to 3As shown, a high-efficiency LED chip includes a substrate 1 made of sapphire material. A reflective layer 2 is provided on the back side of the substrate, which can be DBR or a highly reflective metal, etc. Multiple raised strips 101 are evenly distributed on the surface of the substrate near the reflective layer. The raised strips and the substrate are an integral structure. A groove 102 is formed between every two adjacent raised strips. The top of the raised strip 101 and the bottom of the groove 102 are both arc-shaped surfaces, making the vertical cross-section of the substrate surface have a wavy structure. This increases the light emission angle, improves the light reflection efficiency of the reflective layer in the non-vertical direction, effectively enhances the reflection effect of the DBR reflector, and improves the light extraction efficiency of the LED. The vertical cross-section of each raised strip 101 and groove 102 is V-shaped or semi-circular. In this embodiment, the vertical cross-section of both the raised strip and the groove is a V-shaped with an arc-shaped bottom.

[0017] The front side of the substrate is sequentially stacked with a first conductive layer 3, a light-emitting layer 4, a second conductive layer 5, a CBL current spreading layer 6, and a transparent conductive layer 7. The first conductive layer 3 is generally made of GaN material, but is not limited to GaN. The light-emitting layer 4 is a quantum well light-emitting layer. The second conductive layer 5 corresponds to the first conductive layer and can be made of GaN material, but is not limited to GaN. The top of both the first conductive layer 3 and the transparent conductive layer 7 has exposed mesa surfaces connected to corresponding first electrodes 311 and second electrodes 511, respectively. The first electrode 311 is the electrode of the first conductive layer 3, and the second electrode 511 is the electrode of the second conductive layer 5. The CBL current spreading layer 6 is generally an insulating layer such as SiO2 or SiN, and the transparent conductive layer 7 is generally made of ITO, but is not limited to ITO conductive materials.

[0018] A PV passivation layer 8, typically SiO2, is covered on the exposed surfaces of the first conductive layer 3, the second conductive layer 5, the light-emitting layer 4, and the transparent conductive layer 5. However, it is not limited to SiO2. The first electrode 311 and the second electrode 511 are both located on top of the PV passivation layer 8, and the PV passivation layer contains channels 801 that match the first electrode 311 and the second electrode 511.

[0019] Example 2 like Figure 4 and Figure 5 As shown, the difference between this embodiment and Embodiment 1 is that the horizontal cross-section of each protrusion 101 and groove 102 on the back side of the substrate is S-shaped, which can further increase the reflection angle and improve the light extraction efficiency.

[0020] In Examples 1 and 2, the trenches on the back side of the substrate can be formed by etching or by mechanical grinding using a grinding wheel with a corresponding shape.

[0021] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. It will be apparent to those skilled in the art that this utility model is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or basic characteristics of this utility model. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of this utility model is defined by the appended claims rather than the foregoing description, and thus all changes falling within the meaning and scope of equivalents of the claims are intended to be included within this utility model.

Claims

1. A high efficacy LED chip, characterized by: The substrate includes a reflective layer on its back side. Multiple raised strips are evenly spaced on the side surface of the substrate near the reflective layer. A groove is formed between each pair of adjacent raised strips. The top of the raised strips and the bottom of the grooves are arc-shaped surfaces, so that the vertical cross-section of the substrate surface has a wavy structure. The horizontal cross-section of each raised strip and groove is S-shaped.

2. A high efficacy LED chip as claimed in claim 1, characterized in that: The protrusion and the substrate are an integral structure.

3. A high-efficiency LED chip as described in claim 1, characterized in that: The vertical cross-section of each of the aforementioned protrusions and grooves is V-shaped or semi-circular.

4. The high-eficiency LED chip of claim 1, wherein: The front side of the substrate is sequentially stacked with a first conductive layer, a light-emitting layer, a second conductive layer, a CBL current spreading layer, and a transparent conductive layer. The top of the first conductive layer and the transparent conductive layer are each provided with an exposed platform and are respectively connected to a first electrode and a second electrode.

5. A high efficacy LED chip as claimed in claim 4, wherein: A PV passivation layer is coated on the exposed surfaces of the first conductive layer, the second conductive layer, the light-emitting layer, and the transparent conductive layer.

6. A high-efficiency LED chip as described in claim 5, characterized in that: The first electrode and the second electrode are both located on top of the PV passivation layer, and the PV passivation layer has channels inside that match the first electrode and the second electrode.

Images