Display device and electronic device including the same

By independently driving the light-sensing element and the light-emitting element in the display device, and utilizing a unique electrode layer and pixel-limiting layer design, the problem of insufficient resolution in existing display devices is solved, achieving efficient light sensing and light-emitting performance, and supporting applications in a variety of electronic devices.

CN224583637UActive Publication Date: 2026-07-31SAMSUNG DISPLAY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SAMSUNG DISPLAY CO LTD
Filing Date
2025-06-20
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

Existing display devices have shortcomings in terms of resolution and display effect, and it is difficult to achieve efficient light sensing and independent driving of light-emitting elements.

Method used

The first and second sub-pixel regions formed on the substrate include a photosensitive element and a light-emitting element, respectively. The photosensitive element and the light-emitting element are driven separately through independent intermediate electrode layers and power supply voltage control. By utilizing different pixel definition layer shapes and physical separation of electrode layers, space utilization and resolution are improved.

Benefits of technology

It achieves high resolution and efficient light sensing capabilities for display devices, while improving space efficiency and display quality, and supports applications for a variety of electronic devices.

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Abstract

This utility model relates to a display device and an electronic device including the same. The display device includes: a substrate, including a region in which a first sub-pixel and a second sub-pixel are formed; a lower electrode layer on the substrate; a light sensing element on the lower electrode layer of the first sub-pixel; a first intermediate electrode layer on the light sensing element; a first light-emitting element on the first intermediate electrode layer; and a first upper electrode layer on the first light-emitting element, wherein the first light-emitting element and the light sensing element are driven separately according to a voltage applied to the first intermediate electrode layer.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0081227, filed on June 21, 2024, and Korean Patent Application No. 10-2024-0104896, filed on August 6, 2024, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices and electronic devices including display devices. Background Technology

[0004] With the recent increase in interest in information display, research and development of display devices are ongoing.

[0005] The above description is intended only to help understand the background art of the technical ideas of this disclosure, and therefore, the above description should not be construed as a description of technology known to those skilled in the art to which this disclosure pertains. Utility Model Content

[0006] The embodiments of this disclosure relate to a display device having improved resolution and a method of manufacturing the display device.

[0007] According to some embodiments of the present disclosure, a display device is provided, the display device comprising: a substrate, including a region in which a first sub-pixel and a second sub-pixel are formed; a lower electrode layer on the substrate; a light sensing element on the lower electrode layer of the first sub-pixel; a first intermediate electrode layer on the light sensing element; a first light-emitting element on the first intermediate electrode layer; and a first upper electrode layer on the first light-emitting element, wherein the first light-emitting element and the light sensing element are driven separately according to a voltage applied to the first intermediate electrode layer.

[0008] In some implementations, the photosensitive element is not driven during the period when the first light-emitting element emits light.

[0009] In some embodiments, the display device further includes: a second intermediate electrode layer on the lower electrode layer of the second sub-pixel; a second light-emitting element on the second intermediate electrode layer; and a second upper electrode layer on the second light-emitting element, wherein the second light-emitting element emits different light from the first light-emitting element.

[0010] In some embodiments, the display device further includes: a first pixel defining layer and a second pixel defining layer, which are on a substrate and protrude in a direction perpendicular to the substrate, wherein the first intermediate electrode layer is physically separated from the second intermediate electrode layer through the first pixel defining layer, and wherein the first upper electrode layer is physically separated from the second upper electrode layer through the first pixel defining layer.

[0011] In some implementations, the first pixel defining layer and the second pixel defining layer have different shapes.

[0012] In some implementations, each of the second pixel-defining layers has a trapezoidal cross-section.

[0013] In some embodiments, each of the first pixel defining layers has an eleventh pixel defining layer and a twelfth pixel defining layer connected to each other in a direction perpendicular to the substrate, the eleventh pixel defining layer having a trapezoidal cross-section and the twelfth pixel defining layer having an inverted trapezoidal cross-section.

[0014] In some embodiments, the display device further includes an upper auxiliary electrode layer on a first upper electrode layer and a second upper electrode layer, wherein the upper auxiliary electrode layer on the first upper electrode layer is physically connected to the upper auxiliary electrode layer on the second upper electrode layer.

[0015] In some embodiments, a second power supply voltage is applied to the lower electrode layer, and a first power supply voltage is applied to each of the first and second upper electrode layers, wherein the level of the first power supply voltage is higher than the level of the second power supply voltage.

[0016] According to some embodiments of this disclosure, an electronic device including the display device described above is provided.

[0017] In some implementations, the electronic device is a smartphone, television, monitor, tablet, electric vehicle, mobile phone, tablet PC, mobile communication terminal, electronic notebook, e-book, portable multimedia player (PMP), navigation device, ultra-mobile PC (UMPC), laptop computer, billboard, Internet of Things (IoT) device, smart card, watch phone, or head-mounted display (HMD).

[0018] According to some embodiments of the present disclosure, a method for manufacturing a display device is provided, the method comprising: forming a substrate including a region having a first sub-pixel and a second sub-pixel; forming a lower electrode layer on the substrate; forming a photosensitive element on the lower electrode layer of the first sub-pixel; forming a first intermediate electrode layer on the photosensitive element; forming a first light-emitting element on the first intermediate electrode layer; and forming a first upper electrode layer on the first light-emitting element, wherein the first light-emitting element and the photosensitive element are driven separately according to a voltage applied to the first intermediate electrode layer.

[0019] In some implementations, the photosensing element is not driven during the period when the first light-emitting element emits light.

[0020] In some embodiments, the method further includes: forming a second intermediate electrode layer on the lower electrode layer of the second sub-pixel; forming a second light-emitting element on the second intermediate electrode layer; and forming a second upper electrode layer on the second light-emitting element.

[0021] In some embodiments, the method further includes: forming a first pixel defining layer and a second pixel defining layer protruding in a direction perpendicular to the substrate on the substrate, wherein the first intermediate electrode layer is physically separated from the second intermediate electrode layer through the first pixel defining layer, and wherein the first upper electrode layer is physically separated from the second upper electrode layer through the first pixel defining layer.

[0022] In some implementations, the first pixel defining layer and the second pixel defining layer have different shapes.

[0023] In some implementations, each of the second pixel-defined layers has a trapezoidal cross-section.

[0024] In some embodiments, each of the first pixel defining layers has an eleventh pixel defining layer and a twelfth pixel defining layer connected to each other in a direction perpendicular to the substrate, the eleventh pixel defining layer having a trapezoidal cross-section and the twelfth pixel defining layer having an inverted trapezoidal cross-section.

[0025] In some embodiments, the method further includes forming upper auxiliary electrode layers on the first upper electrode layer and the second upper electrode layer, respectively, wherein the upper auxiliary electrode layer on the first upper electrode layer is physically connected to the upper auxiliary electrode layer on the second upper electrode layer.

[0026] In some embodiments, a second power supply voltage is applied to the lower electrode layer, a first power supply voltage is applied to each of the first and second upper electrode layers, and the level of the first power supply voltage is higher than the level of the second power supply voltage.

[0027] Therefore, this disclosure can provide a display device with improved resolution and a method for manufacturing the display device.

[0028] The effects of some implementation methods are not limited to those described above, and many more different effects are included in this disclosure. Attached Figure Description

[0029] Figure 1 This is a block diagram illustrating a display device according to some embodiments of the present disclosure.

[0030] Figure 2 This is based on some embodiments of the present disclosure. Figure 1A floor plan of the display panel.

[0031] Figure 3 This is based on some embodiments of the present disclosure. Figure 2 A magnified view of part X.

[0032] Figure 4 It is according to some embodiments of this disclosure along Figure 3 A sectional view taken by line I-I'.

[0033] Figure 5 This illustrates some embodiments according to the present disclosure. Figure 4 The first pixel defines the view of the layer.

[0034] Figure 6 This is a flowchart illustrating a method for manufacturing a display device according to some embodiments of the present disclosure.

[0035] Figure 7 This illustrates some embodiments according to the present disclosure, such as... Figure 6 A view of the process for forming the substrate and circuit element layers as described in the figure.

[0036] Figure 8 References show some embodiments according to this disclosure. Figure 6 A view describing the process of forming the first pixel defining layer, the second pixel defining layer, and the lower electrode layer.

[0037] Figure 9 References show some embodiments according to this disclosure. Figure 6 A view describing the process of forming a photosensitive element.

[0038] Figure 10 References show some embodiments according to this disclosure. Figure 6 A view describing the process of forming the intermediate layer.

[0039] Figure 11 References show some embodiments according to this disclosure. Figure 6 A view describing the process of forming the first to third light-emitting elements.

[0040] Figure 12 References show some embodiments according to this disclosure. Figure 6 A view depicting the process of forming the upper electrode layer.

[0041] Figure 13 References show some embodiments according to this disclosure. Figure 6 A view describing the process of forming the upper auxiliary electrode layer.

[0042] Figure 14This is a block diagram of an electronic device according to an embodiment.

[0043] Figure 15 Schematic diagrams illustrating various embodiments of the electronic device are shown. Detailed Implementation

[0044] In the following description, some embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, only the parts necessary for understanding the operation of the present disclosure will be described, and it should be noted that descriptions of other parts will be omitted so as not to obscure the essential points of the present disclosure. Furthermore, the present disclosure is not limited to the embodiments described herein and may be implemented in other forms. However, the embodiments described herein are intended to illustrate the technical ideas of the present disclosure in detail to a degree that allows those skilled in the art to readily practice these embodiments.

[0045] It should be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first region, first layer, or first section discussed below may be referred to as a second element, second component, second region, second layer, or second section.

[0046] For ease of explanation, spatial relative terms such as “below,” “under,” “down,” “below,” “above,” and “above” may be used herein to describe the relationship of one element or feature to another element(s) or feature(s) as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, spatial relative terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the drawings is flipped, an element described as “below,” “under,” or “below” other elements or features will subsequently be oriented “above” other elements or features. Thus, the exemplary terms “below” and “below” can encompass both above and below orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein should be interpreted accordingly. Furthermore, it should be understood that when a layer is referred to as “between two layers,” it can be the only layer between the two layers, or there may be one or more layers in between.

[0047] The terminology used herein is for the purpose of describing particular embodiments and not for limiting the concept of this disclosure. Unless the context clearly indicates otherwise, the singular forms “an” and “a” as used herein are intended to include the plural forms as well. It will also be understood that when the terms “includes,” “including,” “comprises,” “has,” “have,” and “having” are used in this specification, they specify the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0048] As used herein, the term "and / or" includes any and all combinations of one or more of the related listed items. For example, the expression "A and / or B" means A, B, or A and B. Phrases such as "one or more of..." and "at least one of..." modify the entire list of elements and not individual elements when following a list of elements. For example, the expressions "one or more of A, B, and C", "at least one of A, B, and C", and "at least one selected from the group consisting of A, B, and C" mean only A, only B, only C, both A and B, both A and C, both B and C, or all of A, B, and C.

[0049] Furthermore, when describing embodiments of the present invention, the use of "may" refers to "one or more embodiments of the present invention." Additionally, the term "exemplary" is intended to indicate an example or illustration.

[0050] It should be understood that when an element or layer is referred to as being "on," "connected to," "attached to," or "adjacent to" another element or layer, the element or layer may be directly on, directly connected to, directly attached to, or directly adjacent to the other element or layer, or there may be one or more intermediate elements or layers. When an element or layer is referred to as being directly on, directly connected to, directly connected to, in contact with, directly in contact with, or immediately adjacent to another element or layer, there are no intermediate elements or layers.

[0051] As used herein, the terms “substantially,” “about,” and similar terms are used as approximations rather than as terms of degree, and are intended to allow for inherent biases in measurements or calculations that will be recognized by those skilled in the art.

[0052] As used herein, the terms “use,” “using,” and “used” can be considered synonymous with the terms “utilize,” “utilizing,” and “utilized,” respectively.

[0053] When one or more implementations can be carried out differently, a particular process sequence may be performed differently than the described sequence. For example, (i) the operation of the disclosed process is merely an example and may include various additional operations not explicitly covered, and (ii) the timing order of the operations may be changed.

[0054] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless expressly defined herein, terms (such as those defined in common dictionaries) shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field and / or in this specification, and shall not be interpreted as having an ideal or overly formal meaning.

[0055] Various embodiments are described with reference to the accompanying drawings, which illustrate idealized implementations. Therefore, it will be anticipated that the shape may vary depending on, for example, tolerances and / or manufacturing techniques. Consequently, the embodiments disclosed herein should not be construed as limited to the specific shapes shown, but should be interpreted as including, for example, shape variations due to manufacturing processes. Thus, the shapes shown in the drawings may not represent the actual shape of a region of the device, and this embodiment is not limited thereto.

[0056] Figure 1 This is a block diagram illustrating a display device according to some embodiments of the present disclosure.

[0057] Reference Figure 1 The display device DD may include a display panel DP, a controller 110, a data driver 120, a scan driver 130, a sensing unit 140, and a power supply 150.

[0058] The display panel DP can include multiple pixels PXL. The display panel DP can be connected to data lines DL1 to DLm, scan lines SL1 to SLn, and sensing lines RL1 to RLl. In the display panel DP, multiple pixels PXL can be electrically connected to data lines DL1 to DLm, scan lines SL1 to SLn, and sensing lines RL1 to RLl.

[0059] The display panel (DP) can be one of various types of panels, such as an organic light-emitting diode (OLED) panel. The type of wiring in the display panel DP can vary depending on the pixel structure, panel type, etc.

[0060] The controller 110 can control the operation of the data driver 120, the scan driver 130, the sensing unit 140, and the power supply 150. The controller 110 can provide a first control signal SCS to the scan driver 130 to apply scan signals to scan lines SL1 to SLn according to the timing implemented in each frame. The controller 110 can provide an image data signal DATA obtained by converting the data format of the image signal according to the interface specification of the data driver 120. When scan signals are applied to scan lines SL1 to SLn, the controller 110 can provide a second control signal DCS to the data driver 120, causing data voltages to be applied to data lines DL1 to DLm. The controller 110 can provide a third control signal SUCS to the sensing unit 140, allowing the sensing unit 140 to perform sensing operations using sensing lines RL1 to RL1. Furthermore, the controller 110 can provide a fourth control signal PCS to the power supply 150.

[0061] The controller 110 may be a timing controller used in display technology of the related art, and may also be a control device that can perform other control functions by including a timing controller.

[0062] Data driver 120 can output data signals to data lines DL1 to DLm. For example, data driver 120 can receive a second control signal DCS and an image data signal DATA from controller 110. Data driver 120 can convert the image data signal DATA into a data signal and output the data signal to data lines DL1 to DLm. Here, the data signal can be an analog voltage corresponding to the grayscale value of the image data signal DATA. That is, when scan driver 130 selects a scan line, data driver 120 can provide an analog data voltage to data lines DL1 to DLm.

[0063] The scan driver 130 can receive a first control signal SCS from the controller 110. The scan driver 130 can output scan signals to scan lines SL1 to SLn. The scan driver 130 can sequentially provide scan signals to scan lines SL1 to SLn according to the first control signal SCS from the controller 110. Multiple pixels PXL receiving the scan signals can receive analog voltages having grayscale values ​​corresponding to the image data signal DATA, and output light with a brightness corresponding to the received analog voltages in response to a light emission control signal. Therefore, an image can be displayed on the display panel DP.

[0064] Although for the sake of ease of description, Figure 1 The data driver 120 and scan driver 130 are shown as separate components, but this disclosure is not limited thereto. That is, at least a portion of the data driver 120 and scan driver 130 may be integrated into a single drive circuit, module, etc.

[0065] The sensing unit 140 can receive a third control signal SUCS from the controller 110. In response to the third control signal SUCS, the sensing unit 140 can detect signals from the optical sensor PS (e.g., see...). Figure 2 The sensing unit 140 can detect touches on the display panel DP or identify fingerprints on the display panel DP by using the current (or electrical signal) transmitted through the sensing lines RL1 to RL1.

[0066] Power supply 150 may receive a fourth control signal PCS from controller 110. Power supply 150 may supply voltage (e.g., a first power supply voltage ELVDD, a second power supply voltage ELVSS, a first voltage V1, etc.) to display panel DP in response to the fourth control signal PCS. In some embodiments, the first power supply voltage ELVDD may be a voltage higher than the second power supply voltage ELVSS.

[0067] Figure 2 This is based on some embodiments of the present disclosure. Figure 1 A floor plan of the display panel (DP).

[0068] Reference Figure 2 The display panel DP and the substrate SUB used to form the display panel DP may include a display area DA for displaying images and a non-display area NDA other than the display area DA. The display area DA may constitute a screen on which images are displayed, and the non-display area NDA may be other areas besides the display area DA.

[0069] For ease of description, Figure 2 The structure of the display panel DP is briefly shown by focusing on the display area DA. However, at least one driving circuit (e.g., at least one of a scan driver, a data driver, and a sensing unit), wiring, and / or pads may be further arranged on the display panel DP.

[0070] Multiple pixels PXL can be arranged on the display area DA. Each of the multiple pixels PXL may include a first sub-pixel SPXL1, a second sub-pixel SPXL2, a third sub-pixel SPXL3, and a light sensor PS. For clarity and conciseness, Figure 2 The diagram shows a first sub-pixel SPXL1, a second sub-pixel SPXL2, a third sub-pixel SPXL3, and a light sensor PS, all contained within a pixel PXL. It can be understood that each of the other pixels PXL also includes the first sub-pixel SPXL1, the second sub-pixel SPXL2, the third sub-pixel SPXL3, and the light sensor PS.

[0071] The stripe arrangement structure can be based on ( Multiple pixels PXL are arranged in a regular manner (such as by arrangement structure, etc.). However, the arrangement structure of multiple pixels PXL is not limited to this, and multiple pixels PXL can be arranged in the display area DA in various suitable structures and / or methods.

[0072] A first sub-pixel SPXL1 emitting light of a first color, a second sub-pixel SPXL2 emitting light of a second color, and a third sub-pixel SPXL3 emitting light of a third color can be arranged in the display area DA. At least one of the first sub-pixels SPXL1, SPXL2, and SPXL3 arranged adjacent to each other can constitute a pixel PXL capable of emitting light of one of various colors. For example, the first sub-pixel SPXL1 can be a red pixel emitting red light, the second sub-pixel SPXL2 can be a green pixel emitting green light, and the third sub-pixel SPXL3 can be a blue pixel emitting blue light, but this disclosure is not limited thereto.

[0073] However, despite Figure 2 A first sub-pixel SPXL1, a second sub-pixel SPXL2, and a third sub-pixel SPXL3 constituting a pixel PXL are shown, but this disclosure is not limited thereto. For example, one of a plurality of pixels PXL may include a first sub-pixel SPXL1, two second sub-pixels SPXL2, and a third sub-pixel SPXL3.

[0074] The first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 may each include a light-emitting element that serves as a light source. For example, the first sub-pixel SPXL1 may include a first light-emitting element EL1 that serves as a light source (see, for example, see...). Figure 12 The second sub-pixel SPXL2 may include a second light-emitting element EL2 used as a light source (see, for example, see...). Figure 12 The third sub-pixel SPXL3 may include a third light-emitting element EL3 used as a light source (see, for example, [link to source]). Figure 12 However, the color of the light emitted by each of the first sub-pixels SPXL1 to the third sub-pixel SPXL3 can be varied.

[0075] A light sensor PS may include a light sensing element PD (e.g., see...) Figure 4 ) and driving circuitry for driving the photosensitive element PD. Here, the driving circuitry may be included in the circuit element layer PCL (e.g., see Figure 4 In this context, the photosensitive element PD can be a photoelectric conversion element that converts external incident light into an electrical signal. The electrical signal generated by the photosensitive element PD can be transmitted through sensing lines RL1 to RL1 (see, for example, see...). Figure 1 ) is transmitted to sensing unit 140 (e.g., see Figure 1 ).

[0076] In some embodiments of this disclosure, the photosensitive element PD can be connected to a first light-emitting element EL1, a second light-emitting element EL2, and a third light-emitting element EL3 (see, for example, see...). Figure 11 Any one of the following can overlap: For example, the photosensitive element PD can overlap with the first light-emitting element EL1 on the third-direction DR3. For example, the photosensitive element PD can overlap with the second light-emitting element EL2 on the third-direction DR3. For example, the photosensitive element PD can overlap with the third light-emitting element EL3 on the third-direction DR3. When the photosensitive element PD overlaps with any one of the first to third light-emitting elements EL1, space efficiency can be achieved. Furthermore, more first to third light-emitting elements EL1 per unit area can be arranged on the display panel DP. Therefore, the resolution of the display panel DP can be improved.

[0077] In the following text, it is assumed that the photosensitive element PD overlaps with the first light-emitting element EL1.

[0078] Figure 3 This is based on some embodiments of the present disclosure. Figure 2 A magnified view of part X.

[0079] Reference Figure 2 and Figure 3 The display area DA may include a first light-emitting area EA1, a second light-emitting area EA2, a third light-emitting area EA3, and a non-light-emitting area NEA. In some embodiments, when the photosensitive element PD overlaps with the first light-emitting element EL1, the sensing area RA may be included in the first light-emitting area EA1.

[0080] The first light-emitting region EA1 can be the region in which the first sub-pixel SPXL1 emits light. The second light-emitting region EA2 can be the region in which the second sub-pixel SPXL2 emits light. The third light-emitting region EA3 can be the region in which the third sub-pixel SPXL3 emits light.

[0081] The sensing area RA can be the area on the display panel DP that is detected by the light sensor PS (or the light sensing element PD) or that identifies the fingerprint on the display panel DP.

[0082] The non-light-emitting area NEA can be the area on the display area DA where the first sub-pixels SPXL1 to the third sub-pixels SPXL3 are not arranged. Therefore, the non-light-emitting area NEA can be a non-light-emitting area (e.g., an area that cannot emit light).

[0083] Figure 4 It is according to some embodiments of this disclosure along Figure 3 A sectional view taken by line I-I'.

[0084] Reference Figure 4 The display panel DP may include a substrate SUB, a circuit element layer PCL, a pixel definition layer PDL, a lower electrode layer BE, a photosensitive element PD, an intermediate electrode layer ME, a first light-emitting element EL1, a second light-emitting element EL2, an upper electrode layer TE, an upper auxiliary electrode layer TAE, an encapsulation layer TFE, and a touch sensing panel TSP.

[0085] The pixel definition layer (PDL) may include a first pixel definition layer (PDL1) and a second pixel definition layer (PDL2). The intermediate electrode layer (ME) may include a first intermediate electrode layer (ME1) and a second intermediate electrode layer (ME2).

[0086] The first light-emitting element EL1 may include a first hole transport layer HTL1, a first light-emitting layer EML1, and a first electron transport layer ETL1. The second light-emitting element EL2 may include a second hole transport layer HTL2, a second light-emitting layer EML2, and a second electron transport layer ETL2.

[0087] The upper electrode layer TE may include a first upper electrode layer TE1 and a second upper electrode layer TE2.

[0088] The substrate SUB may include a semiconductor substrate. The substrate SUB may have a three-dimensional shape extending in a first direction DR1 to a third direction DR3. For example, the substrate SUB may include a bulk silicon wafer, an epitaxial wafer, etc. The epitaxial wafer may include a layer of crystalline material (i.e., an epitaxial layer) grown on the bulk substrate by an epitaxial process. The substrate SUB can be formed using various wafers (e.g., polished wafers, annealed wafers, and silicon-on-insulator (SOI) wafers), and is not limited to bulk silicon wafers or epitaxial wafers.

[0089] A circuit element layer (PCL) may be disposed on a substrate (SUB). The PCL may have a three-dimensional shape extending in a first direction (DR1) to a third direction (DR3). The PCL may include a first light-emitting element (EL1) and a second light-emitting element (EL2), circuit elements for driving a photosensitive element (PD), and at least one insulating layer between the circuit elements. The circuit elements may include multiple transistors and signal lines connected to the transistors. For example, each transistor may be a metal-oxide-semiconductor field-effect transistor (MOSFET), but is not limited thereto. Furthermore, each circuit element may include a gate electrode, a source region, a drain region, and a channel region.

[0090] The substrate (SUB) and the circuit element layer (PCL) can be formed using semiconductor processes and equipment, but are not limited to these.

[0091] The substrate SUB and the circuit element layer PCL can be formed in the first light-emitting region EA1, the non-light-emitting region NEA, and the second light-emitting region EA2.

[0092] The pixel limiting layer (PDL) and the lower electrode layer (BE) can be formed on the circuit element layer (PCL).

[0093] The pixel defining layer (PDL) can be composed of an organic insulating layer including organic materials. Organic materials may include acrylic resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, etc. According to some embodiments, each pixel defining layer (PDL) may include a light-absorbing material or may be coated with a light-absorbing agent to absorb light introduced from the outside. For example, each pixel defining layer (PDL) may include a carbon-based black pigment, but is not limited thereto.

[0094] The pixel definition layer (PDL) can protrude from the surface (e.g., the upper surface) of the circuit element layer (PCL) in a third direction (DR3, for example, perpendicular to the substrate (SUB)).

[0095] Each of the first pixel-defining layer PDL1 and each of the second pixel-defining layer PDL2 can have different shapes from each other. This will be referred to below. Figure 5 Further description.

[0096] In the following text, at least one first pixel defining layer may be referred to as "first pixel defining layer PDL1", or two or more first pixel defining layers may be collectively referred to as "first pixel defining layer PDL1" or "multiple first pixel defining layers PDL1". Similarly, at least one second pixel defining layer may be referred to as "second pixel defining layer PDL2", or two or more second pixel defining layers may be collectively referred to as "second pixel defining layer PDL2" or "multiple second pixel defining layers PDL2".

[0097] like Figure 4 As shown, the regions where the first light-emitting region EA1 and the second light-emitting region EA2 are located can be defined by the first pixel limiting layer PDL1 and the second pixel limiting layer PDL2, respectively. Furthermore, the region where the non-light-emitting region NEA is located can be defined by another first pixel limiting layer PDL1 and another second pixel limiting layer PDL2.

[0098] The lower electrode layer BE can be formed on the surface of the circuit element layer PCL that is not covered by the pixel defining layer PDL. For example, the lower electrode layer BE can be formed in the first light-emitting region EA1, the non-light-emitting region NEA, and the second light-emitting region EA2 on the surface of the circuit element layer PCL that is not covered by the pixel defining layer PDL. The lower electrode layer BE can be an electrode layer to which the second power supply voltage ELVSS is supplied by the power supply 150.

[0099] A photosensitive element PD can be disposed on the lower electrode layer BE in the first light-emitting region EA1. The photosensitive element PD may include an anode electrode, a cathode electrode, and a photoelectric conversion layer interposed between the anode and cathode electrodes. The photosensitive element PD can be a photoelectric conversion element that converts external incident light into an electrical signal. The photosensitive element PD can be, for example, a pn-type or pin-type photodiode, or a phototransistor. The photodiode can be an organic photodiode using organic materials, but is not limited thereto, and can also be an inorganic photodiode formed of inorganic materials.

[0100] The intermediate electrode layer ME can be disposed on the photosensitive element PD, the lower electrode layer BE, and the pixel definition layer PDL. For example, Figure 4 As shown, the intermediate electrode layer ME can be disposed on a portion of the first pixel limiting layer PDL1, the second pixel limiting layer PDL2, the photosensitive element PD, and the lower electrode layer BE.

[0101] The first intermediate electrode layer ME1 can be disposed in the first light-emitting region EA1 and the non-light-emitting region NEA.

[0102] In addition, the second intermediate electrode layer ME2 can be disposed in the second light-emitting region EA2 and the non-light-emitting region NEA.

[0103] The first intermediate electrode layer ME1 and the second intermediate electrode layer ME2, disposed on different sub-pixels, can be physically separated by the first pixel defining layer PDL1. For example, the first intermediate electrode layer ME1 can be physically separated from the second intermediate electrode layer ME2 through the first pixel defining layer PDL1. Figure 4 As shown, due to the shape of the first pixel defining layer PDL1, the first intermediate electrode layer ME1 and / or the second intermediate electrode layer ME2 may not be disposed on a portion of the first pixel defining layer PDL1. Therefore, the first intermediate electrode layer ME1 can be physically separated from the second intermediate electrode layer ME2 through the first pixel defining layer PDL1.

[0104] The first voltage V1 can be supplied to the intermediate electrode layer ME by the power supply 150.

[0105] The light-emitting element can be disposed on the intermediate electrode layer ME. For example, the first hole transport layer HTL1, the first light-emitting layer EML1, and the first electron transport layer ETL1 can be sequentially deposited on the first intermediate electrode layer ME1 in the first light-emitting region EA1. For example, the second hole transport layer HTL2, the second light-emitting layer EML2, and the second electron transport layer ETL2 can be sequentially deposited on the second intermediate electrode layer ME2 in the second light-emitting region EA2.

[0106] The first hole transport layer HTL1 can provide holes to the first light-emitting layer EML1, and the first electron transport layer ETL1 can provide electrons to the first light-emitting layer EML1. Light can be emitted from the first light-emitting layer EML1 through recombination of electrons and holes.

[0107] The second hole transport layer HTL2 can provide holes to the second light-emitting layer EML2, and the second electron transport layer ETL2 can provide electrons to the second light-emitting layer EML2. Light can be emitted from the second light-emitting layer EML2 through recombination of electrons and holes.

[0108] The first light-emitting element EL1 and the light-sensing element PD can overlap each other on the third-direction DR3.

[0109] The upper electrode layer TE can be disposed on the first electron transport layer ETL1, the second electron transport layer ETL2, and the pixel definition layer PDL. For example, Figure 4 As shown, the upper electrode layer TE can be disposed on a portion of the first pixel limiting layer PDL1, the second pixel limiting layer PDL2, the first electron transport layer ETL1, and the second electron transport layer ETL2.

[0110] The first upper electrode layer TE1 can be disposed in the first light-emitting region EA1 and the non-light-emitting region NEA.

[0111] In addition, the second upper electrode layer TE2 can be disposed in the second light-emitting region EA2 and the non-light-emitting region NEA.

[0112] The top electrode layer TE, disposed on different sub-pixels, can be physically separated from the first pixel defining layer PDL1. For example, the first top electrode layer TE1 can be physically separated from the second top electrode layer TE2 through the first pixel defining layer PDL1. Figure 4 As shown, due to the shape of the first pixel defining layer PDL1, the first upper electrode layer TE1 and / or the second upper electrode layer TE2 may not be disposed on a portion of the first pixel defining layer PDL1. As a result, the first upper electrode layer TE1 can be physically separated from the second upper electrode layer TE2 through the first pixel defining layer PDL1.

[0113] The first power supply voltage ELVDD can be supplied to the upper electrode layer TE by power supply 150.

[0114] In some embodiments of this disclosure, the power supply 150 may adjust the level of the first voltage V1 in response to a fourth control signal PCS. When the level of the first voltage V1 changes, the voltage difference between the first voltage V1 and the first power supply voltage ELVDD may change. In other words, the voltage difference across each light-emitting element (e.g., the first light-emitting element EL1, the second light-emitting element EL2, etc.) may be changed. Therefore, it may be determined (e.g., identified) whether the light-emitting element is driven.

[0115] Furthermore, when the level of the first voltage V1 changes, the voltage difference between the first voltage V1 and the second power supply voltage ELVSS can change. In other words, the voltage difference across the two ends of the photosensitive element PD can change. Therefore, it can be determined whether the photosensitive element PD is being driven.

[0116] In some embodiments of this disclosure, the display device DD can drive the first light-emitting element EL1 and the photosensitive element PD independently by adjusting the level of the first voltage V1. For example, when the first light-emitting element EL1 to the third light-emitting element EL3 emit light, the photosensitive element PD may not be driven. For example, when the first light-emitting element EL1 to the third light-emitting element EL3 are not driven, the photosensitive element PD can detect touch on the display panel DP or recognize fingerprints on the display panel DP.

[0117] The upper auxiliary electrode layer (TAE) can be disposed on the upper electrode layer (TE). The upper auxiliary electrode layer (TAE) can be disposed throughout the first light-emitting region (EA1), the non-light-emitting region (NEA), and the second light-emitting region (EA2). In other words, the upper auxiliary electrode layer (TAE) disposed on the first light-emitting region (EA1) and the upper auxiliary electrode layer (TAE) disposed on the second light-emitting region (EA2) can be physically separated from each other without being physically separated by the first pixel limiting layer (PDL1). In other words, the upper auxiliary electrode layer (TAE) disposed on the first light-emitting region (EA1) can be electrically connected to the upper auxiliary electrode layer (TAE) disposed on the second light-emitting region (EA2).

[0118] The encapsulation layer TFE can be disposed on the upper auxiliary electrode layer TAE. The encapsulation layer TFE can prevent external moisture and oxygen from penetrating into the upper auxiliary electrode layer TAE, or substantially reduce the possibility of external moisture and oxygen penetrating into the upper auxiliary electrode layer TAE.

[0119] The touch sensing panel (TSP) can be placed on the encapsulation layer (TFE).

[0120] When a touch sensor panel (TSP) receives touch input from a user, it can obtain information about the touch input. The TSP can identify touch input using capacitive sensing methods. Alternatively, it can detect touch input using mutual capacitance or self-capacitance methods.

[0121] A window can be placed on the touch-sensing panel (TSP). The window can be a transparent, light-transmitting substrate. The window and the touch-sensing panel (TSP) can be connected to each other using an optically transparent adhesive component. The window allows visible information to pass through while reducing external influences on the display device (DD). For example, the window can be formed of rigid glass, flexible plastic, etc. However, embodiments of this disclosure are not limited to these.

[0122] Figure 5 This illustrates some embodiments according to the present disclosure. Figure 4 The first pixel defines the view of the layer.

[0123] Reference Figure 5 The first pixel definition layer PDL1 may include an eleventh pixel definition layer PDL11 and a twelfth pixel definition layer PDL12 that are connected to each other on a third direction DR3 (e.g., a direction perpendicular to the substrate SUB).

[0124] The eleventh pixel limiting layer PDL11 can have substantially the same shape as the second pixel limiting layer PDL2. The eleventh pixel limiting layer PDL11 can have a shape in which its cross-section gradually decreases in the third direction DR3. For example, the eleventh pixel limiting layer PDL11 can have a trapezoidal cross-section.

[0125] Furthermore, the twelfth pixel defining layer PDL12 can have a shape in which its cross-section gradually increases in the third direction DR3. For example, the twelfth pixel defining layer PDL12 can have an inverted trapezoidal cross-section.

[0126] During the deposition process, due to the shape of the twelfth pixel defining layer PDL12, material may not be deposited on certain areas of the twelfth pixel defining layer PDL12. By utilizing this, such as Figure 4 As shown, the first intermediate electrode layer ME1 can be physically separated from the second intermediate electrode layer ME2 through the first pixel defining layer PDL1. Similarly, by utilizing this, as... Figure 4 As shown, the first upper electrode layer TE1 can be physically separated from the second upper electrode layer TE2 through the first pixel limiting layer PDL1.

[0127] Figure 6 This is a flowchart illustrating a method for manufacturing a display device according to some embodiments of the present disclosure.

[0128] Reference Figures 1 to 6 The substrate SUB and the circuit element layer PCL can be formed in process S100.

[0129] A first pixel defining layer PDL1, a second pixel defining layer PDL2, and a lower electrode layer BE can be formed on the circuit element layer PCL (process S200).

[0130] A photosensitive element PD can be formed on the lower electrode layer BE of the first sub-pixel SPXL1 (process S300).

[0131] An intermediate electrode layer ME can be formed (process S400).

[0132] A first light-emitting element EL1, a second light-emitting element EL2, and a third light-emitting element EL3 can be formed in the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3, respectively (process S500). For example, the first light-emitting element EL1 can be formed in the first sub-pixel SPXL1. The second light-emitting element EL2 can be formed in the second sub-pixel SPXL2. The third light-emitting element EL3 can be formed in the third sub-pixel SPXL3.

[0133] The top electrode layer TE can be formed (process S600).

[0134] An upper auxiliary electrode layer (TAE) can be formed (process S700).

[0135] Figure 7 This illustrates some embodiments according to the present disclosure, such as... Figure 6 A view of the process (process S100) for forming the substrate and circuit element layer.

[0136] Reference Figures 1 to 7 This can form a substrate SUB and a circuit element layer PCL (process S100).

[0137] A substrate SUB can include a semiconductor substrate. For example, a substrate SUB can include a bulk silicon wafer or an epitaxial wafer. An epitaxial wafer can include a layer of crystalline material (i.e., an epitaxial layer) grown on a bulk substrate by an epitaxial process. A substrate SUB can be formed using various wafers, such as polished wafers, annealed wafers, and silicon-on-insulator (SOI) wafers, and is not limited to bulk silicon wafers or epitaxial wafers.

[0138] The circuit element layer (PCL) can be disposed on the substrate (SUB). The PCL may include first light-emitting elements EL1 to third light-emitting elements EL3, circuit elements for driving the photosensitive element PD, and at least one insulating layer between the circuit elements. The circuit elements may include multiple transistors and signal lines connected to the multiple transistors. For example, each transistor may be a MOSFET, but is not limited thereto. Furthermore, each circuit element may include a gate electrode, a source region, a drain region, and a channel region.

[0139] The substrate (SUB) and circuit element layer (PCL) can be formed using semiconductor processes and equipment, but are not limited to this.

[0140] The substrate SUB and the circuit element layer PCL can be formed in the first sub-pixel SPXL1 to the third sub-pixel SPXL3 and the non-light-emitting region NEA.

[0141] Figure 8 References show some embodiments according to this disclosure. Figure 6 A view of the process (process S200) for forming the first pixel defining layer, the second pixel defining layer, and the lower electrode layer.

[0142] Reference Figures 1 to 8 A pixel definition layer (PDL) and a lower electrode layer (BE) can be formed on the circuit element layer (PCL).

[0143] The pixel defining layer (PDL) can be composed of an organic insulating layer including organic materials. Organic materials may include acrylic resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, etc. According to some embodiments, each pixel defining layer (PDL) may include a light-absorbing material or may be coated with a light-absorbing agent to absorb light introduced from the outside. For example, each pixel defining layer (PDL) may include a carbon-based black pigment, but is not limited thereto.

[0144] The pixel-defining layer (PDL) can protrude from the surface (or top surface) of the circuit element layer (PCL) on the third-party DR3.

[0145] like Figure 8 As shown, the regions occupied by the first sub-pixel SPXL1 to the third sub-pixel SPXL3 can be defined by the first pixel definition layer PDL1 and the second pixel definition layer PDL2. Furthermore, the region occupied by the non-emitting region NEA can also be defined by the first pixel definition layer PDL1 and the second pixel definition layer PDL2.

[0146] The lower electrode layer BE can be formed on the surface of the circuit element layer PCL that is not covered by the pixel defining layer PDL. The lower electrode layer BE can be an electrode layer to which a second power supply voltage ELVSS is supplied by the power supply 150.

[0147] Figure 9 References show some embodiments according to this disclosure. Figure 6 A view of the process for forming a photosensitive element (process S300).

[0148] Reference Figures 1 to 9A photosensitive element PD can be disposed on the lower electrode layer BE in the first light-emitting region EA1. The photosensitive element PD may include an anode electrode, a cathode electrode, and a photoelectric conversion layer interposed between the anode electrode and the cathode electrode. The photosensitive element PD can be a photoelectric conversion element that converts external incident light into an electrical signal. The photosensitive element PD can be, for example, a pn-type or pin-type photodiode, or a phototransistor. The photodiode can be an organic photodiode using organic materials, but is not limited thereto, and can also be an inorganic photodiode formed of inorganic materials.

[0149] In some embodiments of this disclosure, the photosensitive element PD may be disposed only in one of the first sub-pixels SPXL1 to the third sub-pixels SPXL3. Although Figure 9 The photosensitive element PD is shown to be disposed only in the first sub-pixel SPXL1, but the embodiments of this disclosure are not limited thereto.

[0150] Figure 10 References show some embodiments according to this disclosure. Figure 6 A view describing the process for forming the intermediate layer (process S400).

[0151] Reference Figures 1 to 10 The intermediate electrode layer ME can be placed on the photosensitive element PD, the lower electrode layer BE, and the pixel definition layer PDL. For example, Figure 4 As shown, the intermediate electrode layer ME can be disposed on a portion of the first pixel limiting layer PDL1, the second pixel limiting layer PDL2, the photosensitive element PD, and the lower electrode layer BE.

[0152] The intermediate electrode layer ME may include a first intermediate electrode layer ME1, a second intermediate electrode layer ME2, and a third intermediate electrode layer ME3.

[0153] The first intermediate electrode layer ME1 can be disposed in the first light-emitting region EA1 (or the first sub-pixel SPXL1) and the non-light-emitting region NEA. Furthermore, the second intermediate electrode layer ME2 can be disposed in the second light-emitting region EA2 (or the second sub-pixel SPXL2) and the non-light-emitting region NEA. The third intermediate electrode layer ME3 can be disposed in the third light-emitting region EA3 (or the third sub-pixel SPXL3) and the non-light-emitting region NEA.

[0154] The intermediate electrode layers ME, which are set on different sub-pixels, can be physically separated from each other by the first pixel limiting layer PDL1.

[0155] The first intermediate electrode layer ME1 can be physically separated from the second intermediate electrode layer ME2 through the first pixel limiting layer PDL1. For example... Figure 10As shown, due to the shape of the first pixel defining layer PDL1, the first intermediate electrode layer ME1 and / or the second intermediate electrode layer ME2 may not be disposed on a portion of the first pixel defining layer PDL1. Therefore, the first intermediate electrode layer ME1 can be physically separated from the second intermediate electrode layer ME2 through the first pixel defining layer PDL1.

[0156] Similarly, the second intermediate electrode layer ME2 can be physically separated from the third intermediate electrode layer ME3 through the first pixel defining layer PDL1. For example... Figure 10 As shown, due to the shape of the first pixel defining layer PDL1, the second intermediate electrode layer ME2 and / or the third intermediate electrode layer ME3 may not be disposed on a portion of the first pixel defining layer PDL1. Consequently, the second intermediate electrode layer ME2 can be physically separated from the third intermediate electrode layer ME3 through the first pixel defining layer PDL1.

[0157] A first voltage V1 can be supplied to the intermediate electrode layer ME by the power supply 150.

[0158] Figure 11 Reference is provided to illustrate some embodiments according to this disclosure. Figure 6 A view of the process (process S500) for forming the first to third light-emitting elements.

[0159] Reference Figures 1 to 11 The light-emitting element can be disposed on the intermediate electrode layer ME. For example, a first hole transport layer HTL1, a first light-emitting layer EML1, and a first electron transport layer ETL1 can be sequentially deposited on the first intermediate electrode layer ME1 in the first light-emitting region EA1. For example, a second hole transport layer HTL2, a second light-emitting layer EML2, and a second electron transport layer ETL2 can be sequentially deposited on the second intermediate electrode layer ME2 in the second light-emitting region EA2. A third hole transport layer HTL3, a third light-emitting layer EML3, and a third electron transport layer ETL3 can be sequentially deposited on the third intermediate electrode layer ME3 in the third light-emitting region EA3.

[0160] The first hole transport layer HTL1 can provide holes to the first light-emitting layer EML1, and the first electron transport layer ETL1 can provide electrons to the first light-emitting layer EML1. Light can be emitted from the first light-emitting layer EML1 through recombination of electrons and holes.

[0161] The second hole transport layer HTL2 can provide holes to the second light-emitting layer EML2, and the second electron transport layer ETL2 can provide electrons to the second light-emitting layer EML2. Light can be emitted from the second light-emitting layer EML2 through recombination of electrons and holes.

[0162] The third hole transport layer (HTL3) can provide holes to the third light-emitting layer (EML3), and the third electron transport layer (ETL3) can provide electrons to the third light-emitting layer (EML3). Light can be emitted from the third light-emitting layer (EML3) through recombination of electrons and holes.

[0163] Figure 12 References show some embodiments according to this disclosure. Figure 6 A view of the process for forming the upper electrode layer (process S600).

[0164] Reference Figures 1 to 12 The upper electrode layer TE can be disposed on the first electron transport layer ETL1 to the third electron transport layer ETL3 and the pixel definition layer PDL. For example, Figure 4 As shown, the upper electrode layer TE can be disposed on a portion of the first pixel limiting layer PDL1, the second pixel limiting layer PDL2, and the first electron transport layer ETL1 to the third electron transport layer ETL3.

[0165] The first upper electrode layer TE1 can be set in the first light-emitting area EA1 (or the first sub-pixel SPXL1) and the non-light-emitting area NEA.

[0166] In addition, the second upper electrode layer TE2 can be disposed in the second light-emitting region EA2 (or the second sub-pixel SPXL2) and the non-light-emitting region NEA.

[0167] In addition, the third upper electrode layer TE3 can be set in the third light-emitting region EA3 (or the third sub-pixel SPXL3) and the non-light-emitting region NEA.

[0168] The upper electrode layers TE, which are set on different sub-pixels, can be physically separated from each other by the first pixel limiting layer PDL1.

[0169] The first upper electrode layer TE1 can be physically separated from the second upper electrode layer TE2 through the first pixel limiting layer PDL1. For example... Figure 12 As shown, due to the shape of the first pixel defining layer PDL1, the first upper electrode layer TE1 and / or the second upper electrode layer TE2 may not be disposed on a portion of the first pixel defining layer PDL1. As a result, the first upper electrode layer TE1 can be physically separated from the second upper electrode layer TE2 through the first pixel defining layer PDL1.

[0170] Similarly, the second upper electrode layer TE2 can be physically separated from the third upper electrode layer TE3 through the first pixel limiting layer PDL1. For example... Figure 12As shown, due to the shape of the first pixel defining layer PDL1, the second upper electrode layer TE2 and / or the third upper electrode layer TE3 may not be disposed on a portion of the first pixel defining layer PDL1. Therefore, the second upper electrode layer TE2 can be physically separated from the third upper electrode layer TE3 through the first pixel defining layer PDL1.

[0171] The first power supply voltage ELVDD can be provided to the upper electrode layer TE by the power supply 150.

[0172] Figure 13 References show some embodiments according to this disclosure. Figure 6 A view describing the process for forming the upper auxiliary electrode layer (process S700).

[0173] Reference Figures 1 to 13 The upper auxiliary electrode layer (TAE) can be disposed on the upper electrode layer (TE). The upper auxiliary electrode layer (TAE) can be disposed within the entire area of ​​the first sub-pixel SPXL1 to the third sub-pixel SPXL3 and within the non-light-emitting area (NEA). In other words, the upper auxiliary electrode layers (TAE) disposed on different sub-pixels can be physically separated from each other without being bounded by the first pixel limiting layer (PDL1).

[0174] The display device according to the embodiments can be applied to various types of electronic devices. In the embodiments, the electronic device includes the display device described above, and may also include other modules or devices with additional functions in addition to the display device.

[0175] Figure 14 This is a block diagram of an electronic device according to an embodiment. (See reference...) Figure 14 The electronic device 10 may include a display module 11, a processor 12, a memory 13, and a power module 14.

[0176] The processor 12 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0177] The memory 13 can store data and / or information used to operate the processor 12 or the display module 11. When the processor 12 executes the application program stored in the memory 13, image data signals and / or input control signals can be transmitted to the display module 11. The display module 11 can process the provided signals and output image information on the display screen.

[0178] The power module 14 may include a power supply module (such as a power adapter or battery device) and a power conversion module. The power conversion module converts the power supplied by the power supply module and generates power to operate the electronic device 10.

[0179] At least one of the components described above in the electronic device 10 may be included in the display device according to the embodiment described above. Furthermore, in terms of function, some individual modules included in one module may be included in the display device, while other modules may be separately disposed from the display device. For example, the display module 11 is included in the display device, while the processor 12, memory 13, and power module 14 are not included in the display device but are separately disposed in the electronic device 10.

[0180] Figure 15 Schematic diagrams illustrating various embodiments of the electronic device are shown.

[0181] Reference Figure 15 The implementation of the display device can be applied to various types of electronic devices, including electronic devices that display images, such as smartphones 10_1a, tablet PCs 10_1b, laptop computers 10_1c, televisions (TVs) 10_1d, desktop monitors 10_1e, wearable electronic devices including display modules (such as smart glasses 10_2a, head-mounted displays (HMDs) 10_2b, and smartwatches 10_2c), and automotive electronic devices including display modules 10_3 (such as central information displays (CIDs) and interior mirror displays located on dashboards, central instrument panels, and vehicle dashboards).

[0182] It should be understood that the embodiments described herein are to be interpreted in a descriptive sense and are not intended to be limiting. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made to the embodiments without departing from the spirit and scope defined by the appended claims and their equivalents.

Claims

1. A display device, characterized by comprising: include: A substrate, including a region in which a first sub-pixel and a second sub-pixel are formed; The lower electrode layer is located on the substrate. A photosensitive element is located on the lower electrode layer of the first sub-pixel; A first intermediate electrode layer is disposed on the photosensitive element; The first light-emitting element is located on the first intermediate electrode layer; as well as The first upper electrode layer is located on the first light-emitting element. The first light-emitting element and the light-sensing element are driven separately according to the voltage applied to the first intermediate electrode layer.

2. The display device according to claim 1, wherein The photosensitive element is not driven during the period when the first light-emitting element emits light.

3. The display device according to claim 1, wherein Also includes: The second intermediate electrode layer is located on the lower electrode layer of the second sub-pixel; The second light-emitting element is located on the second intermediate electrode layer; as well as The second upper electrode layer is located on the second light-emitting element. The second light-emitting element emits different light than the first light-emitting element.

4. The display device according to claim 3, wherein Also includes: A first pixel defining layer and a second pixel defining layer are disposed on the substrate and protrude in a direction perpendicular to the substrate. Wherein, the first intermediate electrode layer is physically separated from the second intermediate electrode layer through the first pixel defining layer, and The first upper electrode layer is physically separated from the second upper electrode layer through the first pixel limiting layer.

5. The display device according to claim 4, wherein The first pixel defining layer and the second pixel defining layer have different shapes.

6. The display device according to claim 4, wherein Each of the second pixel-defined layers has a trapezoidal cross-section.

7. The display device according to claim 4, wherein Each of the first pixel defining layers has an eleventh pixel defining layer and a twelfth pixel defining layer connected to each other in a direction perpendicular to the substrate. The eleventh pixel defining layer has a trapezoidal cross-section, and The twelfth pixel defining layer has an inverted trapezoidal cross-section.

8. The display device according to claim 4, wherein Also includes: Upper auxiliary electrode layer, on the first upper electrode layer and the second upper electrode layer, The upper auxiliary electrode layer on the first upper electrode layer is physically connected to the upper auxiliary electrode layer on the second upper electrode layer.

9. The display device according to claim 4, wherein The lower electrode layer is subjected to a second power supply voltage. In this process, each of the first upper electrode layer and the second upper electrode layer is subjected to a first power supply voltage, and Wherein, the level of the first power supply voltage is higher than the level of the second power supply voltage.

10. An electronic device, comprising: Includes the display device according to claim 1.