A highly integrated reconfigurable on-chip inductor, RF amplifier, and RF circuit

Abstract

This application provides a highly integrated reconfigurable on-chip inductor, RF amplifier, and RF circuit. The on-chip inductor includes an on-chip module and an off-chip bonding module. The on-chip module includes multiple parallel on-chip connection units, and the off-chip bonding module includes bonding wires. One or more bonding wires can be selected to electrically connect multiple on-chip connection units to form the desired on-chip inductor. The reconfigurable on-chip inductor provided by this application allows for inductor reconfiguration of the on-chip module through the electrical connection between the bonding wires and the on-chip connection units, ensuring that the quality factor of the reconfigured inductor meets the requirements of the desired inductance. The on-chip inductor has high overall integration, and inductance value adjustment is simpler and more flexible, effectively shortening the RF circuit development cycle, improving RF circuit performance, and reducing chip application costs.

Description

Technical Field

[0001] This application relates to the field of radio frequency circuit design, specifically to a highly integrated reconfigurable on-chip inductor, radio frequency amplifier, and radio frequency circuit. Background Technology

[0002] With the continuous advancement of integrated circuit design and manufacturing technologies, transistor sizes are shrinking proportionally, leading to a continuous reduction in chip area. However, the area of ​​on-chip passive components, especially on-chip inductors, has remained almost unchanged. On-chip inductors are almost essential components in RF amplifier circuits, particularly in impedance matching, where they directly determine circuit performance. As components used in input / output matching networks and power supply applications, the increasing demands on system specifications place higher requirements on high-quality on-chip inductors with high inductance factors. Currently, existing on-chip inductors have fixed inductance parameters. When inductance requirements change, discrete inductors must be added externally to the chip, or the chip must be redesigned and re-die-produced to meet the inductor requirements, thus increasing the number of die-produced cycles and R&D costs.

[0003] Therefore, how to provide a highly integrated, low-cost, and reusable on-chip inductor is a technical problem that urgently needs to be solved. Utility Model Content

[0004] In view of the shortcomings of the prior art described above, this application provides a technical solution for a reconfigurable on-chip inductor to solve at least one of the above technical problems.

[0005] To achieve the above and other related objectives, the technical solution provided in this application is as follows.

[0006] According to a first aspect of the embodiments of this application, a highly integrated reconfigurable on-chip inductor is provided, comprising:

[0007] An on-chip module, comprising multiple on-chip interconnect units arranged in parallel;

[0008] An off-chip bonding module includes bonding wires, one or more of which can be selected to electrically connect multiple on-chip connection units to form the required on-chip inductor.

[0009] In one embodiment of this application, the on-chip interconnect unit includes the two chip leads and multiple metal lines. The first end of each metal line is connected to the first chip lead, and the second end of each metal line is connected to the second chip lead. The multiple metal lines are connected in parallel, and the spacing and size of the multiple metal lines are the same.

[0010] In one embodiment of this application, the off-chip bonding module includes one or N bonding wires. If the off-chip bonding module includes one bonding wire, the first end of the bonding wire is connected to the second chip lead-out terminal in the first on-chip interconnection unit, and the second end of the bonding wire is connected to the first chip lead-out terminal in the Mth on-chip interconnection unit. If the off-chip bonding module includes multiple bonding wires, the first end of the first bonding wire is connected to the second chip lead-out terminal in the first on-chip interconnection unit. The second end of the i-th bonding wire is connected to the first chip lead in the j-th on-chip interconnect unit, the first end of the (i+1)-th bonding wire is connected to the second chip lead in the j-th on-chip interconnect unit, and the second end of the N-th bonding wire is connected to the first chip lead in the M-th on-chip interconnect unit. Here, M is the number of on-chip interconnect units, N is the number of bonding wires, M, N, i, and j are positive integers, M and N ≥ 2, 1 ≤ i ≤ N-1, and 2 ≤ j ≤ M-1.

[0011] According to a second aspect of the embodiments of this application, a radio frequency amplifier is also provided, the radio frequency amplifier including a highly integrated reconfigurable on-chip inductor as described above.

[0012] According to a third aspect of the embodiments of this application, a radio frequency circuit is also provided, the radio frequency circuit including a highly integrated reconfigurable on-chip inductor as described above.

[0013] This application provides a highly integrated reconfigurable on-chip inductor, RF amplifier, and RF circuit. The on-chip inductor includes an on-chip module and an off-chip bonding module. The on-chip module includes multiple parallel on-chip connection units, and the off-chip bonding module includes bonding wires. One or more bonding wires can be selected to electrically connect multiple on-chip connection units to form the desired on-chip inductor. The reconfigurable on-chip inductor provided by this application allows for inductor reconfiguration of the on-chip module through the electrical connection between the bonding wires and the on-chip connection units, ensuring that the quality factor of the reconfigured inductor meets the requirements of the desired inductance. The on-chip inductor has high overall integration, and inductance value adjustment is simpler and more flexible, effectively shortening the RF circuit development cycle, improving RF circuit performance, and reducing chip application costs.

[0014] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the present invention. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments conforming to the present invention and, together with the description, serve to explain the principles of the present invention. Obviously, the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings:

[0016] Figure 1 This is a schematic diagram of a highly integrated reconfigurable on-chip inductor shown in an exemplary embodiment of the present invention;

[0017] Figure 2 This is a schematic diagram illustrating a reconstructed on-chip inductor including three on-chip interconnect units and a single bonding wire, as shown in an exemplary embodiment of the present invention.

[0018] Figure 3 This is a schematic diagram illustrating a reconstructed on-chip inductor including five on-chip interconnect units and four bonding wires, as shown in an exemplary embodiment of the present invention.

[0019] Figure 4 This is a schematic diagram illustrating a reconstructed on-chip inductor including five on-chip interconnect units and two bonding wires, as shown in an exemplary embodiment of the present invention.

[0020] Figure 5 This is a schematic diagram illustrating the bonding wire arch height in a highly integrated reconfigurable chip, as shown in an exemplary embodiment of this utility model;

[0021] Figure 6 This is an exemplary embodiment of the present invention. Figure 3 A schematic diagram of the corresponding 3.5nH quality factor of the reconfigurable on-chip inductor;

[0022] Figure 7 This is an exemplary embodiment of the present invention. Figure 3 A schematic diagram of the corresponding 3.5nH reconfigurable on-chip inductor;

[0023] Figure 8 This is an exemplary embodiment of the present invention. Figure 4 A schematic diagram of the corresponding 1.27nH quality factor of the reconfigurable on-chip inductor;

[0024] Figure 9 This is an exemplary embodiment of the present invention. Figure 4 A schematic diagram of the corresponding reconfigurable on-chip inductor with an inductance value of 1.27nH;

[0025] Figure 10 This is an exemplary embodiment of the present invention. Figure 5 A schematic diagram of the corresponding quality factor of the reconfigurable on-chip inductor 743pH;

[0026] Figure 11 This is an exemplary embodiment of the present invention. Figure 5 A schematic diagram of the corresponding reconfigurable on-chip inductor 743pH. Detailed Implementation

[0027] The embodiments of this utility model will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model. It should be understood that the preferred embodiments are only for illustrating this utility model and not for limiting the scope of protection of this utility model.

[0028] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0029] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the present invention. However, it will be apparent to those skilled in the art that embodiments of the present invention may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the present invention.

[0030] With the continuous advancement of integrated circuit design and manufacturing technologies, transistor sizes are shrinking proportionally, leading to a continuous reduction in chip area. However, the area of ​​on-chip passive components, especially on-chip inductors, has remained almost unchanged. On-chip inductors are almost essential components in RF amplifier circuits, particularly in impedance matching, where they directly determine circuit performance. As components used in input / output matching networks and power supply applications, the increasing demands on system specifications are placing higher requirements on high-quality on-chip inductors with high inductance factors. However, currently available on-chip inductors have fixed inductance parameters. When inductance requirements change, alternative inductors must be used to meet the needs, increasing the number of tape-out cycles and R&D costs.

[0031] To solve the above problems, such as Figure 1 As shown, this application provides a highly integrated reconfigurable on-chip inductor, comprising:

[0032] An on-chip module, comprising multiple on-chip interconnect units 1110 arranged in parallel;

[0033] The off-chip bonding module includes bonding wires 1210, which can be selected to electrically connect one or more on-chip connection units 1110 to form the required on-chip inductor.

[0034] Specifically, such as Figure 1 As shown, multiple on-chip interconnect units 1110 are arranged in parallel to form an on-chip module. The off-chip bonding module includes bonding wires 1210. By selecting one or more bonding wires 1210, multiple on-chip interconnect units 1110 are electrically connected. That is, the two ends of a single bonding wire 1210 are electrically connected to two different on-chip interconnect units 1110 respectively, and two adjacent bonding wires 1210 are electrically connected to two chip leads (Port1, Port2) in the same on-chip interconnect unit respectively. By electrically connecting multiple on-chip interconnect units 1110 through different bonding wires 1210, the required on-chip inductor is obtained, and the on-chip inductor is reconstructed.

[0035] In detail, the on-chip interconnect unit includes two chip leads and multiple metal lines. The first end of each metal line connects to the first chip lead, and the second end of each metal line connects to the second chip lead. The multiple metal lines are connected in parallel, and the spacing and dimensions of the metal lines are the same. Specifically, as shown... Figure 2 As shown, each on-chip interconnect unit 1110 includes two chip leads (Port1, Port2) and multiple metal lines. The first end of each metal line is connected to the first chip lead Port1, and the second end of each metal line is connected to the second chip lead Port2. The metal lines are connected in parallel to each other, and the line width and spacing of the metal lines are the same. Specifically, the first chip lead Port1 of the first on-chip interconnect unit is the first tap of the on-chip inductor, and the second chip lead Port2 of the last on-chip interconnect unit is the second tap of the on-chip inductor.

[0036] It should be noted that, without considering the skin effect, the current in each metal line is uniformly distributed. When the frequency is high, the skin effect becomes more obvious. Because multiple metal lines are used for connection, the current will only flow to the edges of each metal line and will not concentrate at the edge of a single metal line, thereby reducing the metal interconnect resistance and improving the quality factor of the on-chip inductor.

[0037] More specifically, the off-chip bonding module includes one or N bonding wires 1210. If the off-chip bonding module includes a single bonding wire 1210, the first end of the bonding wire 1210 is connected to the second chip lead-out Port2 in the first on-chip interconnection unit 1110, and the second end of the bonding wire 1210 is connected to the first chip lead-out Port1 in the Mth on-chip interconnection unit 1110. If the off-chip bonding module includes multiple bonding wires 1210, the first end of the first bonding wire 1211 is connected to the second chip lead-out Port2 in the first on-chip interconnection unit 1111, and the second end of the bonding wire 1210 is connected to the first chip lead-out Port2 in the Mth on-chip interconnection unit 1110. The second end of the bonding wire 1210 is connected to the first chip lead-out Port1 in the j-th on-chip interconnect unit 1110. The first end of the (i+1)-th bonding wire 1210 is connected to the second chip lead-out Port2 in the j-th on-chip interconnect unit 1110. The second end of the N-th bonding wire 121N is connected to the first chip lead-out Port1 in the M-th on-chip interconnect unit 1110. Here, M is the number of on-chip interconnect units 1110, N is the number of bonding wires 1210, M, N, i, and j are positive integers, M and N ≥ 2, 1 ≤ i ≤ N-1, and 2 ≤ j ≤ M-1.

[0038] Combination Figure 2 and Figure 5 As shown, the off-chip bonding module 1100 can be a single bonding wire 1210 or include multiple bonding wires 1210. For example... Figure 2 As shown, when the off-chip bonding module is a single bonding wire 1210, the first end of the bonding wire 1210 is connected to the second chip lead-out Port2 in the first on-chip connection unit 1110, and the second end of the bonding wire 1210 is connected to the first chip lead-out Port1 in the last on-chip connection unit 1110. The number of on-chip modules is not limited here.

[0039] like Figure 3As shown, when the on-chip module includes five on-chip interconnect units (1111~1115), a bonding wire 1210 is selected to connect the five on-chip interconnect units 1110. Specifically, the first end of the first bonding wire 1211 is connected to the second chip lead-out port 2 in the first on-chip interconnect unit 1111, and the second end of the first bonding wire 1211 is connected to the first chip lead-out port 1 in the second on-chip interconnect unit 1112; the first end of the second bonding wire 1212 is connected to the second chip lead-out port 2 in the second on-chip interconnect unit 1112, and the second bonding wire 121... The second end of the third bonding wire 1213 is connected to the first chip lead-out Port1 in the third on-chip interconnect unit 1113; the first end of the third bonding wire 1213 is connected to the second chip lead-out Port2 in the third on-chip interconnect unit 1113; the second end of the third bonding wire 1213 is connected to the first chip lead-out Port1 in the fourth on-chip interconnect unit 1114; the first end of the fourth bonding wire 1214 is connected to the second chip lead-out Port2 in the fourth on-chip interconnect unit 1114; and the second end of the fourth bonding wire 1214 is connected to the first chip lead-out Port1 in the fifth on-chip interconnect unit 1115.

[0040] When the required on-chip inductance value is less than the current on-chip inductance value, such as Figure 4 As shown, the number of bonding wires in the off-chip bonding module can be reduced. The connection method from 4 bonding wires to 2 bonding wires is as follows: the first end of the first bonding wire 1211 is connected to the second chip lead-out Port2 in the first on-chip connection unit 1111, and the second end of the first bonding wire 1211 is connected to the first chip lead-out Port1 in the third on-chip connection unit 1113; the first end of the second bonding wire 1212 is connected to the second chip lead-out Port2 in the third on-chip connection unit 1113, and the second end of the second bonding wire 1212 is connected to the first chip lead-out Port1 in the fifth on-chip connection unit 1115.

[0041] In detail, such as Figure 5 As shown, the bonding wire 1210 is arched, and there is a certain height difference between the bonding wire 1210 and the on-chip module. By changing the type of bonding wire 1210, the height of the bonding wire can be increased or decreased, thereby adjusting the inductance value of the on-chip inductor.

[0042] like Figures 1 to 11 As shown, the working principle of the highly integrated reconfigurable on-chip inductor provided in this application is as follows:

[0043] By electrically connecting multiple or single bonding wires 1210 with the same arch height to the same on-chip module and measuring the upper and lower inductance thresholds of the corresponding on-chip inductors, and replacing the bonding wires 1210 with different arch heights, the above electrical connection steps and inductance value measurements are repeated to obtain the range parameters of reconfigurable on-chip inductors composed of various different bonding wires. The on-chip inductors corresponding to the upper inductance thresholds of different arch heights are reduced by one bonding wire 1210, and the inductance value of the adjusted on-chip inductor is detected. The upper inductance threshold is subtracted from the inductance value of the reduced bonding wire to obtain the inductance value of a single bonding wire with the corresponding arch height. Based on the same principle, the inductance values ​​of single bonding wires with multiple different arch heights are obtained.

[0044] like Figure 1 As shown, the on-chip module includes multiple on-chip connection units 1110. According to the target inductance parameters of the on-chip inductor required in the RF circuit, the corresponding inductance value of the bonding wire is selected. The on-chip connection units are connected through multiple bonding wires to obtain the required on-chip inductor.

[0045] If the target parameters of the required on-chip inductor change, the bonding wires 1210 on the off-chip bonding module are adjusted to obtain the desired on-chip inductor. For example, as Figure 3 As shown, if the current on-chip inductor is: the on-chip module includes 5 on-chip connection units 1110, and the 5 on-chip connection units 1100 are electrically connected through 4 bonding wires 1210 of the off-chip bonding module to obtain the current on-chip inductor, and the 3.5nH quality factor of the current on-chip inductor is as follows: Figure 6 As shown, the current on-chip inductor's 3.5nH inductance value is as follows: Figure 7 As shown; if the target inductance parameter of the required on-chip inductor is smaller than the inductance parameter of the current on-chip inductor, such as Figure 3 As shown, the number of bonding wires 1210 in the off-chip bonding module is reduced to lower the inductance parameter of the current on-chip inductor. The adjusted required on-chip inductance quality factor of 1.27nH is as follows. Figure 8 As shown, the adjusted required on-chip inductance value of 1.27nH is as follows: Figure 9 As shown; if the target inductance parameter of the required on-chip inductor is greater than the current inductance parameter, such as Figure 5 As shown, replace the bonding wire 1210 corresponding to the off-chip bonding module, increase the arch height between the bonding wire 1210 and the on-chip connection unit 1110, and improve the inductance parameters. The adjusted on-chip inductance quality factor of 743pH is as follows. Figure 10 As shown, the adjusted required on-chip inductor value for 743pH is as follows: Figure 11 As shown.

[0046] It should be emphasized that if the current on-chip inductor is as follows: Figure 2The on-chip inductor shown is as follows: the on-chip module includes three on-chip connection units 1110, and two on-chip connection units 1100 are electrically connected through a bonding wire 1210 of the off-chip bonding module; if the target inductance parameter of the required on-chip inductor is smaller than the current on-chip inductor, the bonding wire 1210 in the off-chip bonding module is replaced with one with a lower arch height to reduce the inductance parameter.

[0047] Secondly, this application also provides a radio frequency amplifier, which includes a highly integrated reconfigurable on-chip inductor as described above, in order to adjust the amplification factor of the radio frequency amplifier.

[0048] Thirdly, this application also provides a radio frequency (RF) circuit, in which a highly integrated reconfigurable on-chip inductor as described above is provided to facilitate adjustment of the inductor parameters in the RF circuit.

[0049] This application provides a highly integrated reconfigurable on-chip inductor, RF amplifier, and RF circuit. The on-chip inductor includes an on-chip module and an off-chip bonding module. The on-chip module includes multiple parallel on-chip connection units, and the off-chip bonding module includes bonding wires. One or more bonding wires can be selected to electrically connect multiple on-chip connection units to form the desired on-chip inductor. The reconfigurable on-chip inductor provided by this application allows for inductor reconfiguration of the on-chip module through the electrical connection between the bonding wires and the on-chip connection units, ensuring that the quality factor of the reconfigured inductor meets the requirements of the desired inductance. The on-chip inductor has high overall integration, and inductance value adjustment is simpler and more flexible, effectively shortening the RF circuit development cycle, improving RF circuit performance, and reducing chip application costs.

[0050] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A high-integration reconfigurable on-chip inductor, characterized in that, include: An on-chip module, comprising multiple on-chip interconnect units arranged in parallel; An off-chip bonding module includes bonding wires, one or more of which can be selected to electrically connect multiple on-chip connection units to form the required on-chip inductor; The on-chip interconnect unit includes two chip leads and multiple metal lines. The first end of each metal line is connected to the first chip lead, and the second end of each metal line is connected to the second chip lead. The multiple metal lines are connected in parallel, and the spacing and size of the multiple metal lines are the same. The off-chip bonding module includes one or N bonding wires. If the off-chip bonding module includes one bonding wire, the first end of the bonding wire is connected to the second chip lead-out terminal in the first on-chip interconnection unit, and the second end of the bonding wire is connected to the first chip lead-out terminal in the Mth on-chip interconnection unit. If the off-chip bonding module includes multiple bonding wires, the first end of the first bonding wire is connected to the second chip lead-out terminal in the first on-chip interconnection unit, the second end of the i-th bonding wire is connected to the first chip lead-out terminal in the j-th on-chip interconnection unit, the first end of the (i+1)-th bonding wire is connected to the second chip lead-out terminal in the j-th on-chip interconnection unit, and the second end of the N-th bonding wire is connected to the first chip lead-out terminal in the Mth on-chip interconnection unit. Here, M is the number of on-chip interconnection units, N is the number of bonding wires, M, N, i, and j are positive integers, M and N ≥ 2, 1 ≤ i ≤ N-1, and 2 ≤ j ≤ M-1.

2. A radio frequency amplifier characterized by, The radio frequency amplifier includes a highly integrated reconfigurable on-chip inductor as described in claim 1.

3. A radio frequency circuit, characterized by The radio frequency circuit includes the highly integrated reconfigurable on-chip inductor as described in claim 1.

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