A novel semiconductor package

By designing and packaging MOS circuits with a back-to-back connection structure, the problem of large space occupation of MOS transistors is solved, achieving a compact packaging structure and uniform current distribution, thus improving the performance.

CN224583757UActive Publication Date: 2026-07-31DALIAN SI POWER TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
DALIAN SI POWER TECH INC
Filing Date
2025-09-12
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

The existing system has multiple independently packaged MOSFETs that occupy a large space, resulting in a scattered layout and uneven current distribution, which affects the performance.

Method used

The MOS circuit design adopts a back-to-back connection structure and uses a combination of fixed housing, substrate and cover plate to achieve compact packaging and reduce space occupation through mounting structure.

Benefits of technology

It improves space utilization, reduces space occupation, and ensures normal circuit operation and uniform current distribution.

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Abstract

This invention discloses a novel semiconductor package, including a substrate, a back-to-back MOS circuit disposed on the substrate, a mounting housing, and a cover plate. The side of the mounting housing closest to the substrate is matched and connected to the substrate, and its shape matches that of the back-to-back MOS circuit to initially encapsulate the back-to-back MOS circuit. The side of the mounting housing furthest from the substrate engages with the cover plate to completely encapsulate the back-to-back MOS circuit, and the cover plate is provided with a mounting base structure for mounting terminals. This invention designs a compact package structure based on the back-to-back MOS circuit, improving space utilization and reducing the space occupied.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and in particular to a novel semiconductor package. Background Technology

[0002] Current system applications typically employ multiple independently packaged MOSFETs, interconnected via electrical connections (copper busbars / cables) to achieve their functions. This structure not only occupies a large space but also results in a scattered overall layout, cluttered electrical arrangement, and uneven current distribution, negatively impacting performance. Therefore, a design that integrates two MOSFETs back-to-back is needed. The design of the MOSFET package for this back-to-back connection is a pressing issue that requires further investigation. Utility Model Content

[0003] This invention provides a novel semiconductor package to overcome the technical problem of large space occupation of existing single MOS semiconductor packages.

[0004] To achieve the above objectives, the technical solution of this utility model is as follows: A novel semiconductor package includes a substrate, a back-to-back MOS circuit disposed on the substrate, a mounting housing, and a cover plate. The fixed housing is matched and connected to the substrate on the side closest to the substrate, and its shape matches that of the back-to-back MOS circuit to initially encapsulate the back-to-back MOS circuit. The fixed housing is snapped onto the side away from the substrate by a cover plate to completely encapsulate the back-to-back MOS circuit, and the cover plate is provided with a mounting base structure for mounting terminals.

[0005] Furthermore, the mounting base structure includes a first mounting base, a second mounting base, and a third mounting base that are adjacent to each other, and one end of each of the three terminals is connected to a back-to-back MOS circuit through the first mounting base, the second mounting base, and the third mounting base, respectively.

[0006] Furthermore, the substrate is provided with a snap-fit ​​groove and a plurality of first mounting holes; The fixed housing is provided with a snap-fit ​​block that matches the substrate and several second mounting holes for fixed connection with the substrate on the side near the substrate; The fixed housing and substrate are connected by a snap-fit ​​block to a snap-fit ​​groove, and then fixedly connected by screws, a first mounting hole, and a second mounting hole.

[0007] Furthermore, the fixed housing is also provided with a cover plate mounting seat for installing the cover plate, and the cover plate is assembled with the fixed housing through the cover plate mounting seat; The cover plate has buckles at its two opposite ends; the fixed housing has snaps at its two opposite ends that match the buckles. The fixed housing and cover plate are connected by bayonet and buckle.

[0008] Furthermore, the first mounting base, the second mounting base, and the third mounting base each include adjacent terminal mounting holes and fixing bases; One end of any terminal block is connected to the back-to-back MOS circuit through the terminal block mounting hole, and the other end is fixedly connected to the cover plate through the mounting base.

[0009] Furthermore, the mounting base is provided with a screw mounting slot, and the end of the screw mounting slot near the back-to-back MOS circuit is a sealed structure. The other end of any terminal is fixedly connected to the cover plate by a screw and the screw mounting slot.

[0010] Furthermore, the end face of the fixing base that contacts the terminal block is provided with an arc-shaped surface.

[0011] Beneficial effects: This invention features a fixed housing that connects to the substrate on the side closest to it for initial encapsulation of the back-to-back MOS circuit. The side of the fixed housing furthest from the substrate engages with a cover plate to completely encapsulate the back-to-back MOS circuit. A mounting structure for attaching terminals on the cover plate ensures proper operation of the semiconductors. This invention provides a compact packaging structure for the back-to-back MOS circuit, improving space utilization and reducing space requirements. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of the structure of the novel semiconductor package of this utility model; Figure 2 This is an exploded view of the novel semiconductor package of this utility model; Figure 3 This is a schematic diagram of the novel semiconductor package of this utility model; Figure 4 This is the electrical schematic diagram of the back-to-back MOS circuit in this utility model.

[0014] In the picture: 1. Substrate; 11. Snap-in slot; 12. First mounting hole; 2. Back-to-back MOS circuit structure; 3. Fixed housing; 31. Snap-fit ​​block; 32. Second mounting hole; 33. Cover plate mounting base; 34. Bayonet; 4. Cover plate; 41. First mounting base; 411. Terminal block mounting hole; 412. Fixing base; 413. Screw mounting slot; 42. Second mounting base; 43. Third mounting base; 44. Clip; 5. Terminal block; 6. Pulse terminal; 7. Driver PCB. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0016] This embodiment provides a novel semiconductor package, such as Figures 1 to 3 As shown, it includes a substrate 1, a back-to-back MOS circuit 2 disposed on the substrate, a fixed housing 3, and a cover plate 4; the side of the fixed housing 3 closest to the substrate 1 is matched and connected to the substrate 1, and its shape matches that of the back-to-back MOS circuit 2 to initially encapsulate the back-to-back MOS circuit 2; the side of the fixed housing 3 furthest from the substrate 1 is snapped into the cover plate 4 to completely encapsulate the back-to-back MOS circuit 2, and the cover plate 4 is provided with a mounting base structure for mounting terminals 5. Specifically, such as Figure 4 As shown, upgrading a single MOSFET to a half-bridge structure offers advantages over a single MOSFET in terms of lower cost and easier control. This design also improves current sharing and heat dissipation capabilities, while increasing the switching frequency to reduce switching losses. In this embodiment, a corresponding package structure is designed for the two MOSFETs to reduce the actual space occupied while ensuring performance.

[0017] Specifically, in the new packaging, the fixed housing 3 and the substrate 1 are mated together and fitted around the back-to-back structure MOS circuit 2 for preliminary encapsulation. At the same time, the fixed housing 3 and the substrate 1 are fixedly connected by four screws. Then, the cover plate 4 is installed on the fixed housing 3 to completely encapsulate the back-to-back structure MOS circuit 2. The cover plate 4 is provided with a mounting base structure for subsequent installation of the terminal block 5.

[0018] In a specific embodiment, the mounting seat structure includes the first mounting seat 41, the second mounting seat 42, and the third mounting seat 43 that are adjacent to each other in pairs. One end of each of the three terminal posts 5 is connected to the back-to-back structure MOS circuit 2 through the first mounting seat 41, the second mounting seat 42, and the third mounting seat 43 respectively.

[0019] Specifically, in this embodiment, as Figure 4 shown, "Vd+" is the drain of the left MOS transistor, "Vs-" is the source of the right MOS transistor, "Vds" is the voltage difference between the drain and the source, and "G" is the connection point between the two MOS transistors. Among them, the terminal post connected to "Vd+" is subsequently connected to the positive pole of the power supply, the terminal post connected to "Vs-" is subsequently connected to the negative pole of the power supply, and the subsequent connection of the terminal post connected to "Vds" is determined according to actual needs, such as an oscilloscope, a voltage measuring instrument, a feedback control circuit, etc. Specifically, one end of each first terminal post is connected to the back-to-back structure MOS circuit 2, and the other end is for subsequent connection, such as connecting to the positive pole of the power supply, the negative pole of the power supply, etc.

[0020] Specifically, in this embodiment, three mounting seats are arranged in a "pin" shape structure, making the overall packaging structure more compact.

[0021] In a specific embodiment, as Figure 2 shown, the substrate 1 is provided with a clamping groove 11 and a plurality of first mounting holes 12; one side of the fixed housing 3 close to the substrate 1 is provided with a clamping block 31 matching the substrate 1 and a plurality of second mounting holes 32 for fixedly connecting with the substrate 1; after the fixed housing 3 and the substrate 1 are connected by matching the clamping block 31 with the clamping groove 11, they are fixedly connected through screws, the first mounting holes 12, and the second mounting holes 32.

[0022] In a specific embodiment, the fixed housing 3 is further provided with a cover plate mounting seat 33 for mounting the cover plate 4, and the cover plate 4 is assembled with the fixed housing 3 through the cover plate mounting seat 33; two opposite ends of the cover plate 4 are respectively provided with buckles 44; two opposite ends of the fixed housing 3 are respectively provided with bayonet openings 34 matching the buckles 44; the fixed housing 3 and the cover plate 4 are clamped through the bayonet openings 34 and the buckles 44.

[0023] Specifically, as Figure 1As shown, in this embodiment, the fixed housing 3 is configured as a double-layer functional structure. The part of the fixed housing 3 near the substrate 1 is used to fix and connect with the substrate 1 to initially encapsulate the back-to-back structure MOS circuit 2. The part of the fixed housing 3 away from the substrate 1 is provided with a cover plate mounting seat 33 for mounting the cover plate 4. The cover plate 4 is matched and connected to the fixed housing 3 through the cover plate mounting seat 33, and is fixed by snap-fitting through the bayonet 34 and the buckle 44, so that the encapsulated back-to-back structure MOS circuit 2 is completely encapsulated between the substrate 1 and the cover plate 4.

[0024] Specifically, since the fixed housing 3 already accommodates the back-to-back MOS circuit 2, in order to install the cover plate 4 while maintaining the distance between the cover plate 4 and the back-to-back MOS circuit 2, this embodiment provides a cover plate mounting seat 33. The cover plate mounting seat 33 is formed by the outer wall of the fixed housing 3 and strip plates provided on both inner walls of the fixed housing 3, so that the cover plate 4 can be matched and placed in the cover plate mounting seat 33, thereby making the overall packaging structure more compact.

[0025] Specifically, the latch 34 is a rectangular opening provided on the side wall of the fixed housing 3, and the buckle 44 is a recessed structure with a groove inside that matches the rectangular opening. By engaging with the rectangular opening, the cover plate 4 and the fixed housing 3 are fixedly connected.

[0026] Specifically, in this embodiment, the cover plate 4 is further provided with two pairs of symmetrical through holes that allow the pulse terminal 6 on the back-to-back structure MOS circuit 2 to pass through, and the two pairs of through holes are arranged on both sides of the mounting base structure, and the pulse terminal 6 is connected to the drive PCB 7.

[0027] Specifically, in this embodiment, the back-to-back MOS circuit 2 is a plate-shaped structure with the four corners removed, and the fixing housing 3 is set as a structure with the four corners recessed to match the back-to-back MOS circuit 2, so as to save materials and space, while ensuring the stability of the back-to-back MOS circuit 2 installation.

[0028] In a specific embodiment, such as Figure 2 As shown, the first mounting base 41, the second mounting base 42 and the third mounting base 43 each include adjacent terminal mounting holes 411 and fixing bases 412; one end of any terminal 5 is connected to the back-to-back structure MOS circuit 2 through the terminal mounting hole 411, and the other end is fixedly connected to the cover plate 4 through the fixing base 412.

[0029] Specifically, the terminal mounting hole 411 is a rectangular opening provided on the cover plate 4, so that one end of the terminal 5 can pass through and be connected to the back-to-back structure MOS circuit 2. The fixing base 412 consists of a semi-annular surrounding plate and a mounting post provided in the surrounding plate. The mounting post is provided with a screw mounting groove 413. The other end of the terminal 5 is connected to the mounting post through a screw and the screw mounting groove 413.

[0030] Specifically, since the other end of the terminal 5 is connected to the mounting post by a screw, in order to prevent the metal screw from contacting the back-to-back structure MOS circuit 2, the end of the screw mounting groove 413 near the back-to-back structure MOS circuit 2 is set as a sealed structure.

[0031] In a specific embodiment, the fixing base 412 is provided with a screw mounting groove 413, and the end of the screw mounting groove 413 near the back-to-back structure MOS circuit 2 is a sealed structure. The other end of any terminal 5 is fixedly connected to the cover plate 4 by a screw and the screw mounting groove 413.

[0032] In a specific embodiment, the end face of the fixing base 412 that contacts the terminal 5 is provided with an arc-shaped surface.

[0033] Specifically, in this embodiment, since the terminal block 5 needs to be bent for connection, the end face of the fixing base 412 that contacts the terminal block 5 is provided with an arc-shaped surface to ensure the fit of the connection and the service life of the terminal block 5.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A novel semiconductor package, characterized in that, It includes a substrate (1), a back-to-back MOS circuit (2) disposed on the substrate, a fixed housing (3) and a cover plate (4); The fixed housing (3) is connected to the substrate (1) on the side close to the substrate (1) and is shaped to match the back-to-back structure MOS circuit (2) to initially encapsulate the back-to-back structure MOS circuit (2). The fixed housing (3) is snapped onto the cover plate (4) on the side away from the substrate (1) to completely encapsulate the back-to-back MOS circuit (2), and the cover plate (4) is provided with a mounting base structure for mounting the terminal block (5).

2. The novel semiconductor package according to claim 1, characterized in that, The mounting structure includes a first mounting base (41), a second mounting base (42), and a third mounting base (43) that are adjacent to each other. One end of each of the three terminals (5) is connected to the back-to-back MOS circuit (2) through the first mounting base (41), the second mounting base (42), and the third mounting base (43), respectively.

3. The novel semiconductor package according to claim 2, characterized in that, The substrate (1) is provided with a snap-fit ​​groove (11) and a plurality of first mounting holes (12); The fixed housing (3) is provided with a snap-fit ​​block (31) matching the substrate (1) and a number of second mounting holes (32) for fixed connection with the substrate (1) on the side near the substrate (1). The fixed housing (3) and the substrate (1) are connected to the snap-fit ​​groove (11) by the snap-fit ​​block (31), and then fixedly connected by screws, the first mounting hole (12) and the second mounting hole (32).

4. The novel semiconductor package according to claim 3, characterized in that, The fixed housing (3) is also provided with a cover plate mounting seat (33) for mounting the cover plate (4), and the cover plate (4) is assembled with the fixed housing (3) through the cover plate mounting seat (33); The cover plate (4) has buckles (44) at its opposite ends; the fixed housing (3) has slots (34) at its opposite ends that match the buckles (44). The fixed housing (3) and the cover plate (4) are engaged by a bayonet (34) and a buckle (44).

5. The novel semiconductor package according to claim 4, characterized in that, The first mounting base (41), the second mounting base (42) and the third mounting base (43) each include adjacent terminal mounting holes (411) and fixing bases (412); One end of any terminal (5) is connected to the back-to-back MOS circuit (2) through the terminal mounting hole (411), and the other end is fixedly connected to the cover plate (4) through the mounting base (412).

6. The novel semiconductor package according to claim 5, characterized in that, The mounting base (412) is provided with a screw mounting groove (413), and the end of the screw mounting groove (413) near the back-to-back structure MOS circuit (2) is a sealed structure. The other end of any terminal (5) is fixedly connected to the cover plate (4) by screws and screw mounting groove (413).

7. The novel semiconductor package according to claim 6, characterized in that, The end face of the fixed base (412) that contacts the terminal (5) has an arc-shaped surface.