Marine continuous monitoring instrument and control circuit thereof

Abstract

The utility model discloses a kind of marine continuous monitoring instruments and control circuit thereof, the control circuit includes main control circuit, signal processing circuit, switch control circuit, analog-digital conversion circuit, gas detection circuit, at least one sensor and power supply circuit;The main control circuit is connected signal processing circuit, switch control circuit and analog-digital conversion circuit respectively, and the analog-digital conversion circuit is connected gas detection circuit and each sensor respectively;The power supply circuit is connected main control circuit, signal processing circuit, switch control circuit, analog-digital conversion circuit, gas detection circuit and each sensor respectively.The power supply circuit includes DC-DC power supply conversion circuit and LDO voltage stabilizing circuit;The DC-DC power supply conversion circuit includes boost conversion circuit and buck conversion circuit, and the buck conversion circuit is connected LDO voltage stabilizing circuit.The marine continuous monitoring instrument and control circuit thereof proposed by the utility model can improve the overall energy efficiency ratio, ensure the good operation of instrument for a long time.

Description

Technical Field

[0001] This utility model belongs to the field of monitoring equipment technology, and relates to a monitoring instrument, and more particularly to a marine continuous monitoring instrument and its control circuit. Background Technology

[0002] The marine continuous monitoring instrument is used to detect CO2 concentration in nearshore surface water. It is powered by a small lithium battery, supplemented by solar charging. However, the main power source, the small battery, has a limited capacity, and the solar panel's operating time is unstable. Since the instrument needs to continuously monitor the gas content of the extracted seawater, this places high demands on the overall power consumption of the device. The current power consumption design of the instrument's internal main control circuit cannot guarantee reliable operation over extended periods.

[0003] In view of this, there is an urgent need to design a new marine continuous monitoring instrument in order to overcome at least some of the aforementioned shortcomings of existing marine continuous monitoring instruments. Utility Model Content

[0004] This invention provides a marine continuous monitoring instrument and its control circuit, which can improve the overall energy efficiency ratio and ensure the instrument's long-term good operation.

[0005] To solve the above-mentioned technical problems, according to one aspect of this utility model, the following technical solution is adopted:

[0006] A control circuit for a marine continuous monitoring instrument, the control circuit comprising: a main control circuit, a signal processing circuit, a switch control circuit, an analog-to-digital conversion circuit, a gas detection circuit, at least one sensor, and a power supply circuit;

[0007] The main control circuit is connected to the signal processing circuit, the switch control circuit and the analog-to-digital conversion circuit respectively. The analog-to-digital conversion circuit is connected to the gas detection circuit and each sensor respectively.

[0008] The power supply circuit is connected to the main control circuit, signal processing circuit, switch control circuit, analog-to-digital conversion circuit, gas detection circuit and each sensor respectively;

[0009] In one embodiment of this utility model, the power supply circuit includes a DC-DC power conversion circuit and an LDO voltage regulator circuit; the DC-DC power conversion circuit includes a boost converter circuit and a buck converter circuit, and the buck converter circuit is connected to the LDO voltage regulator circuit.

[0010] As one embodiment of this utility model, the LDO voltage regulator circuit includes a third chip U3, a ninth capacitor C9, a first zero capacitor C10, a first three capacitors C13, and a sixth resistor R6.

[0011] The first pin IN of the third chip U3 is connected to the first end of the ninth capacitor C9, and the second end of the ninth capacitor C9 is grounded.

[0012] The ninth pin OUTS of the third chip U3 is connected to the first zero pin OUT of the third chip U3 and the first end of the first zero capacitor C10, and the second end of the first zero capacitor C10 is grounded.

[0013] The seventh pin SET of the third chip U3 is connected to the first end of the sixth resistor R6 and the first end of the first three capacitors C13, respectively; the second end of the sixth resistor R6 and the second end of the first three capacitors C13 are grounded.

[0014] As one embodiment of this utility model, the boost converter circuit includes a first chip U1, a first inductor L1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4.

[0015] The EN pin of the first chip U1 is connected to the PS / YNC pin of the first chip U1 and the second terminal of the second resistor R2, respectively; the VIN pin of the first chip U1 is connected to the first terminal of the second resistor R2, the first terminal of the third capacitor C3, and the first terminal of the second capacitor C2, respectively; the second terminals of the third capacitor C3 and the second terminals of the second capacitor C2 are grounded, respectively.

[0016] The L1 pin of the first chip U1 is connected to the second end of the first inductor L1, and the first end of the first inductor L1 is connected to the L2 pin of the first chip U1.

[0017] The PG pin of the first chip U1 is connected to the first end of the first resistor R1, and the second end of the first resistor R1 is connected to the first end of the third resistor R3; the VAUX pin of the first chip U1 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is grounded.

[0018] The FB pin of the first chip U1 is connected to the second end of the third resistor R3, the first end of the fourth resistor R4, and the first end of the fourth capacitor C4, respectively; the second end of the fourth resistor R4 and the second end of the fourth capacitor C4 are grounded.

[0019] The VOUT pin of the first chip U1 is connected to the first end of the fifth capacitor C5 and the first end of the sixth capacitor C6, respectively. The second ends of the fifth capacitor C5 and the second ends of the sixth capacitor C6 are grounded.

[0020] As one embodiment of this utility model, the step-down conversion circuit includes a second chip U2, a second inductor L2, a first diode D1, a seventh capacitor C7, an eighth capacitor C8, a first capacitor C11, a first second capacitor C12, a first fourth capacitor C14, a first fifth capacitor C15, a fifth resistor R5, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9.

[0021] The fifth pin VIN of the second chip U2 is connected to the sixth pin VIN of the second chip U2, the positive terminal of the first diode D1, the first end of the fifth resistor R5, and the first end of the eighth capacitor C8, respectively.

[0022] The fourth pin (EN / UV) of the second chip U2 is connected to the second end of the fifth resistor R5, and the second end of the eighth capacitor C8 is grounded.

[0023] The third pin COMP of the second chip U2 is connected to the second end of the eighth resistor R8, the first end of the eighth resistor R8 is connected to the first end of the first four capacitors C14, and the second end of the first four capacitors C14 is grounded.

[0024] The first two pins of the second chip U2, BST pin, are respectively connected to the negative terminal of the first diode D1 and the first terminal of the seventh capacitor C7;

[0025] The first pin SW of the second chip U2 is connected to the first zero pin SW of the second chip U2, the ninth pin SW of the second chip U2, the second terminal of the seventh capacitor C7, the first terminal of the second inductor L2, and the first terminal of the first capacitor C11.

[0026] The second terminal of the second inductor L2 is connected to the first terminal of the first capacitor C12 and the first terminal of the seventh resistor R7, respectively; the second terminals of the first capacitor C11 and the second terminals of the first capacitor C12 are grounded.

[0027] The first six pins (FB pins) of the second chip U2 are connected to the second end of the seventh resistor R7 and the first end of the ninth resistor R9, respectively. The second end of the ninth resistor R9 is grounded.

[0028] The seventh pin REF of the second chip U2 is connected to the first terminal of the first capacitor C15, and the second terminal of the first capacitor C15 is grounded.

[0029] In one embodiment of this utility model, the signal processing circuit includes an operational amplifier circuit, which includes a fifth A chip U5A, a fifth B chip U5B, a first seventh capacitor C17, a second first capacitor C21, a second third capacitor C23, a second fourth capacitor C24, a second fifth capacitor C25, a second sixth capacitor C26, a first second resistor R12, a first third resistor R13, a first fourth resistor R14, a first fifth resistor R15, a first sixth resistor R16, a first seventh resistor R17, a first eighth resistor R18, a first ninth resistor R19, a second zero resistor R20, and a second first resistor R21.

[0030] The fifth A chip U5A is an operational amplifier. The non-inverting input terminal of the fifth A chip U5A is connected to the second terminal of the first three resistors R13 and the second terminal of the second one capacitor C21, respectively. The first terminal of the second one capacitor C21 is grounded. The first terminal of the first three resistors R13 is connected to the second terminal of the first two resistors R12 and the first terminal of the first seven capacitor C17, respectively.

[0031] The inverting input terminal of the fifth A chip U5A is connected to the second terminal of the first five resistor R15 and the first terminal of the first six resistor R16 respectively; the first terminal of the first five resistor R15 is grounded; the first five resistor R15 and the first six resistor R16 form a feedback loop;

[0032] The output terminal of the fifth A chip U5A is connected to the second terminal of the first seven capacitor C17, the second terminal of the first six resistor R16, and the first terminal of the first four resistor R14 respectively; the second terminal of the first four resistor R14 is connected to the first terminal of the second three capacitor C23, and the second terminal of the second three capacitor C23 is grounded.

[0033] The fifth B chip U5B is an operational amplifier. The non-inverting input terminal of the fifth B chip U5B is connected to the second terminal of the first eight resistor R18 and the second terminal of the second five capacitor C25, respectively. The first terminal of the second five capacitor C25 is grounded. The first terminal of the first eight resistor R18 is connected to the second terminal of the first seven resistor R17 and the first terminal of the second four capacitor C24, respectively.

[0034] The inverting input terminal of the fifth B chip U5B is connected to the second terminal of the second zero resistor R20 and the first terminal of the second first resistor R21 respectively; the first terminal of the second zero resistor R20 is grounded; the second zero resistor R20 and the second first resistor R21 form a feedback loop.

[0035] The output terminal of the fifth B chip U5B is connected to the second terminal of the second fourth capacitor C24, the second terminal of the second first resistor R21, and the first terminal of the first ninth resistor R19, respectively; the second terminal of the first ninth resistor R19 is connected to the first terminal of the second sixth capacitor C26, and the second terminal of the second sixth capacitor C26 is grounded.

[0036] As one embodiment of this utility model, the analog-to-digital conversion circuit includes a fourth chip U4, a first six-capacitor C16, a first eight-capacitor C18, a first nine-capacitor C19, a second zero-capacitor C20, and a second two-capacitor C22.

[0037] The first pin of the fourth chip U4 is connected to the second terminal of the first six-capacitor C16, and the second pin of the fourth chip U4 is connected to the second terminal of the first nine-capacitor C19; the first terminals of the first six-capacitor C16 and the first nine-capacitor C19 are respectively grounded.

[0038] The second pin of the fourth chip U4 is connected to the first terminal of the first eight-capacitor C18, and the second terminal of the first eight-capacitor C18 is grounded.

[0039] The second fourth pin of the fourth chip U4 is connected to the first terminal of the second zero capacitor C20; the second sixth pin of the fourth chip U4 is connected to the first terminal of the second two capacitor C22, and the second terminal of the second two capacitor C22 is grounded.

[0040] In one embodiment of this utility model, the main control circuit includes an MCU, an external clock circuit, an external storage circuit, and an external communication circuit; the MCU is connected to the external clock circuit, the external storage circuit, and the external communication circuit respectively.

[0041] According to another aspect of this utility model, the following technical solution is adopted: a marine continuous monitoring instrument, the marine continuous monitoring instrument including the control circuit of the above-mentioned marine continuous monitoring instrument.

[0042] The beneficial effects of this utility model are as follows: the marine continuous monitoring instrument and its control circuit proposed in this utility model can improve the overall energy efficiency ratio and ensure the long-term good operation of the instrument. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the composition of the control circuit of a marine continuous monitoring instrument in one embodiment of the present invention.

[0044] Figure 2 This is a circuit diagram of the power supply circuit in one embodiment of the present invention.

[0045] Figure 3 This is a frequency and efficiency curve diagram in one embodiment of the present invention.

[0046] Figure 4 This is a circuit diagram of the signal processing circuit and analog-to-digital conversion circuit in one embodiment of the present invention.

[0047] Figure 5 This is a circuit diagram of the main control circuit in one embodiment of the present invention. Detailed Implementation

[0048] The preferred embodiments of this utility model are described in detail below with reference to the accompanying drawings.

[0049] To further understand this utility model, preferred embodiments of this utility model are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of this utility model, and not for limiting the scope of the claims of this utility model.

[0050] The description in this section pertains to only a few typical embodiments, and this utility model is not limited to the scope of the embodiments described. Substitution of identical or similar prior art methods with some technical features in the embodiments is also within the scope of this utility model's description and protection.

[0051] The term "connection" in the specification includes both direct and indirect connections, such as connections made through active devices, passive devices, or electrical conduction media; it may also include connections made by other active or passive devices that are known to those skilled in the art and can achieve the same or similar functional purpose, such as connections made through circuits or components such as switches or follower circuits.

[0052] This utility model discloses a control circuit for a marine continuous monitoring instrument. Figure 1 This is a schematic diagram of the control circuit of a marine continuous monitoring instrument in one embodiment of the present invention; please refer to [link / reference]. Figure 1 The control circuit includes: a main control circuit 1, a signal processing circuit 2, a switch control circuit 3, an analog-to-digital converter circuit 4, a gas detection circuit 5, at least one sensor 6, and a power supply circuit 7. The main control circuit 1 is connected to the signal processing circuit 2, the switch control circuit 3, and the analog-to-digital converter circuit 4. The analog-to-digital converter circuit 4 is connected to the gas detection circuit 5 and each sensor 6. The power supply circuit 7 is connected to the main control circuit 1, the signal processing circuit 2, the switch control circuit 3, the analog-to-digital converter circuit 4, the gas detection circuit 5, and each sensor 6.

[0053] In one embodiment of the present invention, the power supply circuit 7 includes a DC-DC power conversion circuit and an LDO voltage regulator circuit; the DC-DC power conversion circuit includes a boost converter circuit and a buck converter circuit, and the buck converter circuit is connected to the LDO voltage regulator circuit.

[0054] Figure 2 This is a circuit diagram of the power supply circuit in one embodiment of the present invention; in one embodiment of the present invention, please refer to... Figure 2 The LDO voltage regulator circuit includes a third chip U3, a ninth capacitor C9, a first zero capacitor C10, a first three capacitors C13, and a sixth resistor R6.

[0055] The first pin IN of the third chip U3 is connected to the first terminal of the ninth capacitor C9, and the second terminal of the ninth capacitor C9 is grounded; the ninth pin OUTS of the third chip U3 is connected to the first zero pin OUT of the third chip U3 and the first terminal of the first zero capacitor C10, and the second terminal of the first zero capacitor C10 is grounded; the seventh pin SET of the third chip U3 is connected to the first terminal of the sixth resistor R6 and the first terminal of the first triple capacitor C13; the second terminal of the sixth resistor R6 and the second terminal of the first triple capacitor C13 are grounded.

[0056] The boost converter circuit includes a first chip U1, a first inductor L1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4.

[0057] The EN pin of the first chip U1 is connected to the PS / YNC pin of the first chip U1 and the second terminal of the second resistor R2, respectively; the VIN pin of the first chip U1 is connected to the first terminal of the second resistor R2, the first terminal of the third capacitor C3, and the first terminal of the second capacitor C2, respectively; the second terminals of the third capacitor C3 and the second terminals of the second capacitor C2 are grounded. The L1 pin of the first chip U1 is connected to the second terminal of the first inductor L1, and the first terminal of the first inductor L1 is connected to the L2 pin of the first chip U1.

[0058] The PG pin of the first chip U1 is connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 is connected to the first terminal of the third resistor R3. The VAUX pin of the first chip U1 is connected to the first terminal of the first capacitor C1, and the second terminal of the first capacitor C1 is grounded. The FB pin of the first chip U1 is connected to the second terminal of the third resistor R3, the first terminal of the fourth resistor R4, and the first terminal of the fourth capacitor C4, respectively; the second terminals of the fourth resistor R4 and the fourth capacitor C4 are grounded. The VOUT pin of the first chip U1 is connected to the first terminal of the fifth capacitor C5 and the first terminal of the sixth capacitor C6, respectively; the second terminals of the fifth capacitor C5 and the sixth capacitor C6 are grounded.

[0059] The step-down converter circuit includes a second chip U2, a second inductor L2, a first diode D1, a seventh capacitor C7, an eighth capacitor C8, a first capacitor C11, a first second capacitor C12, a first fourth capacitor C14, a first fifth capacitor C15, a fifth resistor R5, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9.

[0060] The fifth pin (VIN) of the second chip U2 is connected to the sixth pin (VIN) of the second chip U2, the positive terminal of the first diode D1, the first terminal of the fifth resistor R5, and the first terminal of the eighth capacitor C8. The fourth pin (EN / UV) of the second chip U2 is connected to the second terminal of the fifth resistor R5, and the second terminal of the eighth capacitor C8 is grounded. The third pin (COMP) of the second chip U2 is connected to the second terminal of the eighth resistor R8, the first terminal of the eighth resistor R8 is connected to the first terminal of the first fourth capacitor C14, and the second terminal of the first fourth capacitor C14 is grounded. The first two pins (BST) of the second chip U2 are connected to the negative terminal of the first diode D1 and the first terminal of the seventh capacitor C7.

[0061] The first pin (SW) of the second chip U2 is connected to the first zero pin (SW) of the second chip U2, the ninth pin (SW) of the second chip U2, the second terminal of the seventh capacitor C7, the first terminal of the second inductor L2, and the first terminal of the first capacitor C11. The second terminal of the second inductor L2 is connected to the first terminal of the first second capacitor C12 and the first terminal of the seventh resistor R7; the second terminals of the first capacitor C11 and the second terminals of the first second capacitor C12 are grounded. The first sixth pin (FB) of the second chip U2 is connected to the second terminal of the seventh resistor R7 and the first terminal of the ninth resistor R9, with the second terminal of the ninth resistor R9 grounded. The seventh pin (REF) of the second chip U2 is connected to the first terminal of the first fifth capacitor C15, with the second terminal of the first fifth capacitor C15 grounded.

[0062] Figure 4 This is a circuit diagram of the signal processing circuit and analog-to-digital conversion circuit in one embodiment of the present invention; please refer to... Figure 4 In one embodiment of this utility model, the signal processing circuit includes an operational amplifier circuit, which includes a fifth A chip U5A, a fifth B chip U5B, a first seventh capacitor C17, a second first capacitor C21, a second third capacitor C23, a second fourth capacitor C24, a second fifth capacitor C25, a second sixth capacitor C26, a first second resistor R12, a first third resistor R13, a first fourth resistor R14, a first fifth resistor R15, a first sixth resistor R16, a first seventh resistor R17, a first eighth resistor R18, a first ninth resistor R19, a second zero resistor R20, and a second first resistor R21.

[0063] The fifth A chip U5A is an operational amplifier. Its non-inverting input is connected to the second terminal of the first three-resistor R13 and the second terminal of the second one-capacitor C21; the first terminal of the second one-capacitor C21 is grounded. The first terminal of the first three-resistor R13 is connected to the second terminal of the first two-resistor R12 and the first terminal of the first seven-capacitor C17. Its inverting input is connected to the second terminal of the first five-resistor R15 and the first terminal of the first six-resistor R16; the first terminal of the first five-resistor R15 is grounded. The first five-resistor R15 and the first six-resistor R16 form a feedback loop. Its output is connected to the second terminal of the first seven-capacitor C17, the second terminal of the first six-resistor R16, and the first terminal of the first four-resistor R14; the second terminal of the first four-resistor R14 is connected to the first terminal of the second three-capacitor C23, and the second terminal of the second three-capacitor C23 is grounded.

[0064] The fifth B chip U5B is an operational amplifier. Its non-inverting input is connected to the second terminal of the first eight-resistor R18 and the second terminal of the second five-capacitor C25; the first terminal of the second five-capacitor C25 is grounded. The first terminal of the first eight-resistor R18 is connected to the second terminal of the first seven-resistor R17 and the first terminal of the second four-capacitor C24. Its inverting input is connected to the second terminal of the second zero-resistor R20 and the first terminal of the second one-resistor R21; the first terminal of the second zero-resistor R20 is grounded. The second zero-resistor R20 and the second one-resistor R21 form a feedback loop. Its output is connected to the second terminal of the second four-capacitor C24, the second terminal of the second one-resistor R21, and the first terminal of the first nine-resistor R19; the second terminal of the first nine-resistor R19 is connected to the first terminal of the second six-capacitor C26, and the second terminal of the second six-capacitor C26 is grounded.

[0065] The analog-to-digital converter circuit includes a fourth chip U4, a first six-capacitor C16, a first eight-capacitor C18, a first nine-capacitor C19, a second zero-capacitor C20, and a second two-capacitor C22. The first pin of the fourth chip U4 is connected to the second terminal of the first six-capacitor C16, and the second pin of the fourth chip U4 is connected to the second terminal of the first nine-capacitor C19; the first terminals of the first six-capacitor C16 and the first nine-capacitor C19 are grounded. The second two pin of the fourth chip U4 is connected to the first terminal of the first eight-capacitor C18, and the second terminal of the first eight-capacitor C18 is grounded. The second four pin of the fourth chip U4 is connected to the first terminal of the second zero-capacitor C20; the second six pin of the fourth chip U4 is connected to the first terminal of the second two-capacitor C22, and the second terminal of the second two-capacitor C22 is grounded.

[0066] Figure 5 This is a circuit diagram of the main control circuit in one embodiment of the present invention; please refer to... Figure 1 , Figure 5 The main control circuit includes an MCU 11, an external clock circuit 12, an external storage circuit 13, and an external communication circuit 14. The external storage circuit 13 may include at least one external memory. The MCU 11 is connected to the external clock circuit 12, the external storage circuit 13, and the external communication circuit 14 respectively.

[0067] This utility model further discloses a marine continuous monitoring instrument, which includes the control circuit of the above-mentioned marine continuous monitoring instrument.

[0068] In one application scenario of this invention, low-power components are selected in the circuit, reducing losses and controlling the overall heat of the circuit board. The power supply improves DC-DC conversion efficiency, increasing it from 70% to 80% under light loads. Timing control and algorithm optimization are applied to key chips such as the MCU and ADC, reducing the workload of unnecessary internal modules. Compared to similar products, the average operating current of mainstream MCU main control chips is 20-30mA. This design uses a special low-power MCU main control chip, reducing the average current through multiple sleep cycles. Under light loads, the external clock is turned off, reducing the main frequency and lowering the current to 2mA. The ADC dynamically starts and stops intermittently to collect data by adjusting the duty cycle, reducing the average current consumption per channel from 500uA to 25uA.

[0069] The device and hardware system are powered by a rated 3.7V lithium battery. The hardware circuitry controls the device's operation. This continuous monitoring device records environmental data every 30 minutes for 5 minutes. One detection cycle involves extracting seawater and separating the gas. The data is then sent to the MCU for processing via a gas detector. The switch control module controls the opening and closing of the gas pump, the flow control module controls the gas flow rate, and the sensor section collects the parameters of the gas loop in real time and feeds them back to the MCU main control chip. All control modules are activated only when necessary. After a single data transmission is completed, the main control chip commands the sensors and detectors to enter sleep mode.

[0070] like Figure 2 As shown, the power supply circuit includes a DC-DC power converter chip and an LDO regulator chip. U1 is a boost converter chip, U2 is a buck converter chip, and U3 is a low-dropout LDO chip. The advantage of the DC-DC power converter chip over the LDO is its higher conversion efficiency, which can greatly reduce losses. In the power supply design, while ensuring good power ripple and noise for the circuit, the power conversion efficiency should be improved as much as possible. The power inductor L2 is selected with a lower ESR to reduce component losses.

[0071] Among these factors, choosing a suitable switching frequency is particularly important. The power consumption of the power supply mainly comes from the switching losses of the MOSFETs inside chip U2. According to the formula, the switching losses are directly proportional to the switching frequency.

[0072] P = V IN ×I D ×T cross ×f sw +V Drive ×Q0×f sw

[0073] Where: VIN is the input voltage; ID is the current flowing through the MOSFET; Tcross is the on- and off overlap time; FSW is the switching frequency; and Q0 is the parasitic capacitance charge. Figure 3 As shown, under a 1A load, the efficiency of a switching frequency of 600kHz is 10% higher than that of 1000kHz.

[0074] like Figure 4 As shown, the signal link of the signal processing circuit goes through an operational amplifier and an ADC analog-to-digital converter, and then is connected to the MCU main controller via SPI communication. This part uses a low-power operational amplifier with low voltage operation capability and a design method. While maintaining accuracy and speed, the timing optimization method of the analog-to-digital conversion method is used to achieve the purpose of low power consumption.

[0075] This circuit design has multiple signal acquisition channels corresponding to different sensor detections. The operational amplifier, as the signal processing of the analog front end, is the key to optimizing the power consumption of the signal chain. The main power consumption components of the operational amplifier are static power, output dynamic power, and load power. The total power formula is as follows:

[0076]

[0077] Where: PALL is the total average power; VS is the supply voltage; IQ is the quiescent current; Voff is the output DC bias; and RLaod is the load resistance. According to the formula, low-power operational amplifier design directions include: operational amplifiers with lower IQ; reducing the load resistance; and operational amplifiers with low-voltage supply.

[0078] The U5 op-amp has a maximum quiescent current (IQ) of approximately 10µA, supports power supplies from 1.5V to 3.6V, and features ultra-low power consumption, low bias current, and low noise. The op-amp's circuit design reduces power consumption by decreasing the total load resistance. The formula for calculating the load resistance of the U5 op-amp is as follows: increasing the value of the feedback resistor relative to the load correspondingly reduces the output dynamic power.

[0079]

[0080] Resistors R15 and R16 form a feedback loop. The resistance value of R15 is 100KΩ, the resistance value of R16 is 30KΩ, the load resistance RL is 10KΩ, the RLoad value is 21.4KΩ, and the average power PALL is 0.14mW.

[0081] The U4 is an analog-to-digital converter (ADC) chip, classified as a Σ-Δ ADC. It utilizes its low-power characteristics, including FIFO and duty cycle adjustment, to achieve high-precision measurement of slowly moving signals in low-power signal chains. This ADC chip also features multiplexing functionality; inputs to channels 0, 3, 4, 5, and 10 of the U4 multiplex the same ADC, achieving synchronous sampling through a low-pass anti-aliasing filter, and reducing power consumption through multiplexing. Duty cycle control allows the ADC to operate at specific times within each cycle, typically with a 1 / 4 or 1 / 8 duty cycle, while remaining in standby mode for the rest of the time, significantly reducing the average current per cycle. The on-chip FIFO can store conversion data for a period of time, achieving a buffering effect. The MCU main controller can remain in sleep mode most of the time, with interrupt control reading and clearing the data in one go.

[0082] like Figure 5 As shown, U9 is the MCU main control chip. In terms of hardware design, the MCU uses a dedicated low-power chip that supports 7 low-power modes. The peripheral module supports 1.8V power supply operation. It is known that dynamic power consumption is proportional to the square of the voltage, and the low-voltage operating mode can greatly reduce current consumption. Reducing the clock frequency can also reduce dynamic power consumption. When necessary, the main frequency can be reduced from 8MHz to 1MHz, or the external crystal oscillator X1 can be turned off and the internal low-speed clock can be turned on. Peripherals and pins are only enabled when needed, and all others are disabled. All GPIO floating pins are set to analog input mode to prevent interference and leakage current. All pull-up resistors R22, R23, R24, R25, and R26 have a resistance value of 47K to ensure driving while reducing pull-up current. The external memory chips all use 1.8V low-voltage power supply. U6 and U7 are EEPROMs with a read / write current of about 3mA, and U8 is a FLASH chip with a read / write current of 25mA. The static current of the three chips in sleep mode is less than 5uA.

[0083] In one application scenario of this utility model, the software design employs corresponding low-power modes under different working environments. The marine monitoring system initiates a detection process every 30 minutes, lasting for 5 minutes. After the detection process ends, it quickly enters standby mode, shutting down the CPU and RAM, with a low current consumption of 1uA. During the detection process, the sensor intermittently collects data when requirements are met. The MCU can adjust its operating frequency according to the load, increasing the main frequency when running the algorithm and decreasing it under light load. Simultaneously, the sensor is intermittently activated to receive data in conjunction with the ADC. The wake-up time is shortened by executing the program through external interrupts. The average circuit current can be reduced to 10uA. The average current of the MCU main control chip in one detection cycle can be reduced to 5mA, the average current of the ADC can be reduced to 25uA, the average power consumption of a single operational amplifier is 0.14mW (5 in total), and the average power consumption of the signal chain is 9mW.

[0084] In summary, the marine continuous monitoring instrument and its control circuit proposed in this invention can improve the overall energy efficiency ratio and ensure the instrument's long-term reliable operation.

[0085] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0086] The description and application of this utility model herein are illustrative and not intended to limit the scope of the utility model to the above embodiments. The effects or advantages involved in the embodiments may not be manifested in the embodiments due to various factors, and the description of effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and various substitutions and equivalents of the components in the embodiments are well known to those skilled in the art. It should be clear to those skilled in the art that this utility model can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of this utility model. Other variations and modifications can be made to the embodiments disclosed herein without departing from the scope and spirit of this utility model.

Claims

1. A control circuit for a marine continuous monitoring instrument, characterized by The control circuit includes: a main control circuit, a signal processing circuit, a switch control circuit, an analog-to-digital conversion circuit, a gas detection circuit, at least one sensor, and a power supply circuit; The main control circuit is connected to the signal processing circuit, the switch control circuit and the analog-to-digital conversion circuit respectively. The analog-to-digital conversion circuit is connected to the gas detection circuit and each sensor respectively. The power supply circuit is connected to the main control circuit, signal processing circuit, switch control circuit, analog-to-digital conversion circuit, gas detection circuit and various sensors.

2. The control circuit of the marine continuous monitoring instrument according to claim 1, characterized in that: The power supply circuit includes a DC-DC power conversion circuit and an LDO voltage regulator circuit; the DC-DC power conversion circuit includes a boost converter circuit and a buck converter circuit, and the buck converter circuit is connected to the LDO voltage regulator circuit.

3. The control circuit of the marine continuous monitoring instrument according to claim 2, characterized in that: The LDO voltage regulator circuit includes a third chip U3, a ninth capacitor C9, a first zero capacitor C10, a first three capacitors C13, and a sixth resistor R6. The first pin IN of the third chip U3 is connected to the first end of the ninth capacitor C9, and the second end of the ninth capacitor C9 is grounded. The ninth pin OUTS of the third chip U3 is connected to the first zero pin OUT of the third chip U3 and the first end of the first zero capacitor C10, and the second end of the first zero capacitor C10 is grounded. The seventh pin SET of the third chip U3 is connected to the first end of the sixth resistor R6 and the first end of the first three capacitors C13, respectively; the second end of the sixth resistor R6 and the second end of the first three capacitors C13 are grounded.

4. The control circuit of the marine continuous monitoring instrument according to claim 2, characterized in that: The boost converter circuit includes a first chip U1, a first inductor L1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The EN pin of the first chip U1 is connected to the PS / YNC pin of the first chip U1 and the second terminal of the second resistor R2, respectively; the VIN pin of the first chip U1 is connected to the first terminal of the second resistor R2, the first terminal of the third capacitor C3, and the first terminal of the second capacitor C2, respectively; the second terminals of the third capacitor C3 and the second terminals of the second capacitor C2 are grounded, respectively. The L1 pin of the first chip U1 is connected to the second end of the first inductor L1, and the first end of the first inductor L1 is connected to the L2 pin of the first chip U1. The PG pin of the first chip U1 is connected to the first end of the first resistor R1, and the second end of the first resistor R1 is connected to the first end of the third resistor R3; the VAUX pin of the first chip U1 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is grounded. The FB pin of the first chip U1 is connected to the second end of the third resistor R3, the first end of the fourth resistor R4, and the first end of the fourth capacitor C4, respectively; the second end of the fourth resistor R4 and the second end of the fourth capacitor C4 are grounded. The VOUT pin of the first chip U1 is connected to the first end of the fifth capacitor C5 and the first end of the sixth capacitor C6, respectively. The second ends of the fifth capacitor C5 and the second ends of the sixth capacitor C6 are grounded.

5. The control circuit of the marine continuous monitoring instrument according to claim 2, characterized in that: The step-down converter circuit includes a second chip U2, a second inductor L2, a first diode D1, a seventh capacitor C7, an eighth capacitor C8, a first capacitor C11, a first second capacitor C12, a first fourth capacitor C14, a first fifth capacitor C15, a fifth resistor R5, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The fifth pin VIN of the second chip U2 is connected to the sixth pin VIN of the second chip U2, the positive terminal of the first diode D1, the first end of the fifth resistor R5, and the first end of the eighth capacitor C8, respectively. The fourth pin (EN / UV) of the second chip U2 is connected to the second end of the fifth resistor R5, and the second end of the eighth capacitor C8 is grounded. The third pin COMP of the second chip U2 is connected to the second end of the eighth resistor R8, the first end of the eighth resistor R8 is connected to the first end of the first four capacitors C14, and the second end of the first four capacitors C14 is grounded. The first two pins of the second chip U2, BST pin, are respectively connected to the negative terminal of the first diode D1 and the first terminal of the seventh capacitor C7; The first pin SW of the second chip U2 is connected to the first zero pin SW of the second chip U2, the ninth pin SW of the second chip U2, the second terminal of the seventh capacitor C7, the first terminal of the second inductor L2, and the first terminal of the first capacitor C11. The second terminal of the second inductor L2 is connected to the first terminal of the first capacitor C12 and the first terminal of the seventh resistor R7, respectively; the second terminals of the first capacitor C11 and the second terminals of the first capacitor C12 are grounded. The first six pins (FB pins) of the second chip U2 are connected to the second end of the seventh resistor R7 and the first end of the ninth resistor R9, respectively. The second end of the ninth resistor R9 is grounded. The seventh pin REF of the second chip U2 is connected to the first terminal of the first capacitor C15, and the second terminal of the first capacitor C15 is grounded.

6. The control circuit of the marine continuous monitoring instrument according to claim 1, characterized in that: The signal processing circuit includes an operational amplifier circuit, which includes a fifth A chip U5A, a fifth B chip U5B, a first seventh capacitor C17, a second first capacitor C21, a second third capacitor C23, a second fourth capacitor C24, a second fifth capacitor C25, a second sixth capacitor C26, a first second resistor R12, a first third resistor R13, a first fourth resistor R14, a first fifth resistor R15, a first sixth resistor R16, a first seventh resistor R17, a first eighth resistor R18, a first ninth resistor R19, a second zero resistor R20, and a second first resistor R21. The fifth A chip U5A is an operational amplifier. The non-inverting input terminal of the fifth A chip U5A is connected to the second terminal of the first three resistors R13 and the second terminal of the second one capacitor C21, respectively. The first terminal of the second one capacitor C21 is grounded. The first terminal of the first three resistors R13 is connected to the second terminal of the first two resistors R12 and the first terminal of the first seven capacitor C17, respectively. The inverting input terminal of the fifth A chip U5A is connected to the second terminal of the first five resistor R15 and the first terminal of the first six resistor R16 respectively; the first terminal of the first five resistor R15 is grounded; the first five resistor R15 and the first six resistor R16 form a feedback loop; The output terminal of the fifth A chip U5A is connected to the second terminal of the first seven capacitor C17, the second terminal of the first six resistor R16, and the first terminal of the first four resistor R14 respectively; the second terminal of the first four resistor R14 is connected to the first terminal of the second three capacitor C23, and the second terminal of the second three capacitor C23 is grounded. The fifth B chip U5B is an operational amplifier. The non-inverting input terminal of the fifth B chip U5B is connected to the second terminal of the first eight resistor R18 and the second terminal of the second five capacitor C25, respectively. The first terminal of the second five capacitor C25 is grounded. The first terminal of the first eight resistor R18 is connected to the second terminal of the first seven resistor R17 and the first terminal of the second four capacitor C24, respectively. The inverting input terminal of the fifth B chip U5B is connected to the second terminal of the second zero resistor R20 and the first terminal of the second one resistor R21, respectively. The first terminal of the second zero-resistance R20 is grounded; the second zero-resistance R20 and the second first-resistance R21 form a feedback loop; The output terminal of the fifth B chip U5B is connected to the second terminal of the second fourth capacitor C24, the second terminal of the second first resistor R21, and the first terminal of the first ninth resistor R19, respectively; the second terminal of the first ninth resistor R19 is connected to the first terminal of the second sixth capacitor C26, and the second terminal of the second sixth capacitor C26 is grounded.

7. The control circuit of the marine continuous monitoring instrument according to claim 6, characterized in that: The analog-to-digital conversion circuit includes a fourth chip U4, a first six-capacitor C16, a first eight-capacitor C18, a first nine-capacitor C19, a second zero-capacitor C20, and a second two-capacitor C22. The first pin of the fourth chip U4 is connected to the second terminal of the first six-capacitor C16, and the second pin of the fourth chip U4 is connected to the second terminal of the first nine-capacitor C19; the first terminals of the first six-capacitor C16 and the first nine-capacitor C19 are respectively grounded. The second pin of the fourth chip U4 is connected to the first terminal of the first eight-capacitor C18, and the second terminal of the first eight-capacitor C18 is grounded. The second fourth pin of the fourth chip U4 is connected to the first terminal of the second zero capacitor C20; the second sixth pin of the fourth chip U4 is connected to the first terminal of the second two capacitor C22, and the second terminal of the second two capacitor C22 is grounded.

8. The control circuit of the marine continuous monitoring instrument according to claim 1, characterized in that: The master control circuit comprises an MCU, an external clock circuit, an external storage circuit and an external communication circuit; the MCU is connected with the external clock circuit, the external storage circuit and the external communication circuit respectively.

9. An ocean continuous monitoring instrument characterized by: The marine continuous monitoring instrument comprises the control circuit of the marine continuous monitoring instrument according to any one of claims 1 to 8.

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