Projector control circuit and projector

Abstract

The application provides a projector control circuit and a projector. The projector control circuit comprises a switching switch unit, a conversion unit, a first switch unit and a signal integration unit. The conversion unit is electrically connected with the switching switch unit and the first switch unit respectively. The signal integration unit is electrically connected with the first switch unit. The signal integration unit is electrically connected with the conversion module and the control unit respectively. The switching switch unit is electrically connected with the host network port and the control unit respectively. The projector control circuit provided by the application can form a complete signal transmission link through the path selection of the switching switch unit, the signal conversion of the conversion unit and the logic control of the first switch unit, even if the network module stops working due to power failure, so that the start-up instruction can be effectively sent to the control unit. Therefore, the start-up control of the projector can be realized through the network port in the low-power true standby mode of the projector.

Description

Technical Field

[0001] This application belongs to the field of projector power-on / off control technology, and particularly relates to a projector control circuit and a projector. Background Technology

[0002] In laser projector applications, especially in commercial ceiling-mounted and long-distance deployments, users have dual requirements for low power consumption and energy efficiency, as well as remote controllability. While current laser projectors support both serial and Ethernet control, in low-power true standby mode, to achieve energy savings, the projector cuts off power to non-essential modules (such as the network module). This directly results in the power-on signal received via the Ethernet port failing to reach the control unit due to the interrupted transmission link, ultimately causing the projector to be unable to power on via the Ethernet port in low-power true standby mode. Utility Model Content

[0003] This application provides a projector control circuit and a projector, which can solve the problem that existing circuits cannot power on the projector via the network port in low-power true standby mode.

[0004] In a first aspect, embodiments of this application provide a projector control circuit, including a switching unit, a conversion unit, a first switching unit, and a signal integration unit. The conversion unit is electrically connected to the switching unit and the first switching unit, respectively. The signal integration unit is electrically connected to the first switching unit. The signal integration unit is used to be electrically connected to the conversion module and the control unit, respectively. The switching unit is used to be electrically connected to the host network port and the control unit, respectively.

[0005] The switching unit is used to receive a first control signal and a network signal, and transmits the network signal to the conversion unit when the first control signal is a first preset level signal; the conversion unit is used to convert the network signal into a first level signal and transmit the first level signal to the first switching unit; the first switching unit is used to receive a second control signal, and transmits the first level signal to the signal integration unit when the second control signal is a second preset level signal; the signal integration unit is used to receive the first level signal and the second level signal output by the conversion module, and outputs a first control trigger signal to the control unit according to the first level signal and the second level signal.

[0006] In one possible implementation of the first aspect, the switching unit includes a first switching switch and a second switching switch, both of which are electrically connected to the conversion unit, and both are used to be electrically connected to the host network port and the control unit, respectively.

[0007] In one possible implementation of the first aspect, the conversion unit includes a first conversion chip, which is electrically connected to the switching unit and the first switching unit, respectively.

[0008] In one possible implementation of the first aspect, the first switching unit includes a first switch, which is electrically connected to both the switching unit and the signal integration unit.

[0009] In one possible implementation of the first aspect, the signal integration unit includes a first AND gate, a first resistor, a second resistor, and a third resistor. The first input terminal of the first AND gate is electrically connected to the first switching unit, the second terminal of the first resistor, and the second terminal of the second resistor, respectively. The second input terminal of the first AND gate is used to be electrically connected to the conversion module and the second terminal of the third resistor, respectively. The output terminal of the first AND gate is used to be electrically connected to the control unit. The first terminals of the first resistor, the second resistor, and the third resistor are all electrically connected to a first power supply.

[0010] In one possible implementation of the first aspect, the projector control circuit further includes a transmitting unit, a receiving unit, and a second switching unit. The receiving unit is electrically connected to the transmitting unit and the second switching unit, respectively. The second switching unit is electrically connected to the signal integration unit. The transmitting unit is used to be electrically connected to the host video interface and the host serial port, respectively. The receiving unit is used to be electrically connected to the control unit.

[0011] The transmitting unit is used to output a network signal to the receiving unit based on the first video signal output from the host video interface and the serial port signal output from the host serial port; the receiving unit is used to output a second video signal to the control unit based on the network signal, and output a third level signal to the second switching unit; the second switching unit is used to receive a third control signal, and transmit the third level signal to the signal integration unit when the third control signal is a third preset level signal; the signal integration unit is used to output a second control trigger signal to the control unit based on the first level signal, the second level signal and the third level signal.

[0012] In one possible implementation of the first aspect, the transmitting unit includes a second conversion chip and a transmitting chip, the second conversion chip being electrically connected to the transmitting chip and the host serial port respectively, and the transmitting chip being electrically connected to the receiving unit;

[0013] The receiving unit includes a receiving chip, which is electrically connected to the transmitting unit, the control unit, and the second switching unit.

[0014] In one possible implementation of the first aspect, the second switching unit includes a second switch, a first transistor, a second transistor, a fourth resistor, and a fifth resistor. The base of the first transistor and the collector of the second transistor are both electrically connected to the receiving unit. The collector of the first transistor and the base of the second transistor are both electrically connected to the second switch. The emitters of the first transistor and the second transistor are grounded. The collector of the first transistor is electrically connected to the second terminal of the fourth resistor. The collector of the second transistor is electrically connected to the second terminal of the fifth resistor. The first terminals of the fourth resistor and the fifth resistor are both electrically connected to a second power supply. The second switch is used to electrically connect to the control unit.

[0015] In one possible implementation of the first aspect, the signal integration unit further includes a second AND gate, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third transistor, and a fourth transistor. The first input terminal of the second AND gate is electrically connected to the second terminal of the sixth resistor. The second input terminal of the second AND gate is electrically connected to the second switching unit and the second terminal of the seventh resistor, respectively. The output terminal of the second AND gate is electrically connected to the base of the third transistor. The collector of the third transistor is electrically connected to the base of the fourth transistor and the second terminal of the eighth resistor, respectively. The emitters of the third transistor and the fourth transistor are grounded. The collector of the fourth transistor is electrically connected to the second terminal of the ninth resistor and the control unit, respectively. The first terminals of the sixth resistor, the seventh resistor, the eighth resistor, and the ninth resistor are all electrically connected to a third power supply.

[0016] Secondly, embodiments of this application provide a projector, including the projector control circuit described in any one of the first aspects.

[0017] The beneficial effects of the embodiments in this application compared with the prior art are:

[0018] The projector control circuit provided in this application includes a switching unit, a conversion unit, a first switching unit, and a signal integration unit. The switching unit can receive a first control signal and a network signal. When the first control signal is a first preset level signal, it indicates that the projector is in a low-power true standby state. At this time, the switching unit switches to the first state and transmits the network signal to the conversion unit. The conversion unit converts the received network signal into a first level signal and transmits it to the first switching unit. The first switching unit can receive a second control signal, and when the second control signal is a second preset level signal, it transmits the first level signal to the signal integration unit. The signal integration unit outputs a first control trigger signal to the control unit based on the first and second level signals. Therefore, the projector control circuit provided in this application directly converts the network signal into a first level signal through the conversion unit. This level signal can be transmitted to the signal integration unit after being selected by the first switching unit, and then the signal integration unit transmits the first control trigger signal to the control unit. The entire process does not require signal parsing and processing by the network module. In low-power true standby mode, even if the network module stops working due to power failure, the network signal can still form a complete signal transmission link through the path selection of the switching unit, the signal conversion of the conversion unit, and the logic control of the first switching unit, ensuring that the power-on command can be effectively delivered to the control unit. Therefore, in the projector's low-power true standby mode, the projector can be powered on via the network port. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a circuit connection diagram of an existing projector control system;

[0021] Figure 2 This is a schematic diagram of the circuit connection of the existing conversion module;

[0022] Figure 3 This is a schematic block diagram of a projector control circuit provided in one embodiment of this application;

[0023] Figure 4 This is a circuit connection diagram of a switching unit provided in an embodiment of this application;

[0024] Figure 5 This is a circuit connection diagram of a conversion unit provided in an embodiment of this application;

[0025] Figure 6 This is a circuit connection diagram of the first switching unit provided in an embodiment of this application;

[0026] Figure 7 This is a circuit connection diagram of a signal integration unit provided in an embodiment of this application;

[0027] Figure 8 This is a schematic block diagram of a projector control circuit provided in another embodiment of this application;

[0028] Figure 9 This is a schematic block diagram of a transmitting unit and a receiving unit provided in an embodiment of this application;

[0029] Figure 10 This is a circuit connection diagram of the second switching unit provided in an embodiment of this application;

[0030] Figure 11 This is a circuit connection diagram of a signal integration unit provided in another embodiment of this application;

[0031] Figure 12 This is a schematic diagram of the circuit connection for a control unit to transmit signals to a port according to an embodiment of this application;

[0032] Figure 13 This is a schematic diagram of the application of a projector control circuit provided in an embodiment of this application.

[0033] In the diagram: 10, Projector control circuit; 101, Switching unit; 102, Conversion unit; 103, First switching unit; 104, Signal integration unit; 105, Transmitting unit; 106, Receiving unit; 107, Second switching unit. Detailed Implementation

[0034] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0035] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0036] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0037] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0038] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0039] In laser projector applications, especially in commercial ceiling-mounted and long-distance deployment scenarios, users have dual requirements for both low power consumption and energy efficiency, as well as remote controllability. Existing technologies, such as... Figure 1 As shown, although laser projectors support both serial and Ethernet control functions, in low-power true standby mode, to achieve energy-saving goals, the projector will cut off power to non-essential modules (such as the network module). This directly causes the power-on signal received by the PJlink Ethernet port to fail to be transmitted to the control unit due to the interruption of the transmission link, ultimately resulting in the projector being unable to power on via the Ethernet port in low-power true standby mode.

[0040] It should be noted that the back end of the control unit (System on Chip) connects to components such as a DLP (Digital Light Processing) chip, a DMD (Digital Micromirror Device) chip, a galvanometer, a lens, a power board, a laser, and a color wheel. Specifically, the Vbyone signal output from the SOC is transmitted to the DLP chip, which then communicates with the DMD chip via an HSSI (High-Speed ​​Serial Interface) signal. Simultaneously, the SOC emits PWM (Pulse Width Modulation) signals (for laser brightness control) and DUTY (Duty Cycle) signals (for laser switching control) to drive the laser. The laser light generated by the laser is processed by the color wheel and then transmitted to the DMD chip. The power board provides power to the SOC, DLP chip, and laser; the galvanometer converts the 2K signal into a 4K signal; and the lens projects the light signal onto the screen.

[0041] The circuit diagram for converting serial signals to TTL (Transistor-Transistor Logic) signals and then transmitting the TTL signals to the control unit is shown below. Figure 2 As shown. The serial port sends commands to the SOC: The serial port signal receives the power-on / off command (232_RXD_DB9_1) through pin3 of the RS232 DB9 port. This signal is then converted to a TTL signal by the conversion chip (MAX3232). During this process, the conversion chip's pin13 is the input, and pin12 is the output, transmitting the 232-RXD signal to the SOC. The SOC sends commands to the serial port: The conversion chip's pin11 receives the 232-TXD signal, and pin14 outputs the 232_TXD_DB9_1 signal, which is then transmitted to pin2 of the RS232 DB9 port.

[0042] To address the aforementioned issues, the projector control circuit provided in this application includes a switching unit, a conversion unit, a first switching unit, and a signal integration unit. The switching unit receives a first control signal and a network signal. When the first control signal is a first preset level signal, it indicates that the projector is in a low-power true standby state. At this time, the switching unit switches to the first state and transmits the network signal to the conversion unit. The conversion unit converts the received network signal into a first level signal and transmits it to the first switching unit. The first switching unit receives a second control signal and, when the second control signal is a second preset level signal, transmits the first level signal to the signal integration unit. The signal integration unit outputs a first control trigger signal to the control unit based on the first and second level signals. Therefore, the projector control circuit provided in this application directly converts the network signal into a first level signal through the conversion unit. This level signal can be transmitted to the signal integration unit after being selected by the first switching unit, and then the signal integration unit transmits the first control trigger signal to the control unit. The entire process does not require signal parsing and processing by the network module. In low-power true standby mode, even if the network module stops working due to power failure, the network signal can still form a complete signal transmission link through the path selection of the switching unit, the signal conversion of the conversion unit, and the logic control of the first switching unit, ensuring that the power-on command can be effectively delivered to the control unit. Therefore, in the projector's low-power true standby mode, the projector can be powered on via the network port.

[0043] To illustrate the technical solution described in this application, specific embodiments are provided below.

[0044] Figure 3 A schematic block diagram of a projector control circuit 10 according to an embodiment of this application is shown. See also Figure 3 As shown, the projector control circuit 10 includes a switching unit 101, a conversion unit 102, a first switch unit 103, and a signal integration unit 104. The conversion unit 102 is electrically connected to the switching unit 101 and the first switch unit 103, respectively. The signal integration unit 104 is electrically connected to the first switch unit 103. The signal integration unit 104 is used to be electrically connected to the conversion module and the control unit, respectively. The switching unit 101 is used to be electrically connected to the host network port and the control unit, respectively.

[0045] Specifically, the switching unit 101 can receive a first control signal and a network signal. When the first control signal is a first preset level signal, it indicates that the projector is in a low-power true standby state. At this time, the switching unit 101 switches to the first state and transmits the network signal to the conversion unit 102. The conversion unit 102 converts the received network signal into a first level signal and transmits it to the first switching unit 103. The first switching unit 103 can receive a second control signal, and when the second control signal is a second preset level signal, it transmits the first level signal to the signal integration unit 104. The signal integration unit 104 outputs a first control trigger signal to the control unit according to the first level signal and the second level signal. Thus, it can be seen that the projector control circuit 10 provided in this application embodiment directly converts the network signal into a first level signal through the conversion unit 102. This level signal can be transmitted to the signal integration unit 104 after being selected by the first switching unit 103, and then the signal integration unit 104 transmits the first control trigger signal to the control unit. The entire process does not require signal parsing and processing by the network module. In low-power true standby mode, even if the network module stops working due to power failure, the network signal can still form a complete signal transmission link through the path selection of the switching unit 101, the signal conversion of the conversion unit 102, and the logic control of the first switching unit 103, ensuring that the power-on command can be effectively delivered to the control unit. Therefore, in the projector's low-power true standby mode, the projector's power-on can be controlled via the network port.

[0046] It should be noted that both the first preset level signal and the second preset level signal can be high-level signals. When the first control signal is low-level, it indicates that the projector is in the power-on state. At this time, the switching unit 101 switches to the second state, directly transmitting the network signal to the control unit (the control unit can be the control motherboard SOC), thereby enabling power-off control of the projector via the network port. When the second control signal is low-level, the first switching unit 103 disconnects the connection between the conversion unit 102 and the signal integration unit 104, preventing the first level signal from being transmitted to the signal integration unit 104.

[0047] The following is combined Figures 4 to 7 The circuit diagrams of each unit provided provide a detailed description of the working process and control principle of the projector control circuit 10 provided in the embodiments of this application.

[0048] It should be noted that, Figure 3 The implementation method of the conversion module shown is the same as Figure 2 The circuit diagrams are completely identical, so I won't go into too much detail here. The only difference between the two is in the signal output path: Figure 2 The TTL signal output from the conversion chip is directly transmitted to the SOC, while Figure 3The TTL signal (i.e., the second-level signal) output by the intermediate conversion module is transmitted to the signal integration unit 104 of this application.

[0049] In one embodiment of this application, such as Figure 4 As shown, the switching unit 101 includes a first switching switch N43 and a second switching switch N44. Both the first switching switch N43 and the second switching switch N44 are electrically connected to the switching unit 102. Both the first switching switch N43 and the second switching switch N44 are used to electrically connect to the host network port and the control unit, respectively.

[0050] Specifically, the first switch N43 and the second switch N44 work together to achieve selective transmission of network signals. Pin 9 of both the first switch N43 and the second switch N44 are used to receive the first control signal. When the projector is powered on and the first control signal is low, pins 7 and 8 of the first switch N43 switch to pins 1 and 2. At this time, a power-off command can be directly transmitted to the control unit, enabling power-off via the network port. When the projector is in standby mode and the first control signal is high, pins 7 and 8 of the first switch N43 switch to pins 3 and 4. At this time, a power-on command transmits the network signal to the conversion unit 102. Through the coordinated action of the conversion unit 102, the first switch unit 103, and the signal integration unit 104, power-on via the network port is finally achieved in the projector's low-power true standby mode.

[0051] For example, both the first switch N43 and the second switch N44 can be selected as DIO3212MP10. The first switch N43 and the second switch N44 are externally equipped with resistors, inductors, and other components, which are standard circuit designs and will not be described in detail. The inductor connected between the Vcc pin and the 3.3V_Standby pin can be selected as BLM15PX121SN1D.

[0052] In one embodiment of this application, such as Figure 5 As shown, the conversion unit 102 includes a first conversion chip U1, which is electrically connected to the switching unit 101 and the first switching unit 103 respectively.

[0053] Specifically, the first conversion chip U1 is a network-to-serial converter chip used to convert network signals (MDI signals) into first-level signals (TTL signals). When pin 9 of the first switch N43 and the second switch N44 are both high-level signals, pins 8, 9, 10, and 11 of the first conversion chip U1 can receive the network signals transmitted by the first switch N43 and the second switch N44. After processing by the first conversion chip U1, the first-level signals are output at pins 6 and 7 and transmitted to the first switching unit 103.

[0054] It should be noted that the first conversion chip U1 is surrounded by resistors, capacitors and Z4, which are all standard circuit designs and will not be described in detail.

[0055] In one embodiment of this application, such as Figure 6 As shown, the first switching unit 103 includes a first switch N54, which is electrically connected to the conversion unit 102 and the signal integration unit 104 respectively.

[0056] Specifically, the first switch N54 primarily achieves selective transmission and electrical isolation of the serial port TTL signal through the second control signal. When pin 9 of the first switch N54 receives a low-level signal, pins 7 and 8 of the first switch N54 switch to pins 1 and 2, at which point the signal link is disconnected, and there is no connection with the downstream signal integration unit 104. When pin 9 of the first switch N54 receives a high-level signal, pins 7 and 8 of the first switch N54 switch to pins 3 and 4, enabling the first-level signal to be transmitted to the signal integration unit 104. The design of the first switch N54 not only avoids signal interference under different operating states through isolation but also accurately switches the signal transmission path according to the control signal, ensuring that the first-level signal can be effectively transmitted to the signal integration unit 104 when needed. This adapts to the control requirements of the device under different operating modes (such as normal operation or standby wake-up), improving the security and reliability of signal transmission.

[0057] For example, the first switch N54 can be a DIO3212MP10. The first switch N54 is surrounded by resistors and other components, which are all standard circuit designs and will not be described in detail.

[0058] In one embodiment of this application, such as Figure 7As shown, the signal integration unit 104 includes a first AND gate N41, a first resistor R1, a second resistor R2, and a third resistor R3. The first input terminal of the first AND gate N41 is electrically connected to the first switching unit 103, the second terminal of the first resistor R1, and the second terminal of the second resistor R2, respectively. The second input terminal of the first AND gate N41 is used to be electrically connected to the conversion module and the second terminal of the third resistor R3, respectively. The output terminal of the first AND gate N41 is used to be electrically connected to the control unit. The first terminals of the first resistor R1, the second resistor R2, and the third resistor R3 are all electrically connected to the first power supply.

[0059] Specifically, resistors R1, R2, and R3 are all pull-up resistors used to pull up the input level signal of the first AND gate N41. When the first input of the first AND gate N41 does not receive the first level signal, it is in a high-level state due to the pull-up effect of resistors R1 and R2. Only when the first input of the first AND gate N41 receives the first level signal will it be pulled low. Similarly, when the second input of the first AND gate N41 does not receive the second level signal, it is in a high-level state due to the pull-up effect of resistor R3. Only when the second input of the first AND gate N41 receives the second level signal will it be pulled low. Furthermore, the AND gate's operation logic is that the output is high only when both inputs are high. Therefore, when both inputs of the first AND gate N41 are high by default, receiving a low signal at either input will cause a change in the output level, thus altering the signal transmitted to the control unit. Furthermore, there is no mutual exclusion between the first and second level signals; they can independently trigger changes in the output state of the first AND gate N41. This ensures that control signals from different sources (such as network port signals and serial port signals) can act on the control unit individually or simultaneously, enabling flexible power-on control.

[0060] In existing technical solutions, video signals and control signals (such as serial port signals and network port control signals) are typically transmitted separately using multiple cables. For example, an HDMI (High-Definition Multimedia Interface) cable is used to transmit high-definition video signals, an RS-232 cable is used to transmit serial port control commands, and a network cable is used to transmit network port control signals. This multi-cable parallel solution not only increases wiring complexity (especially in commercial installations and long-distance deployments, where the cost of organizing, fixing, and maintaining multiple cables is high), but may also lead to decreased transmission stability due to signal interference between cables. Furthermore, the multi-interface hardware design increases the size and cost of the equipment.

[0061] Based on the above problems, in one embodiment of this application, such as Figure 8 As shown, the power-on / off control circuit also includes a transmitting unit 105, a receiving unit 106, and a second switching unit 107. The receiving unit 106 is electrically connected to the transmitting unit 105 and the second switching unit 107, respectively. The second switching unit 107 is electrically connected to the signal integration unit 104. The transmitting unit 105 is used to be electrically connected to the host video interface and the host serial port, respectively. The receiving unit 106 is used to be electrically connected to the control unit.

[0062] Specifically, the coordinated operation of the transmitting unit 105, the receiving unit 106, and the second switching unit 107 achieves both integrated transmission of multiple signals and ensures signal controllability in low-power scenarios. The transmitting unit 105 integrates video and serial signals into a network signal, transmitting it via a single network cable to simplify cabling. The receiving unit 106 is responsible for restoring the network signal to a video signal (for processing by the control unit) and a third control signal, while also supporting long-distance transmission to adapt to remote deployment scenarios. The second switching unit 107 selectively transmits the third level signal to the signal integration unit 104 based on the level of the third control signal, avoiding unnecessary signal transmission from affecting the low-power state while ensuring that effective control signals can participate in the integration. Finally, the signal integration unit 104 combines multi-path signal output to control trigger signals, reducing the number of cables and improving transmission efficiency while also ensuring remote control capabilities in low-power true standby mode, significantly optimizing the device's cabling complexity and scenario adaptability.

[0063] It should be noted that the third preset level signal can be a high level signal. When the third control signal is a low level signal, the second switch unit 107 disconnects the connection between the receiving unit 106 and the signal integration unit 104, and the third level signal cannot be transmitted to the signal integration unit 104.

[0064] It should be noted that the receiving unit 106 is integrated on the TV (Television) motherboard.

[0065] In one embodiment of this application, such as Figure 9 As shown, the transmitting unit 105 includes a second conversion chip and a transmitting chip. The second conversion chip is electrically connected to the transmitting chip and the host serial port, respectively. The transmitting chip is electrically connected to the receiving unit 106. The receiving unit 106 includes a receiving chip, which is electrically connected to the transmitting unit 105, the control unit, and the second switching unit 107, respectively.

[0066] Specifically, the second conversion chip and Figure 2The conversion chip (MAX3232) shown has the same function, used to convert serial port signals into TTL signals for transmission to the transmitting chip. The transmitting chip receives video signals and TTL signals, and outputs network signals to the receiving chip in the receiving unit 106 via a single network cable through the RJ45 network port, so that the receiving chip can restore the video signals and the third control signals according to the network signals.

[0067] For example, both the transmitter and receiver chips can be selected from the Valens VS100 chipset, with the transmitter chip being the VS100TX and the receiver chip being the VS100RX. The Valens VS100 chipset is a highly integrated circuit capable of converging and extending audio and video signals through a single standard category cable. This chipset supports the transmission of uncompressed HDMI 2.0 signals (18Gbps bandwidth, supporting 4K@60Hz 4:4:4 format), high-fidelity audio, 1Gbps Ethernet data, USB (Universal Serial Bus) 2.0 signals, control signals, and power, with a transmission distance of up to 100 meters (328 feet) via CAT (Category) cable and no latency. Furthermore, it complies with the Hdbase-T 1.0 specification, ensuring interoperability with existing equipment installation systems. The Valens VS100 chipset features port duality, allowing devices to be flexibly configured as either transmitters (Tx) or receivers (Rx). This enables manufacturers to adopt a single hardware SKU (Stock Keeping Unit) design, which not only simplifies inventory management during installation but also effectively saves costs.

[0068] In one embodiment of this application, such as Figure 10 As shown, the second switching unit 107 includes a second switch N55, a first transistor V58, a second transistor V59, a fourth resistor R4, and a fifth resistor R5. The base of the first transistor V58 and the collector of the second transistor V59 are both electrically connected to the receiving unit 106. The collector of the first transistor V58 and the base of the second transistor V59 are both electrically connected to the second switch N55. The emitters of the first transistor V58 and the second transistor V59 are grounded. The collector of the first transistor V58 is electrically connected to the second terminal of the fourth resistor R4. The collector of the second transistor V59 is electrically connected to the second terminal of the fifth resistor R5. The first terminals of the fourth resistor R4 and the fifth resistor R5 are both electrically connected to the second power supply. The second switch N55 is used to electrically connect to the control unit.

[0069] Specifically, the working principle of the second switch N55 is exactly the same as that of the first switch N54. When pin 9 of the second switch N55 receives a low-level signal, pins 7 and 8 of the second switch N55 switch to pins 1 and 2, at which point the signal link is broken and there is no connection with the downstream signal integration unit 104. When pin 9 of the second switch N55 receives a high-level signal, pins 7 and 8 of the second switch N55 switch to pins 3 and 4, and the third-level signal is transmitted in reverse to the signal integration unit 104 through the first transistor V58 and the second transistor V59. The first transistor V58 and the second transistor V59 act as switching devices, and the fourth resistor R4 and the fifth resistor R5 act as pull-up resistors, providing a stable high-level reference for the transistor collector. When the first transistor V58 or the second transistor V59 is turned on, the collector of the first transistor V58 or the collector of the second transistor V59 is pulled low, thereby changing the signal output from pin 7 of the second switch N55 and the signal transmitted to the receiving unit 106.

[0070] For example, the designer can select the type and model of the first transistor V58 and the second transistor V59. For instance, the first transistor V58 and the second transistor V59 can both be NPN transistors, and the model of the first transistor V58 and the second transistor V59 can both be MMBT3904LT1.

[0071] In one embodiment of this application, such as Figure 11 As shown, the signal integration unit 104 also includes a second AND gate N42, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a third transistor V33, and a fourth transistor V32. The first input terminal of the second AND gate N42 is electrically connected to the second terminal of the sixth resistor R6. The second input terminal of the second AND gate N42 is electrically connected to the second switching unit 107 and the second terminal of the seventh resistor R7, respectively. The output terminal of the second AND gate N42 is electrically connected to the base of the third transistor V33. The collector of the third transistor V33 is electrically connected to the base of the fourth transistor V32 and the second terminal of the eighth resistor R8, respectively. The emitters of the third transistor V33 and the fourth transistor V32 are grounded. The collector of the fourth transistor V32 is electrically connected to the second terminal of the ninth resistor R9 and the control unit, respectively. The first terminals of the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are all electrically connected to the third power supply.

[0072] Specifically, resistors R6, R7, R8, and R9 are all pull-up resistors. Transistors V33 and V32 act as switching devices, used to output control trigger signals to the control unit based on the logic signal output from the second AND gate N42. When the logic signal output from the second AND gate N42 is high, transistor V33 is turned on, pulling down the base of transistor V32, causing V32 to turn off. When the logic signal output from the second AND gate N42 is low, transistor V33 is turned off, pulling up the base of transistor V32, causing V32 to turn on, thus pulling down the collector voltage of transistor V32. Therefore, the combined action of transistors V33 and V32 converts the logic signal output from the second AND gate N42 into a U3RT signal, which is then transmitted to the control unit.

[0073] Resistors R6 (sixth) and R7 (seventh) are used to pull up the input level of the second AND gate N42, while resistors R8 (eighth) and R9 (ninth) provide a stable high-level reference for the transistor collector. When the first input of the second AND gate N42 does not receive a low-level signal from the first AND gate N41, it remains high due to the pull-up effect of resistor R6. Only when the first input of the second AND gate N42 receives a high-level signal from the first AND gate N41 will it be pulled low. Similarly, when the second input of the second AND gate N42 does not receive a third-level signal, it remains high due to the pull-up effect of resistor R7. Only when the second input of the second AND gate N42 receives a third-level signal will it be pulled low. Furthermore, since the AND gate's operation logic is that the output is only high when both inputs are high, when both inputs of the second AND gate N42 are high by default, if either input receives a signal (pulled low), the output's level will change. This, in turn, through the combined action of the third transistor V33 and the fourth transistor V32, will cause a change in the signal transmitted to the control unit.

[0074] Meanwhile, there is no mutual exclusion between the first level signal, the second level signal, and the third level signal. The three can independently trigger the change of the output state of the first AND gate N41 and the second AND gate N42, ensuring that control signals from different sources can act on the control unit separately or simultaneously, thereby achieving flexible power-on control.

[0075] It should be noted that the control unit can also send commands to three ports, as shown in the following figure. Figure 12As shown, the control unit outputs the U3RT signal, which is converted into three signals by transistors V62 and V63 and sent to the Rs232 serial port (SOC-UART-TX), the PJlink Ethernet port (9120-UART-RXD), and the HDbase-T serial port (HDBT-UART-RXD), respectively. When the U3RT signal is high, V62 conducts, pulling down the base of V63, and V63 is cut off. When the U3RT signal is low, V62 is cut off, pulling up the base of V63, and V63 conducts, pulling down the collector voltage of V63. Therefore, the coordinated action of V62 and V63 can convert the U3RT signal into three signals, which are then transmitted to the three ports respectively.

[0076] For example, designers can select the type and model of the third transistor V33, the fourth transistor V32, V62 and V63. For instance, they can select that the third transistor V33, the fourth transistor V32, V62 and V63 are all NPN transistors, and they can select that the model of the third transistor V33, the fourth transistor V32, V62 and V63 are all MMBT3904LT1.

[0077] For example, such as Figure 13 As shown, the host video interface is the host HDMI, the host serial port is the host RS232 serial port, the host network port is the host PJlink network port, the transmitting unit 105 is an Hdbase transmitting module, the receiving unit 106 is an Hdbase receiving module, the conversion module is a serial to TTL, the conversion unit 102 is a network to serial chip, and the control unit is a SOC.

[0078] This application also discloses a projector, including the aforementioned projector control circuit 10. Using this projector control circuit 10, the projector can achieve remote power-on via Ethernet port while maintaining a low-power true standby state. It is also compatible with non-exclusive multi-path control signals, enabling the device to meet both energy-saving requirements and improved remote controllability. This is particularly suitable for scenarios such as commercial hoisting and long-distance deployment where convenient equipment management and low power consumption are both essential.

[0079] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A projector control circuit, characterized by comprising: It includes a switching unit, a conversion unit, a first switching unit, and a signal integration unit. The conversion unit is electrically connected to the switching unit and the first switching unit, respectively. The signal integration unit is electrically connected to the first switching unit. The signal integration unit is used to electrically connect to the conversion module and the control unit, respectively. The switching unit is used to electrically connect to the host network port and the control unit, respectively. The switching unit is used to receive a first control signal and a network signal, and transmits the network signal to the conversion unit when the first control signal is a first preset level signal; the conversion unit is used to convert the network signal into a first level signal, and transmit the first level signal to the first switching unit; the first switching unit is used to receive a second control signal, and transmit the first level signal to the signal integration unit when the second control signal is a second preset level signal. The signal integration unit is used to receive the first level signal and the second level signal output by the conversion module, and output a first control trigger signal to the control unit according to the first level signal and the second level signal.

2. The projector control circuit according to claim 1, wherein, The switching unit includes a first switching switch and a second switching switch. Both the first switching switch and the second switching switch are electrically connected to the conversion unit. Both the first switching switch and the second switching switch are used to electrically connect to the host network port and the control unit, respectively.

3. The projector control circuit of claim 1, wherein, The conversion unit includes a first conversion chip, which is electrically connected to the switching unit and the first switching unit respectively.

4. The projector control circuit of claim 1, wherein, The first switching unit includes a first switch, which is electrically connected to the conversion unit and the signal integration unit respectively.

5. The projector control circuit of claim 1, wherein, The signal integration unit includes a first AND gate, a first resistor, a second resistor, and a third resistor. The first input terminal of the first AND gate is electrically connected to the first switching unit, the second terminal of the first resistor, and the second terminal of the second resistor, respectively. The second input terminal of the first AND gate is used to be electrically connected to the conversion module and the second terminal of the third resistor, respectively. The output terminal of the first AND gate is used to be electrically connected to the control unit. The first terminals of the first resistor, the second resistor, and the third resistor are all electrically connected to the first power supply.

6. The projector control circuit according to any one of claims 1 to 5, characterized by The projector control circuit further includes a transmitting unit, a receiving unit, and a second switching unit. The receiving unit is electrically connected to the transmitting unit and the second switching unit, respectively. The second switching unit is electrically connected to the signal integration unit. The transmitting unit is used to electrically connect to the host video interface and the host serial port, respectively. The receiving unit is used to electrically connect to the control unit. The transmitting unit is used to output a network signal to the receiving unit based on the first video signal output from the host video interface and the serial port signal output from the host serial port; the receiving unit is used to output a second video signal to the control unit based on the network signal, and output a third level signal to the second switching unit; the second switching unit is used to receive a third control signal, and transmit the third level signal to the signal integration unit when the third control signal is a third preset level signal; the signal integration unit is used to output a second control trigger signal to the control unit based on the first level signal, the second level signal and the third level signal.

7. The projector control circuit according to claim 6, wherein, The transmitting unit includes a second conversion chip and a transmitting chip. The second conversion chip is electrically connected to the transmitting chip and the host serial port, respectively. The transmitting chip is electrically connected to the receiving unit. The receiving unit includes a receiving chip, which is electrically connected to the transmitting unit, the control unit, and the second switching unit.

8. The projector control circuit of claim 6, wherein, The second switching unit includes a second switch, a first transistor, a second transistor, a fourth resistor, and a fifth resistor. The base of the first transistor and the collector of the second transistor are both electrically connected to the receiving unit. The collector of the first transistor and the base of the second transistor are both electrically connected to the second switch. The emitters of the first transistor and the second transistor are grounded. The collector of the first transistor is electrically connected to the second terminal of the fourth resistor. The collector of the second transistor is electrically connected to the second terminal of the fifth resistor. The first terminals of the fourth resistor and the fifth resistor are both electrically connected to a second power supply. The second switch is used to electrically connect to the control unit.

9. The projector control circuit of claim 6, wherein, The signal integration unit further includes a second AND gate, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third transistor, and a fourth transistor. The first input terminal of the second AND gate is electrically connected to the second terminal of the sixth resistor. The second input terminal of the second AND gate is electrically connected to the second switching unit and the second terminal of the seventh resistor, respectively. The output terminal of the second AND gate is electrically connected to the base of the third transistor. The collector of the third transistor is electrically connected to the base of the fourth transistor and the second terminal of the eighth resistor, respectively. The emitters of the third transistor and the fourth transistor are grounded. The collector of the fourth transistor is electrically connected to the second terminal of the ninth resistor and the control unit, respectively. The first terminals of the sixth resistor, the seventh resistor, the eighth resistor, and the ninth resistor are all electrically connected to a third power supply.

10. A projector characterized by comprising: Includes the projector control circuit as described in any one of claims 1-9.

Images