A current detection chip

Abstract

The utility model provides a current detection chip, including dual power supply module, current detection module, protection module and parallel expansion interface module, dual power supply module and current detection module, protection module connect, current detection module and protection module connect, current detection module, protection module and parallel expansion interface module connect, the utility model has realized the simplification design, has the dual power supply redundancy and parallel expansion ability of a kind of current detection chip.

Description

Technical Field

[0001] This utility model relates to the field of chip design technology, and in particular to a current detection chip. Background Technology

[0002] In intelligent power management systems (such as USB-PD fast charging and battery management systems), real-time current monitoring and multiple fault protections are core functions for ensuring system safety. Traditional solutions rely on discrete component combinations. For example, current sensing typically uses an external precision resistor (typically 5mΩ) paired with an operational amplifier, but low-temperature drift resistors are expensive (>$0.5 / piece), and small current sensing is susceptible to noise interference, resulting in errors exceeding ±5%. Hall effect sensors can detect currents in the mA to A range, but the failure of μA-level standby current sensing is a critical requirement for IoT devices. According to statistics from the IEEE TPEL journal (2022), these defects account for 23% of industrial power system failures caused by current sensing failure leading to component damage.

[0003] Traditional solutions often employ monolithic integration (such as the ADI LTC2941), which simplifies the design but lacks dual power supply redundancy and parallel expansion capabilities. Therefore, there is an urgent need for a well-designed chip with a wide current detection range. Utility Model Content

[0004] The purpose of this invention is to provide a current detection chip to solve the problems existing in the background technology.

[0005] Therefore, the present invention adopts the following technical solution:

[0006] A current detection chip includes a dual power supply module, a current detection module, a protection module, and a parallel expansion interface module; the dual power supply module is connected to the current detection module and the protection module, the current detection module is connected to the protection module, and the current detection module, the protection module, and the parallel expansion interface module are connected.

[0007] The dual power supply module supports Vin and Vcc inputs. The Vin input range is 5V to 24V, and the Vcc input is the system power supply of 3.3V. When Vin = 0, the power supply is maintained by Vcc.

[0008] The current sensing module supports a wide range of current sensing from 5μA to 3.0A;

[0009] The multi-level status indicator pin (Flag) outputs four levels of voltage: Vcc, Vcc-0.3V, Vcc-0.6V, and 0V, which correspond to the combined state of the Vout detection flag and the Sensor detection flag, respectively.

[0010] The protection module integrates overcurrent protection, overvoltage protection, and temperature protection; overcurrent protection is triggered when the current is >3.3A; temperature protection operates normally from -20℃ to 120℃, shuts off when the temperature is >125℃, and resumes when the temperature is <110℃.

[0011] The parallel expansion interface module supports connecting the Vout pins of two chips in parallel to improve the output current capability.

[0012] Furthermore, the current detection module includes an automatic mode switching circuit that dynamically selects the detection mode based on the Vin voltage.

[0013] When Vin≥4.5V, a high-voltage bias current mirror is used for current sampling;

[0014] When Vin = 0, switch to low-voltage bias current to achieve μA-level detection.

[0015] Furthermore, the protection module integrates Hiccup hiccup protection logic, which shuts down the power transistor when overcurrent lasts for 2.5ms or when OTP is triggered, and automatically restarts after 4 seconds; it also supports disabling Hiccup mode by adjusting the bit, relying solely on OTP protection.

[0016] Furthermore, the logic of the multi-level state indicator pin Flag is jointly determined by the Vout detection flag and the Sensor detection flag:

[0017] When there is no Vout / Sensor signal, the Flag state voltage is 0V; when only the Sensor signal is valid, the Flag state voltage is Vcc-0.6V; when only the Vout signal is valid, the Flag state voltage is Vcc-0.3V; when both Vout and Sensor signals are valid, the Flag state voltage is Vcc.

[0018] Furthermore, when at least two chips are connected in parallel, the master chip outputs a full-state Flag signal, while the slave chip outputs a simplified Flag signal.

[0019] Compared with related technologies, the current detection chip provided by this utility model has the following beneficial effects:

[0020] This current detection chip supports an extremely wide current detection range from 5μA to 3.0A, meeting application requirements from microampere-level microcurrents to ampere-level large currents. Through an automatic mode switching circuit, the optimal detection mode is dynamically selected based on the input voltage Vin (high voltage bias for Vin≥4.5V, low voltage bias for Vin=0), ensuring accurate μA-level detection across the entire operating voltage range (especially at low or zero voltage).

[0021] This solution integrates a triple protection mechanism: precise overcurrent protection (triggered by >3.3A), overvoltage protection, and wide temperature range protection (normal operation from -20℃ to 120℃). Overtemperature protection shuts off above 125℃ and recovers below 110℃, effectively preventing chip overheating damage. It employs Hiccup hiccup protection logic: when overcurrent lasts for 2.5ms or an OTP is triggered, the power transistor is intelligently shut down and attempts to automatically recover after 4 seconds, avoiding permanent lock-up and improving system robustness and fault tolerance. This mode can be flexibly disabled via bit adjustment.

[0022] This innovative multi-level status indicator pin (Flag) can output four clear status levels (Vcc, Vcc-0.3V, Vcc-0.6V, 0V) with a single pin, corresponding to different valid combinations of Vout detection flag and Sensor detection flag (both valid, only Vout valid, only Sensor valid, and both invalid). This greatly simplifies the design of external monitoring circuits and improves the efficiency and intuitiveness of status recognition.

[0023] This solution provides a parallel expansion interface module: supporting direct parallel connection of the Vout pins of two chips, significantly improving the total output current capability of the system and meeting the needs of higher power applications. Intelligent master-slave status management: When operating in parallel, the master chip outputs a full-state Flag signal, while the slave chip outputs a simplified Flag signal, ensuring the coordination and accuracy of the status indication of the parallel system. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the overall framework of this utility model;

[0025] Figure 2 This is a schematic diagram of the protection module of this utility model;

[0026] Figure 3 This is a schematic diagram of the single-chip application circuit of this utility model;

[0027] Figure 4 This is a schematic diagram of the dual-chip parallel application circuit of this utility model;

[0028] Figure 5 This is a schematic diagram of the circuit framework of the dual power supply module chip of this utility model. Detailed Implementation

[0029] The embodiments of this utility model are described in detail below, wherein the same or similar reference numerals denote the same or similar elements or elements with similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model and should not be construed as limiting this utility model.

[0030] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless defined as herein. Furthermore, the structures, modules, and model methods not described in detail herein can all be implemented using conventional technical means, and therefore will not be described in detail further. It should also be noted that the components described later can be commercially available components as needed, therefore specific model numbers are not specified, and the corresponding component pin numbers can be randomly shuffled, excluding specific pins; the others are not limited, but only serve to illustrate that different pins are connected.

[0031] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0032] As shown in the figure, a current detection chip includes a dual power supply module, a current detection module, a protection module, and a parallel expansion interface module; the dual power supply module is connected to the current detection module and the protection module, the current detection module is connected to the protection module, and the current detection module, the protection module, and the parallel expansion interface module are connected.

[0033] The dual power supply module supports Vin and Vcc inputs. The Vin input range is 5V to 24V, and the Vcc input is the system power supply of 3.3V. When Vin = 0, the power supply is maintained by Vcc. This ensures that when the main power supply Vin fails or becomes zero, the system power supply Vcc can maintain the continuous operation of the chip's critical functions (especially the low-voltage detection mode), thus guaranteeing the system's critical monitoring capabilities under abnormal power conditions.

[0034] A simplified circuit diagram of the specific dual power supply module chip is shown below. Figure 5 The diagram shows (the specific component models to be described later should be specified; however, commonly available components can be used depending on the actual situation, so specific model details are not provided. The corresponding component pin numbers can be randomly generated and are not limited; they are only used to illustrate that components connected to different pins are not necessarily the same), including resistors, comparators, MOSFETs, constant current source module A, and a logic control unit. One end of resistor R1 is connected to the main power supply Vin and to the drain of the MOSFET. The other end of resistor R1 is connected to one end of resistor R2 and the non-inverting input of comparator VS1. The other end of resistor R2 is grounded. The inverting input of comparator VS1 is connected to VREF. The output of operational amplifier IC1 is connected to logic control unit U1.

[0035] One end of resistor R3 is connected to Vcc, and the other end of resistor R3 is connected to one end of resistor R4 and the non-inverting input of comparator VS2. The other end of resistor R4 is grounded. The inverting input of comparator VS2 is connected to VREF. The output of comparator VS2 is connected to logic control unit U1.

[0036] In other words, resistors R1 and R2 are used as voltage dividers for the main power supply Vin, and resistors R3 and R4 are used as voltage dividers for Vcc. The two are compared and then fed into the logic control unit.

[0037] One end of the logic control unit U1 is connected to the gate (G) of the MOSFET. The source (S) of the MOSFET is connected to the non-inverting input and output Vout of comparator VS3. The output of comparator VS3 is connected to the logic control unit U2. Comparator VS3 is used to monitor the stability of the Vout voltage. If the voltage is too low, it will trigger the reset logic of the logic control unit and output the corresponding signal Flag.

[0038] Another pin of the logic control unit U1 is connected to the non-inverting input of comparator VS4, and the output of comparator VS4 is connected to the logic control unit U2. The logic control unit U2 outputs an indicator signal Flag.

[0039] The two ends of the constant current source module A are connected to the non-inverting inputs of comparator VS3 and comparator VS4.

[0040] When the logic control unit U1 receives a high level from comparator VS1, it outputs a drive signal to the gate (G) of the MOSFET, turning on the MOSFET, and the entire system is powered by the adapter. When Vin < VREF is detected, the MOSFET is turned off for physical isolation.

[0041] The entire workflow is as follows:

[0042] 1) When the adapter is powered and Vin>4.5V, the high current working mode is started and MOSFET MOS1 is turned on.

[0043] 2) If Vin <= 4.5V and Vin = 3.3V, then it will enter the low current mode (i.e., it will operate under constant current source module A).

[0044] 3) If Vin < 4.5, Vcc = 0, the chip stops working.

[0045] The current sensing module supports a wide range of current sensing from 5μA to 3.0A, meeting diverse application needs from weak standby current to large operating current.

[0046] The multi-level status indicator pin (Flag) outputs four levels: Vcc, Vcc-0.3V, Vcc-0.6V, and Vcc-0.9V, corresponding to the combined states of the Vout detection flag and the Sensor detection flag, respectively. This solution outputs four distinct status levels (Vcc, Vcc-0.3V, Vcc-0.6V, Vcc-0.9V) through only one multi-level status indicator pin (Flag), corresponding to different combined states of the Vout detection flag and the Sensor detection flag (no signal, Sensor only, Vout only, and both), which greatly simplifies the external circuit design and improves the efficiency and intuitiveness of status monitoring.

[0047] The protection module integrates overcurrent protection, overvoltage protection, and temperature protection; overcurrent protection is triggered when the current is >3.3A; temperature protection operates normally from -20℃ to 120℃, shuts off when the temperature is >125℃, and resumes when the temperature is <110℃; significantly improving the reliability and safety of the system and preventing damage to devices or the system due to abnormal current, voltage, or temperature.

[0048] The parallel expansion interface module supports connecting the Vout pins of two chips in parallel to improve output current capability. This meets the needs of higher power applications and enhances the chip's scalability.

[0049] Preferably, the current detection module includes an automatic mode switching circuit that dynamically selects the detection mode based on the Vin voltage.

[0050] When Vin≥4.5V, a high-voltage bias current mirror is used for current sampling;

[0051] When Vin = 0, switch to low-voltage bias current to achieve μA-level detection.

[0052] That is, by means of an automatic mode switching circuit, the optimal detection mode is dynamically selected according to the input voltage Vin (high voltage bias current mirror is used when Vin≥4.5V, and low voltage bias current is used when Vin=0), which ensures that high-precision current detection can be achieved in the entire input voltage range (especially in the scenario where Vin=0), especially the key μA-level micro current detection capability, without the need for external intervention or complex configuration.

[0053] Preferably, the protection module integrates Hiccup protection logic, which shuts down the power transistor when overcurrent lasts for 2.5ms or when OTP is triggered, and automatically restarts after 4 seconds. It also supports disabling Hiccup mode via a setting adjustment, relying solely on OTP protection. Employing Hiccup protection logic effectively avoids permanent lock-up, allowing the system to automatically resume normal operation after a brief fault (such as a load transient impact) is cleared, greatly improving system robustness and availability. Furthermore, the support for disabling Hiccup mode via a setting adjustment, relying solely on OTP protection (i.e., lock-up mode), provides flexible configuration options for different application scenarios (such as high-security scenarios requiring permanent shutdown).

[0054] Preferably, the logic of the multi-level state indicator pin Flag is jointly determined by the Vout detection flag and the Sensor detection flag:

[0055] When there is no Vout / Sensor signal, the Flag state voltage is 0V; when only the Sensor signal is active, the Flag state voltage is Vcc - 0.6V; when only the Vout signal is active, the Flag state voltage is Vcc - 0.3V; and when both Vout and Sensor signals are active, the Flag state voltage is Vcc. This significantly reduces the pin resources required for state indication and simplifies the process of identifying and decoding composite states for external microcontrollers or other monitoring circuits.

[0056] Preferably, when at least two chips are connected in parallel, the master chip outputs a full-state flag signal, while the slave chips output simplified flag signals. This design avoids potential conflicts or confusion that may arise from multiple chips outputting complete state signals, optimizes the state reporting mechanism of the parallel system, and makes system-level state monitoring clearer and more reliable.

[0057] Specifically, such as Figure 3 , 4 As shown, the logic tables for the multi-level status indicator pins (Flag) in single-chip and dual-chip circuit designs are as follows: Table 1 shows the logic table for a typical single-chip application circuit. Table 2 shows the master chip logic table for a typical dual-chip application circuit, and Table 3 shows the slave chip logic table for a typical dual-chip application circuit.

[0058] 0 none none 0 1 none have VCC-0.6 2 have none VCC-0.3 3 have have VCC

[0059] Table 1

[0060] 0 none none 0 1 none have VCC-0.6 2 have none VCC-0.3 3 have have VCC

[0061] Table 2

[0062] 0 none none 0 1 have none VCC-0.3

[0063] Table 3

[0064] In summary, this current detection chip achieves ultra-high precision and ultra-wide range current detection capabilities through innovative technologies such as wide-range adaptive detection, multiple intelligent protection, efficient multi-level status indication, flexible parallel expansion, and dual-power redundant power supply. It also provides excellent system reliability, intuitive status feedback, and strong scalability, making it highly suitable for complex electronic systems that require precise current monitoring, high-reliability protection, and potential power expansion.

[0065] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0066] The several embodiments described in this application are quite specific and detailed, but they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and refinements should also be considered within the scope of protection of this utility model. Therefore, the scope of protection of this patent application should be determined by the appended claims.

Claims

1. A current detection chip, characterized in that: It includes a dual power supply module, a current detection module, a protection module, and a parallel expansion interface module; the dual power supply module is connected to the current detection module and the protection module, the current detection module is connected to the protection module, and the current detection module, the protection module, and the parallel expansion interface module are connected. The dual power supply module supports Vin and Vcc inputs. The Vin input range is 5V to 24V, and the Vcc input is the system power supply of 3.3V. When Vin = 0, the power supply is maintained by Vcc. The current sensing module supports a wide range of current sensing from 5μA to 3.0A; The multi-level status indicator pin (Flag) outputs four levels of voltage: Vcc, Vcc-0.3V, Vcc-0.6V, and 0V, which correspond to the combined state of the Vout detection flag and the Sensor detection flag, respectively. The protection module integrates overcurrent protection, overvoltage protection, and temperature protection; overcurrent protection is triggered when the current is >3.3A; temperature protection operates normally from -20℃ to 120℃, shuts off when the temperature is >125℃, and resumes when the temperature is <110℃. The parallel expansion interface module supports connecting the Vout pins of two or more chips in parallel to improve the output current capability.

2. The current detection chip according to claim 1, characterized in that: The current detection module includes an automatic mode switching circuit that dynamically selects the detection mode based on the Vin voltage. When Vin≥4.5V, a high-voltage bias current mirror is used for current sampling; When Vin = 0, switch to low-voltage bias current to achieve μA-level detection.

3. A current detection chip according to claim 1, characterized in that: The protection module integrates Hiccup hiccup protection logic, which shuts down the power transistor when overcurrent lasts for 2.5ms or when OTP is triggered, and automatically restarts after 4 seconds; it also supports disabling Hiccup mode by adjusting the setting, relying solely on OTP protection.

4. A current detection chip according to claim 1, characterized in that: The logic of the multi-level status indicator pin Flag is determined by the Vout detection flag and the Sensor detection flag: when there is no Vout / Sensor signal, the Flag status voltage is 0V; when only the Sensor signal is valid, the Flag status voltage is Vcc-0.6V; when only the Vout signal is valid, the Flag status voltage is Vcc-0.3V; when both Vout and Sensor signals are valid, the Flag status voltage is Vcc.

5. A current detection chip according to claim 4, characterized in that: When at least two chips are connected in parallel, the master chip outputs a full-state Flag signal, while the slave chip outputs a simplified Flag signal.

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