Array substrate and display device

Abstract

An array substrate and a display device. The array substrate comprises a substrate, a transistor, an organic insulating layer, a passivation layer, a pixel electrode and an improvement structure. The organic insulating layer is provided with a first via hole, the passivation layer is provided with a second via hole, the first via hole and the second via hole are in communication, and the second via hole exposes part of the transistor. Part of the pixel electrode is located in the second via hole and is connected with the transistor. The improvement structure comprises a first profile, a second profile and a transition profile connected with each other. The first profile and the second profile have a vertical interval along a direction perpendicular to the substrate, and the first profile and the second profile have a horizontal interval between the orthographic projections on the substrate. The orthographic projection of the improvement structure on the substrate partially overlaps with the orthographic projection of the first via hole on the substrate. The vertical interval is greater than or equal to 0.5 microns, which can improve display defects such as black spots.

Description

Technical Field

[0001] This utility model relates to, but is not limited to, the field of display technology, and in particular to an array substrate and a display device. Background Technology

[0002] Liquid crystal displays (LCDs) are a common type of display. An LCD uses two polarized materials with a liquid crystal solution between them. When a voltage is applied to each polarized material, an electric field is created between them, causing the liquid crystals to rearrange to block or allow light to pass through. Therefore, each liquid crystal acts like a venetian blind, allowing light to pass through while simultaneously blocking it. Currently, LCDs are being developed towards being lighter, thinner, shorter, and smaller.

[0003] However, in actual production and application, LCD screens sometimes have display defects such as black spots or black lines. Utility Model Content

[0004] This utility model provides an array substrate and a display device that can solve display defects such as black spots or black lines that exist in existing liquid crystal displays.

[0005] On one hand, this utility model embodiment provides an array substrate, comprising: Substrate; Transistors are located on the substrate; An organic insulating layer and a passivation layer are sequentially stacked on the side of the transistor away from the substrate. The organic insulating layer has a first via, and the passivation layer has a second via. The orthographic projection of the first via onto the plane of the substrate and the orthographic projection of the second via onto the plane of the substrate at least partially overlap. The first via and the second via are connected, and the second via exposes a portion of the transistor. A pixel electrode, at least partially located on the side of the passivation layer away from the substrate, is located within the second via and connected to the transistor. The improved structure includes a first profile, a second profile, and a transition profile connected together. The first profile and the second profile have a vertical spacing along a direction perpendicular to the plane of the substrate, and the first profile and the second profile have a horizontal spacing between their orthographic projections onto the plane of the substrate. The first profile and the second profile are connected via the transition profile. The orthographic projection of the improved structure onto the plane of the substrate overlaps with the orthographic projection of the first via onto the plane of the substrate. The vertical spacing is greater than or equal to 0.5 micrometers.

[0006] In some exemplary embodiments, a portion of the passivation layer on the side away from the substrate forms the first profile, a portion of the pixel electrode on the side away from the substrate forms the second profile, and the second profile is closer to the substrate than the first profile.

[0007] In some exemplary embodiments, the first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the first hole top being farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falling within the orthographic projection range of the first hole top onto the plane of the substrate; the second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the second hole top being farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falling within the orthographic projection range of the second hole top onto the plane of the substrate; The orthographic projection of the bottom of the second hole onto the plane of the substrate falls within the orthographic projection range of the first via onto the plane of the substrate, and the orthographic projection of the top of the second hole onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

[0008] In some exemplary embodiments, the orthographic projection of the bottom of the second hole onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate, the orthographic projection of the top of the second hole onto the plane of the substrate partially overlaps with the orthographic projection of the top of the first hole onto the plane of the substrate, and the orthographic projection of the top of the second hole onto the plane of the substrate partially overlaps with the orthographic projection of the bottom of the first hole onto the plane of the substrate.

[0009] In some exemplary embodiments, the pixel electrode includes a connected portion and a plurality of comb portions, the plurality of comb portions being arranged side by side at intervals and extending in a direction away from the connected portion; the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of the connected portion on the plane of the substrate.

[0010] In some exemplary embodiments, the pixel electrode includes a connected connection portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connection portion; the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of the connection portion on the plane of the substrate, and the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of at least one of the comb teeth on the plane of the substrate.

[0011] In some exemplary embodiments, the pixel electrode includes a connected connection portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connected portion; the connected portion includes a plurality of connected side surfaces, two adjacent side surfaces being connected to form an intersection area, and at least one of the intersection areas having its orthographic projection onto the plane of the substrate falling within the orthographic projection range of the top of the second hole onto the plane of the substrate.

[0012] In some exemplary embodiments, the first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the first hole top being farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falling within the orthographic projection range of the first hole top onto the plane of the substrate; the second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the second hole top being farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falling within the orthographic projection range of the second hole top onto the plane of the substrate; The orthographic projection of the first via onto the plane of the substrate falls within the orthographic projection range of the bottom of the second via onto the plane of the substrate, and the orthographic projection of the top of the second via onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

[0013] In some exemplary embodiments, the first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the first hole top being farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falling within the orthographic projection range of the first hole top onto the plane of the substrate; the second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the second hole top being farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falling within the orthographic projection range of the second hole top onto the plane of the substrate; The orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate, and the orthographic projection of the top of the first hole onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

[0014] In some exemplary embodiments, the orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the pixel electrode onto the plane of the substrate, and the orthographic projection of the bottom of the first via onto the plane of the substrate falls within the orthographic projection range of the pixel electrode onto the plane of the substrate.

[0015] In some exemplary embodiments, the organic insulating layer is provided with at least one groove, the groove having an opening and the opening communicating with the first through hole; the opening is located on the hole wall of the first through hole, the hole wall is located between the top and bottom of the first hole, and the top and bottom of the first hole are connected via the hole wall.

[0016] In some exemplary embodiments, the orthographic projection of the groove onto the plane of the substrate falls within the orthographic projection range of the top of the first hole onto the plane of the substrate, and the orthographic projection of the groove onto the plane of the substrate does not overlap with the orthographic projection of the bottom of the first hole onto the plane of the substrate.

[0017] In some exemplary embodiments, the orthographic projection of the groove onto the plane of the substrate overlaps with the orthographic projection of the pixel electrode onto the plane of the substrate.

[0018] In some exemplary embodiments, the pixel electrode includes a connected connection portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connected portion; the connected portion includes a plurality of connected side surfaces, and at least partially overlaps the orthographic projection of at least one of the grooves onto the plane of the substrate with the orthographic projection of the side surface onto the plane of the substrate.

[0019] In some exemplary embodiments, the pixel electrode includes a connecting portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connecting portion; the connecting portion includes a plurality of connected side surfaces, two adjacent side surfaces being connected to form an intersection area, and at least one of the intersection areas having its orthographic projection onto the plane of the substrate falling within the orthographic projection range of the groove onto the plane of the substrate.

[0020] In some exemplary embodiments, the width of the groove projected onto the plane of the substrate ranges from 1.0 micrometer to 2.0 micrometer.

[0021] In some exemplary embodiments, the angle between the hole wall with the opening of the groove and the plane of the substrate ranges from 30° to 60°.

[0022] In some exemplary embodiments, a protrusion structure is further included, a portion of which is located on the side of the pixel electrode away from the substrate and contacts the surface of the pixel electrode away from the substrate, and a portion of the protrusion structure contacts the surface of the passivation layer away from the substrate; the portion of the protrusion structure forms the first profile, and a portion of the pixel electrode forms the second profile.

[0023] In some exemplary embodiments, the first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the first hole top being farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falling within the orthographic projection range of the first hole top onto the plane of the substrate; the second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the second hole top being farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falling within the orthographic projection range of the second hole top onto the plane of the substrate; The orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate, and the orthographic projection of the protrusion structure onto the plane of the substrate does not overlap with the orthographic projection of the second via onto the plane of the substrate.

[0024] In some exemplary embodiments, the orthographic projection of the protrusion structure onto the plane of the substrate partially overlaps with the orthographic projection of the top of the first hole onto the plane of the substrate; or, the orthographic projection of the protrusion structure onto the plane of the substrate does not overlap with the orthographic projection of the top of the first hole onto the plane of the substrate.

[0025] In some exemplary embodiments, the orthographic projection of the first via on the plane where the substrate is located and the orthographic projection of the second via on the plane where the substrate is located both fall within the orthographic projection range of the pixel electrode on the plane where the substrate is located.

[0026] In some exemplary embodiments, portions of the pixel electrode constitute the improved structure.

[0027] In some exemplary embodiments, a shim block is also included, which is located between the organic insulating layer and the passivation layer, or the shim block is located between the passivation layer and the pixel electrode, wherein the orthographic projection of the shim block onto the plane of the substrate at least partially overlaps with the orthographic projection of the pixel electrode onto the plane of the substrate.

[0028] In some exemplary embodiments, the first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the first hole top being farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falling within the orthographic projection range of the first hole top onto the plane of the substrate; the second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate, the second hole top being farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falling within the orthographic projection range of the second hole top onto the plane of the substrate; The orthographic projection of the first via onto the plane of the substrate falls within the orthographic projection range of the bottom of the second via onto the plane of the substrate, and the orthographic projections of the first via onto the plane of the substrate and the second via onto the plane of the substrate both fall within the orthographic projection range of the pixel electrode onto the plane of the substrate.

[0029] On the other hand, this utility model provides a display device including the array substrate described in any of the foregoing embodiments.

[0030] Other features and advantages of this invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. Other advantages of this invention can be realized and obtained by means of the solutions described in the description and drawings. Attached Figure Description

[0031] The accompanying drawings are used to provide an understanding of the technical solution of this utility model and constitute a part of the specification. They are used together with the embodiments of this utility model to explain the technical solution of this utility model, and do not constitute a limitation on the technical solution of this utility model.

[0032] Figure 1 This is a front view schematic diagram of an array substrate according to an embodiment of the present invention; Figure 2 This is a partial top view of the display area of ​​an array substrate according to an embodiment of the present invention; Figure 3 for Figure 2 Cross-sectional view of the area marked AA in the middle; Figure 4A This is a partial top view of the array substrate display area after the first conductive layer pattern has been formed in an embodiment of the present invention. Figure 4B This is a partial top view of the display area of ​​an array substrate after a semiconductor layer pattern has been formed, according to an embodiment of the present invention. Figure 4C This is a partial top view of the array substrate display area after the second conductive layer pattern has been formed in an embodiment of the present invention. Figure 4D This is a partial top view of the array substrate display area after the second insulating layer pattern has been formed in an embodiment of the present invention; Figure 4E This is a partial top view of the array substrate display area after the third conductive layer pattern has been formed in an embodiment of the present invention. Figure 4F This is a partial top view of the array substrate display area after the third insulating layer pattern has been formed in an embodiment of the present invention; Figure 4GThis is a partial top view of the array substrate display area after the fourth conductive layer pattern has been formed in an embodiment of the present invention. Figure 5 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 6 for Figure 5 A cross-sectional view of the area marked BB in the middle; Figure 7 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 8 for Figure 7 A cross-sectional view of the area marked CC. Figure 9 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 10 for Figure 9 Cross-sectional view of the DD mark in the middle; Figure 11 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 12 for Figure 11 Cross-sectional view of the EE section in the middle; Figure 13 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 14 for Figure 13 A cross-sectional view of the area marked FF in the middle; Figure 15 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 16 for Figure 15 A cross-sectional view of the area marked GG in the middle; Figure 17 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 18 for Figure 17 A cross-sectional view of the section marked HH in the middle; Figure 19 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention; Figure 20 for Figure 19 A cross-sectional view of the section marked JJ. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this utility model clearer, the embodiments of this utility model will be described in detail below with reference to the accompanying drawings. The embodiments can be implemented in many different forms. Those skilled in the art will readily understand that the methods and content can be transformed into one or more forms without departing from the spirit and scope of this utility model. Therefore, this utility model should not be construed as limited to the contents described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this utility model can be arbitrarily combined with each other.

[0034] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, one aspect of the invention is not necessarily limited to these dimensions, and the shapes and sizes of the components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and one aspect of the invention is not limited to the shapes or values ​​shown in the drawings.

[0035] The ordinal numbers "first," "second," and "third" in this invention are used to avoid confusion among the constituent elements, not to limit the quantity. "Multiple" in this invention includes two or more quantities.

[0036] In this utility model, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate the positional relationship of the constituent elements with reference to the accompanying drawings. This is only for the purpose of facilitating the description of this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this utility model. The positional relationship of the constituent elements may be appropriately changed depending on the direction in which the constituent elements are described. Therefore, the terminology used is not limited to that described in the specification and may be appropriately replaced as appropriate.

[0037] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection, an indirect connection through an intermediate component, or a connection within two components. Those skilled in the art can understand the meaning of the above terms in this utility model according to the circumstances.

[0038] In this invention, a transistor refers to a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain) and the source electrode (source electrode terminal, source region, or source), and current can flow through the drain electrode, the channel region, and the source electrode. In this invention, the channel region refers to the region through which the current primarily flows.

[0039] In this invention, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" are sometimes interchanged. Therefore, in this invention, the "source electrode" and "drain electrode" can be interchanged.

[0040] In this invention, "electrical connection" includes the situation where constituent elements are connected together by a component having a certain electrical function. There are no particular limitations on the "component having a certain electrical function," as long as it enables the transmission of electrical signals between the connected constituent elements. Examples of "component having a certain electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with one or more functions.

[0041] In this invention, "parallel" refers to a state in which the angle formed by two straight lines is greater than -10° and less than 10°, therefore, it can include a state in which the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state in which the angle formed by two straight lines is greater than 80° and less than 100°, therefore, it can include a state in which the angle is greater than 85° and less than 95°.

[0042] In this invention, "film" and "layer" can be interchanged. For example, sometimes "conductive layer" can be replaced with "conductive film". Similarly, sometimes "insulating film" can be replaced with "insulating layer".

[0043] In this utility model, "approximately" refers to a value that is not strictly limited and is within the range of allowable process and measurement errors.

[0044] Liquid crystal displays (LCDs) are one of the most common display technologies today, with extremely wide applications, ranging from large-size screens to handheld devices, automotive displays, and watches. High resolution leads to increasingly higher pixel densities, while high transmittance requires increasingly larger aperture ratios. As resolution rapidly improves, pixel sizes are shrinking, but the required aperture ratios are increasing. To meet the demands of increased pixel density and aperture ratios, the array substrate needs high mobility, high refresh rates, high charge rates, narrow linewidths, and small aperture designs. Therefore, metal-oxide-semiconductor (MOS) processes face increasingly significant challenges.

[0045] Typically, an array substrate includes a gate, a source, a drain, a semiconductor layer, an organic insulating layer, a first conductive layer, an inorganic insulating layer, and a second conductive layer. Organic vias are formed in the organic insulating layer so that the pixel electrode of the second conductive layer is connected to one of the source or drain. As pixel density increases and pixel size decreases, the proportion of organic vias gradually increases.

[0046] To increase pixel density, organic apertures are typically designed to be small. During the fabrication of the alignment layer, the small size of the organic apertures hinders the diffusion of the alignment liquid around them, leading to display defects such as black spots on the grayscale display of the device.

[0047] Therefore, this utility model embodiment provides an array substrate, comprising: Substrate; Transistors are located on the substrate; An organic insulating layer and a passivation layer are sequentially stacked on the side of the transistor away from the substrate. The organic insulating layer has a first via, and the passivation layer has a second via. The orthographic projection of the first via onto the plane of the substrate and the orthographic projection of the second via onto the plane of the substrate at least partially overlap. The first via and the second via are connected, and the second via exposes a portion of the transistor. A pixel electrode, at least partially located on the side of the passivation layer away from the substrate, is located within the second via and connected to the transistor. The improved structure includes a first profile, a second profile, and a transition profile connected together. The first profile and the second profile have a vertical spacing along a direction perpendicular to the plane of the substrate, and the first profile and the second profile have a horizontal spacing between their orthographic projections onto the plane of the substrate. The first profile and the second profile are connected via the transition profile. The orthographic projection of the improved structure onto the plane of the substrate overlaps with the orthographic projection of the first via onto the plane of the substrate. The vertical spacing is greater than or equal to 0.5 micrometers.

[0048] In this embodiment of the invention, an improved structure is provided, which includes a first surface, a second surface, and a transition surface connected together. The first surface and the second surface have a vertical spacing along a direction perpendicular to the plane of the substrate, and the first surface and the second surface have a horizontal spacing between their orthogonal projections onto the plane of the substrate. The vertical spacing is defined to be greater than or equal to 0.5 micrometers. During the preparation of the alignment layer, the improved structure can turbulently affect the flow of the alignment liquid, changing the dynamic characteristics of the alignment liquid flow and influencing the surface tension of the alignment liquid. This helps to improve the uniformity of the alignment liquid coating diffusion, thereby improving display defects such as black spots and enhancing the uniformity of the displayed image.

[0049] Figure 1 This is a front view schematic diagram of an array substrate according to an embodiment of the present invention. Figure 1 As shown, the array substrate may include a display area AA and a border area BB surrounding the display area AA. The border area BB may include a first border area B1 located on one side of the display area AA and a second border area B2 located on the remaining sides of the display area AA. For example, the first border area B1 may include the bottom border of the array substrate, and the second border area B2 may include the top border, left border, and right border of the array substrate.

[0050] In some exemplary embodiments, such as Figure 1 As shown, the display area AA may include multiple data lines DL and multiple gate lines GL disposed on a substrate. The multiple gate lines GL may extend along a first direction X and be arranged sequentially along a second direction Y different from the first direction X. The multiple data lines DL may extend along the second direction Y and be arranged sequentially along the first direction X. The first direction X and the second direction Y may intersect; for example, the first direction X may be perpendicular to the second direction Y. The plane formed by the first direction X and the second direction Y is parallel to the plane of the substrate. The multiple data lines DL and the multiple gate lines GL may be located in different film layers; for example, the multiple data lines DL may be located on the side of the multiple gate lines GL away from the substrate.

[0051] In some exemplary embodiments, such as Figure 1As shown, multiple data lines DL and multiple gate lines GL can intersect to form multiple sub-pixel regions. The area defined by the intersection of adjacent data lines DL and adjacent gate lines GL can be a sub-pixel region. One sub-pixel can be correspondingly set within a sub-pixel region. A sub-pixel region can include an open area and a non-open area surrounding the open area. The non-open area can be an area obscured by the black matrix of the opposing substrate of the display device, and the open area can be an area not obscured by the black matrix of the opposing substrate. Adjacent gate lines GL and data lines DL can both be located within the non-open area. The array substrate of this embodiment can be used to implement display functions, and the open area of ​​each sub-pixel region can be configured for display. The non-open area surrounds the open area and is not displayed. However, this embodiment is not limited in this respect. In some examples, the array substrate can be used to implement other functions.

[0052] In some exemplary embodiments, the display area AA may include a plurality of pixel units disposed on a substrate. At least one pixel unit may include three sub-pixels (e.g., a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged sequentially along a first direction X). The three sub-pixels of the pixel unit may, for example, be a blue sub-pixel, a red sub-pixel, and a green sub-pixel, and the three sub-pixels may be arranged sequentially in the order of blue sub-pixel, green sub-pixel, and red sub-pixel. Figure 1 As shown, at least one sub-pixel may include: a pixel electrode 10 and a common electrode ( Figure 1 (Not shown), and the orthographic projections of the pixel electrode 10 of the sub-pixel and the common electrode onto the plane of the substrate may partially overlap. The common electrode of multiple sub-pixels in the display area AA may be a single structure. For example, the common electrode may be located on the side of the pixel electrode 10 closer to the substrate. The sub-pixel may also include a transistor 20, which may also be referred to as a first transistor. The transistor 20 may be located near the intersection of the data line DL and the gate line GL. The transistor 20 may include a gate, a first electrode, and a second electrode, the first electrode being one of the source and drain, and the second electrode being the other of the source and drain. The gate may be electrically connected to the gate line GL, the first electrode of the transistor 20 may be electrically connected to the data line DL, and the second electrode may be electrically connected to the pixel electrode 10 of a sub-pixel. The transistor 20 may be configured to provide the data signal transmitted by the data line DL to the pixel electrode 10 of the sub-pixel under the control of the gate line GL.

[0053] In some exemplary embodiments, the second border region B2 may include at least a gate driving circuit (e.g., including multiple cascaded shift registers), which may be electrically connected to multiple gate lines GL in the display region AA. The gate driving circuit may also include a second transistor. The second transistor may include a second gate, a third electrode, and a fourth electrode. In this invention, the third electrode may be one of the source and the drain, and the fourth electrode may be the other of the source and the drain.

[0054] Liquid crystal display devices have various display modes, such as ADS (Advanced Super Dimension Switch) mode, TN (twisted nematic) mode, and VA (Vertical Alignment) mode. In ADS mode, both the pixel electrode and the common electrode are located on one side of the array substrate. In TN and VA modes, the pixel electrode and the common electrode are respectively located on opposite sides of the liquid crystal layer, with the pixel electrode on one side of the array substrate and the common electrode on the opposite substrate side.

[0055] The structure of the array substrate is described below using the ADS mode array substrate structure as an example.

[0056] Figure 2 This is a partial top view of the display area of ​​the array substrate according to an embodiment of the present invention. Figure 3 for Figure 2 A cross-sectional view of the section marked AA. Figure 2 , Figure 3 As shown, the third direction Z is perpendicular to the plane formed by the first direction X and the second direction Y. The third direction Z can also be referred to as the thickness direction of the array substrate. The display area of ​​the array substrate may include a substrate 30 and a first conductive layer, a semiconductor layer, a second conductive layer, a third conductive layer, and a fourth conductive layer sequentially stacked on one side of the substrate 30. The display area of ​​the array substrate may also include a first insulating layer 31 located between the first conductive layer and the semiconductor layer, a second insulating layer 32 located between the second conductive layer and the third conductive layer, and a third insulating layer 33 located between the third conductive layer and the fourth conductive layer. In this embodiment of the present invention, the first insulating layer may also be referred to as a gate insulating (GI) layer, the second insulating layer may also be referred to as an organic (ORG) insulating layer, and the third insulating layer may also be referred to as a passivation (PVX) layer.

[0057] The first conductive layer may include a gate line GL and the gate of transistor 20, wherein the gate and gate line GL can be an integral structure interconnected. The semiconductor layer may include the active layer of transistor 20. The active layer may include a channel region and a first region and a second region located on opposite sides of the channel region. The second conductive layer may include a first electrode 22 and a data line DL of transistor 20, wherein the first electrode of transistor 20 and the data line DL can be an integral structure interconnected. The first electrode of transistor 20 may be in contact with the first region, and the second electrode 22 may be in contact with the second region. The third conductive layer may include a common electrode, and the fourth conductive layer may include a pixel electrode 10, wherein the orthographic projection of pixel electrode 10 onto the plane of substrate 30 overlaps with the orthographic projection of the common electrode onto the plane of substrate 30, and pixel electrode 10 is connected to the second electrode 22.

[0058] like Figure 2 , Figure 3 As shown, in Figure 2 In this configuration, the pixel electrode 10 is not filled with color to facilitate identification of the projection relationship between the pixel electrode 10 and the first via K1 and the second via K2. The display area of ​​the array substrate may further include at least one first via K1 and at least one second via K2. The first via K1 and the second via K2 can be arranged in pairs, and the orthographic projection of the first via K1 onto the plane of the substrate 30 overlaps with the orthographic projection of the paired second via K2 onto the plane of the substrate 30. The paired first via K1 and second via K2 can be arranged along a first direction X. A portion of the second via K2 can be located on one side of the first via K1 along the first direction X, or a portion of the second via K2 can be located on the side of the first via K1 opposite to the first direction X. The first via K1 can penetrate the second insulating layer 32 along a third direction Z, and the portion of the first via K1 exposing the second electrode 22 is also present. A portion of the third insulating layer 33 is located within the first via K1. The second via K2 is connected to the first via K1 and can penetrate the third insulating layer 33 along the third direction Z, exposing a portion of the second electrode 22. A portion of the pixel electrode 10 is located within the second via K2 and is connected to the second electrode 22 via the second via K2.

[0059] like Figure 2 , Figure 3As shown, the first via K1 may include a first hole top K11 and a first hole bottom K12 disposed opposite each other along the third direction Z. The first hole top K11 is farther away from the substrate 30 than the first hole bottom K12, and the orthographic projection of the first hole bottom K12 onto the plane of the substrate 30 falls within the orthographic projection range of the first hole top K11 onto the plane of the substrate 30. The second via K2 may include a second hole top K21 and a second hole bottom K22 disposed opposite each other along the third direction Z. The second hole top K21 is farther away from the substrate 30 than the second hole bottom K22, and the orthographic projection of the second hole bottom K22 onto the plane of the substrate 30 can fall within the orthographic projection range of the second hole top K21 onto the plane of the substrate 30. In this embodiment of the present invention, the orthographic projection of a component onto the plane of the substrate refers to the vertical projection range of the component onto the plane of the substrate.

[0060] The orthographic projection of the second hole bottom K22 onto the plane of substrate 30 can fall within the orthographic projection range of the first hole bottom K12 onto the plane of substrate 30, and a portion of the edge of the orthographic projection of the first hole bottom K12 onto the plane of substrate 30 can overlap with a portion of the edge of the orthographic projection of the second hole bottom K22 onto the plane of substrate 30. The orthographic projection of the second hole top K21 onto the plane of substrate 30 partially overlaps with the orthographic projection of the first hole bottom K12 onto the plane of substrate 30, and the orthographic projection of the second hole top K21 onto the plane of substrate 30 partially overlaps with the orthographic projection of the first hole top K11 onto the plane of substrate 30. A portion of the edge of the orthographic projection of the first hole top K11 onto the plane of substrate 30 lies between the orthographic projections of the second hole top K21 and the second hole bottom K22 onto the plane of substrate 30.

[0061] like Figure 2 As shown, the center of the orthographic projection of the second hole bottom K22 onto the plane where the substrate 30 is located is on one side of the center of the orthographic projection of the first hole bottom K12 onto the plane where the substrate 30 is located, along the first direction X, or on the side opposite to the first direction X.

[0062] like Figure 2 , Figure 3 As shown, the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 may include the orthographic projection of the first via K1 onto the plane of the substrate 30, and the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. During the fabrication of the alignment layer, the alignment liquid can flow into the first via K1 from the area where the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 2The dashed arrow in the diagram illustrates this. Because the orthographic projection of the second via K2 onto the plane of substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of substrate 30, an uneven improved structure 11 is formed. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0063] In some exemplary embodiments, such as Figure 3 As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. Both the first profile 11-1 and the second profile 11-2 extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0064] like Figure 3 As shown, a portion of the third insulating layer 33 forms the first surface 11-1, a portion of the pixel electrode 10 forms the second surface 11-2, and a portion of the pixel electrode 10, a portion of the third insulating layer 33, and a portion of the second insulating layer 32 together form the transition surface 11-3.

[0065] In some exemplary embodiments, the orthographic projection of the bottom of the second hole K22 onto the plane of the substrate 30 may fall within the orthographic projection range of the pixel electrode 10 onto the plane of the substrate 30, and the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 may partially overlap with the orthographic projection of the top of the second hole K21 onto the plane of the substrate 30.

[0066] In some exemplary embodiments, such as Figure 3 As shown, there is a gap H1 along the third direction Z between the first surface 11-1 and the second surface 11-2, which can also be called the vertical gap. There is a horizontal gap between the first surface 11-1 and the second surface 11-2 when projected onto the plane containing the substrate 30. The gap H1 can be equal to or greater than 0.5 micrometers. For example, it can be 0.8 micrometers, 1.0 micrometers, or 1.5 micrometers, etc. This invention does not limit the horizontal gap. Based on satisfying the surface tension affecting the alignment liquid, the gap H1 can be arbitrarily selected, improving design flexibility and reducing the requirements for fabrication precision, thus reducing the fabrication cost of the array substrate.

[0067] In some exemplary embodiments, the range of the spacing H1 can be greater than or equal to 0.5 micrometers and less than or equal to 2.5 micrometers. While satisfying the requirement of affecting the surface tension of the alignment liquid, the thickness of the array substrate can be reduced, which is beneficial for the thinner and lighter design of the array substrate.

[0068] The following exemplifies the fabrication process of the array substrate. The "patterning process" described in this invention includes, for metallic, inorganic, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes organic material coating, mask exposure, and development. Deposition can be performed using sputtering, evaporation, or chemical vapor deposition (CVD); coating can be performed using spraying, spin coating, or inkjet printing; and etching can be performed using dry etching or wet etching. This invention does not limit the methods used. A "thin film" refers to a thin film of a certain material fabricated on a substrate using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. A "layer" after the patterning process contains at least one "pattern." The "thickness" of the film layer is its dimension in the direction perpendicular to the plane of the array substrate. In this invention, "A extends along direction B" means that A may include a main part and a secondary part connected to the main part. The main part is a line, line segment, or strip shape, and extends along direction B, with the length of the main part extending along direction B being greater than the length of the secondary part extending along other directions. In this invention, "A extends along direction B" refers to "the main part of A extending along direction B." In this invention, "A and B are of the same layer" means that A and B are formed simultaneously through the same patterning process, or that the surfaces of A and B closest to the substrate are at approximately the same distance from the substrate, or that the surfaces of A and B closest to the substrate are in direct contact with the same film layer. In this invention, "the orthographic projection of A includes the orthographic projection of B" means that the orthographic projection of B falls within the range of the orthographic projection of A, or that the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0069] The fabrication process of the array substrate may include the following steps, taking a sub-pixel region as an example: (01) Forming a first conductive layer pattern. Forming the first conductive layer pattern may include: depositing a first conductive thin film on a substrate 30, and patterning the first conductive thin film using a patterning process to form a first conductive layer pattern on the substrate 30. The first conductive layer pattern includes at least a gate line GL and a gate bump GL0, such as Figure 4A As shown.

[0070] In some exemplary embodiments, substrate 30 may provide support for film layers other than substrate 30 in the array substrate. For example, substrate 30 may be a transparent substrate. For instance, substrate 30 may be a rigid substrate or a flexible substrate. For example, the material of a rigid substrate may include, but is not limited to, one or more of glass and quartz. The material of a flexible substrate may include, but is not limited to, one or more of polyethylene terephthalate, polyethylene terephthalate, polyetheretherketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fibers. However, the embodiments of this invention are not limited in this respect.

[0071] In some exemplary embodiments, the gate line GL can be a line shape extending along the first direction X of the main body portion, and the gate line GL of each sub-pixel can be disposed on the lower side of the sub-pixel (the side of the sub-pixel closer to the next row of sub-pixels, where sub-pixels in the same row are arranged along the first direction X). The gate line GL is configured to be connected to the gate of the transistor 20 in the sub-pixel, providing a gate drive signal to the transistor.

[0072] In some exemplary embodiments, the gate line GL can be set to a constant width or a non-constant width, where the width refers to the dimension perpendicular to the extension direction of the gate line GL (the second direction Y).

[0073] In some exemplary embodiments, the gate protrusion GL0 may extend along a second direction Y. The gate protrusion GL0 includes a first end and a second end disposed opposite to each other. The first end of the gate protrusion GL0 is connected to the gate line GL, and the second end of the gate protrusion GL0 is located on one side of the first end along the second direction Y. The gate protrusion GL0 and the gate line GL may be an integral structure interconnected. The gate protrusion GL0 may be block-shaped, for example, it may be a rectangular block.

[0074] In some exemplary embodiments, the material of the first conductive film may include a metallic material, such as any one or more of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti). Alternatively, it may be an alloy of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), such as aluminum-neodymium alloy (AlNd), molybdenum-niobium alloy (MoNb), or molybdenum-nickel-titanium alloy (MoNiTi). The first conductive film may be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti, Mo / Nb / Cu, MoNiTi / Cu, MoNb / Cu / MoNiTi, or MoNiTi / Cu / MoNiTi, etc.

[0075] (02) Forming a semiconductor layer pattern. Forming a semiconductor layer pattern may include: sequentially depositing a first insulating film and a semiconductor film on a substrate 30 on which the aforementioned pattern is formed; patterning the semiconductor film using a patterning process to form a first insulating layer 31 covering the first conductive layer pattern; and a semiconductor layer pattern disposed on the first insulating layer 31. The semiconductor layer pattern includes at least an active layer 24 of a transistor 20 disposed in each sub-pixel, such as... Figure 4B As shown. Transistor 20 can be a low-temperature polycrystalline silicon thin-film transistor or an oxide thin-film transistor. In Figure 4B In this design, the first insulating layer 31 is not filled with color, and the active layer 24 is semi-transparent to facilitate identification of the first conductive layer pattern. The orthographic projection of the first insulating layer 31 onto the plane of the substrate 30 may include the orthographic projection of the first conductive layer pattern onto the plane of the substrate 30.

[0076] In some exemplary embodiments, the active layer 24 within each sub-pixel can have the same shape, which simplifies the transistor structure. For example, the orthographic projection of the active layer 24 onto the plane of the substrate 30 can be a square or a rectangle, etc. Figure 4B As shown, the active layer 24 may include a channel region 24-3 and a first region 24-1 and a second region 24-2 located on opposite sides of the channel region 24-3.

[0077] In some exemplary embodiments, the orthographic projection of the active layer 24 onto the plane of the substrate 30 may be within the range of the orthographic projection of the gate bump GL0 onto the plane of the substrate 30, and the area where the gate bump GL0 and the orthographic projection of the active layer 24 overlap may serve as the gate 23 of each transistor.

[0078] In some exemplary embodiments, the material of the semiconductor thin film may include metal oxide materials and / or metal oxide nitride materials. The metal oxide materials include, but are not limited to, one or more of the following: indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), indium tin zinc oxide (ITZO), indium gallium oxide (IGO), indium gallium zinc tin oxide (IGZTO), indium zinc oxide (IZO), zinc tin oxide (ZTO), indium-free metal oxide (In-free OS), rare earth doped oxide (Ln-OS), zinc oxide (ZnO), gallium oxide (GaO), indium oxide (InO), HfInZnO (HIZO), ZnO:F, In2O3:Sn, In2O3:Mo, Cd2SnO4, ZnO:Al, TiO2:Nb, and Cd-Sn-O.

[0079] Metallic nitride materials include, but are not limited to, zinc nitride, indium nitride, gallium nitride, tin nitride, cadmium nitride, aluminum nitride, germanium nitride, titanium nitride, silicon nitride, or combinations thereof.

[0080] Semiconductor thin films can be made of amorphous, partially crystalline, single-crystal, or polycrystalline materials, and can also be single-layer or multi-layer structures.

[0081] In some exemplary embodiments, the material of the first insulating film may include an inorganic material. The inorganic material may include silicon oxynitride (SiO₂). x N y ) or silicon nitride (SiN) x ) or silicon oxide (SiO) x One or more of the following: ) etc. The first insulating film can be a single layer, multiple layers, or a composite layer.

[0082] (03) Forming a second conductive layer pattern. Forming a second conductive layer pattern may include: depositing a second conductive thin film on a substrate 30 on which the aforementioned pattern is formed, and patterning the second conductive thin film using a patterning process to form a second conductive layer pattern. The second conductive layer pattern includes at least a data line DL and a first electrode 21 and a second electrode 22 of the transistor 20, such as... Figure 4C As shown.

[0083] In some exemplary embodiments, the data line DL can be a line shape extending along the second direction Y of the main body. The data line DL of each sub-pixel can be disposed on the left side of the sub-pixel (on the side opposite to the first direction X). The data line DL is configured to connect to the first pole 21 of the transistor 20 in the sub-pixel, providing a data signal to the transistor.

[0084] In some exemplary embodiments, the orthographic projection of the first electrode 21 onto the plane of the substrate 30 may be within the range of the orthographic projection of the active layer 24 onto the plane of the substrate 30. The first electrode 21 and the data line DL may be an integral structure interconnected. The orthographic projection of the first region 24-1 onto the plane of the substrate 30 may include the orthographic projection of the first electrode 21 onto the plane of the substrate 30. For example, the orthographic projection of the first electrode 21 onto the plane of the substrate 30 may be within the range of the orthographic projection of the first region 24-1 onto the plane of the substrate 30, or the orthographic projection of the first electrode 21 onto the plane of the substrate 30 and the orthographic projection of the first region 24-1 onto the plane of the substrate 30 may overlap.

[0085] In some exemplary embodiments, the second electrode 22 is located on one side of the first electrode 21 along the first direction X, and the orthographic projection of the second electrode 22 onto the plane where the substrate 30 is located partially overlaps with the orthographic projection of the active layer 24 onto the plane where the substrate 30 is located. For example, the active layer located between the first electrode 21 and the second electrode 22 is the channel region 24-3.

[0086] like Figure 4CAs shown, the second electrode 22 may include a first part 22-1, a second part 22-2, and a third part 22-3 connected together, with the second part 22-2 located between the first part 22-1 and the third part 22-3. The orthographic projection of the first part 22-1 onto the plane of the substrate 30 may lie within the range of the orthographic projection of the active layer 24 onto the plane of the substrate 30. The orthographic projection of the second part 22-2 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the active layer 24 onto the plane of the substrate 30. The orthographic projection of the third part 22-3 onto the plane of the substrate 30 does not overlap with the orthographic projection of the active layer 24 onto the plane of the substrate 30. The orthographic projection of the first part 22-1 onto the plane of the substrate 30 may be a rectangle extending along the second direction Y, the orthographic projection of the second part 22-2 onto the plane of the substrate 30 may be a rectangle extending along the first direction X, and the orthographic projection of the third part 22-3 onto the plane of the substrate 30 may be a square.

[0087] In some exemplary embodiments, the material of the second conductive film may be the same as or different from the material of the first conductive film.

[0088] (04) Forming a second insulating layer pattern. Forming a second insulating layer pattern may include: depositing a second insulating film on the substrate 30 on which the aforementioned pattern is formed, and patterning the second insulating film using a patterning process to form a second insulating layer pattern. The second insulating layer pattern may include a plurality of first vias K1, such as... Figure 4D As shown, the first via K1 exposes a portion of the third part 22-3 of the second electrode 22. The orthographic projection of the first via K1 onto the plane of the substrate 30 can lie within the range of the orthographic projection of the third part 22-3 onto the plane of the substrate 30. Figure 4D In this case, the second insulating layer 32 was not filled with color.

[0089] like Figure 4D As shown, the first via K1 may include a first hole top K11 and a first hole bottom K12 disposed opposite each other along the third direction Z. The first hole top K11 is farther away from the substrate 30 than the first hole bottom K12. The orthographic projection of the first hole bottom K12 onto the plane of the substrate 30 can fall within the orthographic projection range of the first hole top K11 onto the plane of the substrate 30. For example, the orthographic projection of the first hole top K11 onto the plane of the substrate 30 can be rectangular, circular, or elliptical.

[0090] In some exemplary embodiments, the material of the second insulating film may include organic materials, including any one or more of epoxy resin, phenolic resin, urea-formaldehyde resin, melamine-formaldehyde resin, furan resin, silicone resin, polyester resin, polyamide resin, acrylic resin, polyurethane, vinyl resin, hydrocarbon resin, and polyether resin. The second insulating film may be a single layer, multiple layers, or a composite layer.

[0091] In some possible exemplary embodiments, a fourth insulating film is formed before forming the second insulating layer pattern. The second and fourth insulating films are patterned using a patterning process, such that the second insulating film forms the second insulating layer pattern, and the fourth insulating film forms the fourth insulating layer. The material of the fourth insulating film may include an inorganic material.

[0092] (05) Forming a third conductive layer pattern. Forming a third conductive layer pattern may include: depositing a third conductive thin film on a substrate 30 having the aforementioned pattern, and patterning the third conductive thin film using a patterning process to form a third conductive layer pattern. The third conductive layer pattern may at least include a common electrode 40, such as... Figure 4E As shown.

[0093] like Figure 4E As shown, the orthographic projection of the common electrode 40 onto the plane of substrate 30 does not overlap with the orthographic projection of the first via K1 onto the plane of substrate 30. The orthographic projection of the common electrode 40 onto the plane of substrate 30 does not overlap with the orthographic projection of the first electrode 21 onto the plane of substrate 30. The orthographic projection of the common electrode 40 onto the plane of substrate 30 does not overlap with the orthographic projection of the second electrode 22 onto the plane of substrate 30. The orthographic projection of the common electrode 40 onto the plane of substrate 30 partially overlaps with the orthographic projection of the gate line GL onto the plane of substrate 30. The orthographic projection of the common electrode 40 onto the plane of substrate 30 partially overlaps with the orthographic projection of the data line DL onto the plane of substrate 30.

[0094] In some exemplary embodiments, the material of the third conductive film may include a transparent conductive oxide material, which may include indium tin oxide (ITO) or indium zinc oxide (IZO), etc. For example, the third conductive film may be a single-layer structure or a multi-layer composite structure, such as ITO / Al / ITO, etc.

[0095] In some exemplary embodiments, the thickness of the third conductive film can range from 400 angstroms to 900 angstroms. For example, the thickness of the third conductive film can be 500 angstroms, 600 angstroms, 700 angstroms, or 800 angstroms, etc.

[0096] (06) Forming a third insulating layer pattern. Forming a third insulating layer pattern may include: depositing a third insulating film on the substrate 30 on which the aforementioned pattern is formed, and patterning the third insulating film using a patterning process to form a third insulating layer pattern. The third insulating layer pattern may include a plurality of second vias K2, such as... Figure 4F As shown. The orthographic projection of the second via K2 onto the plane of substrate 30 overlaps with the orthographic projection of the first via K1 onto the plane of substrate 30, and the second via K2 exposes a portion of the third part 22-3 of the second electrode 22. Figure 4F In this process, the third insulating layer 33 is not filled with color to facilitate transistor identification. The orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the common electrode 40 onto the plane of the substrate 30.

[0097] like Figure 4F As shown, the second via K2 may include a second via top K21 and a second via bottom K22 disposed opposite each other along the third direction Z. The second via top K21 is farther away from the substrate 30 than the second via bottom K22. The orthographic projection of the second via bottom K22 onto the plane of the substrate 30 can fall within the orthographic projection range of the second via top K21 onto the plane of the substrate 30. The orthographic projection of the second via bottom K22 onto the plane of the substrate 30 can fall within the orthographic projection range of the first via bottom K12 onto the plane of the substrate 30. The orthographic projection of the second via top K21 onto the plane of the substrate 30 overlaps with the orthographic projection portion of the third portion 22-3 of the second electrode 22 onto the plane of the substrate 30.

[0098] In some exemplary embodiments, such as Figure 4F As shown, the maximum radial distance L1 between the orthographic projection edge of the second hole top K21 onto the plane of substrate 30 and the orthographic projection edge of the second hole bottom K22 onto the plane of substrate 30 can range from 2.0 micrometers to 4.0 micrometers. For example, it can be 2.5 micrometers, or 3.0 micrometers, or 3.5 micrometers. Radial distance refers to the direction of the line connecting the center of the orthographic projection of the second hole bottom K22 onto the plane of substrate 30 and any point on the edge of the orthographic projection of the second hole top K21 onto the plane of substrate 30.

[0099] In some exemplary embodiments, such as Figure 4F As shown, the orthographic projection of the bottom of the second hole K22 onto the plane of the substrate 30 can be a circle, an ellipse, or a rectangle.

[0100] In some exemplary embodiments, the thickness of the third insulating film can range from 2.0 micrometers to 4.0 micrometers. For example, it can be 2.5 micrometers, or 3.0 micrometers, or 3.5 micrometers, etc.

[0101] In some exemplary embodiments, the material of the third insulating film may include an inorganic material, which may include silicon oxynitride (SiO2). x N y ) or silicon nitride (SiN) x ) or silicon oxide (SiO) x One or more of the following: ) etc. The third insulating film can be a single layer, multiple layers, or a composite layer.

[0102] In some exemplary embodiments, during the patterning of the third insulating film, the second insulating layer 32 exposed by the second via K2 may be over-etched.

[0103] (07) Forming a fourth conductive layer pattern. Forming a fourth conductive layer pattern may include: depositing a fourth conductive film on a substrate 30 on which the aforementioned pattern is formed, and patterning the fourth conductive film using a patterning process to form a fourth conductive layer pattern. The fourth conductive layer pattern may at least include a pixel electrode 10, such as... Figure 4G As shown.

[0104] like Figure 4G As shown, the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. The orthographic projection of the first via K1 onto the plane of the substrate 30 can fall within the orthographic projection range of the pixel electrode 10 onto the plane of the substrate 30. The pixel electrode 10 is connected to the second electrode 22 via the second via K2.

[0105] In some exemplary embodiments, such as Figure 4G As shown, the pixel electrode 10 may include a connecting portion 10-1 and a plurality of comb portions 10-2 connected to each other. The plurality of comb portions 10-2 may be located on one side of the connecting portion 10-1 along the second direction Y, and the plurality of comb portions 10-2 may be arranged along the first direction X, with a slit formed between two adjacent comb portions 10-2. For example, the plurality of comb portions 10-2 may be arranged at equal intervals along the first direction X. The comb portions 10-2 may be rectangles or approximately rectangles extending along the second direction Y. The orthographic projection of the plurality of comb portions 10-2 onto the plane of the substrate 30 overlaps with the orthographic projection of the common electrode 40 onto the plane of the substrate 30. The orthographic projection of the first via K1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30.

[0106] The orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. The orthographic projection of the first via K1 onto the plane of the substrate 30 falls within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The connecting portion 10-1 is connected to the third portion 22-3 of the second electrode 22 via the second via K2. The orthographic projection of the third portion 22-3 of the second electrode 22 onto the plane of the substrate 30 falls within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the common electrode 40 onto the plane of the substrate 30.

[0107] In some exemplary embodiments, the material of the fourth conductive film may include a transparent conductive oxide material, such as indium tin oxide (ITO) or indium zinc oxide (IZO). For example, the fourth conductive film may be a single-layer structure or a multi-layer composite structure, such as ITO / Al / ITO. The material of the fourth conductive film may be the same as or different from the material of the third conductive film.

[0108] In some exemplary embodiments, the thickness of the fourth conductive film can range from 400 angstroms to 900 angstroms. For example, the thickness of the fourth conductive film can be 500 angstroms, 600 angstroms, 700 angstroms, or 800 angstroms, etc. The thickness of the fourth conductive film can be the same as or different from the thickness of the third conductive film.

[0109] Figure 5 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 6 for Figure 5 A cross-sectional view of the section marked BB. Figure 5 , Figure 6 As shown, the structure of the display area of ​​the array substrate is basically the same as that of the aforementioned embodiment. The main difference is that the display area of ​​the array substrate may further include at least one first via K1 and at least one second via K2. The first via K1 and the second via K2 can be arranged in pairs, and the orthographic projection of the first via K1 onto the plane of the substrate 30 overlaps with the orthographic projection of the paired second via K2 onto the plane of the substrate 30. The paired first via K1 and second via K2 can be arranged along the second direction Y. A portion of the second via K2 can be located on one side of the first via K1 along the second direction Y, or a portion of the second via K2 can be located on the side of the first via K1 opposite to the second direction Y. Other structures can be referred to the description of the aforementioned embodiment.

[0110] like Figure 5 , Figure 6 As shown, the first via K1 may include a first hole top K11 and a first hole bottom K12 disposed opposite each other along the third direction Z. The first hole top K11 is farther away from the substrate 30 than the first hole bottom K12, and the orthographic projection of the first hole bottom K12 onto the plane of the substrate 30 falls within the orthographic projection range of the first hole top K11 onto the plane of the substrate 30. The second via K2 may include a second hole top K21 and a second hole bottom K22 disposed opposite each other along the third direction Z. The second hole top K21 is farther away from the substrate 30 than the second hole bottom K22, and the orthographic projection of the second hole bottom K22 onto the plane of the substrate 30 can fall within the orthographic projection range of the second hole top K21 onto the plane of the substrate 30. In this embodiment of the present invention, the orthographic projection of a component onto the plane of the substrate refers to the vertical projection range of the component onto the plane of the substrate.

[0111] The orthographic projection of the second hole bottom K22 onto the plane of substrate 30 can fall within the orthographic projection range of the first hole bottom K12 onto the plane of substrate 30, and a portion of the edge of the orthographic projection of the first hole bottom K12 onto the plane of substrate 30 can overlap with a portion of the edge of the orthographic projection of the second hole bottom K22 onto the plane of substrate 30. The orthographic projection of the second hole top K21 onto the plane of substrate 30 partially overlaps with the orthographic projection of the first hole bottom K12 onto the plane of substrate 30, and the orthographic projection of the second hole top K21 onto the plane of substrate 30 partially overlaps with the orthographic projection of the first hole top K11 onto the plane of substrate 30. A portion of the edge of the orthographic projection of the first hole top K11 onto the plane of substrate 30 lies between the orthographic projections of the second hole top K21 and the second hole bottom K22 onto the plane of substrate 30.

[0112] like Figure 5 As shown, the center of the orthogonal projection of the second hole bottom K22 onto the plane where the substrate 30 is located is on one side of the center of the orthogonal projection of the first hole bottom K12 onto the plane where the substrate 30 is located along the second direction Y, or on the side opposite to the second direction Y.

[0113] like Figure 5 As shown, the pixel electrode 10 may include a connecting portion 10-1 and a plurality of comb portions 10-2 connected to each other. The plurality of comb portions 10-2 may be located on one side of the connecting portion 10-1 along the second direction Y, and the plurality of comb portions 10-2 may be arranged along the first direction X, with a slit formed between two adjacent comb portions 10-2. The orthographic projection of the second aperture top K21 onto the plane of the substrate 30 overlaps with the orthographic projection of at least one comb portion 10-2 onto the plane of the substrate 30, or, the orthographic projection of the second aperture top K21 onto the plane of the substrate 30 is located between the orthographic projections of two adjacent comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the first aperture top K11 onto the plane of the substrate 30 overlaps with the orthographic projection of at least one comb portion 10-2 onto the plane of the substrate 30. The orthographic projection of the bottom of the first hole K12 onto the plane where the substrate 30 is located falls within the orthographic projection range of the connecting part 10-1 onto the plane where the substrate 30 is located, and the orthographic projection of the bottom of the second hole K22 onto the plane where the substrate 30 is located falls within the orthographic projection range of the connecting part 10-1 onto the plane where the substrate 30 is located.

[0114] The orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. During the fabrication of the alignment layer, the alignment liquid can flow into the first via K1 from the area where the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 5The dashed arrow in the diagram illustrates this. Because the orthographic projection of the second via K2 onto the plane of substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of substrate 30, an uneven improved structure 11 is formed. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0115] In some exemplary embodiments, such as Figure 6 As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. Both the first profile 11-1 and the second profile 11-2 extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0116] like Figure 6 As shown, a portion of the third insulating layer 33 forms the first surface 11-1, a portion of the pixel electrode 10 forms the second surface 11-2, and a portion of the third insulating layer 33 and a portion of the second insulating layer 32 together form the transition surface 11-3.

[0117] In some possible exemplary embodiments, the orthographic projection of the first hole top K11 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. For example, a portion of the edge of the orthographic projection of the first hole top K11 onto the plane of the substrate 30 may overlap with a portion of the edge of the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30.

[0118] Figure 7 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 8 for Figure 7 A cross-sectional view at the point marked CC. (See diagram below.) Figure 7 , Figure 8As shown, the structure of the display area of ​​the array substrate is basically the same as that of the aforementioned embodiment. The main difference is that the display area of ​​the array substrate may further include at least one first via K1 and at least one second via K2. The first via K1 and the second via K2 can be arranged in pairs, and the orthographic projection of the first via K1 onto the plane of the substrate 30 overlaps with the orthographic projection of the paired second via K2 onto the plane of the substrate 30. The paired first via K1 and the second via K2 can be inclined. In this embodiment, the inclined arrangement means that the line connecting the center of the orthographic projection of the bottom of the second via K22 onto the plane of the substrate 30 and the center of the orthographic projection of the bottom of the first via K12 onto the plane of the substrate 30 forms an acute angle with the first direction X. The paired second via K2 can be arranged around the center of the orthographic projection of the bottom of the first via K12 onto the plane of the substrate 30. Other structures can be referred to the description of the aforementioned embodiment.

[0119] like Figure 7 , Figure 8 As shown, the orthographic projection of the first bottom K12 of the first via K1 onto the plane of the substrate 30 falls within the orthographic projection range of the first top K11 onto the plane of the substrate 30. The orthographic projection of the second bottom K22 of the second via K2 onto the plane of the substrate 30 can fall within the orthographic projection range of the second top K21 onto the plane of the substrate 30. The orthographic projection of the second bottom K22 onto the plane of the substrate 30 can fall within the orthographic projection range of the first bottom K12 onto the plane of the substrate 30, and a portion of the edge of the orthographic projection of the first bottom K12 onto the plane of the substrate 30 can overlap with a portion of the edge of the orthographic projection of the second bottom K22 onto the plane of the substrate 30. Alternatively, the orthographic projection of the second bottom K22 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the first bottom K12 onto the plane of the substrate 30.

[0120] The orthographic projection of the second hole top K21 onto the plane of substrate 30 overlaps with the orthographic projection of the first hole bottom K12 onto the plane of substrate 30, and the orthographic projection of the second hole top K21 onto the plane of substrate 30 overlaps with the orthographic projection of the first hole top K11 onto the plane of substrate 30. The edge of the orthographic projection of the first hole top K11 onto the plane of substrate 30 lies between the orthographic projections of the second hole top K21 and the second hole bottom K22 onto the plane of substrate 30.

[0121] like Figure 7As shown, the pixel electrode 10 may include a connecting portion 10-1 and a plurality of comb portions 10-2 connected to each other. The orthographic projection of the first via K1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. Similarly, the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the first via K1 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the bottom of the second via K22 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the top of the second via K21 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30.

[0122] The orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. During the fabrication of the alignment layer, the alignment liquid can flow into the first via K1 from the area where the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 7 The dashed arrow in the diagram illustrates this. Because the orthographic projection of the second via K2 onto the plane of substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of substrate 30, an uneven improved structure 11 is formed. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0123] In some exemplary embodiments, such as Figure 7As shown, the connecting portion 10-1 may include multiple connected side surfaces extending along a third direction Z. Adjacent side surfaces are connected to form an intersection area, and the multiple connected side surfaces form multiple intersection areas. The multiple side surfaces may include a first side surface 101, a second side surface 102, a third side surface 103, a fourth side surface 104, and a fifth side surface 105. The first side surface 101 and the third side surface 103 are disposed opposite each other along a second direction Y, and the first side surface 101 is farther away from the comb tooth portion 10-2 than the third side surface 103. The multiple comb tooth portions 10-2 can be connected to the third side surface 103, and the comb tooth portions 10-2 are located on one side of the third side surface 103 along the second direction Y. The second side surface 102 is located between the first side surface 101 and the third side surface 103, and the two second side surfaces 102 are respectively located on both sides of the first side surface 101 along the first direction X. The fourth side surface 104 is located between the second side surface 102 and the third side surface 103, and the fifth side surface 105 is located between the fourth side surface 104 and the second side surface 102. The fourth side 104 and the second side 102 can be connected via the fifth side 105, or the fourth side 104 and the second side 102 can be directly connected. At least one intersecting area's orthographic projection onto the plane of the substrate 30 falls within the orthographic projection range of the second hole top K21 onto the plane of the substrate 30. For example, the orthographic projection of the intersecting area formed by the first side 101 and the second side 102 onto the plane of the substrate 30 falls within the orthographic projection range of the second hole top K21 onto the plane of the substrate 30. In this embodiment of the invention, by setting the orthographic projection of the intersecting area to fall within the orthographic projection range of the second hole top, the area of ​​the uneven region can be increased, thereby improving the ability to influence the surface tension of the alignment liquid.

[0124] In some exemplary embodiments, such as Figure 8 As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. Both the first profile 11-1 and the second profile 11-2 extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0125] like Figure 8As shown, a portion of the third insulating layer 33 forms the first surface 11-1, a portion of the pixel electrode 10 forms the second surface 11-2, and a portion of the pixel electrode 10, a portion of the third insulating layer 33, and a portion of the second insulating layer 32 together form the transition surface 11-3.

[0126] Figure 9 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 10 for Figure 9 A cross-sectional view of the section marked DD. (See diagram below.) Figure 9 , Figure 10 As shown, the structure of the display area of ​​the array substrate is basically the same as that of the aforementioned embodiment. The main difference is that the display area of ​​the array substrate may further include at least one first via K1 and at least one second via K2. The first via K1 and the second via K2 can be arranged in pairs, and the orthogonal projection of the first via K1 onto the plane of the substrate 30 can fall within the orthogonal projection range of the paired second via K2 onto the plane of the substrate 30. The orthogonal projection of the first via K1 onto the plane of the substrate 30 can fall within the orthogonal projection range of the second bottom hole K22 of the paired second via K2 onto the plane of the substrate 30. The center of the orthogonal projection of the first bottom hole K12 of the first via K1 onto the plane of the substrate 30 and the center of the orthogonal projection of the second bottom hole K22 of the second via K2 onto the plane of the substrate 30 can substantially coincide. For example, the center of the orthogonal projection of the first bottom hole K12 of the first via K1 onto the plane of the substrate 30 and the center of the orthogonal projection of the second bottom hole K22 of the second via K2 onto the plane of the substrate 30 can coincide. Alternatively, the distance between the center of the orthographic projection of the first bottom hole K12 of the first via K1 onto the plane of the substrate 30 and the center of the orthographic projection of the second bottom hole K22 of the second via K2 onto the plane of the substrate 30 is within a small numerical range. This numerical range can be defined according to the process precision, and this utility model does not limit it in this regard. Other structures can be referred to the description of the foregoing embodiments.

[0127] like Figure 9 , Figure 10As shown, the orthographic projection of the first via K1 onto the plane of the substrate 30 falls within the orthographic projection range of the bottom of the second via K22 onto the plane of the substrate 30. The pixel electrode 10 may include a connecting portion 10-1 and a plurality of comb portions 10-2 connected to each other. The orthographic projection of the first via K1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30, and the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the first via K1 onto the plane of the substrate 30 falls within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the top of the second via K21 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30, and the orthographic projection of the bottom of the second via K22 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30. Alternatively, the orthographic projection of the bottom of the second hole K22 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30, and the orthographic projection of the top of the second hole K21 onto the plane of the substrate 30 may partially overlap with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30. Alternatively, the orthographic projection of the bottom of the second hole K22 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30, and the orthographic projection of the top of the second hole K21 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30.

[0128] The orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 overlaps with the orthographic projection of the second via K2 onto the plane of the substrate 30. During the fabrication of the alignment layer, the alignment liquid can flow into the first via K1 from the area where the orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 9 The dashed arrow in the diagram illustrates this. Because the orthographic projection of the second via K2 onto the plane of substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of substrate 30, an uneven improved structure 11 is formed. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0129] In some exemplary embodiments, such as Figure 10As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. Both the first profile 11-1 and the second profile 11-2 extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0130] like Figure 10 As shown, a portion of the third insulating layer 33 forms the first surface 11-1, a portion of the pixel electrode 10 forms the second surface 11-2, and a portion of the third insulating layer 33 and a portion of the second insulating layer 32 together form the transition surface 11-3.

[0131] Figure 11 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 12 for Figure 11 A cross-sectional view of the section marked EE. (See diagram below.) Figure 11 , Figure 12 As shown, the structure of the display area of ​​the array substrate is basically the same as that of the aforementioned embodiment. The main difference is that the display area of ​​the array substrate may further include at least one first via K1 and at least one second via K2. The first via K1 and the second via K2 can be arranged in pairs, and the orthogonal projection of the second via K2 onto the plane of the substrate 30 can fall within the orthogonal projection range of the paired first via K1 onto the plane of the substrate 30. The orthogonal projection of the second via K2 onto the plane of the substrate 30 can also fall within the orthogonal projection range of the first hole bottom K12 of the paired first via K1 onto the plane of the substrate 30. Other structures can be referred to the description of the aforementioned embodiment.

[0132] like Figure 11 , Figure 12As shown, the pixel electrode 10 may include a connecting portion 10-1 and a plurality of comb portions 10-2 connected to each other. The orthographic projection of the first via K1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the second via K2 onto the plane of the substrate 30 does not overlap with the orthographic projection of the comb portions 10-2 onto the plane of the substrate 30. The orthographic projection of the second via K2 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the first bottom hole K12 of the first via K1 onto the plane of the substrate 30 may fall within the orthographic projection range of the connecting portion 10-1 onto the plane of the substrate 30. The orthographic projection of the first top hole K11 of the first via K1 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30.

[0133] The orthographic projection of the pixel electrode 10 onto the plane of the substrate 30 overlaps with the orthographic projection of the first via K1 onto the plane of the substrate 30. During the fabrication of the alignment layer, the alignment liquid can flow into the bottom of the first via K1 from the area where the orthographic projection of the first via K1 onto the plane of the substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 11 The dashed arrow in the diagram illustrates this. Because the orthographic projection of the first via K1 onto the plane of substrate 30 does not overlap with the orthographic projection of the pixel electrode 10 onto the plane of substrate 30, an uneven improved structure 11 is formed. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0134] In some exemplary embodiments, such as Figure 12 As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. The first profile 11-1 may extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0135] like Figure 12As shown, a portion of the third insulating layer 33 forms the first surface 11-1, a portion of the pixel electrode 10 forms the second surface 11-2, and a portion of the third insulating layer 33 forms the transition surface 11-3.

[0136] In some exemplary embodiments, such as Figure 11 As shown, the connecting portion 10-1 may include a first side surface 101 and a second side surface 102 connected to each other. Both the first side surface 101 and the second side surface 102 extend along a direction perpendicular to the plane of the substrate 30. The orthographic projection of the first side surface 101 onto the plane of the substrate 30 may extend along a first direction X, and the orthographic projection of the second side surface 102 onto the plane of the substrate 30 may extend along a second direction Y. The two second side surfaces 102 are respectively located on both sides of the first side surface 101 along the first direction X. The first side surface 101 is located on the side of the connecting portion 10-1 away from the comb portion 10-2.

[0137] The orthographic projection of the first hole top K11 of the first via K1 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of the first side surface 101 onto the plane of the substrate 30, and the orthographic projection of the first hole top K11 of the first via K1 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of at least one second side surface 102 onto the plane of the substrate 30. In this embodiment of the present invention, by setting the orthographic projection of the first hole top K11 onto the plane of the substrate 30 to at least partially overlap with the orthographic projections of the first side surface 101 and the second side surface 102 onto the plane of the substrate 30, the area for forming an uneven structure can be increased, which is beneficial for the alignment liquid to flow into the bottom of the first via K1 and helps to improve the uniformity of the alignment liquid coating diffusion.

[0138] In some exemplary embodiments, such as Figure 11 As shown, the second insulating layer 32 is further provided with at least one groove 50, the groove 50 having an opening that communicates with the first through hole K1. The opening is located on the hole wall K13 of the first through hole K1. The hole wall K13 of the first through hole K1 is located between the first hole top K11 and the first hole bottom K12, and the first hole top K11 and the first hole bottom K12 are connected via the hole wall K13. In this embodiment of the present invention, by providing a groove in the second insulating layer and having the groove communicate with the first through hole, during the flow of the alignment liquid, the groove and the area where the groove connects to the hole wall can change the dynamic characteristics of the alignment liquid flow, affect the surface tension of the alignment liquid, and help improve the uniformity of the alignment liquid coating diffusion.

[0139] The orthographic projection of the groove 50 onto the plane of the substrate 30 can fall within the orthographic projection range of the top of the first hole K11 onto the plane of the substrate 30, and the orthographic projection of the groove 50 onto the plane of the substrate 30 does not overlap with the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30.

[0140] In some exemplary embodiments, such as Figure 11 As shown, the second insulating layer 32 is provided with a plurality of grooves 50. For example, the second insulating layer 32 is provided with two grooves 50, or three grooves 50, or four grooves 50, etc. The present invention does not limit the number of grooves. The orthographic projection of the plurality of grooves 50 onto the plane where the substrate 30 is located can be distributed around the orthographic projection of the bottom of the first hole K12 onto the plane where the substrate 30 is located.

[0141] In some exemplary embodiments, such as Figure 11 As shown, the orthographic projection of one groove 50 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of the first side surface 101 onto the plane of the substrate 30. The orthographic projection of another groove 50 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of the second side surface 102 onto the plane of the substrate 30. Alternatively, the orthographic projection of one groove 50 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of one second side surface 102 onto the plane of the substrate 30. The orthographic projection of another groove 50 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of another second side surface 102 onto the plane of the substrate 30.

[0142] In some exemplary embodiments, a plurality of grooves 50 are spaced apart along a first direction X, and the orthographic projections of the plurality of grooves 50 onto the plane of the substrate 30 at least partially overlap with the orthographic projections of the first side surface 101 onto the plane of the substrate 30. Alternatively, a plurality of grooves 50 are spaced apart along a second direction Y, and the orthographic projections of the plurality of grooves 50 onto the plane of the substrate 30 at least partially overlap with the orthographic projections of the same second side surface 102 onto the plane of the substrate 30. That is, the number of grooves 50 that at least partially overlap with the orthographic projections of the first side surface 101 onto the plane of the substrate 30 can be one or more, and the number of grooves 50 that at least partially overlap with the orthographic projections of the second side surface 102 onto the plane of the substrate 30 can be one or more.

[0143] In some possible exemplary embodiments, the orthographic projection of the groove 50 onto the plane where the substrate 30 is located may fall within the orthographic projection range of the connection portion 10-1 onto the plane where the substrate 30 is located.

[0144] In some exemplary embodiments, such as Figure 11 As shown, the width W of the groove 50 projected onto the plane of the substrate 30 can range from 1.0 micrometer to 2.0 micrometers. For example, it can be 1.5 micrometers, 1.6 micrometers, or 1.8 micrometers, etc. The width direction of the groove is perpendicular to its extension direction. In this embodiment of the invention, by limiting the width of the groove, the requirements for the fabrication process are reduced, the complexity of the groove fabrication process is reduced, and the fabrication cost is reduced, while satisfying the dynamic characteristics of changing the flow of the alignment liquid.

[0145] In some exemplary embodiments, the length of the orthographic projection of the groove 50 onto the plane of the substrate 30 is greater than or equal to its width, and the length is greater than or equal to 1.5 micrometers.

[0146] In some exemplary embodiments, such as Figure 11 As shown, the orthographic projection of the groove 50 onto the plane of the substrate 30 is located on the side opposite to the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 along the second direction Y. The minimum distance L2 between the orthographic projection of the groove 50 onto the plane of the substrate 30 and the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 can range from 0.5 micrometers to 1.0 micrometers. For example, it can be 0.6 micrometers, 0.7 micrometers, 0.75 micrometers, 0.8 micrometers, or 0.9 micrometers, etc. In this embodiment of the present invention, by limiting the numerical range of L2, the groove can be positioned appropriately on the hole wall so that the groove meets the requirement of guiding the alignment liquid into the bottom of the first through hole, thereby improving the uniformity of the alignment liquid coating diffusion.

[0147] In some exemplary embodiments, such as Figure 11 As shown, the orthographic projection of the groove 50 onto the plane of the substrate 30 is located on one side of the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 along the first direction X. Alternatively, the orthographic projection of the groove 50 onto the plane of the substrate 30 is located on the side of the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 along the opposite direction of the first direction X. The minimum distance L3 between the orthographic projection of the groove 50 onto the plane of the substrate 30 and the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 can range from 1.0 micrometer to 2.0 micrometers. For example, it can be 1.2 micrometers, 1.5 micrometers, or 1.8 micrometers, etc. In this embodiment of the present invention, by limiting the numerical range of L3, the groove can be positioned appropriately on the hole wall so that the groove meets the requirement of guiding the alignment liquid into the bottom of the first via, thereby improving the uniformity of the alignment liquid coating diffusion.

[0148] In some exemplary embodiments, such as Figure 12 As shown, in Figure 12 The groove is not shown in the diagram. The angle α between the hole wall K13 with the groove opening and the plane of the substrate 30 can range from 30° to 60°. For example, the angle α can be 40°, 50°, or 55°, etc. In this embodiment of the present invention, by limiting the inclination angle of the hole wall with the groove opening, the hole wall can play a better guiding role during the flow of the alignment liquid. This facilitates the alignment liquid to enter the groove through the opening, and is beneficial to the groove and the connection area between the groove and the hole wall. It changes the dynamic characteristics of the alignment liquid flow, thereby affecting the surface tension of the alignment liquid and helping to improve the uniformity of the alignment liquid coating diffusion.

[0149] In some exemplary embodiments, such as Figure 12 As shown, within the cross-section formed by the first direction X and the third direction Z, the groove 50 can extend along the first direction X or along the third direction Z. In this embodiment of the invention, the groove alters the flatness of the local surface of the pixel electrode at the groove location, causing the local surface of the pixel electrode to concave towards the groove, forming an uneven structure. This changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, and helps improve the uniformity of the alignment liquid coating diffusion.

[0150] Figure 13 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 14 for Figure 13 A cross-sectional view of the section marked FF. (See diagram below.) Figure 13 , Figure 14 As shown, the structure of the display area of ​​the array substrate is basically the same as that of the previous embodiment. The main difference is that the orthographic projection of the groove 50 on the plane of the substrate 30 is located on the side of the orthographic projection of the bottom of the first hole K12 on the plane of the substrate 30 along the second direction Y. The orthographic projection of the groove 50 on the plane of the substrate 30 overlaps with the orthographic projection of at least one comb tooth portion 10-2 on the plane of the substrate 30, and the orthographic projection of the groove 50 on the plane of the substrate 30 overlaps with the orthographic projection of the connecting portion 10-1 on the plane of the substrate 30.

[0151] The connecting portion 10-1 may further include a third side surface 103, which is disposed opposite to the first side surface 101 along the second direction Y. The orthographic projection of at least one groove 50 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the third side surface 103 onto the plane of the substrate 30. The orthographic projection of the first hole top K11 of the first via K1 onto the plane of the substrate 30 at least partially overlaps with the orthographic projection of the third side surface 103 onto the plane of the substrate 30. In this embodiment of the invention, by setting the orthographic projection of the first hole top K11 onto the plane of the substrate 30 to at least partially overlap with the orthographic projection of the third side surface 103 onto the plane of the substrate 30, the area forming the uneven structure can be increased, which is beneficial for the alignment liquid to flow into the bottom of the first via K1 and helps to improve the uniformity of the alignment liquid coating diffusion.

[0152] In some exemplary embodiments, such as Figure 13As shown, the orthographic projection of the groove 50 onto the plane of the substrate 30 is located on one side of the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 along the second direction Y. The minimum distance L4 between the orthographic projection of the groove 50 onto the plane of the substrate 30 and the orthographic projection of the bottom of the first hole K12 onto the plane of the substrate 30 can range from 1.0 micrometer to 2.0 micrometer. For example, it can be 1.2 micrometer, 1.5 micrometer, or 1.8 micrometer, etc. In this embodiment of the present invention, by limiting the numerical range of L4, the groove can be positioned appropriately on the hole wall so that the groove meets the requirement of guiding the alignment liquid into the bottom of the first via, thereby improving the uniformity of the alignment liquid coating diffusion.

[0153] Figure 15 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 16 for Figure 15 A cross-sectional view of the area marked GG. (See diagram below.) Figure 15 , Figure 16 As shown, the structure of the display area of ​​the array substrate is basically the same as that of the aforementioned embodiment. The main difference is that the connecting portion 10-1 may include multiple connected side surfaces. Two adjacent side surfaces are connected to form an intersection area, and multiple connected side surfaces form multiple intersection areas. The multiple side surfaces may include a first side surface 101, a second side surface 102, a third side surface 103, a fourth side surface 104, and a fifth side surface 105. The first side surface 101 and the third side surface 103 are arranged opposite each other along the second direction Y, and the first side surface 101 is farther away from the comb portion 10-2 than the third side surface 103. The multiple comb portions 10-2 can be connected to the third side surface 103, and the comb portion 10-2 is located on one side of the third side surface 103 along the second direction Y. The second side surface 102 is located between the first side surface 101 and the third side surface 103, and the two second side surfaces 102 are respectively located on both sides of the first side surface 101 along the first direction X. The fourth side surface 104 is located between the second side surface 102 and the third side surface 103, and the fifth side surface 105 is located between the fourth side surface 104 and the second side surface 102. The fourth side 104 and the second side 102 can be connected via the fifth side 105, or the fourth side 104 and the second side 102 can be directly connected. At least one intersecting area's orthographic projection onto the plane of the substrate 30 falls within the orthographic projection range of the top of the first hole K11 onto the plane of the substrate 30. In this embodiment of the invention, by setting at least one intersecting area so that its orthographic projection onto the plane of the substrate falls within the orthographic projection range of the top of the first hole onto the plane of the substrate, since the intersecting area is formed by the intersection of two sides in different directions, the degree of unevenness can be increased, which is beneficial for the alignment liquid to flow into the bottom of the first via. The flow direction of the alignment liquid is as follows... Figure 15 The dashed arrow in the image indicates that this helps improve the uniformity of the diffusion of the alignment liquid coating.

[0154] In some exemplary embodiments, the orthographic projection of all intersecting regions onto the plane where the substrate 30 is located falls within the orthographic projection range of the first hole top K11 onto the plane where the substrate 30 is located.

[0155] In some exemplary embodiments, such as Figure 15 As shown, at least one of the multiple intersecting regions is paired with a groove 50. For example, three of the multiple intersecting regions are paired with a groove 50. The orthographic projection of the intersecting region onto the plane of the substrate 30 falls within the orthographic projection range of the paired grooves 50 onto the plane of the substrate 30, and the orthographic projection of the grooves 50 onto the plane of the substrate 30 falls within the orthographic projection range of the first hole top K11 onto the plane of the substrate 30. Alternatively, all intersecting regions are paired with grooves 50. In this embodiment of the invention, by setting the intersecting regions and grooves to be paired, the surface complexity of the grooves and the area where the grooves connect to the hole wall can be increased. This is beneficial for improving the ability to change the dynamic characteristics of the alignment liquid flow, improving the ability to influence the surface tension of the alignment liquid, and helping to improve the uniformity of the alignment liquid coating diffusion.

[0156] In some exemplary embodiments, such as Figure 15 As shown, the orthographic projection of the groove 50 onto the plane containing the substrate 30 can be rectangular. For example, it can be a square of 1.0 micrometers, or a square of 1.5 micrometers, or a square of 2.0 micrometers.

[0157] In some exemplary embodiments, such as Figure 15 As shown, the minimum distance L5 between the orthographic projection of the groove 50 onto the plane of the substrate 30 and the orthographic projection of the bottom of the first via K12 onto the plane of the substrate 30 can range from 0.5 micrometers to 1.5 micrometers. For example, it can be 0.8 micrometers, 1.0 micrometers, or 1.2 micrometers, etc. In this embodiment of the present invention, by limiting the numerical range of L5, the groove can be positioned appropriately on the via wall so that the groove meets the requirement of guiding the alignment liquid into the bottom of the first via, thereby improving the uniformity of the alignment liquid coating diffusion.

[0158] Figure 17 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 18 for Figure 17 A cross-sectional view of the section marked HH. (See diagram below.) Figure 17 , Figure 18 As shown, the display area of ​​the array substrate may further include a protrusion structure 34. The portion of the protrusion structure 34 projected onto the plane of the substrate 30 may be located on the side of the connector 10-1 away from the comb portion 10-2, and the projection of the protrusion structure 34 onto the plane of the substrate 30 overlaps with the projection of the connector 10-1 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 17 The dashed arrow in the image indicates the meaning.

[0159] The orthographic projection of the protrusion 34 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the top of the first via K11 onto the plane of the substrate 30, or the orthographic projection of the protrusion 34 onto the plane of the substrate 30 does not overlap with the orthographic projection of the top of the first via K11 onto the plane of the substrate 30. The orthographic projection of the protrusion 34 onto the plane of the substrate 30 does not overlap with the orthographic projection of the bottom of the first via K12 onto the plane of the substrate 30, and the orthographic projection of the protrusion 34 onto the plane of the substrate 30 does not overlap with the orthographic projection of the second via K2 onto the plane of the substrate 30.

[0160] like Figure 18 As shown, a portion of the protrusion structure 34 is located on the side of the pixel electrode 10 away from the substrate 30 and is in contact with the surface of the pixel electrode 10 away from the substrate 30. A portion of the protrusion structure 34 is also in contact with the surface of the third insulating layer 33 away from the substrate 30. In this embodiment of the invention, the protrusion structure creates an uneven improved structure 11 in the region near the top of the first hole. This improved structure 11 alters the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and enhances the uniformity of the displayed image.

[0161] In some exemplary embodiments, such as Figure 18 As shown, the improved structure 11 may include a first profile 11-1, a second profile 11-2, and a transition profile 11-3 connected to each other. There is a gap between the first profile 11-1 and the second profile 11-2 along a third direction Z. Both the first profile 11-1 and the second profile 11-2 extend along the plane of the substrate 30. The first profile 11-1 is farther from the substrate 30 than the second profile 11-2, and the second profile 11-2 is closer to the central axis of the second hole bottom K22 than the first profile 11-1. The central axis of the second hole bottom K22 is a straight line extending along a third direction Z through the geometric center of the second hole bottom K22. The transition profile 11-3 is located between the first profile 11-1 and the second profile 11-2, and the first profile 11-1 and the second profile 11-2 are connected via the transition profile 11-3.

[0162] like Figure 18 As shown, a portion of the protrusion structure 34 forms the first surface 11-1 and the transition surface 11-3, while a portion of the pixel electrode 10 forms the second surface 11-2.

[0163] In some exemplary embodiments, such as Figure 17 As shown, the orthographic projection of the protrusion structure 34 onto the plane of the substrate 30 can be a rectangle or a similar rectangle extending along the first direction X.

[0164] In some exemplary embodiments, such as Figure 17 As shown, the orthographic projection of the first via K1 onto the plane of the substrate 30 can fall within the orthographic projection range of the connecting part 10-1 onto the plane of the substrate 30, and the orthographic projection of the second via K2 onto the plane of the substrate 30 can fall within the orthographic projection range of the connecting part 10-1 onto the plane of the substrate 30.

[0165] In some exemplary embodiments, the protrusion structure 34 and the spacer can be in the same layer, which can simplify the fabrication process of the array substrate, eliminate the need to add new film layers, and facilitate the thinner and lighter design of the array substrate.

[0166] In some exemplary embodiments, such as Figure 18 As shown, a portion of the protrusion structure 34 is located on the side of the pixel electrode 10 away from the substrate 30, and the maximum thickness H2 of the portion of the protrusion structure 34 can range from 0.5 micrometers to 2.5 micrometers.

[0167] In some exemplary embodiments, the material of the protrusion structure 34 may include an inorganic material, which may include silicon oxynitride (SiO2). x N y ) or silicon nitride (SiN) x ) or silicon oxide (SiO) x One or more of the following: ) . The protruding structure 34 can be a single layer, multiple layers, or a composite layer.

[0168] Figure 19 This is a partial top view of the display area of ​​the array substrate according to another embodiment of the present invention. Figure 20 for Figure 19 A cross-sectional view of the section marked JJ. (See diagram below.) Figure 19 , Figure 20 As shown, the display area of ​​the array substrate may further include a raised block 35. The orthographic projection of the raised block 35 onto the plane of the substrate 30 overlaps with the orthographic projection of the connecting portion 10-1 onto the plane of the substrate 30. The flow of the alignment liquid is as follows: Figure 19 The dashed arrow in the image indicates the meaning.

[0169] The orthographic projection of the shim block 35 onto the plane of the substrate 30 partially overlaps with the orthographic projection of the top of the first via K11 onto the plane of the substrate 30; alternatively, the orthographic projection of the shim block 35 onto the plane of the substrate 30 does not overlap with the orthographic projection of the top of the first via K11 onto the plane of the substrate 30. The orthographic projection of the shim block 35 onto the plane of the substrate 30 does not overlap with the orthographic projection of the bottom of the first via K12 onto the plane of the substrate 30, and the orthographic projection of the shim block 35 onto the plane of the substrate 30 does not overlap with the orthographic projection of the second via K2 onto the plane of the substrate 30.

[0170] like Figure 20 As shown, the raised block 35 can be located between the second insulating layer 32 and the third insulating layer 33. Alternatively, the raised block 35 can be located between the third insulating layer 33 and the pixel electrode 10. In this embodiment of the invention, by setting the raised block, the raised block forms an uneven structure in the area near the top of the first hole to form an improved structure 11. The improved structure 11 changes the dynamic characteristics of the alignment liquid flow, affects the surface tension of the alignment liquid, helps to improve the uniformity of the alignment liquid coating diffusion, improves display defects such as black spots, and improves the uniformity of the displayed image.

[0171] In some exemplary embodiments, such as Figure 20 As shown, the first surface 11-1, the second surface 11-2, and the transition surface 11-3 are interconnected as an integral structure, and part of the pixel electrode 10 constitutes the improved structure 11.

[0172] In some exemplary embodiments, the material of the raised block 35 may include a metallic material, such as any one or more of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti). Alternatively, it may be an alloy of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), such as aluminum-neodymium alloy (AlNd), molybdenum-niobium alloy (MoNb), or molybdenum-nickel-titanium alloy (MoNiTi). The raised block 35 may be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti, Mo / Nb / Cu, MoNiTi / Cu, MoNb / Cu / MoNiTi, or MoNiTi / Cu / MoNiTi, etc.

[0173] In some exemplary embodiments, the raised block 35 and the touch metal layer can be of the same layer structure, which can simplify the fabrication process of the array substrate, eliminate the need to add new film layers, and facilitate the thinner and lighter design of the array substrate.

[0174] In some exemplary embodiments, such as Figure 20 As shown, the orthographic projection of the pad 35 onto the plane of the substrate 30 overlaps with the orthographic projection of the pixel electrode 10 onto the plane of the substrate 30, and the maximum thickness H3 of the pad 35 with overlapping orthographic projections can range from 0.5 micrometers to 2.5 micrometers.

[0175] This invention also provides a display device, exemplified by a display device capable of implementing ADS mode. The display device may include the array substrate described in any of the foregoing embodiments. The display device may further include a counter substrate and a liquid crystal layer disposed between the array substrate and the counter substrate. The pixel electrode 10 and common electrode 40 included in the array substrate may be configured to generate an electric field controlling the deflection of liquid crystal molecules in the liquid crystal layer. Both the pixel electrode 10 and common electrode 40 are located on the array substrate, while no electrodes are disposed on the counter substrate side. The liquid crystal molecules in the liquid crystal layer may be horizontally arranged on the array substrate; in this embodiment, the horizontal direction is parallel to the plane of the array substrate. The counter substrate may include a substrate substrate and a black matrix and a color filter layer disposed on the substrate substrate. However, this invention is not limited in this respect.

[0176] This utility model embodiment also provides a display device. The display device includes the array substrate described in any of the foregoing embodiments. The display device can be any product or component with display function, such as a liquid crystal panel, electronic paper, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. This utility model embodiment is not limited in this respect.

[0177] Although the embodiments disclosed in this utility model are as described above, the content described is only for the purpose of facilitating understanding of this utility model and is not intended to limit this utility model. It should be noted that the above embodiments or implementation methods are merely exemplary and not restrictive. Therefore, this utility model is not limited to the content specifically shown and described herein. Various modifications, substitutions, or omissions can be made to the form and details of the implementation without departing from the scope of this utility model.

Claims

1. An array substrate, characterized in that, include: Substrate; Transistors are located on the substrate; An organic insulating layer and a passivation layer are sequentially stacked on the side of the transistor away from the substrate. The organic insulating layer has a first via, and the passivation layer has a second via. The orthographic projection of the first via onto the plane of the substrate and the orthographic projection of the second via onto the plane of the substrate at least partially overlap. The first via and the second via are connected, and the second via exposes a portion of the transistor. A pixel electrode, at least partially located on the side of the passivation layer away from the substrate, is located within the second via and connected to the transistor. The improved structure includes a first profile, a second profile, and a transition profile connected together. The first profile and the second profile have a vertical spacing along a direction perpendicular to the plane of the substrate, and the first profile and the second profile have a horizontal spacing between their orthographic projections onto the plane of the substrate. The first profile and the second profile are connected via the transition profile. The orthographic projection of the improved structure onto the plane of the substrate overlaps with the orthographic projection of the first via onto the plane of the substrate. The vertical spacing is greater than or equal to 0.5 micrometers.

2. The array substrate as described in claim 1, characterized in that, The passivation layer has a portion of its surface away from the substrate forming the first profile, and the pixel electrode has a portion of its surface away from the substrate forming the second profile, with the second profile being closer to the substrate than the first profile.

3. The array substrate as described in claim 2, characterized in that, The first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The first hole top is farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falls within the orthographic projection range of the first hole top onto the plane of the substrate. The second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The second hole top is farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falls within the orthographic projection range of the second hole top onto the plane of the substrate. The orthographic projection of the bottom of the second hole onto the plane of the substrate falls within the orthographic projection range of the first via onto the plane of the substrate, and the orthographic projection of the top of the second hole onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

4. The array substrate as described in claim 3, characterized in that, The orthographic projection of the bottom of the second hole onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate. The orthographic projection of the top of the second hole onto the plane of the substrate partially overlaps with the orthographic projection of the top of the first hole onto the plane of the substrate. The orthographic projection of the top of the second hole onto the plane of the substrate partially overlaps with the orthographic projection of the bottom of the first hole onto the plane of the substrate.

5. The array substrate as described in claim 4, characterized in that, The pixel electrode includes a connecting portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connecting portion; the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of the connecting portion on the plane of the substrate.

6. The array substrate as described in claim 4, characterized in that, The pixel electrode includes a connecting portion and a plurality of comb teeth, which are arranged side by side at intervals and extend away from the connecting portion; the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of the connecting portion on the plane of the substrate, and the orthographic projection of the top of the second hole on the plane of the substrate overlaps with the orthographic projection of at least one of the comb teeth on the plane of the substrate.

7. The array substrate as described in claim 4, characterized in that, The pixel electrode includes a connecting portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending away from the connecting portion; the connecting portion includes a plurality of connected side surfaces, two adjacent side surfaces being connected to form an intersection area, and at least one of the intersection areas having its orthographic projection onto the plane of the substrate falling within the orthographic projection range of the top of the second hole onto the plane of the substrate.

8. The array substrate as described in claim 2, characterized in that, The first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The first hole top is farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falls within the orthographic projection range of the first hole top onto the plane of the substrate. The second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The second hole top is farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falls within the orthographic projection range of the second hole top onto the plane of the substrate. The orthographic projection of the first via onto the plane of the substrate falls within the orthographic projection range of the bottom of the second via onto the plane of the substrate, and the orthographic projection of the top of the second via onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

9. The array substrate as described in claim 2, characterized in that, The first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The first hole top is farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falls within the orthographic projection range of the first hole top onto the plane of the substrate. The second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The second hole top is farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falls within the orthographic projection range of the second hole top onto the plane of the substrate. The orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate, and the orthographic projection of the top of the first hole onto the plane of the substrate overlaps with the orthographic projection portion of the pixel electrode onto the plane of the substrate.

10. The array substrate as claimed in claim 9, characterized in that, The orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the pixel electrode onto the plane of the substrate, and the orthographic projection of the bottom of the first via onto the plane of the substrate falls within the orthographic projection range of the pixel electrode onto the plane of the substrate.

11. The array substrate as claimed in claim 10, characterized in that, The organic insulating layer has at least one groove with an opening that communicates with the first through hole; the opening is located on the wall of the first through hole, the wall is located between the top and bottom of the first hole, and the top and bottom of the first hole are connected via the wall.

12. The array substrate as claimed in claim 11, characterized in that, The orthographic projection of the groove onto the plane of the substrate falls within the orthographic projection range of the top of the first hole onto the plane of the substrate, and the orthographic projection of the groove onto the plane of the substrate does not overlap with the orthographic projection of the bottom of the first hole onto the plane of the substrate.

13. The array substrate as claimed in claim 12, characterized in that, The orthographic projection of the groove onto the plane of the substrate overlaps with the orthographic projection of the pixel electrode onto the plane of the substrate.

14. The array substrate as claimed in claim 13, characterized in that, The pixel electrode includes a connecting portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending in a direction away from the connecting portion; the connecting portion includes a plurality of connected side surfaces, and at least the orthographic projection of at least one of the grooves onto the plane of the substrate at the same plane at the same plane at the same time as the orthographic projection of the side surface onto the plane of the substrate at the same time as the same plane at the same time.

15. The array substrate as claimed in claim 13, characterized in that, The pixel electrode includes a connecting portion and a plurality of comb teeth, the plurality of comb teeth being arranged side by side at intervals and extending away from the connecting portion; the connecting portion includes a plurality of connected side surfaces, two adjacent side surfaces being connected to form an intersection area, and at least one of the intersection areas having its orthographic projection onto the plane of the substrate falling within the orthographic projection range of the groove onto the plane of the substrate.

16. The array substrate according to any one of claims 11 to 15, characterized in that, The width of the groove projected onto the plane of the substrate ranges from 1.0 micrometer to 2.0 micrometer.

17. The array substrate according to any one of claims 11 to 15, characterized in that, The angle between the wall of the hole with the opening of the groove and the plane of the substrate ranges from 30° to 60°.

18. The array substrate as claimed in claim 1, characterized in that, It also includes a protrusion structure, a portion of which is located on the side of the pixel electrode away from the substrate and contacts the surface of the pixel electrode away from the substrate, and a portion of which contacts the surface of the passivation layer away from the substrate; the portion of the protrusion structure forms the first profile, and the portion of the pixel electrode forms the second profile.

19. The array substrate as claimed in claim 18, characterized in that, The first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The first hole top is farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falls within the orthographic projection range of the first hole top onto the plane of the substrate. The second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The second hole top is farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falls within the orthographic projection range of the second hole top onto the plane of the substrate. The orthographic projection of the second via onto the plane of the substrate falls within the orthographic projection range of the bottom of the first hole onto the plane of the substrate, and the orthographic projection of the protrusion structure onto the plane of the substrate does not overlap with the orthographic projection of the second via onto the plane of the substrate.

20. The array substrate as claimed in claim 19, characterized in that, The orthographic projection of the protrusion structure onto the plane of the substrate partially overlaps with the orthographic projection of the top of the first hole onto the plane of the substrate, or the orthographic projection of the protrusion structure onto the plane of the substrate does not overlap with the orthographic projection of the top of the first hole onto the plane of the substrate.

21. The array substrate according to any one of claims 18 to 20, characterized in that, The orthographic projections of the first via on the plane of the substrate and the second via on the plane of the substrate both fall within the orthographic projection range of the pixel electrode on the plane of the substrate.

22. The array substrate as claimed in claim 1, characterized in that, The portion of the pixel electrode constitutes the improved structure.

23. The array substrate as claimed in claim 22, characterized in that, It also includes a shim block, which is located between the organic insulating layer and the passivation layer, or the shim block is located between the passivation layer and the pixel electrode, wherein the orthographic projection of the shim block on the plane of the substrate at least partially overlaps with the orthographic projection of the pixel electrode on the plane of the substrate.

24. The array substrate as claimed in claim 22, characterized in that, The first via includes a first hole top and a first hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The first hole top is farther away from the substrate than the first hole bottom, and the orthographic projection of the first hole bottom onto the plane of the substrate falls within the orthographic projection range of the first hole top onto the plane of the substrate. The second via includes a second hole top and a second hole bottom disposed opposite each other along a direction perpendicular to the plane of the substrate. The second hole top is farther away from the substrate than the second hole bottom, and the orthographic projection of the second hole bottom onto the plane of the substrate falls within the orthographic projection range of the second hole top onto the plane of the substrate. The orthographic projection of the first via onto the plane of the substrate falls within the orthographic projection range of the bottom of the second via onto the plane of the substrate, and the orthographic projections of the first via onto the plane of the substrate and the second via onto the plane of the substrate both fall within the orthographic projection range of the pixel electrode onto the plane of the substrate.

25. A display device, characterized in that, Includes the array substrate as described in any one of claims 1 to 24.

Images