Charge pump with low mismatch and very wide current regulation range

Abstract

The utility model relates to a kind of charge pump of low mismatching extremely wide current regulation range, the utility model includes switch tube MNB, switch tube MPB, double-ended input single-ended output amplifier OTA2, double-ended input single-ended output amplifier OTA1, 3-8 decoder and four groups of parallel current steering charge pump unit, four groups of current steering charge pump unit are in parallel, switch tube MNB, switch tube MPB and double-ended input single-ended output amplifier OTA2 constitute bias circuit, each group of current steering type charge pump unit is by six switch tubes, wherein two switch tubes constitute current mirror, four switch tubes constitute complementary current steering switch, and pass through double-ended input single-ended output amplifier OTA1 clamping key voltage, 3-8 decoder is connected with the complementary current steering switch of each group of current steering type charge pump unit respectively.The utility model adjusts the number of switch tube conduction by control signal, to achieve the matching of current size and switch tube size, while obtaining extremely wide current output range, to low current mismatching, improve the static, dynamic characteristics of charge pump.

Description

Technical Field

[0001] This utility model belongs to the field of integrated circuit design, and in particular relates to a charge pump with low mismatch and an extremely wide current adjustment range. Background Technology

[0002] In high-speed communication systems, both wired and wireless communication require phase-locked loops (PLLs) to provide accurate and reliable frequency sources for sampling, mixing, clock data recovery, and other functions. Currently, the most widely used and reliable PLL structure remains the Type II charge pump PLL. In a Type II charge pump PLL, the charge pump current is a crucial system parameter, affecting the loop characteristics, noise performance, and lock-in time. However, the current regulation range of traditional current-controlled charge pump circuits is limited by the fixed size of the charge pump switch. For example, when the charge pump current is small and the fixed-size switch is too large, the parasitic capacitance of the switch is relatively large, and the effects of charge injection, clock feedthrough, and charge sharing become more pronounced, leading to a deterioration in the dynamic characteristics of the charge pump. Conversely, when the charge pump current is large and the switch size is relatively small, the on-resistance of the switch is high, resulting in a large voltage drop when a large current flows. This reduces the voltage margin at the source and drain of the current source transistor, narrowing the voltage swing at the charge pump output node, exacerbating current mismatch, and worsening its static characteristics. Utility Model Content

[0003] To address the aforementioned technical problems in the background art, this utility model provides a charge pump with low mismatch and an extremely wide current adjustment range. By adjusting the number of conducting switches through a control signal, the current magnitude is matched with the size of the switching switches, achieving a low current mismatch while obtaining an extremely wide current output range, thus improving the static and dynamic characteristics of the charge pump.

[0004] The technical solution of this utility model is as follows: This utility model is a charge pump with low mismatch and ultra-wide current adjustment range. Its special feature is that the charge pump with low mismatch and ultra-wide current adjustment range includes a switching transistor MNB, a switching transistor MPB, a dual-input single-output amplifier OTA2, a dual-input single-output amplifier OTA1, a 3-8 decoder, and four sets of parallel current-rudder charge pump units. The four sets of current-rudder charge pump units are connected in parallel. The switching transistor MNB, the switching transistor MPB, and the dual-input single-output amplifier OTA2 constitute a bias circuit. Each set of current-rudder charge pump units consists of six switching transistors, of which two switching transistors constitute a current mirror, and four switching transistors constitute a complementary current-rudder switch. The critical voltage is clamped by the dual-input single-output amplifier OTA1. The 3-8 decoder is connected to the complementary current-rudder switch of each set of current-rudder charge pump units.

[0005] Furthermore, in the four sets of current-rudder charge pump units, the first set consists of switches MP1, MN1, MP5, MN5, MP6, and MN6. Switches MP1 and MN1 form a current mirror, and switches MP5, MN5, MP6, and MN6 form a complementary current-rudder switch. The critical voltage is clamped through a dual-input single-output amplifier OTA1. The second set consists of switches MP2, MN2, MP7, MN7, MP8, and MN8. Switches MP2 and MN2 form a current mirror, and switches MP7, MN7, MP8, and MN8 form a complementary current-rudder switch. The critical voltage is clamped through a dual-input single-output amplifier OTA1. The third group of current-rudder charge pump units consists of switching transistors MP3, MN3, MP9, MN9, MP10, and MN10. Switching transistors MP3 and MN3 form a current mirror, and switching transistors MP9, MN9, MP10, and MN10 form a complementary current-rudder switch. The critical voltage is clamped through a dual-ended input single-ended output amplifier OTA1. The fourth group of current-rudder charge pump units consists of switching transistors MP4, MN4, MP11, MN11, MP12, and MN12. Switching transistors MP4 and MN4 form a current mirror, and switching transistors MP11, MN1, MP12, and MN12 form a complementary current-rudder switch. The critical voltage is clamped through a dual-ended input single-ended output amplifier OTA1.

[0006] Furthermore, the switching transistor MNB is biased by an external voltage V3. The negative terminal of the dual-input single-output amplifier OTA2 is connected to the output node VX of the charge pump, and the positive terminal is connected to the drain V2 of the switching transistors MNB and MPB. The output V1 of the dual-input single-output amplifier OTA2 is used to bias the switching transistors MPB, MP1, MP2, MP3, and MP4.

[0007] Furthermore, the 3-8 decoder outputs a 3-bit charge pump current control signal ICP_TRIM<2:0> to control the enable of each of the four current-rudder charge pump units. When a current-rudder charge pump unit is enabled, its four switch signals UPxP / UPxN / DNxP / DNxN are connected to the UP / UPB / DN / DNB signals output by the frequency and phase detector PFD, respectively. The UP signal output by the frequency and phase detector PFD is converted by the 3-8 decoder into the charge pump replication path pull-up current switch control signals UP1P, UP1_1P, and U... P2P, UP4P; the UPB signal of the frequency and phase discriminator PFD is converted by decoder 3-8 into charge pump pull-up current switch control signals UP1N, UP1_1N, UP2N, UP4N; the DN signal of the frequency and phase discriminator PFD is converted by decoder 3-8 into charge pump pull-down current switch control signals DN1P, DN1_1P, DN2P, DN4P; the DNB signal of the frequency and phase discriminator PFD is converted by decoder 3-8 into charge pump replication path pull-down current switch control signals DN1N, DN1_1N, DN2N, DN4N.

[0008] This invention provides a charge pump with low mismatch and an extremely wide current adjustment range. To eliminate the mismatch between the charge pump current and the size of the switching transistors, it achieves a very wide current output range while maintaining low current mismatch. Its power consumption adapts to the magnitude of the output current. This invention uses switching transistors MNB, MPB, and OTA2 to form a bias circuit. The current-rudder type charge pump unit uses switching transistors MP1 and MN1 to form a current mirror, and switching transistors MP5, MN5, MP6, and MN6 to form a complementary current-rudder switch. The charge sharing effect is suppressed by clamping the critical voltage through OTA1. Therefore, this invention has the following advantages:

[0009] 1) This utility model is composed of four sets of current-driven charge pump units connected in parallel, which achieves low current mismatch while obtaining an extremely wide current output range, improves the speed of current build-up, and improves the dynamic and static characteristics of the charge pump.

[0010] 2) Since the dual-input single-output amplifier OTA1 has a large current driving capability, this invention can ensure that the voltages VX and VY are the same when the charge pump is working, suppress the charge sharing effect generated during switching, improve the speed of current build-up, and improve the dynamic characteristics of this current-rudder type charge pump.

[0011] 3) The dual-input single-output amplifier OTA2 can effectively clamp the voltages of V2 and VX. This invention can ensure the accuracy of the current mirror during replication, suppress the channel length modulation effect of the current mirror transistor, effectively increase the output impedance of the current mirror, and greatly improve the swing of the charge pump output node without deteriorating the static current matching degree. Attached Figure Description

[0012] Figure 1 This is the circuit schematic diagram of this utility model;

[0013] Figure 2 This is a schematic diagram of the current control circuit port of the 3-8 decoder of this utility model. Detailed Implementation

[0014] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0015] See Figure 1 , 2 The circuit structure of the charge pump with low mismatch and extremely wide current adjustment range of this utility model includes a switching transistor MNB, a switching transistor MPB, a dual-input single-output amplifier OTA2, a dual-input single-output amplifier OTA1, a 3-8 decoder, and four sets of parallel current-rudder charge pump units. The four sets of current-rudder charge pump units are connected in parallel. The switching transistor MNB, the switching transistor MPB, and the dual-input single-output amplifier OTA2 constitute a bias circuit. Each set of current-rudder charge pump units consists of six switching transistors, of which two switching transistors constitute a current mirror and four switching transistors constitute a complementary current-rudder switch. The critical voltage is clamped by the dual-input single-output amplifier OTA1. The 3-8 decoder is connected to the complementary current-rudder switch of each set of current-rudder charge pump units.

[0016] Among the four groups of current-rudder charge pump units, the first group consists of switches MP1, MN1, MP5, MN5, MP6, and MN6. Switches MP1 and MN1 form a current mirror, and switches MP5, MN5, MP6, and MN6 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1. The second group consists of switches MP2, MN2, MP7, MN7, MP8, and MN8. Switches MP2 and MN2 form a current mirror, and switches MP7, MN7, MP8, and MN8 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1. The third group of current-rudder charge pump units consists of switching transistors MP3, MN3, MP9, MN9, MP10, and MN10. Switching transistors MP3 and MN3 form a current mirror, and switching transistors MP9, MN9, MP10, and MN10 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1. The fourth group of current-rudder charge pump units consists of switching transistors MP4, MN4, MP11, MN11, MP12, and MN12. Switching transistors MP4 and MN4 form a current mirror, and switching transistors MP11, MN1, MP12, and MN12 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1.

[0017] The switching transistor MNB is biased by an external voltage V3. The negative terminal of the dual-input single-output amplifier OTA2 is connected to the output node VX of the charge pump, and the positive terminal is connected to the drain V2 of the switching transistors MNB and MPB. The output V1 of the dual-input single-output amplifier OTA2 is used to bias the switching transistors MPB, MP1, MP2, MP3, and MP4.

[0018] The 3-to-8 decoder outputs a 3-bit charge pump current control signal ICP_TRIM<2:0> to enable the four current-rudder charge pump units. When one current-rudder charge pump unit is enabled, its four switch signals UPxP / UPxN / DNxP / DNxN are connected to the output signals UP / UPB / DN / DNB of the frequency and phase detector PFD (the frequency and phase detector PFD is the pre-amplifier circuit of the 3-to-8 decoder). The output UP signal of the frequency and phase detector PFD is converted by the 3-to-8 decoder into the charge pump replication path pull-up current switch control signal UP1P. UP1_1P, UP2P, UP4P; The UPB signal of the frequency and phase discriminator PFD is converted by a 3-8 decoder into the charge pump pull-up current switch control signals UP1N, UP1_1N, UP2N, UP4N; The DN signal of the frequency and phase discriminator PFD is converted by a 3-8 decoder into the charge pump pull-down current switch control signals DN1P, DN1_1P, DN2P, DN4P; The DNB signal of the frequency and phase discriminator PFD is converted by a 3-8 decoder into the charge pump replication path pull-down current switch control signals DN1N, DN1_1N, DN2N, DN4N.

[0019] The working principle of this utility model is as follows:

[0020] 1) A 3-to-8 decoder outputs a 3-bit charge pump current control signal ICP_TRIM<2:0> to control the enable of each of the four charge pumps. When a charge pump is enabled, its four switch signals UPxP / UPxN / DNxP / DNxN are connected to the output signals UP / UPB / DN / DNB of the frequency and phase detector, respectively. The output UP signal of the frequency and phase detector PFD is converted into the charge pump replication path pull-up current switch control signals UP1P, UP1_1P, UP2P, and UP4P. The UPB signal of the frequency and phase detector PFD is converted into the charge pump pull-up current switch control signals UP1N, UP1_1N, UP2N, and UP4N. The DN signal of the frequency and phase detector PFD is converted into the charge pump pull-down current switch control signals DN1P, DN1_1P, DN2P, and DN4P. The DNB signal of the frequency and phase detector PFD is converted into the charge pump replication path pull-down current switch control signals DN1N, DN1_1N, DN2N, and DN4N.

[0021] A 3-to-8 decoder is used to convert the 3-bit current control signal and the UP / DN signal together into the switching control signals for each charge pump unit. For example, when ICP_TRIM<2:0>=100, according to Table 1, UP4P=UP1P=UP; UP4N=UP1N=UPB; DN4P=DN1P=DN; DN4N=DN1N=DNB.

[0022] Table 1 Truth Table for Current Control

[0023]

[0024] 2) Switches MP1, MP2, MP3, and MP4 form the pull-up current source of the four charge pump units with a width-to-length ratio of 1:1:2:4. Similarly, switches MN1, MN2, MN3, and MN4 form the pull-down current source of the four charge pump units with a width-to-length ratio of 1:1:2:4. Switches MP6, MN6; MP8, MN8; MP10, MN10; MP12, and MN12 also form the current output path of each charge pump unit with a size ratio of 1:1:2:4 that is proportional to the current flowing through them. The output node VX is located at the drain of each switch. Switches MP5, MN5, MP7, MN7, MP9, MN9, MP11, and MN11 form the replication path of each charge pump unit with the same width-to-length ratio as the corresponding switch in the output path. The replication node VY is located at the drain of each switch.

[0025] Switches MP1, MN1, MP5, MN5, MP6, and MN6 constitute a single current-driven charge pump unit. In this embodiment, four units of different sizes are connected in parallel. By matching the current magnitude with the switch size through the control method in step 1), the effect of large current and large switch size is achieved, and small current and small switch size is achieved. This results in a very wide current output range while maintaining low current mismatch.

[0026] 3) The dual-input single-output amplifier OTA1 uses a unity-gain negative feedback connection. The positive input terminal is connected to the charge pump output node VX, and the output is fed back to the negative input terminal and connected to the replication node VY. Since this amplifier has a large current drive capability, it can ensure that the voltages of VX and VY are the same when the charge pump is working, suppress the charge sharing effect generated during switching, improve the current build-up speed, and improve the dynamic characteristics of this current-rudder type charge pump.

[0027] 4) The bias circuit of this current-driven charge pump consists of switching transistors MNB, MPB, and a dual-input single-output amplifier OTA2. Switching transistor MNB is biased by an external voltage V3. The negative terminal of the dual-input single-output amplifier OTA2 is connected to the output node VX of the charge pump, and the positive terminal is connected to the drain V2 of switching transistors MNB and MPB. The output V1 of the dual-input single-output amplifier OTA2 is used to bias switching transistors MPB, MP1, MP2, MP3, and MP4. The dual-input single-output amplifier OTA2 can effectively clamp the voltage of V2 and VX, ensuring the accuracy of the current mirror during replication, suppressing the channel length modulation effect of the current mirror transistor, effectively increasing the output impedance of the current mirror, and greatly improving the swing of the output node VX of the charge pump without deteriorating the static current matching degree.

[0028] The above are merely specific embodiments disclosed in this utility model, but the scope of protection disclosed in this utility model is not limited thereto. The scope of protection disclosed in this utility model shall be determined by the scope of protection of the claims.

[0029] The content of this utility model and the technical content not specifically described in the above embodiments are the same as the prior art.

[0030] This utility model is not limited to the above embodiments. All of the contents of this utility model can be implemented and have the good effects described.

Claims

1. A charge pump with low mismatch and an extremely wide current adjustment range, characterized in that: The low-mismatch, ultra-wide current adjustment range charge pump includes a switching transistor MNB, a switching transistor MPB, a dual-input single-output amplifier OTA2, a dual-input single-output amplifier OTA1, a 3-8 decoder, and four sets of parallel current-rudder charge pump units. The four sets of current-rudder charge pump units are connected in parallel. The switching transistors MNB, MPB, and OTA2 form a bias circuit. Each set of current-rudder charge pump units consists of six switching transistors, two of which form a current mirror and four of which form a complementary current-rudder switch. The critical voltage is clamped by the dual-input single-output amplifier OTA1. The 3-8 decoder is connected to the complementary current-rudder switch of each set of current-rudder charge pump units.

2. The charge pump with low mismatch and extremely wide current adjustment range according to claim 1, characterized in that: In the four groups of current-rudder charge pump units, the first group consists of switching transistors MP1, MN1, MP5, MN5, MP6, and MN6. Switches MP1 and MN1 form a current mirror, and switches MP5, MN5, MP6, and MN6 form complementary current-rudder switches. The critical voltage is clamped through a dual-input single-output amplifier OTA1. The second group consists of switching transistors MP2, MN2, MP7, MN7, MP8, and MN8. Switches MP2 and MN2 form a current mirror, and switches MP7, MN7, MP8, and MN8 form complementary current-rudder switches. The critical voltage is clamped through a dual-input single-output amplifier OTA1. The third group of current-rudder charge pump units consists of switching transistors MP3, MN3, MP9, MN9, MP10, and MN10. Switching transistors MP3 and MN3 form a current mirror, and switching transistors MP9, MN9, MP10, and MN10 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1. The fourth group of current-rudder charge pump units consists of switching transistors MP4, MN4, MP11, MN11, MP12, and MN12. Switching transistors MP4 and MN4 form a current mirror, and switching transistors MP11, MN1, MP12, and MN12 form a complementary current-rudder switch. The critical voltage is clamped through a double-ended input single-ended output amplifier OTA1.

3. The charge pump with low mismatch and extremely wide current adjustment range according to claim 2, characterized in that: The switching transistor MNB is biased by an external voltage V3. The negative terminal of the dual-input single-output amplifier OTA2 is connected to the output node VX of the charge pump, and the positive terminal is connected to the drain V2 of the switching transistors MNB and MPB. The output V1 of the dual-input single-output amplifier OTA2 is used to bias the switching transistors MPB, MP1, MP2, MP3, and MP4.

4. The charge pump with low mismatch and extremely wide current adjustment range according to claim 3, characterized in that: The 3-8 decoder outputs a 3-bit charge pump current control signal ICP_TRIM<2:0> to control the enable of each of the four current-rudder charge pump units. When a current-rudder charge pump unit is enabled, its four switch signals UPxP / UPxN / DNxP / DNxN are respectively connected to the UP / UPB / DN / DNB signals output by the frequency and phase detector PFD. The UP signal output by the frequency and phase detector PFD is converted by the 3-8 decoder into the charge pump replication path pull-up current switch control signals UP1P, UP1_1P, UP2P, ... UP4P; the UPB signal of the frequency and phase detector PFD is converted by decoder 3-8 into charge pump pull-up current switch control signals UP1N, UP1_1N, UP2N, UP4N; the DN signal of the frequency and phase detector PFD is converted by decoder 3-8 into charge pump pull-down current switch control signals DN1P, DN1_1P, DN2P, DN4P; the DNB signal of the frequency and phase detector PFD is converted by decoder 3-8 into charge pump replication path pull-down current switch control signals DN1N, DN1_1N, DN2N, DN4N.

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