A data transmission system, a data transmission device, and a data reception device

CN224610818UActive Publication Date: 2026-08-07BEIJING DOSEE SCIENCE & TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
BEIJING DOSEE SCIENCE & TECHNOLOGY CO LTD
Filing Date
2025-08-20
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0005]针对上述的现有技术中存在的没有合适的硬件平台供技术人员进一步开发以实现多媒体信号传输的低延时的技术问题,目前尚未提出有效的解决方案

Benefits of technology

[0012]从而技术人员可以通过本申请提供的基于数据传输系统的硬件平台进行开发,以实现多媒体信号的低延时传输。进而解决了现有技术中存在的现有技术中没有合适的硬件平台供技术人员进一步开发以实现多媒体信号传输的低延时的技术问题。

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Abstract

The application discloses a data transmission system, a data transmission device and a data receiving device, comprising a data collection device, a data transmission device and a data receiving device, wherein the data transmission device is in communication connection with the data collection device and the data receiving device respectively. The data transmission device comprises a first programmable circuit module, which is in communication connection with the data collection device, is used for adding a time stamp to a multimedia signal received from the data collection device, and is used for segmenting and packing the multimedia signal based on the time stamp, wherein the multimedia signal comprises an original audio signal and / or an original video signal; and the first programmable circuit module is further used for sending a plurality of data packets corresponding to the multimedia signal to the data receiving device.
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Description

Technical Field

[0001] This application relates to the field of signal transmission technology, and in particular to a data transmission system, data transmission device, and data receiving device. Background Technology

[0002] In traditional data transmission systems, multimedia signals are typically transmitted using standard network protocols (such as UDP), and data encapsulation, scheduling, and network layer packaging are handled by a central processing unit (CPU). While this system architecture offers a degree of versatility and adaptability, it may introduce additional latency issues. Multimedia signals include, for example, audio and / or video signals.

[0003] For example, when network congestion or high system load occurs, if the central processing unit (CPU) is still required to address, encapsulate, and compress multimedia signals, end-to-end transmission latency may increase, affecting the real-time interactive experience. Therefore, for applications with high real-time requirements (such as video conferencing, interactive live streaming, and cloud gaming), traditional data transmission systems cannot meet their needs.

[0004] Therefore, there is currently a lack of a suitable hardware platform for engineers to further develop in order to achieve low-latency transmission of multimedia signals. These multimedia signals include, for example, audio signals and / or video signals.

[0005] There is currently no effective solution to the technical problem of the lack of a suitable hardware platform for technicians to further develop and achieve low latency in multimedia signal transmission in the existing technologies mentioned above. Utility Model Content

[0006] This invention provides a data transmission system, a data transmission device, and a data receiving device, to at least solve the technical problem in the prior art of lacking a suitable hardware platform for technicians to further develop in order to achieve low latency in multimedia signal transmission.

[0007] According to a first aspect of this application, a data transmission system is provided, including a data acquisition device, a data transmission device, and a data receiving device, wherein the data transmission device is communicatively connected to both the data acquisition device and the data receiving device. The data transmission device includes a first programmable circuit module, which is communicatively connected to the data acquisition device and configured to add timestamps to multimedia signals received from the data acquisition device, and to segment and package the multimedia signals based on the timestamps, wherein the multimedia signals include original audio signals and / or original video signals; and the first programmable circuit module is further configured to send multiple data packets corresponding to the multimedia signals to the data receiving device.

[0008] According to a second aspect of this application, a data transmission device is provided, comprising: a first programmable circuit module, wherein the first programmable circuit module is communicatively connected to a data acquisition device, wherein the first programmable circuit module is used to add timestamps to multimedia signals received by the data acquisition device, and to segment and package the multimedia signals based on the timestamps, wherein the multimedia signals include original audio signals and / or original video signals, and the first programmable circuit module is further used to send multiple data packets corresponding to the multimedia signals to a data receiving device.

[0009] According to a third aspect of this application, a data receiving device is provided, comprising: a second programmable circuit module, wherein the second programmable circuit module is communicatively connected to a data transmission device, and is used to receive multiple data packets corresponding to multimedia signals sent by the data transmission device, extract segmented data corresponding to each data packet, reassemble the segmented data based on the timestamps corresponding to the segmented data, and form a multimedia signal.

[0010] To address the issue of increased latency caused by the transmission of audio and video data via standard network protocols (such as UDP) and the subsequent addressing, encapsulation, and compression operations performed by a central processing unit (CPU), this application incorporates a first programmable circuit module in the data acquisition device. This first programmable circuit module receives multimedia signals (i.e., raw audio signals and / or raw video signals), adds timestamps to the multimedia signals, and segments and packages the multimedia signals based on the added timestamps.

[0011] In other words, unlike traditional network layer transmission processes that require addressing, encapsulation, and compression of data, the first programmable circuit module of this application directly segments and packages the timestamped multimedia signal into multiple data packets during multimedia signal processing, and sends these multiple data packets to the data receiving device. This significantly reduces the additional latency of multimedia signal transmission.

[0012] Therefore, technicians can use the hardware platform based on the data transmission system provided in this application to develop and achieve low-latency transmission of multimedia signals. This solves the technical problem in the prior art where there is no suitable hardware platform for technicians to further develop and achieve low-latency multimedia signal transmission.

[0013] The above and other objects, advantages and features of this invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments of this application in conjunction with the accompanying drawings. Attached Figure Description

[0014] The following sections will describe some specific embodiments of this application in detail by way of example and not limitation, with reference to the accompanying drawings. The same reference numerals in the drawings denote the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0015] Figure 1 This is a schematic diagram of a data transmission system according to an embodiment of this application;

[0016] Figure 2 This is a schematic diagram of the internal structure of a data transmission system according to an embodiment of this application;

[0017] Figure 3 This is a schematic diagram of the internal structure of a programmable circuit module according to an embodiment of this application;

[0018] Figure 4 This is a schematic diagram of the internal structure of another programmable circuit module according to an embodiment of this application;

[0019] Figure 5 This is a schematic diagram of the internal structure of a data transmission device according to an embodiment of this application; and

[0020] Figure 6 This is a schematic diagram of the internal structure of a data receiving device according to an embodiment of this application.

[0021] Explanation of reference numerals in the attached figures:

[0022] 10. Data transmission system; 100. Data acquisition device; 110. Microphone; 120. Image sensor; 200. Data transmission device; 210. First programmable circuit module; 211. First FIFO buffer; 212. Second FIFO buffer; 213. First SOC chip; 214. First FPGA chip; 215. First processor; 216. Serializer; 220. Electro-optical conversion module; 300. Data receiving device; 310. Second programmable circuit module; 311. Third FIFO buffer; 312. Fourth FIFO buffer; 313. Second SOC chip; 314. Second FPGA chip; 315. Second processor; 316. Deserializer; 320. Photoelectric conversion module; 330. Output interface; 400. Optical fiber. Detailed Implementation

[0023] It should be noted that, where there is no conflict, the embodiments and features in the embodiments of this utility model can be combined with each other. The present utility model will now be described in detail with reference to the accompanying drawings and embodiments.

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate for the embodiments of the utility model described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0027] Figure 1 A schematic diagram of a data transmission system according to this embodiment is shown. According to a first aspect of this embodiment, a data transmission system 10 is provided. Specifically, refer to... Figure 1 As shown, the data transmission system 10 includes a data acquisition device 100, a data transmission device 200, and a data receiving device 300, wherein the data transmission device 200 is communicatively connected to both the data acquisition device 100 and the data receiving device 300. The data transmission device 200 includes a first programmable circuit module 210, which is communicatively connected to the data acquisition device 100. The first programmable circuit module 210 is used to add timestamps to multimedia signals received from the data acquisition device 100, and to segment and package the multimedia signals based on the timestamps. The multimedia signals include original audio signals and / or original video signals. The first programmable circuit module 210 is also used to send multiple data packets corresponding to the multimedia signals to the data receiving device 300.

[0028] Specifically, firstly, the data acquisition device 100, in response to a control command sent by the user through the data receiving device 300, acquires multimedia signals (i.e., raw audio signals and / or raw video signals). In this embodiment, the data acquisition device 100 may acquire only the raw audio signals or the raw video signals, or it may acquire both raw audio signals and raw video signals; this is not limited here.

[0029] Subsequently, the data acquisition device 100 transmits the multimedia signal to the data transmission device 200, where the first programmable circuit module 210 adds a timestamp to each frame of the multimedia signal. Further, based on the timestamp of each frame, the first programmable circuit module 210 segments and packages the multimedia signal, thereby generating multiple data packets corresponding to the multimedia signal. Thus, unlike traditional methods that address, encapsulate, and compress multimedia signals using standard network protocols and a central processing unit, the first programmable circuit module 210 in this application, after receiving the multimedia signal, directly segments and packages the timestamped multimedia signal into multiple data packets, eliminating the need for traditional steps such as adding IP addresses and compressing data packets, which may introduce additional delays, and significantly reducing the additional delay during multimedia signal transmission.

[0030] Finally, when the first programmable circuit module 210 generates multiple data packets corresponding to the multimedia signal, the multiple data packets are sent to the data receiving device 300.

[0031] As described in the background section, in traditional data transmission systems, multimedia signals are typically transmitted based on standard network protocols (such as UDP), and data encapsulation, scheduling, and network layer packaging are performed by a central processing unit (CPU). While this system architecture offers a degree of versatility and adaptability, it may introduce additional latency issues. Multimedia signals include, for example, audio and / or video signals. For instance, under network congestion or high system load, if the CPU is still required to address, encapsulate, and compress multimedia signals, end-to-end transmission latency may increase, impacting the real-time interactive experience. Therefore, for applications with high real-time requirements (such as video conferencing, interactive live streaming, and cloud gaming), traditional data transmission systems cannot meet their application needs. Consequently, there is currently a lack of a suitable hardware platform for engineers to further develop to achieve low-latency transmission of multimedia signals, including, for example, audio and / or video signals.

[0032] In view of this, to address the issue that audio and video data are typically transmitted using standard network protocols (such as UDP), and that the central processing unit (CPU) performs addressing, encapsulation, and compression operations on the audio and video data, resulting in additional latency, this application incorporates a first programmable circuit module in the data acquisition device. This first programmable circuit module is used to receive multimedia signals (i.e., raw audio signals and / or raw video signals), add timestamps to the multimedia signals, and segment and package the multimedia signals based on the added timestamps.

[0033] In other words, unlike traditional network layer transmission processes that require addressing, encapsulation, and compression of data, the first programmable circuit module of this application directly segments and packages the timestamped multimedia signal into multiple data packets during multimedia signal processing, and sends these multiple data packets to the data receiving device. This significantly reduces the additional latency of multimedia signal transmission.

[0034] Therefore, technicians can use the hardware platform based on the data transmission system provided in this application to develop and achieve low-latency transmission of multimedia signals. This solves the technical problem in the prior art where there is no suitable hardware platform for technicians to further develop and achieve low-latency multimedia signal transmission.

[0035] Optionally, the data transmission device 200 further includes an electro-optical conversion module 220, which is connected to the data receiving device 300 via an optical fiber 400. The electro-optical conversion module 220 is used to convert the electrical signal received from the first programmable circuit module 210 into an optical signal suitable for transmission via the optical fiber 400, and transmit the converted optical signal to the data receiving device 300 via the optical fiber 400.

[0036] Specifically, refer to Figure 1 As shown, because the protocol applicable to the data acquisition device 100 is different from the protocol applicable to the electro-optical conversion module 220, when the data acquisition device 100 and the electro-optical conversion module 220 are directly connected, the electro-optical conversion module 220 cannot directly receive multimedia signals and perform conversion processing on the multimedia signals.

[0037] A first programmable circuit module 210 is thus provided between the data acquisition device 100 and the electro-optical conversion module 220. This first programmable circuit module 210 can generate electrical signals compatible with the protocol used by the electro-optical conversion module 220 and transmit the electrical signals corresponding to the multimedia signals to the electro-optical conversion module 220. Therefore, when the electro-optical conversion module 220 receives the electrical signals, it can convert them into optical signals suitable for transmission over the optical fiber 400 and transmit the converted optical signals to the data receiving device 300 via the optical fiber 400.

[0038] Thus, when the electro-optical conversion module 220 receives an electrical signal corresponding to the multimedia signal, it can convert the electrical signal into an optical signal suitable for transmission over the optical fiber 400. Furthermore, since the optical fiber 400 used in this application is not only flexible but also suitable for long-distance transmission, it can adapt to more complex deployment environments, achieving the technical effect of ensuring long-distance signal transmission.

[0039] Optionally, the first programmable circuit module 210 further includes a first SOC chip 213, wherein the first SOC chip 213 is connected to the data acquisition device 100 and the electro-optical conversion module 220 respectively.

[0040] Specifically, refer to Figure 3 As shown, the first programmable circuit module 210 includes a first SOC chip 213, and the first SOC chip 213 includes a PL terminal and a PS terminal. The PL terminal is used to add timestamps and segment packets to the multimedia signal. The PL terminal is also used to convert multiple data packets corresponding to the multimedia signal into electrical signals compatible with the protocol applicable to the electro-optical conversion module 220. The PS terminal is used to transmit control commands.

[0041] When the PS terminal of the first SOC chip 213 receives a control command, the PL terminal adds a timestamp to the received multimedia signal and packages it into segments. It also converts the multiple data packets corresponding to the multimedia signal into electrical signals compatible with the protocol applicable to the electro-optical conversion module 220. Finally, it sends the data packets corresponding to the electrical signals to the electro-optical conversion module 220 through the GTX interface.

[0042] Optionally, the first programmable circuit module 210 further includes a first FPGA chip 214 and a first processor 215, wherein the first FPGA chip 214 is connected to the data acquisition device 100 and the electro-optical conversion module 220 respectively, and the first processor 215 is connected to the data acquisition device 100 and the first FPGA chip 214 respectively.

[0043] Specifically, refer to Figure 4 As shown, when the first processor 215 in the first programmable circuit module 210 receives a control command, it drives the first FPGA chip 214 to add timestamps to the multimedia signals received from the data acquisition device 100. Based on the timestamps, the multimedia signals are segmented and packaged into multiple data packets, and the processed data packets are converted into electrical signals compatible with the protocol applicable to the electro-optical conversion module 220. Finally, the data packets corresponding to the electrical signals are sent to the electro-optical conversion module 220 through the GTX interface.

[0044] Therefore, this application provides two different first programmable circuit modules (i.e., a first SOC chip 213 integrating PL and PS terminals, and a first FPGA chip 214 and a first processor 215, which are split into two different hardware components). In other words, technicians can use different forms of the first programmable circuit module 210 to add timestamps, segment and package multimedia signals, and convert electro-optical signals, thereby achieving the technical effect of improving the applicability of the hardware platform provided by this application.

[0045] Optionally, the data acquisition device 100 includes a microphone 110 and an image sensor 120, wherein the microphone 110 is connected to the data transmission device 200 for acquiring raw audio signals and transmitting them to the data transmission device 200; and the image sensor 120 is connected to the data transmission device 200 for acquiring raw video signals and transmitting them to the data transmission device 200.

[0046] Specifically, refer to Figure 1 As shown, the data acquisition device 100 includes a microphone 110 and an image sensor 120. The microphone 110 and image sensor 120 are respectively connected to the data transmission device 200. The microphone 110 is used to acquire raw audio signals, and the image sensor 120 is used to acquire raw video signals.

[0047] Thus, when the microphone 110 acquires the original audio signal, it can be processed through the I in the first programmable circuit module 210. 2 S-interface (I 2 The S RX) transmits the raw audio signal to the data transmission device 200. Similarly, when the image sensor 120 acquires the raw video signal, the raw video signal is transmitted to the data transmission device 200.

[0048] Furthermore, in this embodiment, the microphone 110 and image sensor 120 in the data acquisition device 100 can also be used independently. For example, in a live streaming scenario, the microphone 110 in the data acquisition device 100 acquires the raw audio signal, and the image sensor 120 acquires the raw video signal. As another example, in a surveillance scenario, only the image sensor 120 in the data acquisition device 100 acquires the raw video signal.

[0049] Optionally, the data receiving device 300 includes: a second programmable circuit module 310 and a photoelectric conversion module 320 connected to the second programmable circuit module 310, wherein the photoelectric conversion module 320 is communicatively connected to the electro-optical conversion module 220 via an optical fiber 400, and is used to convert the optical signal received from the electro-optical conversion module 220 into an electrical signal suitable for processing by the second programmable circuit module 310.

[0050] Specifically, refer to Figure 1As shown, the multimedia signal acquired and output by the data acquisition device 100 is processed by the first programmable circuit module 210 and converted into an electrical signal adapted to the electro-optical conversion module 220. The electro-optical conversion module 220 converts the electrical signal into an optical signal that can be transmitted through the optical fiber 400.

[0051] Furthermore, when the photoelectric conversion module 320 receives the optical signal corresponding to the multimedia signal from the electro-optical conversion module 220 through the optical fiber 400, the optical signal is converted into an electrical signal suitable for processing by the second programmable circuit module 310, and the second programmable circuit module 310 further processes the electrical signal corresponding to the multimedia signal.

[0052] This enables the conversion of multimedia signals output by data acquisition device 100 into optical signals suitable for transmission via fiber optic cable 400, and then transmits the multimedia signals to the second programmable circuit module 310 for further processing.

[0053] Optionally, the first programmable circuit module 210 includes a serializer 216, and the second programmable circuit module 310 includes a deserializer 316. The serializer 216 is connected to the electro-optical conversion module 220 and is used to convert parallel electrical signals into serial electrical signals and transmit the serial electrical signals to the electro-optical conversion module 220. The deserializer 316 is connected to the photoelectric conversion module 320 and receives serial electrical signals from the photoelectric conversion module 320 and deserializes the serial electrical signals into parallel electrical signals.

[0054] Specifically, refer to Figure 2 As shown, firstly, the data acquisition device 100 transmits parallel electrical signals to the serializer 216, and upon receiving the parallel electrical signals, the serializer 216 converts them into serial electrical signals. Then, the electro-optical conversion module 220 converts the received serial electrical signals into corresponding optical signals and transmits the optical signals to the photoelectric conversion module 320 via the optical fiber 400. Finally, upon receiving the converted serial electrical signals, the deserializer 316, connected to the photoelectric conversion module 320, deserializes the serial electrical signals into parallel electrical signals.

[0055] Thus, by setting a serializer 216 in the data transmission device 200 and a deserializer 316 in the data receiving device 300, the technical effect of ensuring long-distance transmission of electrical signals is achieved.

[0056] Optionally, the data receiving device 300 further includes a second programmable circuit module 310, which is communicatively connected to the photoelectric conversion module 320 and is used to extract segmented data corresponding to each data packet, reassemble the segmented data based on timestamps, and form a multimedia signal.

[0057] Specifically, refer to Figure 1 As shown, when the second programmable circuit module 310 receives multiple data packets of multimedia signal, it can extract segmented data corresponding to each data packet, and reassemble the segmented data based on the timestamp added in the first programmable circuit module 210 to form a multimedia signal.

[0058] Furthermore, since the received data packets are not encapsulated or compressed in the first programmable circuit module 210, there is no need to perform decapsulation and decompression operations in the second programmable circuit module 310.

[0059] Therefore, when the second programmable circuit module 310 receives the electrical signal processed by the photoelectric conversion module 320, it can extract the segmented data corresponding to each data packet and directly reassemble the segmented data according to the timestamp added in the first programmable circuit module 210, thereby achieving the technical effect of reducing the additional delay of multimedia signals during transmission.

[0060] Optionally, the first programmable circuit module 210 includes a first first-in-first-out (FIFO) buffer 211 and a second FIFO buffer 212, and the second programmable circuit module 310 includes a third FIFO buffer 311 and a fourth FIFO buffer 312. The first FIFO buffer 211 and the second FIFO buffer 212 are respectively connected to the microphone 110 and the image sensor 120, for receiving and buffering the original audio signal acquired by the microphone 110 and the original video signal acquired by the image sensor 120; and the third FIFO buffer 311 and the fourth FIFO buffer 312 are respectively connected to the data transmission device 200; the third FIFO buffer 311 and the fourth FIFO buffer 312 are also respectively connected to the output interface 330, for ensuring timing alignment when the original video signal and the original audio signal are output.

[0061] Specifically, in the network protocol stack, the scheduling and transmission of data packets may be affected by multi-threaded processing or operating system scheduling mechanisms, resulting in a discrepancy between the actual transmission order and the generation order of data packets. For example, in real-time communication scenarios, audio and video frames may not be transmitted in strict timing order, leading to audio-visual desynchronization and a reduced user experience.

[0062] To solve the above problems, refer to Figure 2As shown, the first programmable circuit module 210 in this application is equipped with a first FIFO buffer 211 and a second FIFO buffer 212, and the second programmable circuit module 310 is equipped with a third FIFO buffer 311 and a fourth FIFO buffer 312. The first FIFO buffer 211 is connected to the microphone 110 to receive the raw audio signal collected by the microphone 110, and the second FIFO buffer 212 is connected to the image sensor 120 to receive the raw video signal collected by the image sensor 120. The first FIFO buffer 211 and the second FIFO buffer 212 can temporarily store the raw video signal and the raw audio signal, and ensure that the multimedia signals are processed and output in the order of input, avoiding out-of-order processing.

[0063] Subsequently, upon receiving the original audio and video signals, the first programmable circuit module 210 adds timestamps to the original audio and video signals. Because of these timestamps, when the third FIFO buffer 311 and the fourth FIFO buffer 312 receive the original audio and video signals respectively, they can be output sequentially based on the timestamps. This ensures timing alignment during output when the original audio and video signals are output to an externally connected device via the output interface 330. The output interface 330 may include, but is not limited to, display interfaces capable of outputting audio and video signals, such as HDMI and DP interfaces.

[0064] Thus, through the above product structure, it is possible to ensure that the original audio signals and original video signals are output in sequence, and to avoid the problem of timing asynchrony that may occur when outputting the original audio signals and original video signals.

[0065] Optionally, the second programmable circuit module 310 further includes a second SOC chip 313, wherein the second SOC chip 313 is connected to the photoelectric conversion module 320.

[0066] Specifically, refer to Figure 3 As shown, the second programmable circuit module 310 includes a second SOC chip 313, and the second SOC chip 313 includes a PL terminal and a PS terminal. The PL terminal is used to extract segmented data corresponding to each data packet and reassemble the segmented data based on timestamps to form a multimedia signal. The PS terminal is used to transmit control commands.

[0067] In this scenario, when the PL terminal of the second SOC chip 313 receives the electrical signal converted by the photoelectric conversion module 320 through the GTX interface, the PS terminal drives the PL terminal to extract segmented data from each data packet corresponding to the electrical signal, and reassembles the segmented data based on the timestamp to form a multimedia signal.

[0068] Optionally, the second programmable circuit module 310 further includes a second FPGA chip 314 and a second processor 315 connected to the second FPGA chip 314, wherein the second FPGA chip 314 is connected to the photoelectric conversion module 320.

[0069] Specifically, refer to Figure 4 As shown, when the second FPGA chip 314 in the second programmable circuit module 310 receives the electrical signal converted by the photoelectric conversion module 320 through the GTX interface, the second processor 315 drives the second FPGA chip 314 to extract segmented data from each data packet corresponding to the electrical signal, and reassembles the segmented data based on the timestamp to form a multimedia signal.

[0070] Figure 5 A schematic diagram of a data transmission device according to this embodiment is shown. (Reference) Figure 2 and Figure 5 As shown, according to a second aspect of this embodiment, a data transmission device 200 is provided, including a first programmable circuit module 210. The data transmission device 200 is communicatively connected to a data acquisition device 100 and a data receiving device 300, respectively. The first programmable circuit module 210 is communicatively connected to the data acquisition device 100. The first programmable circuit module 210 is used to add timestamps to multimedia signals received by the data acquisition device 100, and to segment and package the multimedia signals based on the timestamps. The multimedia signals include original audio signals and / or original video signals. The first programmable circuit module 210 is also used to send multiple data packets corresponding to the multimedia signals to the data receiving device 300.

[0071] Figure 6 A schematic diagram of the data receiving device according to this embodiment is shown.

[0072] According to a third aspect of this embodiment, a data receiving device 300 is provided. Specifically, refer to... Figure 6 As shown, the data receiving device 300 includes a second programmable circuit module 310, which is communicatively connected to the data transmission device 200. It is used to extract segmented data corresponding to each data packet, reassemble the segmented data based on timestamps, and form a multimedia signal.

[0073] Specifically, refer to Figure 2 and Figure 6As shown, when the second programmable circuit module 310 receives a multimedia signal, it extracts segmented data corresponding to each data packet. Further, based on the timestamps added by the first programmable circuit module 210, the second programmable circuit module 310 reassembles the extracted segmented data to restore the multimedia signal, wherein the audio and video signals are output through the interface in the form of time-aligned data streams.

[0074] In addition, specifically, refer to Figure 3 , Figure 4 and Figure 6 As shown, the user sends control commands through the PS terminal of the second SOC chip 313. Alternatively, the user sends control commands through the second processor 315 of the second programmable circuit module 310.

[0075] Simultaneously, the control command is received by the serializer in the PL terminal of the second SOC chip 313, converted into a serial signal, and sent to the photoelectric conversion module 320 through the GTX interface. After being converted into an optical signal, it is transmitted to the data transmission device 200 through the optical fiber 400. Alternatively, the control command is received by the serializer in the second FPGA chip 314, converted into a serial signal, and sent to the photoelectric conversion module 320 through the GTX interface. After being converted into an optical signal, it is transmitted to the data transmission device 200 through the optical fiber 400.

[0076] Afterwards, refer to Figure 3 , Figure 4 and Figure 5 As shown, the serial signal restored by the electro-optical conversion module 220 is sent to the deserializer in the first programmable circuit module 210 via the GTX interface. The deserialized control command is sent to the PS terminal of the first SOC chip 214 or the first processor 215 of the first programmable circuit module 210, and also to the data acquisition device 100.

[0077] Furthermore, driven by the PS terminal of the first SOC chip 214 or the first processor 215 of the first programmable circuit module 210, the data acquisition device 100 acquires multimedia signals corresponding to the target object and transmits them to the data transmission device 200. Upon receiving the multimedia signal, the first programmable circuit module 210 adds a timestamp to each frame of the multimedia signal, and performs segmentation and packetization operations based on the timestamps of each frame, finally generating multiple data packets corresponding to the multimedia signal and transmitting them to the data receiving device 300.

[0078] Therefore, in this application, the user can send control commands through the data receiving device 300 to control the data transmission system 10, which can ensure low-latency transmission of multimedia signals and timing alignment during output.

[0079] In addition, refer to Figure 5 As shown, the PL terminal of the first SOC chip 213 (or the first FPGA chip 214) can also perform the following functions: I 2 The S RX receives raw audio signals, while the MIPID-PHY and CSI RX IP receive raw video signals and convert them into AXI4-Stream format. The AXI4-Stream Switch manages the data stream path and converts the received multimedia signals into electrical signals compatible with the applicable protocol of the electro-optical conversion module 220. The Metadata Tagging Module adds a timestamp to each frame of the multimedia signal, ensuring timing alignment of the output. Segmented and Packed Data segments and packages the timestamped multimedia signal into multiple data packets.

[0080] refer to Figure 6 As shown, the PL terminal of the second SOC chip 313 (or the second FPGA chip 314) can also perform the following functions: the GTX interface is responsible for receiving the electrical signals transmitted by the photoelectric conversion module 320. The Segment Parser and Metadata Extractor are used to extract the segmented data corresponding to each data packet and reassemble the segmented data based on the timestamp to form a multimedia signal.

[0081] Those skilled in the art should note that the above is merely an example of how technicians can perform signal processing and format conversion on the original video signal using the aforementioned modules on the PL end, but the above content is not within the scope of protection of this application.

[0082] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this invention. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0083] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0084] In the description of this utility model, it should be understood that the directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this utility model. The directional terms "inner" and "outer" refer to the inner and outer contours of each component itself.

[0085] The above description is merely a preferred embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A data transmission system (10), comprising: The system comprises a data acquisition device (100), a data transmission device (200), and a data receiving device (300), wherein the data transmission device (200) is communicatively connected to both the data acquisition device (100) and the data receiving device (300), characterized in that... The data transmission device (200) includes a first programmable circuit module (210), which is communicatively connected to the data acquisition device (100). The first programmable circuit module (210) is used to add timestamps to multimedia signals received from the data acquisition device (100), and to segment and package the multimedia signals based on the timestamps. The multimedia signals include original audio signals and / or original video signals. The first programmable circuit module (210) is also used to send multiple data packets corresponding to the multimedia signal to the data receiving device (300).

2. The data transmission system (10) according to claim 1, characterized in that, The data transmission device (200) further includes an electro-optical conversion module (220), which is connected to the data receiving device (300) via an optical fiber (400) and is used to convert the electrical signal received from the first programmable circuit module (210) into an optical signal suitable for transmission via the optical fiber (400), and transmit the converted optical signal to the data receiving device (300) via the optical fiber (400).

3. The data transmission system (10) according to claim 2, characterized in that, The first programmable circuit module (210) further includes a first SOC chip (213), wherein the first SOC chip (213) is connected to the data acquisition device (100) and the electro-optical conversion module (220) respectively, or The first programmable circuit module (210) further includes a first FPGA chip (214) and a first processor (215), wherein the first FPGA chip (214) is connected to the data acquisition device (100) and the electro-optical conversion module (220) respectively, and the first processor (215) is connected to the data acquisition device (100) and the first FPGA chip (214) respectively.

4. The data transmission system (10) according to claim 2, characterized in that, The data acquisition device (100) includes a microphone (110) and an image sensor (120), wherein The microphone (110) is connected to the data transmission device (200) for acquiring the original audio signal and transmitting it to the data transmission device (200); and The image sensor (120) is connected to the data transmission device (200) and is used to acquire the original video signal and transmit it to the data transmission device (200).

5. The data transmission system (10) according to claim 4, characterized in that, The data receiving device (300) includes: a second programmable circuit module (310) and a photoelectric conversion module (320) connected to the second programmable circuit module (310), wherein... The photoelectric conversion module (320) is communicatively connected to the electro-optical conversion module (220) via the optical fiber (400), and is used to convert the optical signal received from the electro-optical conversion module (220) into an electrical signal suitable for processing by the second programmable circuit module (310), wherein The first programmable circuit module (210) includes a serializer (216), and the second programmable circuit module (310) includes a deserializer (316), wherein... The serializer (216) is connected to the electro-optical conversion module (220), and the serializer (216) is used to convert the parallel electrical signals into serial electrical signals and transmit the serial electrical signals to the electro-optical conversion module (220); and The deserializer (316) is connected to the photoelectric conversion module (320), and the deserializer (316) is used to receive the serial electrical signal from the photoelectric conversion module (320) and deserialize the serial electrical signal into parallel electrical signals.

6. The data transmission system (10) according to claim 5, characterized in that, The data receiving device (300) further includes: a second programmable circuit module (310), wherein The second programmable circuit module (310) is connected to the photoelectric conversion module (320) and is used to extract segmented data corresponding to each data packet, reassemble the segmented data based on the timestamp, and form the multimedia signal, wherein The first programmable circuit module (210) includes: a first first-in-first-out (FIFO) buffer (211) and a second FIFO buffer (212), and the second programmable circuit module (310) includes: a third FIFO buffer (311) and a fourth FIFO buffer (312), wherein... The first FIFO buffer (211) and the second FIFO buffer (212) are respectively connected to the microphone (110) and the image sensor (120) for receiving and buffering the raw audio signal acquired by the microphone (110) and the raw video signal acquired by the image sensor (120); and The third first-in-first-out buffer (311) and the fourth first-in-first-out buffer (312) are respectively connected to the data transmission device (200); The third first-in-first-out buffer (311) and the fourth first-in-first-out buffer (312) are also connected to the output interface (330) to ensure timing alignment when the original video signal and the original audio signal are output.

7. The data transmission system (10) according to claim 6, characterized in that, The second programmable circuit module (310) further includes a second SOC chip (313), wherein the second SOC chip (313) is connected to the photoelectric conversion module (320).

8. The data transmission system (10) according to claim 6, characterized in that, The second programmable circuit module (310) further includes a second FPGA chip (314) and a second processor (315) connected to the second FPGA chip (314), wherein the second FPGA chip (314) is connected to the photoelectric conversion module (320).

9. A data transmission device (200), characterized in that, include: The first programmable circuit module (210), wherein The first programmable circuit module (210) is communicatively connected to the data acquisition device (100). The first programmable circuit module (210) is used to add timestamps to the multimedia signals received by the data acquisition device (100), and to segment and package the multimedia signals based on the timestamps. The multimedia signals include original audio signals and / or original video signals. The first programmable circuit module (210) is also used to send multiple data packets corresponding to the multimedia signals to the data receiving device (300).

10. A data receiving device (300), characterized in that, include: The second programmable circuit module (310), wherein The second programmable circuit module (310) is communicatively connected to the data transmission device (200) and is used to receive multiple data packets corresponding to the multimedia signal sent by the data transmission device (200), extract segmented data corresponding to each data packet, reassemble the segmented data based on the timestamps corresponding to the segmented data, and form the multimedia signal.