Multiplexing circuit for radio frequency module IO port

CN224610874UActive Publication Date: 2026-08-07ZHEJIANG XINCHUANG INTELLIGENT LINK TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
ZHEJIANG XINCHUANG INTELLIGENT LINK TECHNOLOGY CO LTD
Filing Date
2025-09-11
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

但表计端常面临接口资源紧张、IO口数量有限的问题,因此设计如下电路以解决客户MCU端交互接口紧张的问题

Benefits of technology

利用SPI的特性,模组在IO复用情况下可在极端温度(-40—85℃)下稳定运行;

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model discloses a kind of multiplexing circuits for radio frequency module IO, belong to multiplexing circuit field, to solve the problem of customer MCU end interactive interface shortage. Circuit includes antenna, matching network, radio frequency transceiver and power management unit, all pass through single-chip microcontroller control. Antenna RF_NET9 is connected ESD protection diode D1 through inductance L1 and capacitor C9, its other end is grounded;Matching network exports from D1, adopts multiple inductance L4-L7 and capacitor C10-C14, C17 and connects radio frequency transceiver RFN pin. Radio frequency transceiver adopts standard 4 line SPI interface CSN, SCK, SDO, SDI, SDO is connected with SDI through resistance R2 and forms SDIO node, SDIO is connected with the SCL pin of EEPROM through resistance R4;CSN pin is connected to SDIO after being connected with diode D3 and resistance R8 in series, and SDIO is connected to the IO port of single-chip microcontroller as radio frequency module interface. Power management unit adopts capacitor C18, C19 and resistance R3, and connects radio frequency transceiver VDR pin.
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Description

Technical Field

[0001] This utility model relates to the field of multiplexing circuit technology, specifically to a multiplexing circuit for radio frequency module I / O ports. Background Technology

[0002] Radio frequency (RF) modules are widely used in water meters, electricity meters, and gas meters. As a key component for data transmission in the Internet of Things (IoT), wireless data transmission in water meters, electricity meters, and gas meters is primarily achieved through RF modules.

[0003] For low-cost RF modules (excluding the MCU main control chip), data interaction with the meter's main control MCU is typically achieved via an SPI interface. However, the meter end often faces issues of limited interface resources and a limited number of I / O ports. Therefore, the following circuit is designed to address the problem of limited interaction interfaces on the customer's MCU side. In IoT devices, limited I / O port resources are a common challenge. How to save I / O resources, achieve I / O multiplexing, and ensure reliability and stability in the RF module is a key design issue. Utility Model Content

[0004] To address the shortcomings of existing technologies, this utility model proposes a multiplexing circuit for the I / O ports of an RF module, including an antenna, a matching network, an RF transceiver, and a power management unit, all controlled by a microcontroller. The antenna RF_NET9 is connected to the ESD protection diode D1 through inductor L1 and capacitor C9, and the other end of the ESD protection diode is grounded GND. The matching network outputs from the ESD protection diode and uses inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 to connect to the RFN input pin of the RF transceiver. The RFN pin of the RF transceiver is connected to the output of the matching network and uses a standard 4-wire SPI interface, namely CSN, SCK, SDO, and SDI. SDO is connected to SDI through resistor R2, and the network node connected to SDO and SDI is SDIO. SDIO is connected to the SCL pin of the EEPROM through resistor R4. The CSN pin is connected to SDIO through a diode D3 and resistor R8 in series. SDIO serves as the interface of the RF module and is connected to an I / O port of the microcontroller. The power management unit uses capacitors C18 and C19 and resistor R3, which are connected to the VDR pin of the RF transceiver.

[0005] As a further improvement of this utility model, in the matching network, inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 are connected in sequence to form the matching network.

[0006] As a further improvement of this utility model, the radio frequency transceiver adopts chip U1.

[0007] The beneficial effects of this utility model are: Utilizing the characteristics of SPI, the module can operate stably at extreme temperatures (-40 to 85°C) under I / O multiplexing conditions; The network node connected to interfaces SDO and SDI is SDIO. SDO and SDI are combined into a single secure digital input / output interface SDIO via resistor R2. The SDIO interface is connected to the SCL pin of the EEPROM via resistor R4. Resistor R4 is used to multiplex SDIO and SCL, which is equivalent to combining them into a single secure digital input / output interface. The CSN pin is connected to SDIO via a diode D3 and resistor R8 in series. SDIO serves as the interface for the RF module and is connected to an I / O port of the microcontroller. I / O port multiplexing saves I / O resources for customers.

[0008] Because the EEPROM's I / O port requires the MCU to be open-drain, an external 10K... Pull-up resistors are used. Therefore, when the MCU_SDIO level is high, the voltage of the SDIO pin M-SDIO of the RF module is not VDD but 1 / 2 VDD, which will significantly affect the stability of the electrically erasable read-only memory (EEPROM). Therefore, taking advantage of the characteristic that CSN is high in the SPI idle state, diode D3 is used in conjunction with CSN during memory IIC communication to stabilize the SDIO interface voltage of the RF module at a state slightly lower than VDD, ensuring stable system operation. Attached Figure Description

[0009] Figure 1 This is a diagram of the multiplexing circuit structure for the I / O port of a radio frequency module according to this utility model; Figure 2 This utility model shows a schematic diagram of resistor R4 multiplexing SDIO and SCL. Figure 3 This is the equivalent circuit diagram for IIC communication in this utility model. Detailed Implementation

[0010] In this embodiment, the U1 chip used in the radio frequency transceiver is model XCDTE30DP.

[0011] like Figure 1 As shown, a multiplexing circuit for the I / O port of an RF module includes an antenna, a matching network, an RF transceiver, and a power management unit, all of which are controlled by a microcontroller. The antenna RF_NET9 is connected to the ESD protection diode D1 through inductor L1 and capacitor C9, and the other end of the ESD protection diode is grounded GND. The matching network outputs from the ESD protection diode and uses inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 to connect to the RFN input pin of the RF transceiver. In the matching network, inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 are connected in sequence to form the matching network.

[0012] The RF transceiver uses chip U1, whose RFN pin is connected to the output of the matching network and uses a standard 4-wire SPI interface, namely CSN, SCK, SDO, and SDI. SDO is connected to SDI through resistor R2. The network node connected to SDO and SDI is SDIO. Resistor R2 combines SDO and SDI into a secure digital input / output interface SDIO. The SDIO interface is connected to the SCL pin of EEPROM through resistor R4. Resistor R4 is used to multiplex SDIO and SCL, which is equivalent to combining them into a secure digital input / output interface. The CSN pin is connected to SDIO through a diode D3 and resistor R8. SDIO serves as the interface of the RF module and is connected to an I / O port of the microcontroller. The VR_IF pin is grounded through capacitor C16. The power management unit uses capacitors C18 and C19 and resistor R3, which are connected to the VDR pin of the RF transceiver.

[0013] Since both the IIC (Inter-Integrated Circuit) interface and the microcontroller are open-drain outputs, the I / O ports on the customer's backplane are usually equipped with pull-up resistors. This will cause voltage division on the I / O ports, making IIC communication risky, specifically manifested as insufficient amplitude of the high-level signal.

[0014] The U1 chip used in the radio frequency transceiver uses a high-level active logic for the enable input pin of the POWER DOWN mode in the power distribution network (PDN). When the pin is high, the chip enters the POWER DOWN state, at which point the entire chip is completely powered down. When the pin is low, the chip is in the IDLE state (not completely powered down, but only maintaining low-power standby).

[0015] By adding diode D3 and resistor R8, in IIC communication mode, pulling the CSN pin high enables the IIC interface while disabling the SPI interface. In this mode, the IIC interface ensures the high level of the SCL signal meets requirements. In SPI communication mode, pulling the CSN pin low reverse-biased the diode, preventing interference with SPI communication and ensuring reliable and stable system operation. However, when the MCU_SDIO level is high, the voltage on the SDIO pin M-SDIO of the RF module is not VDD but 1 / 2 VDD, significantly affecting the stability of the electrically erasable read-only memory (EEPROM). Therefore, utilizing the characteristic that CSN is high in the SPI idle state, diode D3, in conjunction with CSN, stabilizes the SDIO interface voltage of the RF module at a level slightly below VDD during IIC communication, ensuring stable system operation.

[0016] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A multiplexing circuit for RF module I / O ports, characterized in that, The antenna, matching network, RF transceiver, and power management unit are all controlled by a microcontroller; The antenna RF_NET9 is connected to the ESD protection diode D1 through inductor L1 and capacitor C9, and the other end of the ESD protection diode is grounded GND. The matching network outputs from the ESD protection diode and uses inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 to connect to the RFN input pin of the RF transceiver. The RFN pin of the RF transceiver is connected to the output of the matching network and uses a standard 4-wire SPI interface, namely CSN, SCK, SDO, and SDI. SDO is connected to SDI through resistor R2, and the network node connected to SDO and SDI is SDIO. SDIO is connected to the SCL pin of the EEPROM through resistor R4. The CSN pin is connected to SDIO through a diode D3 and resistor R8 in series. SDIO serves as the interface of the RF module and is connected to an I / O port of the microcontroller. The power management unit uses capacitors C18 and C19 and resistor R3, which are connected to the VDR pin of the RF transceiver.

2. The multiplexing circuit for RF module I / O ports according to claim 1, characterized in that, In the matching network, inductors L4, L5, L6, L7 and capacitors C10, C11, C12, C13, C14, C17 are connected in sequence to form the matching network.

3. The multiplexing circuit for RF module I / O ports according to claim 2, characterized in that, The radio frequency transceiver uses chip U1.