A dual color lamp driving circuit

Abstract

The utility model discloses a double -colored lamp drive circuit, including power input module, control module, drive module and output interface CN3. Control module includes control chip U1, and it has VM end, VDR end, IN1 end, IN2 end, GH1 end, OUT1 end, GL1 end, GL2 end, OUT2 end and GH2 end. Drive module includes first drive unit to fourth drive unit. Output interface CN3 has first connection end to third connection end. Power input module connects VM end, VDR end, first drive unit, third drive unit's 2 number end and first connection end. GH1 end connects first drive unit's 1 number end, and OUT1 end connects second drive unit's 2 number end, first drive unit's 3 number end and second connection end;GL1 end connects second drive unit's 1 number end;GL2 end connects fourth drive unit's 1 number end;OUT2 end connects third drive unit's 3 number end, fourth drive unit's 2 number end and third connection end;GH2 end connects third drive unit's 1 number end;Second drive unit and fourth drive unit's 3 number end ground connection.

Description

Technical Field

[0001] This utility model relates to the technical field of dual-color lamp driving circuits, specifically, to a dual-color lamp driving circuit. Background Technology

[0002] With the increasing popularity of LEDs, people have higher and higher requirements for the color temperature of lighting fixtures such as track lights, panel lights, and table lamps. A single, fixed color temperature can no longer meet the needs. However, in existing dual-color lights, each LED chip requires a corresponding driving circuit, resulting in a complex circuit structure. Furthermore, the MOSFETs in the driving circuit require an auxiliary power supply to power their gates. Utility Model Content

[0003] To address the shortcomings of existing technologies, a dual-color lamp driving circuit is provided.

[0004] To achieve the above objectives, this utility model provides a dual-color lamp driving circuit, including a power input module, a control module, a driving module, and an output interface CN3. The control module includes a control chip U1, which has a VM terminal, a VDR terminal, an IN1 terminal, an IN2 terminal, a GH1 terminal, an OUT1 terminal, a GL1 terminal, a GL2 terminal, an OUT2 terminal, and a GH2 terminal. The driving module includes a first driving unit, a second driving unit, a third driving unit, and a fourth driving unit. The first driving unit, the second driving unit, the third driving unit, and the fourth driving unit each have a terminal 1, a terminal 2, and a terminal 3, respectively. The output interface CN3 has a first connection terminal, a second connection terminal, and a third connection terminal. The input terminal of the power input module is connected to a power supply, and the output terminal of the power input module is connected to the VM terminal and the VDR terminal of the control chip U1, respectively. The GH1 terminal of control chip U1 is connected to terminal 1 of the first drive unit. The OUT1 terminal of control chip U1 is connected to terminal 2 of the second drive unit, terminal 3 of the first drive unit, and the second connection terminal of output interface CN3. The GL1 terminal of control chip U1 is connected to terminal 1 of the second drive unit. The GL2 terminal of control chip U1 is connected to terminal 1 of the fourth drive unit. The OUT2 terminal of control chip U1 is connected to terminal 3 of the third drive unit, terminal 2 of the fourth drive unit, and the third connection terminal of output interface CN3. The GH2 terminal of control chip U1 is connected to terminal 1 of the third drive unit. Terminals 2 of the first drive unit, 2 of the third drive unit, and the first connection terminal of output interface CN3 are connected to the output terminal of the power input module. Terminals 3 of the second drive unit and 3 of the fourth drive unit are grounded together.

[0005] According to one embodiment of the present invention, the power input module includes an input interface CN1, a transient diode TVS1, and a first filter unit; the input interface CN1 has a first input terminal and a second input terminal, one end of the transient diode TVS1 is connected to the first input terminal of the input interface CN1, and the other end is grounded to the second input terminal of the input interface CN1; one end of the first filter unit is connected to the transient diode TVS1, the VM terminal and VDR terminal of the control chip U1, the second terminal of the first drive unit, the first connection terminal of the output interface CN3, and the second terminal of the third drive unit; the other end of the first filter unit is grounded.

[0006] According to one embodiment of the present invention, the first filter unit includes capacitor EC1, capacitor C1 and capacitor C2. Capacitor EC1 is connected in parallel with transient diode TVS1, capacitor C1 is connected in parallel with capacitor EC1, and capacitor C2 is connected in parallel with capacitor C1. According to one embodiment of the present invention, the first driving unit includes a MOS transistor Q1 and a resistor R4. One end of the resistor R4 is connected to the GH1 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q1. The drain of the MOS transistor Q1 is connected to the output terminal of the power input module. The source of the MOS transistor Q1 is connected to the OUT1 terminal of the control chip U1, the second connection terminal of the output interface CN3, and the No. 2 terminal of the second driving unit.

[0007] According to one embodiment of the present invention, the second driving unit includes a resistor R5 and a MOS transistor Q2. One end of the resistor R5 is connected to the GL1 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q2. The drain of the MOS transistor Q2 is connected to the OUT1 terminal of the control chip U1, the 3rd terminal of the first driving unit, and the second connection terminal of the output interface CN3, respectively. The source of the MOS transistor Q2 is grounded.

[0008] According to one embodiment of the present invention, the third driving unit includes a resistor R7 and a MOSFET Q3. One end of the resistor R7 is connected to the GH2 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q3. The drain of the MOSFET Q3 is connected to the output terminal of the power input module, and the source of the MOSFET Q3 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the No. 2 terminal of the fourth driving unit.

[0009] According to one embodiment of the present invention, the fourth driving unit includes a resistor R6 and a MOSFET Q4. One end of the resistor R6 is connected to the GL2 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q4. The drain of the MOSFET Q4 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the 3rd terminal of the third driving unit.

[0010] According to one embodiment of the present invention, the control module further includes resistors R1 and R2, with resistor R1 connected to the IN1 terminal of control chip U1 and resistor R2 connected to the IN2 terminal of control chip U2.

[0011] According to one embodiment of the present invention, the control module further includes a resistor R3, and the control chip U1 also has a VDS terminal. One end of the resistor R3 is connected to the VDS terminal of the control chip U3, and the other end is grounded.

[0012] According to one embodiment of the present invention, the control module further includes a second filtering unit, which includes capacitor C3 and capacitor C4. One end of capacitor C3 is connected to the output terminal of the power input module and the VDR terminal of the control chip U1, respectively, and the other end is grounded. Capacitor C4 is connected in parallel with capacitor C3.

[0013] The beneficial effects of this utility model are that by using a control chip U1 to output control signals, the first, second, third, and fourth driving units are controlled to switch between on and off states, thereby switching the first and second connection terminals of the output interface CN3 to be on or off, and thus switching the color of the dual-color lamp. Furthermore, the control chip U1 integrates a charge pump, eliminating the need for an external auxiliary power supply to power the first, second, third, and fourth driving units, effectively simplifying the circuit structure. Attached Figure Description

[0014] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a circuit diagram for a dual-color LED driver.

[0015] Explanation of reference numerals in the attached figures 1. Power input module; 11. First filter unit; 2. Control module; 21. Second filter unit; 3. Drive module; 31. First drive unit; 32. Second drive unit; 33. Third drive unit; 34. Fourth drive unit. Detailed Implementation

[0016] The following drawings will disclose several embodiments of this utility model. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit this utility model. That is, in some embodiments of this utility model, these practical details are not essential. In addition, for the sake of simplicity, some conventional structures and components will be shown in the drawings in a simple schematic manner.

[0017] Furthermore, in this utility model, the use of terms such as "first" and "second" is for descriptive purposes only and does not specifically refer to any order or sequence, nor is it intended to limit the utility model. They are merely used to distinguish components or operations described with the same technical terms and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but only if they are feasible for those skilled in the art. If a combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0018] Please refer to Figure 1 , Figure 1 This is a circuit diagram for a dual-color LED driver. This embodiment provides a dual-color LED driver circuit, which includes a power input module 1, a control module 2, a driver module 3, and an output interface CN3. The power input module 1 is connected to a power source, receives electrical signals from the power source, and then sends these signals to the control module 2, driver module 3, and output interface CN3 to supply power to these components. The driver module 3 is connected to a host computer and sends drive signals to the host computer to switch its operating state. The output interface CN3 is connected to the driver module 3 and is used to connect to the dual-color LED.

[0019] Specifically, control module 2 includes control chip U1, which has VM terminal, VDR terminal, IN1 terminal, IN2 terminal, GH1 terminal, OUT1 terminal, GL1 terminal, GL2 terminal, OUT2 terminal, and GH2 terminal. Drive module 3 includes a first drive unit 31, a second drive unit 32, a third drive unit 33, and a fourth drive unit 34, each with terminal 1, terminal 2, and terminal 3, respectively. Output interface CN3 has a first connection terminal, a second connection terminal, and a third connection terminal.

[0020] During connection, the input terminal of power input module 1 is connected to the power supply, and the output terminal of power input module 1 is connected to the VM terminal and VDR terminal of control chip U1, respectively. In this example, control chip U1 is a full-bridge gate driver chip of model TMI8723B. The VM terminal is the voltage monitoring pin of control chip U1, and the VDR terminal is the data retention voltage terminal of control chip U1. When the power supply is input to the VM terminal of control chip U1, control chip U1 performs voltage detection on the power supply. When the power supply is abnormal (such as overvoltage, undervoltage, or short circuit), control chip U1 triggers a protection mechanism to protect circuit components from damage. Control chip U1 also includes GND, LLS, VCP, CP1, and CP2 terminals. The GND and LLS terminals of control chip U1 are grounded. A capacitor C5 is connected between the CP1 and CP2 terminals of control chip U1. The VCP terminal of control chip U1 is connected to the output terminal of power input module 1.

[0021] The GH1 terminal of control chip U1 is connected to terminal 1 of the first drive unit 31. The OUT1 terminal of control chip U1 is connected to terminal 2 of the second drive unit 32, terminal 3 of the first drive unit 31, and the second connection terminal of output interface CN3. The GL1 terminal of control chip U1 is connected to terminal 1 of the second drive unit 32, and the GL2 terminal of control chip U1 is connected to terminal 1 of the fourth drive unit 34. The OUT2 terminal of control chip U1 is connected to terminal 3 of the third drive unit 33, terminal 2 of the fourth drive unit 34, and the third connection terminal of output interface CN3. The GH2 terminal of control chip U1 is connected to terminal 1 of the third drive unit 33. Terminals 2 of the first drive unit 31, terminal 2 of the third drive unit 33, and the first connection terminal of output interface CN3 are connected to the output terminal of power input module 1. Terminals 3 of the second drive unit 32 and terminal 3 of the fourth drive unit 34 are grounded together.

[0022] The output interface CN3 has a first connection terminal, a second connection terminal and a third connection terminal. The first connection terminal is connected to the output terminal of the power input module 1 and serves as the positive connection terminal of the output interface CN3. The second and third connection terminals serve as the control terminals of the output interface CN3, enabling the dual-color lamp driving circuit to meet the connection of two-wire dual-color lamps or three-wire dual-color lamps.

[0023] When connecting a three-wire dual-color LED, the first connection terminal of output interface CN3 is connected to the positive terminal of the dual-color LED, the second connection terminal of output interface CN3 is connected to the yellow LED control terminal of the dual-color LED, and the third connection terminal of output interface CN3 is connected to the white LED control terminal of the dual-color LED. In use, the IN1 and IN2 terminals of control chip U1 are connected to an external host computer to receive control signals from the host computer. When the host computer sends a high-level control signal to the IN1 terminal of control chip U1, control chip U1 drives the dual-color LED to switch to yellow. The GH1 and GL1 terminals of control chip U1 output high-level signals, and the OUT1 terminal of control chip U1 outputs a low-level signal, causing the first drive unit 31 and the second drive unit 32 to conduct. The input power supply passes through the first drive unit 31 and the second drive unit 32 sequentially to ground, forming a closed current loop. This causes the first and second connection terminals of output interface CN3 to conduct, switching the dual-color LED to yellow.

[0024] When the host computer sends a high-level control signal to the IN2 terminal of the control chip U1, the control chip U1 drives the dual-color LED to switch to white. When the GL2 and GH2 terminals of the control chip U1 send high-level signals, and the OUT2 terminal of the control chip U1 sends a low-level signal, the third drive unit 33 and the fourth drive unit 34 are turned on, thereby turning on the first and third connection terminals of the output interface CN3, causing the dual-color LED to switch to white.

[0025] Thus, by using the control chip U1 to output control signals to control the first drive unit 31, the second drive unit 32, the third drive unit 33, and the fourth drive unit 34 to switch between on and off states, thereby switching the first and second connection terminals of the output interface CN3 to be on or off, and thus switching the color of the dual-color LED, there is no need to set up separate drive circuits for the corresponding LEDs. Furthermore, the control chip U1 integrates a charge pump, eliminating the need for an external auxiliary power supply to power the first drive unit 31, the second drive unit 32, the third drive unit 33, and the fourth drive unit 34, effectively simplifying the circuit structure.

[0026] When connecting a two-wire bi-color LED, the positive terminal of the bi-color LED is connected to the first connection terminal of the output interface CN3, and the control terminal of the bi-color LED is connected to either the second or third connection terminal of the output interface CN3. It should be noted that when the control terminal of the bi-color LED is connected to the second connection terminal of the output interface CN3, the third drive unit 33 and the fourth drive unit 34 remain in a cutoff state; when the control terminal of the bi-color LED is connected to the third connection terminal of the output interface CN3, the first drive unit 31 and the second drive unit 32 remain in a cutoff state.

[0027] This example uses the connection between the control terminal of a dual-color LED and the second connection terminal of the output interface CN3. When the external host computer sends a high-level signal to the IN1 terminal of the control chip U1, the dual-color LED switches to yellow. After receiving the high-level signal, the control chip U1 controls the GH1, OUT1, and GL1 terminals to output high-level or low-level signals according to a preset program. This causes the first drive unit 31 and the second drive unit 32 to be turned on or off, changing their on / off times. Consequently, the second connection terminal of the output interface CN3 outputs a PWM signal with a preset duty cycle. The dual-color LED connected to the output interface CN3 switches its color temperature according to the PWM signal, thus changing the color of the dual-color LED.

[0028] When the external host computer sends a high-level signal to the IN2 terminal of the control chip U1, the dual-color LED switches to white. Upon receiving the high-level signal, the control chip U1, according to a preset program, controls the GH1, OUT1, and GL1 terminals to output high or low-level signals, causing the first driving unit 31 and the second driving unit 32 to be turned on or off, thus changing their on / off times. This results in the output interface CN3's second connection terminal outputting a PWM signal with a preset duty cycle. The dual-color LED connected to the output interface CN3 switches its color temperature according to the PWM signal, changing its color. This allows the dual-color LED driver circuit to be applied to both two-wire and three-wire dual-color LEDs, effectively expanding its application scenarios.

[0029] Furthermore, the first driving unit 31 includes a MOSFET Q1 and a resistor R4. One end of the resistor R4 is connected to the GH1 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q1. The drain of the MOSFET Q1 is connected to the output terminal of the power input module 1. The source of the MOSFET Q1 is connected to the OUT1 terminal of the control chip U1, the second connection terminal of the output interface CN3, and the second terminal of the second driving unit 32.

[0030] The second driving unit 32 includes a resistor R5 and a MOSFET Q2. One end of the resistor R5 is connected to the GL1 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q2. The drain of the MOSFET Q2 is connected to the OUT1 terminal of the control chip U1, the 3rd terminal of the first driving unit 31, and the second connection terminal of the output interface CN3. The source of the MOSFET Q2 is grounded.

[0031] The third driving unit 33 includes a resistor R7 and a MOSFET Q3. One end of the resistor R7 is connected to the GH2 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q3. The drain of the MOSFET Q3 is connected to the output terminal of the power input module 1, and the source of the MOSFET Q3 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the second terminal of the fourth driving unit 34.

[0032] The fourth driving unit 34 includes a resistor R6 and a MOSFET Q4. One end of the resistor R6 is connected to the GL2 terminal of the control chip U1, and the other end is connected to the gate of the MOSFET Q4. The drain of the MOSFET Q4 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the third terminal of the third driving unit 33.

[0033] In actual use, when the IN1 terminal of control chip U1 receives a high-level signal from the external host computer, the GH1 terminal of control chip U1 sends a high-level drive signal, the OUT1 terminal of control chip U1 sends a low-level signal, and the GL1 terminal of control chip U1 sends a high-level signal. At this time, the gate of MOSFET Q1 is at a high level, and the gate voltage of MOSFET Q1 is higher than its source voltage, causing MOSFET Q1 to conduct. The gate of MOSFET Q2 is at a high level, and the gate voltage of MOSFET Q1 is higher than its source voltage, causing MOSFET Q2 to conduct. This makes the yellow light path conductive, thus illuminating the yellow light of the dual-color LED.

[0034] When the IN2 terminal of control chip U1 receives a high-level signal from the external host computer, the GL2 terminal of control chip U1 sends a high-level signal, the OUT2 terminal of control chip U1 sends a low-level signal, and the GH2 terminal of control chip U1 sends a high-level signal. This causes the gate voltage of MOSFET Q3 to be higher than the source voltage of MOSFET Q3, and the gate voltage of MOSFET Q4 to be higher than the source voltage of MOSFET Q4, thus turning on MOSFETs Q3 and Q4. This makes the white LED path conductive, thereby illuminating the white LED of the dual-color LED.

[0035] Furthermore, the power input module 1 includes an input interface CN1, a transient diode TVS1, and a first filter unit 11. The input interface CN1 has a first input terminal and a second input terminal. One end of the transient diode TVS1 is connected to the first input terminal of the input interface CN1, and the other end is grounded to the second input terminal of the input interface CN1. One end of the first filter unit 11 is connected to the transient diode TVS1, the VM terminal and VDR terminal of the control chip U1, the second terminal of the first drive unit 31, the first connection terminal of the output interface CN3, and the second terminal of the third drive unit 33. The other end of the first filter unit 11 is grounded.

[0036] Input interface CN1 is used to connect the input power supply, allowing the input power to be connected to the dual-color lamp driver circuit. Transient diode TVS1 is used to absorb surge voltage and prevent instantaneous high voltage from damaging the circuit. The first filter unit 11 is used to filter the input power supply and stabilize the input power supply voltage.

[0037] Furthermore, the first filter unit 11 includes capacitor EC1, capacitor C1 and capacitor C2. Capacitor EC1 is connected in parallel with transient diode TVS1, capacitor C1 is connected in parallel with capacitor EC1, and capacitor C2 is connected in parallel with capacitor C1.

[0038] Capacitor EC1 is an electrolytic capacitor used to filter low-frequency signals. Capacitors C2 and C1 are used to filter high-frequency signals. The combination of capacitors EC1, C2, and C1 makes the input power supply smoother and more stable.

[0039] Preferably, the control module 2 further includes resistors R1 and R2. Resistor R1 is connected to the IN1 terminal of the control chip U1, and resistor R2 is connected to the IN2 terminal of the control chip U1. In actual connection, one end of resistor R1 is connected to an external host computer, and the other end is connected to the IN1 terminal of the control chip U1. When the external host computer sends a signal to the IN1 terminal of the control chip U1, the signal is input to the control chip U1 after being current-limited by resistor R1. One end of resistor R2 is connected to the external host computer, and the other end is connected to the IN2 terminal of the control chip U1. When the external host computer sends a signal to the IN2 terminal of the control chip U1, the signal is input to the IN2 terminal of the control chip U1 after being current-limited by resistor R2.

[0040] Control module 2 also includes resistor R3. Control chip U1 also has a VDS terminal. One end of resistor R3 is connected to the VDS terminal of control chip U1, and the other end is grounded. The VDS terminal of control chip U1 serves as the reference voltage point for overcurrent protection. By changing the resistance value of resistor R3, the overcurrent protection voltage value of control chip U1 is changed.

[0041] The control module 2 also includes a second filtering unit 21, which includes capacitors C3 and C4. One end of capacitor C3 is connected to the output terminal of the power input module 1 and the VDR terminal of the control chip U1, and the other end is grounded. Capacitor C4 is connected in parallel with capacitor C3. Capacitors C4 and C3 are used to filter the electrical signal output by the power input module 1.

[0042] The above description is merely an embodiment of this utility model and is not intended to limit the scope of this utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this utility model should be included within the scope of the claims of this utility model.

Claims

1. A dual-color lamp driving circuit, characterized in that, include: The system comprises a power input module (1), a control module (2), a drive module (3), and an output interface CN3; the control module (2) includes a control chip U1, which has a VM terminal, a VDR terminal, an IN1 terminal, an IN2 terminal, a GH1 terminal, an OUT1 terminal, a GL1 terminal, a GL2 terminal, an OUT2 terminal, and a GH2 terminal; the drive module (3) includes a first drive unit (31), a second drive unit (32), a third drive unit (33), and a fourth drive unit (34); the first drive unit (31), the second drive unit (32), the third drive unit (33), and the fourth drive unit (34) each have a terminal 1, a terminal 2, and a terminal 3 respectively; the output interface CN3 has a first connection terminal, a second connection terminal, and a third connection terminal; the input terminal of the power input module (1) is connected to a power supply, the output terminal of the power input module (1) is connected to the VM terminal and the VDR terminal of the control chip U1, and the GH1 terminal of the control chip U1 is connected to the first drive unit (31), the second drive unit (32), the third drive unit (33), and the fourth drive unit (34). Terminal 1 of a drive unit (31) is connected to terminal 2 of the second drive unit (32), terminal 3 of the first drive unit (31), and the second connection terminal of the output interface CN3, respectively. Terminal GL1 of the control chip U1 is connected to terminal 1 of the second drive unit (32). Terminal GL2 of the control chip U1 is connected to terminal 1 of the fourth drive unit (34). Terminal OUT2 of the control chip U1 is connected to terminal 3 of the third drive unit (33), terminal 2 of the fourth drive unit (34), and the third connection terminal of the output interface CN3, respectively. Terminal GH2 of the control chip U1 is connected to terminal 1 of the third drive unit (33). Terminal 2 of the first drive unit (31), terminal 2 of the third drive unit (33), and the first connection terminal of the output interface CN3 are connected to the output terminal of the power input module (1). Terminal 3 of the second drive unit (32) and terminal 3 of the fourth drive unit (34) are grounded together.

2. The dual-color lamp driving circuit according to claim 1, characterized in that, The power input module (1) includes an input interface CN1, a transient diode TVS1, and a first filter unit (11). The input interface CN1 has a first input terminal and a second input terminal. One end of the transient diode TVS1 is connected to the first input terminal of the input interface CN1, and the other end is grounded to the second input terminal of the input interface CN1. One end of the first filter unit (11) is connected to the transient diode TVS1, the VM terminal and VDR terminal of the control chip U1, the No. 2 terminal of the first drive unit (31), the first connection terminal of the output interface CN3, and the No. 2 terminal of the third drive unit (33). The other end of the first filter unit (11) is grounded.

3. The dual-color lamp driving circuit according to claim 2, characterized in that, The first filter unit (11) includes capacitor EC1, capacitor C1 and capacitor C2. The capacitor EC1 is connected in parallel with the transient diode TVS1, the capacitor C1 is connected in parallel with the capacitor EC1, and the capacitor C2 is connected in parallel with the capacitor C1.

4. The dual-color lamp driving circuit according to claim 1, characterized in that, The first driving unit (31) includes a MOS transistor Q1 and a resistor R4. One end of the resistor R4 is connected to the GH1 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q1. The drain of the MOS transistor Q1 is connected to the output terminal of the power input module (1). The source of the MOS transistor Q1 is connected to the OUT1 terminal of the control chip U1, the second connection terminal of the output interface CN3, and the No. 2 terminal of the second driving unit (32).

5. The dual-color lamp driving circuit according to claim 1, characterized in that, The second driving unit (32) includes a resistor R5 and a MOS transistor Q2. One end of the resistor R5 is connected to the GL1 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q2. The drain of the MOS transistor Q2 is connected to the OUT1 terminal of the control chip U1, the 3rd terminal of the first driving unit (31), and the second connection terminal of the output interface CN3. The source of the MOS transistor Q2 is grounded.

6. The dual-color lamp driving circuit according to claim 1, characterized in that, The third driving unit (33) includes a resistor R7 and a MOS transistor Q3. One end of the resistor R7 is connected to the GH2 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q3. The drain of the MOS transistor Q3 is connected to the output terminal of the power input module (1), and the source of the MOS transistor Q3 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the No. 2 terminal of the fourth driving unit (34).

7. The dual-color lamp driving circuit according to claim 1, characterized in that, The fourth driving unit (34) includes a resistor R6 and a MOS transistor Q4. One end of the resistor R6 is connected to the GL2 terminal of the control chip U1, and the other end is connected to the gate of the MOS transistor Q4. The drain of the MOS transistor Q4 is connected to the OUT2 terminal of the control chip U1, the third connection terminal of the output interface CN3, and the 3rd terminal of the third driving unit (33).

8. The dual-color lamp driving circuit according to claim 1, characterized in that, The control module (2) further includes resistors R1 and R2. Resistor R1 is connected to the IN1 terminal of the control chip U1, and resistor R2 is connected to the IN2 terminal of the control chip U2.

9. The dual-color lamp driving circuit according to claim 1, characterized in that, The control module (2) also includes a resistor R3, and the control chip U1 also has a VDS terminal. One end of the resistor R3 is connected to the VDS terminal of the control chip U3, and the other end is grounded.

10. The dual-color lamp driving circuit according to claim 1, characterized in that, The control module (2) further includes a second filtering unit (21), which includes capacitor C3 and capacitor C4. One end of capacitor C3 is connected to the output terminal of the power input module (1) and the VDR terminal of the control chip U1, and the other end is grounded. Capacitor C4 is connected in parallel with capacitor C3.

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