An LED chip

Abstract

The application discloses an LED chip, and relates to the technical field of semiconductors. m In (1‑m) A transition layer is arranged between the P confinement layer and the GaP current spreading layer, the transition layer comprises a first transition layer and a second transition layer which are stacked, the first transition layer is Ga y In (1‑y) The P / GaAs n P (1‑n) The second transition layer is a GaAs z P (1‑z) / GaP superlattice structure, the Al m In (1‑m) The P confinement layer is directed to the GaP current spreading layer, the Ga y In (1‑y) The Ga component of the InP layer gradually increases, and the In component gradually decreases, the GaAs z P (1‑z) The As component of the second transition layer gradually decreases to 0, and the P component gradually increases to 1, so that the material and the lattice transition are realized, and the crystal quality of the GaP current spreading layer and the epitaxial structure of the LED chip is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and particularly to an LED chip. Background Art

[0002] Currently, most of the AlGaInP-based light emitting diodes (LEDs) chips on the market have the same-side electrode structure. This chip structure requires growing a relatively thick GaP current spreading layer on the AlInP confinement layer in the epitaxial structure. However, the lattice constant of the GaP material is 5.45, and the lattice constant of the AlInP material is 5.66. That is, there is a large difference in lattice constants between the AlInP confinement layer and the GaP current spreading layer, which will lead to a large lattice mismatch between the AlInP confinement layer and the GaP current spreading layer. Therefore, lattice defects will be formed at the interface between the AlInP confinement layer and the GaP current spreading layer. These lattice defects will cause uneven current diffusion, and the current will concentrate at the defects, ultimately causing the junction temperature to rise and damaging the device.

[0003] Therefore, how to improve the lattice mismatch between the AlInP confinement layer and the GaP current spreading layer in the LED chip is an urgent problem to be solved. Utility Model Content

[0004] To solve the above technical problems, the embodiments of this application provide an LED chip to improve the lattice mismatch between the AlInP confinement layer and the GaP current spreading layer in the LED chip, reduce the lattice defects generated at the interface between the AlInP confinement layer and the GaP current spreading layer, improve the crystal quality of the epitaxial structure of the LED chip, and further improve the optoelectronic performance and stability of the device.

[0005] To achieve the above object, the embodiments of this application provide the following technical solutions:

[0006] An LED chip includes a first-type confinement layer, an active layer, a second-type confinement layer, a transition layer, and a second-type current spreading layer stacked in sequence. The second-type confinement layer is an Al m In (1-m) P layer, where 0 < m < 1. The second-type current spreading layer is a GaP layer. The transition layer includes a first transition layer and a second transition layer stacked in sequence along the direction from the second-type confinement layer to the second-type current spreading layer;

[0007] The first transition layer includes a first sub-layer and a second sub-layer stacked alternately. The first sub-layer is a Ga y In (1-y) P layer, and the second sub-layer is a GaAs n P (1-n)In the first sublayer, along the direction from the second type confinement layer to the second type current spreading layer, the Ga component y of each first sublayer gradually increases, and the In component (1-y) of each first sublayer gradually decreases. <y<1,0<n<1;

[0008] The second transition layer includes alternating layers of a third sublayer and a fourth sublayer, wherein the third sublayer is GaAs. z P (1-z) In each of the third sub-layers, z≤n, the fourth sub-layer is a GaP layer. Along the direction from the second type confinement layer to the second type current extension layer, the As component z of each third sub-layer gradually decreases to 0, and the P component (1-z) of each third sub-layer gradually increases to 1.

[0009] Optionally, the transition layer further includes a third transition layer located between the second type of confinement layer and the first transition layer, wherein the third transition layer is (Al). x Ga 1-x ) m In (1-m) In the P layer, along the direction from the second type confinement layer to the second type current spreading layer, the Al component x of the third transition layer gradually decreases from 1 to 0, and the Ga component (1-x) of the third transition layer gradually increases from 0 to 1;

[0010] In the first transition layer, the Ga component y ≥ m in each of the first sublayers.

[0011] Optional, m=0.5, n=0.5;

[0012] The second type of confinement layer is Al 0.5 In 0.5 P layer, the third transition layer is (Al) x Ga 1-x ) 0.5 In 0.5 P layer;

[0013] In the first transition layer, the Ga component y of each of the first sublayers satisfies: 0.5 ≤ y ≤ 0.8, and the In component (1-y) of each of the first sublayers satisfies: 0.2 ≤ (1-y) ≤ 0.5. The second sublayer is GaAs. 0.5 P 0.5 layer.

[0014] Optionally, the layer in the first transition layer that is closest to the second transition layer is the first sub-layer, and the layer in the second transition layer that is closest to the first transition layer is the third sub-layer.

[0015] Optionally, the layer closest to the second transition layer in the first transition layer is the second sub-layer, and the layer closest to the first transition layer in the second transition layer is the fourth sub-layer.

[0016] Optionally, in the first transition layer, the thickness of the first sub-layer ranges from 2 nm to 15 nm, including the end values;

[0017] In the first transition layer, the thickness of the second sub-layer ranges from 2 nm to 15 nm, including the end values.

[0018] Optionally, in the first transition layer, one layer of the first sub-layer and an adjacent layer of the second sub-layer form a first periodic structure, and the number of periods of the first periodic structure in the first transition layer is 3 to 10, including the end values.

[0019] Optionally, in the second transition layer, the thickness of the third sub-layer ranges from 2 nm to 15 nm, including the end values;

[0020] In the second transition layer, the thickness of the fourth sub-layer ranges from 2 nm to 15 nm, including the end values.

[0021] Optionally, in the second transition layer, one layer of the third sub-layer and an adjacent layer of the fourth sub-layer form a second periodic structure, and the number of periods of the second periodic structure in the second transition layer is 3 to 10, including the end values.

[0022] Optionally, the first-type confinement layer is an N-type confinement layer, the second-type confinement layer is a P-type confinement layer, and the transition layer and the second-type current spreading layer are both P-type doped layers.

[0023] Compared with the prior art, the above technical solution has the following advantages:

[0024] The LED chip provided by the embodiment of the present application includes a first-type confinement layer, an active layer, a second-type confinement layer, a transition layer, and a second-type current spreading layer stacked in sequence. The second-type confinement layer is an Al m In (1-m) P layer, 0 < m < 1, and the second-type current spreading layer is a GaP layer. That is, if the second-type current spreading layer (GaP layer) is directly grown on the second-type confinement layer (Al m In (1-m) P layer), there will be a large lattice mismatch between the two. Based on this, a transition layer is added between the second-type confinement layer and the second-type current spreading layer. Specifically, the transition layer includes a first transition layer and a second transition layer stacked in sequence along the direction from the second-type confinement layer to the second-type current spreading layer. Among them, the first transition layer includes the first sub-layer and the second sub-layer stacked alternately. The first sub-layer is Ga yIn (1-y) The P layer can control the Ga component y of the first sublayer closest to the second-type confinement layer in the first transition layer to make its lattice constant close to that of the second-type confinement layer, and the second sublayer is GaAs n P (1-n) layer. Moreover, along the direction from the second-type confinement layer to the second-type current spreading layer, the Ga component y of each first sublayer gradually increases, and the In component (1 - y) of each first sublayer gradually decreases, where 0 < y < 1 and 0 < n < 1. Thus, Ga component is introduced through the first transition layer and the In component gradually decreases, so as to transition to the second-type current spreading layer (GaP layer) in terms of material. The second transition layer includes alternately stacked third and fourth sublayers. The third sublayer is GaAs z P (1-z) layer, z ≤ n, the fourth sublayer is GaP layer. Moreover, along the direction from the second-type confinement layer to the second-type current spreading layer, the As component z of each third sublayer gradually decreases to 0, and the P component (1 - z) of each third sublayer gradually increases to 1. Thus, the second transition layer gradually reduces the As component and gradually increases the P component on the basis of the first transition layer, and transitions to the second-type current spreading layer (GaP layer) in terms of material. At the same time, the alternately stacked first and second sublayers in the first transition layer form a Ga y In (1-y) P / GaAs n P (1-n) superlattice structure, and the alternately stacked third and fourth sublayers in the second transition layer form a GaAs z P (1-z) / GaP superlattice structure. Since the superlattice grows alternately, it can offset the stress, thereby reducing the dislocations generated at the interface due to the sudden change in lattice size, and at the same time reducing the defect diffusion caused by stress concentration, realizing the lattice transition from the second-type confinement layer (Al m In (1-m) P layer) to the second-type current spreading layer (GaP layer), and improving the crystal quality of the second-type current spreading layer (GaP layer).

[0025] Moreover, the elements of the second transition layer 42 are Ga, As, and P. Among them, both elements As and P are group V elements, and element Ga is a group III element. When growing the second transition layer 42, both the As source and the P source are in excess, and only the Ga source contributes to the growth rate. Therefore, by only controlling the flow rate of the Ga source, the growth rate of the second transition layer 42 can be better controlled, and thus the growth quality of the second transition layer 42 can be better controlled, which is further beneficial to improving the crystal quality of the second-type current spreading layer 50 (GaP layer).

[0026] That is to say, for the LED chip provided by the embodiment of the present application, by using the second-type confinement layer (Al m [[ID=3(1-m) A transition layer is set between the AlInP confinement layer and the GaP current spread layer in the LED chip to improve the lattice mismatch between the AlInP confinement layer and the GaP current spread layer, reduce the lattice defects generated at the interface between the AlInP confinement layer and the GaP current spread layer, improve the crystal quality of the GaP current spread layer and the epitaxial structure of the LED chip, make the current diffusion more uniform, and thus improve the photoelectric performance and stability of the LED device. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a cross-sectional structural diagram of an LED chip provided in an embodiment of this application;

[0029] Figure 2 This is a schematic cross-sectional view of the second type confinement layer 30, transition layer 40, and second type current spreading layer 50 in the LED chip provided in the embodiments of this application.

[0030] Figure 3 This is a schematic cross-sectional view of another type of LED chip, including the second type confinement layer 30, the transition layer 40, and the second type current spreading layer 50, provided in the embodiments of this application.

[0031] Figure 4 This is another cross-sectional structural diagram of the second type confinement layer 30, transition layer 40 and second type current spreading layer 50 in the LED chip provided in the embodiments of this application.

[0032] Figure label:

[0033] 10-Type I confinement layer; 20-Active layer; 30-Type II confinement layer; 40-Transition layer; 50-Type II current spreading layer; 41-First transition layer; 411-First sublayer; 412-Second sublayer; 42-Second transition layer; 421-Third sublayer; 422-Fourth sublayer; 101-Substrate; 102-Buffer layer; 103-Etching stop layer; 104-Ohmic contact layer; 105-Type I current spreading layer; T1-First periodic structure; T2-Second periodic structure. Detailed Implementation

[0034] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application.

[0035] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned accompanying drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, which is only a way of distinguishing when describing objects with the same attributes in the embodiments of the present application. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion, so that a process, method, system, product or device including a series of units does not necessarily need to be limited to those units, but may include other units not clearly listed or inherent to these processes, methods, products or devices.

[0036] Secondly, the present application will be described in detail in conjunction with the schematic diagrams. When detailing the embodiments of the present application, for the convenience of description, the accompanying drawings showing the device structure will be enlarged locally in a non-general proportion, and the schematic diagrams are only examples and should not limit the scope of protection of the present application here. In addition, in actual production, three-dimensional spatial dimensions including length, width and depth should be included.

[0037] As described in the background art section, how to improve the lattice mismatch between the AlInP confinement layer and the GaP second-type current spreading layer in the LED chip is an urgent problem to be solved.

[0038] In view of this, the embodiments of the present application provide an LED chip. Figure 1 The cross-sectional structure schematic diagram of an LED chip provided by the embodiments of the present application is shown. As Figure 1 shown, the LED chip includes a first-type confinement layer 10, an active layer 20, a second-type confinement layer 30, a transition layer 40, and a second-type current spreading layer 50 stacked in sequence. The second-type confinement layer 30 is an Al m In (1-m) P layer, 0 < m < 1, and the second-type current spreading layer 50 is a GaP layer. If the second-type current spreading layer 50 (GaP layer) is directly grown on the second-type confinement layer 30 (Al m In (1-m) P layer), there will be a large lattice mismatch between the two. For example, when m = 0.5, the second-type confinement layer 30 is an Al 0.5 In 0.5 P layer, and the second-type confinement layer 30 (Al 0.5 In 0.5The lattice constant of the P layer is 5.66 Å, while the lattice constant of the second-type current spreading layer 50 (GaP layer) is 5.45 Å, resulting in a significant lattice mismatch between the two.

[0039] Based on this, as Figure 1 shown, a transition layer 40 is added between the second-type confinement layer 30 and the second-type current spreading layer 50 to improve the lattice mismatch between the second-type confinement layer 30 (Al m In (1-m) P layer) and the second-type current spreading layer 50 (GaP layer).

[0040] Figure 2 FIG. shows a schematic cross-sectional structure of the second-type confinement layer 30, the transition layer 40, and the second-type current spreading layer 50 in the LED chip provided by the embodiment of the present application. As Figure 2 shown, the transition layer 40 includes a first transition layer 41 and a second transition layer 42 that are sequentially stacked along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50.

[0041] Among them, the first transition layer 41 includes first sub-layers 411 and second sub-layers 412 that are alternately stacked. The first sub-layer 411 is a Ga y In (1-y) P layer, and the second sub-layer 412 is a GaAs n P (1-n) layer. Along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, the Ga component y of each first sub-layer 411 gradually increases, and the In component (1 - y) of each first sub-layer 411 gradually decreases, where 0 < y < 1 and 0 < n < 1.

[0042] The second transition layer 42 includes third sub-layers 421 and fourth sub-layers 422 that are alternately stacked. The third sub-layer 421 is a GaAs z P (1-z) layer, where z ≤ n, and the fourth sub-layer 422 is a GaP layer. Along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, the As component z of each third sub-layer 421 gradually decreases to 0, and the P component (1 - z) of each third sub-layer gradually increases to 1.

[0043] It can be understood that the second-type confinement layer 30 is an Al m In (1-m) P layer, where 0 < m < 1, the second-type current spreading layer 50 is a GaP layer, and the transition layer 40 needs to achieve the transition in terms of materials and lattice between the second-type confinement layer 30 and the second-type current spreading layer 50. Specifically,

[0044] for the first transition layer 41 that is closer to the second-type confinement layer 30 in the transition layer 40, its first sub-layer 411 is Ga y In(1-y) For the P layer, where 0 < y < 1, the Ga composition y of the first sub-layer 411 closest to the second-type confinement layer 30 in the first transition layer 41 can be set such that the lattice constant of the first sub-layer 411 closest to the second-type confinement layer 30 in the first transition layer 41 is close to the lattice constant of the second-type confinement layer 30. For example, the Ga composition y of the first sub-layer 411 closest to the second-type confinement layer 30 in the first transition layer 41 can be set to y = 0.5, that is, the first sub-layer 411 closest to the second-type confinement layer 30 in the first transition layer 41 is Ga 0.5 In 0.5 P layer, Ga 0.5 In 0.5 The lattice constant of the P layer is close to the lattice constant of the second-type confinement layer 30 (for example, it is Al<00​​​​​​​​​​​​​​​​​​​​​​​(Layer), for example, if n=0.5, then the second sublayer 412 is GaAs. 0.5 P 0.5 Layer, at this point, the second sublayer 412 (GaAs) 0.5 P 0.5 The lattice constant of the first sublayer 411 is 5.55 Å, meaning that in the first transition layer 41, the lattice constant of the first sublayer 411 is large and the lattice constant of the second sublayer 412 is small. The equivalent lattice constant of the first transition layer 41 is the lattice transition from the second type confinement layer 30 to the second type current extension layer 50.

[0048] It should also be noted that the first sub-layer 411 (Ga) in the first transition layer 41 is alternately stacked. y In (1-y) P-layer) and second sublayer 412 (GaAs) n P (1-n) Ga (layers) constitute y In (1-y) P / GaAs n P (1-n) Superlattice structures, through alternating superlattice growth, can counteract stress, thereby reducing dislocations at the interface caused by abrupt changes in lattice size. They can also reduce defect diffusion caused by stress concentration, thus improving the crystal quality of subsequent grown films.

[0049] For the second transition layer 42, which is closer to the second type current extension layer 50 in the transition layer 40, its third sublayer 421 is GaAs. z P (1-z) In the second transition layer 42, the fourth sublayer 422 is a GaP layer, z≤n. Furthermore, along the direction from the second-type confinement layer 30 to the second-type current extension layer 50, the As component z of each third sublayer 421 gradually decreases to 0, and the P component (1-z) of each third sublayer 421 gradually increases to 1. That is, the third sublayer 421 (GaAs) in the second transition layer 42... z P (1-z) In the first transition layer 41, the second sublayer 412 (GaAs) n P (1-n) Based on the first layer, the As content gradually decreases and the P content gradually increases, transitioning to the second type current extension layer 50 (GaP layer) in terms of both material and lattice.

[0050] It should be noted that in the second transition layer 42, along the direction from the second type confinement layer 30 to the second type current extension layer 50, the As component z of each third sublayer 421 gradually decreases to 0, and the P component (1-z) of each third sublayer gradually increases to 1. This means that along the direction from the second type confinement layer 30 to the second type current extension layer 50, the As component of the (j+1)th third sublayer 421 is less than the As component of the jth third sublayer 421, and the P component of the (j+1)th third sublayer 421 is greater than the P component of the jth third sublayer 421.

[0051] It should also be noted that the third sublayer 421 (GaAs) alternately stacked in the second transition layer 42 z P (1-z) The first layer (GaAs) and the fourth sublayer (GaP layer) constitute GaAs. z P (1-z) / GaP superlattice structure, the alternating growth of superlattices can offset stress, thereby reducing dislocations at the interface caused by abrupt changes in lattice size, and also reducing defect diffusion caused by stress concentration, realizing the transition of the lattice to the second type current spread layer 50 (GaP layer), and improving the crystal quality of the second type current spread layer 50 (GaP layer).

[0052] Furthermore, the second transition layer 42 contains Ga, As, and P elements, where As and P are both group V elements and Ga is a group III element. During the growth of the second transition layer 42, both As and P sources are in excess, and only the Ga source contributes to the growth rate. Therefore, by controlling the flow rate of the Ga source, the growth rate of the second transition layer 42 can be better controlled, thereby better controlling the growth quality of the second transition layer 42 and further improving the crystal quality of the second type current extension layer 50 (GaP layer).

[0053] Therefore, it can be seen that the LED chip provided in the embodiments of this application, through the second type of confinement layer 30 (Al) m In (1-m) A transition layer 40 is provided between the AlInP confinement layer 50 and the second-type current spreading layer 50 (GaP layer) to improve the lattice mismatch between the AlInP confinement layer and the GaP current spreading layer in the LED chip, reduce the lattice defects generated at the interface between the AlInP confinement layer and the GaP current spreading layer, improve the crystal quality of the GaP current spreading layer and the epitaxial structure of the LED chip, make the current diffusion more uniform, and thus improve the photoelectric performance and stability of the LED device.

[0054] Figure 3 This illustration shows another cross-sectional structural diagram of the second-type confinement layer 30, transition layer 40, and second-type current spreading layer 50 in the LED chip provided in this application embodiment, as shown below. Figure 3As shown, the transition layer 40 further includes a third transition layer 43 located between the second type confinement layer 30 and the first transition layer 41, the third transition layer 43 being (Al) x Ga 1-x ) m In (1-m) In the P layer, along the direction from the second type confinement layer 30 to the second type current extension layer 50, the Al component x of the third transition layer 43 gradually decreases from 1 to 0, and the Ga component (1-x) of the third transition layer gradually increases from 0 to 1.

[0055] This is because, although it is known from the foregoing that the Ga composition y of the first sublayer 411 closest to the second-type confinement layer 30 in the first transition layer 41 can be set such that the lattice constant of the first sublayer 411 closest to the second-type confinement layer 30 in the first transition layer 41 is close to the lattice constant of the second-type confinement layer 30, in order to introduce the Ga composition, the first sublayer 411 of the first transition layer 41 is Ga. y In (1-y) The P layer, its second sublayer 412 is GaAs n P (1-n) Layer, while the second type of confinement layer 30 is Al m In (1-m) When the P layer, i.e., the second type confinement layer 30, is transformed into the first transition layer 41, the Al component is directly transformed into the Ga component. However, in the actual process, even if the Al source is replaced with the Ga source, the Al source still remains in the reaction chamber and pipeline. Therefore, Al impurities may be present during the growth of the first transition layer 41.

[0056] In order to achieve the second type confinement layer 30 (Al) m In (1-m) To ensure a smooth transition from the P-layer to the first transition layer 41, in this embodiment, a third transition layer 43 is added between the second type confinement layer 30 and the first transition layer 41. The third transition layer 43 is (Al) x Ga 1-x ) m In (1-m) The P-layer not only increases the Ga component but also retains the Al component. Furthermore, the third transition layer 43 is a gradient layer, characterized by the following: along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, the Al component x of the third transition layer 43 gradually decreases from 1 to 0, while the Ga component (1-x) of the third transition layer gradually increases from 0 to 1. In other words, the material of the third transition layer 43 changes from Al... m In (1-m) P gradually transforms into Ga m In (1-m) P causes the Al component to gradually decrease and the Ga component to gradually increase, thus achieving the second type confinement layer 30 (Al). m In (1-m)Smooth transition from layer P to the first transition layer 41.

[0057] Furthermore, the lattice constant of the third transition layer 43 is close to that of the second-type confinement layer 30, for example, m=0.5. Therefore, along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, the material of the third transition layer 43 is Al. 0.5 In 0.5 P gradually transforms into Ga 0.5 In 0.5 P has a lattice constant of approximately 5.66 Å, which is basically consistent with the lattice constant of the second type confinement layer 30. That is, the third transition layer 43 is a lattice-matching layer of the second type confinement layer 30. Without introducing lattice mismatch, the Al content gradually decreases and the Ga content gradually increases, which is beneficial to the growth quality of the subsequent first transition layer 41 and second transition layer 42.

[0058] It is understood that, in this embodiment, each first sub-layer 411 (Ga) in the first transition layer 41 y In (1-y) In the first transition layer 41, the Ga composition y of each first sub-layer 411 gradually increases along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, based on the third transition layer 43. For example, if m = 0.5, then the material of the third transition layer 43 is composed of Al... 0.5 In 0.5 P gradually transforms into Ga 0.5 In 0.5 P, in the first transition layer 41, each first sublayer 411 (Ga y In (1-y) The Ga content in the P layer gradually increases from 0.5.

[0059] Based on the above embodiments, optionally, in some embodiments of this application, m=0.5, then the second type confinement layer 30 is Al. 0.5 In 0.5 P layer, the third transition layer 43 is (Al) x Ga 1-x ) 0.5 In 0.5 In the P-layer, along the direction from the second-type confinement layer 30 to the second-type current spreading layer 50, the Al composition x of the third transition layer 43 gradually decreases from 1 to 0, and the Ga composition (1-x) of the third transition layer 43 gradually increases from 0 to 1. The material of the third transition layer 43 is composed of Al... 0.5 In 0.5 P gradually transforms into Ga 0.5 In 0.5P, the lattice constant of the third transition layer 43 and the lattice constant of the second type confinement layer 30 are both 5.66 Å, that is, the third transition layer 43 is the lattice matching layer of the second type confinement layer 30. The third transition layer 43 causes the Al content to gradually decrease and the Ga content to gradually increase without introducing lattice mismatch.

[0060] Furthermore, in the first transition layer 41, each first sub-layer 411 (Ga y In (1-y) The Ga component y of the P layer satisfies: 0.5 ≤ y ≤ 0.8, and the first sublayer 411 (Ga y In (1-y) The In component (1-y) of the P layer satisfies: 0.2 ≤ (1-y) ≤ 0.5. That is, in the first transition layer 41, along the direction from the second type confinement layer 30 to the second type current extension layer 50, each first sublayer 411 (Ga y In (1-y) The Ga composition y of the P layer gradually changes from 0.5 to 0.8, and the first sublayer 411 (Ga y In (1-y) The In composition (1-y) of the P layer gradually changes from 0.5 to 0.2, and the first sublayer 411 (Ga y In (1-y) The lattice constant of the P-layer gradually changes to 5.78 Å as the Ga composition increases; and, n=0.5, each second sublayer 412 (GaAs) in the first transition layer 41... n P (1-n) (Layer) is GaAs 0.5 P 0.5 The lattice constant of each second sublayer 412 is 5.55, which is intermediate between the second type confinement layer 30 (Al). 0.5 In 0.5 The lattice constant of GaP (5.66 Å) is between that of the type 2 current-extended layer 50 (GaP layer) (5.45 Å).

[0061] Thus, based on the third transition layer 43, each first sublayer 411 of the first transition layer 41, along the direction from the second type confinement layer 30 to the second type current spreading layer 50, gradually increases the Ga composition y from 0.5 to 0.8 and gradually decreases the In composition from 0.5 to 0.2, thereby transitioning to the second type current spreading layer 50 (GaP layer) in terms of material; moreover, although each first sublayer 411 (GaP layer) in the first transition layer 41... y In (1-y) The lattice constant of the P-layer gradually increases with increasing Ga composition, but the lattice constant of each second sublayer 412 (GaAs) remains relatively constant. n P (1-n) The lattice constant of the layer is intermediate between that of the type II confinement layer 30 (Al). 0.5 In0.5 The lattice constant of the first transition layer 41 is between that of the second type confinement layer 30 and the second type current spreading layer 50 (GaP layer), such that the equivalent lattice constant of the first transition layer 41 is a lattice transition from the second type confinement layer 30 to the second type current spreading layer 50; simultaneously, the first sub-layers 411 (GaP layers) alternately stacked in the first transition layer 41 are... y In (1-y) P-layer) and second sublayer 412 (GaAs) n P (1-n) Ga (layers) constitute y In (1-y) P / GaAs n P (1-n) Superlattice structures, through alternating superlattice growth, can counteract stress, thereby reducing dislocations at the interface caused by abrupt changes in lattice size. They can also reduce defect diffusion caused by stress concentration, thus improving the crystal quality of subsequent grown films.

[0062] In the second transition layer 42, along the direction from the second type confinement layer 30 to the second type current extension layer 50, each third sublayer 421 (GaAs) z P (1-z) The As composition z of each third sublayer (421 (GaAs) gradually decreases from 0.5 to 0. z P (1-z) The p-component (1-z) of the second transition layer 42 gradually increases to 1, and each fourth sublayer 422 is a GaP layer, transitioning to a type II current-spreading layer 50 (GaP layer) in both material and lattice aspects. Furthermore, the third sublayer 421 (GaAs) alternately stacked in the second transition layer 42... z P (1-z) The first layer (GaAs) and the fourth sublayer (GaP layer) constitute GaAs. z P (1-z) / GaP superlattice structure, the alternating growth of superlattices can offset stress, thereby reducing dislocations at the interface caused by abrupt changes in lattice size, and also reducing defect diffusion caused by stress concentration, realizing the transition of the lattice to the second type current spread layer 50 (GaP layer), and improving the crystal quality of the second type current spread layer 50 (GaP layer).

[0063] Based on any of the above embodiments, optionally, such as Figure 2 and Figure 3 As shown, in some embodiments of this application, the layer closest to the second transition layer 42 in the first transition layer 41 is the first sublayer 411, i.e., Ga y In (1-y) In the P-layer, the layer closest to the first transition layer 41 in the second transition layer 42 is the third sub-layer 421, i.e., GaAs. z P (1-z)In this way, the layer closest to the second transition layer 42 in the first transition layer 41 and the layer closest to the first transition layer 41 in the second transition layer 42 are similar to the first sub-layer 411 and the second sub-layer 412 in the first transition layer 41, so that the first transition layer 41 transitions smoothly to the second transition layer 42.

[0064] Optionally, in other embodiments of this application, such as Figure 4 As shown, the layer closest to the second transition layer 42 in the first transition layer 41 is the second sublayer 412, i.e., GaAs. n P (1-n) In the second transition layer 42, the layer closest to the first transition layer 41 is the fourth sub-layer 422, which is the GaP layer. Thus, the layer closest to the second transition layer 42 in the first transition layer 41 and the layer closest to the first transition layer 41 in the second transition layer 42 are similar to the third sub-layer 421 and the fourth sub-layer 422 in the second transition layer 42, so that the first transition layer 41 can transition smoothly to the second transition layer 42.

[0065] It should be noted that this application does not limit whether the layer closest to the second type of confinement layer 30 in the first transition layer 41 is the first sub-layer 411 or the second sub-layer 412. That is, the layer closest to the second type of confinement layer 30 in the first transition layer 41 can be the first sub-layer 411 or the second sub-layer 412.

[0066] This application does not limit whether the layer closest to the second type current spreading layer 50 in the second transition layer 42 is the third sublayer 421 or the fourth sublayer 422, even if the layer closest to the second type current spreading layer 50 in the second transition layer 42 is the third sublayer 421 (GaAs). z P (1-z) Since z will eventually decrease to 0, the third sub-layer 421 closest to the second type current extension layer 50 in the second transition layer 42 is also a GaP layer. Thus, the second type current extension layer 50 is grown on the GaP layer, resulting in a very good growth quality of the second type current extension layer 50.

[0067] As previously known, the first sublayer 411 (Ga) alternately stacked in the first transition layer 41 y In (1-y) P-layer) and second sublayer 412 (GaAs) n P (1-n) Ga (layers) constitute y In (1-y) P / GaAs n P (1-n)In a superlattice structure, the thicknesses of the first sublayer 411 and the second sublayer 412 need to be relatively small. Optionally, in the first transition layer 41, the thickness of the first sublayer 411 ranges from 2nm to 15nm, including the endpoints; the thickness of the second sublayer 412 also ranges from 2nm to 15nm, including the endpoints, to facilitate the alternating stacking of the first sublayer 411 (Ga). y In (1-y) P-layer) and second sublayer 412 (GaAs) n P (1-n) Ga (layers) constitute y In (1-y) P / GaAs n P (1-n) Superlattice structure.

[0068] It should be noted that in the first transition layer 41, the thickness of each first sub-layer 411 can be equal, or at least two first sub-layers 411 can have different thicknesses. This application does not limit whether the thickness of each first sub-layer 411 is equal, as long as the thickness of each first sub-layer 411 is within a certain range (such as 2nm-15nm).

[0069] Similarly, in the first transition layer 41, the thickness of each second sub-layer 412 can be equal, or at least two second sub-layers 412 can have different thicknesses. In this application, it is not limited whether the thickness of each second sub-layer 412 is equal, as long as the thickness of each second sub-layer 412 is within a certain range (such as 2nm-15nm).

[0070] It is understandable that, such as Figures 2-4 As shown, in the first transition layer 41, a first sub-layer 411 and an adjacent second sub-layer 412 constitute a first periodic structure T1. The number of periods of the first periodic structure T1 in the first transition layer 41 can be 3-10, including the endpoint values.

[0071] Similar to the first transition layer 41, the third sublayer 421 (GaAs) is alternately stacked in the second transition layer 42. z P (1-z) The first layer (GaAs) and the fourth sublayer (GaP layer) constitute GaAs. z P (1-z) In a GaP superlattice structure, the thicknesses of the third sublayer 421 and the fourth sublayer 422 need to be relatively small. Optionally, in the second transition layer 42, the thickness of the third sublayer 421 ranges from 2nm to 15nm, including the endpoints; the thickness of the fourth sublayer 422 also ranges from 2nm to 15nm, including the endpoints, to facilitate the alternating stacking of the third sublayer 421 (GaAs). z P (1-z) The first layer (GaAs) and the fourth sublayer (GaP layer) constitute GaAs. z P(1-z) / GaP superlattice structure.

[0072] It should be noted that in the second transition layer 42, the thickness of each third sub-layer 421 can be equal, or at least two third sub-layers 421 can have different thicknesses. This application does not limit whether the thickness of each third sub-layer 421 is equal, as long as the thickness of each third sub-layer 421 is within a certain range (such as 2nm-15nm).

[0073] Similarly, in the second transition layer 42, the thickness of each fourth sublayer 422 can be equal, or at least two fourth sublayers 422 can have different thicknesses. This application does not limit whether the thickness of each fourth sublayer 422 is equal, as long as the thickness of each fourth sublayer 422 is within a certain range (such as 2nm-15nm).

[0074] It is understandable that, such as Figures 2-4 As shown, in the second transition layer 42, a third sub-layer 421 and an adjacent fourth sub-layer 422 constitute a second periodic structure T2. The number of periods of the second periodic structure T2 in the second transition layer 42 can be 3-10, including the endpoint values.

[0075] Based on any of the above embodiments, optionally, in some embodiments of this application, reference is made to... Figure 1 As shown, the first type confinement layer 10 is an N-type confinement layer, the second type confinement layer 30 is a P-type confinement layer, the transition layer 40 and the second type current spreading layer 50 are both P-type doped layers. The doping element of the P-type doping in the transition layer 40 can be Mg or Zn, and the doping element of the P-type doping in the second type current spreading layer 50 can be Mg, Zn or C.

[0076] For details, please refer to Figure 1 As shown, a buffer layer 102, an etch stop layer 103, an ohmic contact layer 104, a first-type current spreading layer 105, a first-type confinement layer 10, an active layer 20, a second-type confinement layer 30, a transition layer 40, and a second-type current spreading layer 50 are sequentially grown on a substrate 101 to obtain... Figure 1 The epitaxial structure of the LED chip is shown. The substrate 101 can be a GaAs 15° substrate; the buffer layer 102 can be a GaAs layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18 cm⁻¹. -3 The corrosion stop layer 103 can be a GaInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18cm⁻¹. -3 The ohmic contact layer 104 can be a GaAs layer, and the doping element can be Si / Te, with a doping concentration of 1E18~5E18cm⁻¹. -3The first type current spreading layer 105 can be an AlGaInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18 cm⁻¹. -3 The first type confinement layer 10 can be an N-type AlInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~3E18 cm⁻¹. -3 The active layer 20 is an undoped layer; the type II confinement layer 30 can be a p-type AlInP layer, with Mg / Zn as the doping element and a doping concentration of 1E18~5E18 cm⁻¹. -3 .

[0077] Accordingly, embodiments of this application also provide a method for fabricating an LED chip, referencing... Figure 1 and Figure 2 As shown, the method for fabricating this LED chip includes:

[0078] S100: A first-type confinement layer 10, an active layer 20, and a second-type confinement layer 30 are formed in sequence, wherein the second-type confinement layer 30 is Al. m In (1-m) P layer, 0 <m<1。

[0079] S200: A transition layer 40 is formed on the side of the second type confinement layer 30 away from the active layer 20. The formation process of the transition layer 40 includes:

[0080] S210: A first transition layer 41 is formed on the side of the second type confinement layer 30 away from the active layer 20. The first transition layer 41 includes alternating layers of a first sublayer 411 and a second sublayer 412. The first sublayer 411 is Ga. y In (1-y) The P-layer, the second sub-layer 412 is GaAs. n P (1-n) In the direction from the second-type confinement layer 30 to the second-type current extension layer 50, the Ga composition y of each first sublayer 411 gradually increases, and the In composition (1-y) of each first sublayer 411 gradually decreases. <y<1,0<n<1;

[0081] S220: A second transition layer 42 is formed on the side of the first transition layer 41 away from the second type confinement layer 30. The second transition layer 42 includes an alternately stacked third sublayer 421 and a fourth sublayer 422. The third sublayer 421 is GaAs. z P (1-z) In the third sublayer 421, z≤n, the fourth sublayer 422 is a GaP layer, and along the direction from the second type confinement layer 30 to the second type current extension layer 50, the As component z of each third sublayer 421 gradually decreases to 0, and the P component (1-z) of each third sublayer 421 gradually increases to 1.

[0082] S300: A second type current spreading layer 50 is formed on the side of the transition layer 40 away from the second type confinement layer 30. The second type current spreading layer 50 is a GaP layer.

[0083] Optional, see reference Figure 3 and Figure 4 As shown, before the formation of the first transition layer 41, the formation process of the transition layer 40 further includes:

[0084] S230: A third transition layer 43 is formed on the side of the second type confinement layer 30 away from the active layer 20. The third transition layer 43 is (Al) x Ga 1-x ) m In (1-m) In the P layer, along the direction away from the second type confinement layer 30, the Al component x of the third transition layer 43 gradually decreases from 1 to 0, and the Ga component (1-x) of the third transition layer 43 gradually increases from 0 to 1.

[0085] In the subsequent step S210, a first transition layer 41 is formed on the side of the third transition layer 43 away from the second type confinement layer 30. In the first transition layer 41, the Ga composition y of each first sublayer 411 is greater than or equal to m.

[0086] For details, please refer to Figures 1-4 The method for preparing the LED chip provided in this application includes:

[0087] 1. Provide a substrate 101 and place the substrate 101 into the reaction chamber. The substrate 101 can be a GaAs 15° substrate.

[0088] 2. After heating, a buffer layer 102 is grown on the substrate 101. The buffer layer 102 can be a GaAs layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18cm. -3 ;

[0089] 3. An etching stop layer 103 is grown on the buffer layer 102. The etching stop layer 103 can be a GaInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18cm. -3 ;

[0090] 4. An ohmic contact layer 104 is grown on the corrosion stop layer 103. The ohmic contact layer 104 can be a GaAs layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18cm. -3 ;

[0091] 5. A type I current spreading layer 105 is grown on the ohmic contact layer 104. The type I current spreading layer 105 can be an AlGaInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~5E18cm.-3 ;

[0092] 6. A first-type confinement layer 10 is grown on the first-type current spreading layer 105. The first-type confinement layer 10 can be an N-type AlInP layer, and the doping element can be Si / Te with a doping concentration of 1E18~3E18cm. -3 ;

[0093] 7. An active layer 20 is grown on the first type confinement layer 10. The active layer 20 is an undoped layer.

[0094] 8. A type II confinement layer 30 is grown on the active layer 20. The type II confinement layer 30 can be a p-type AlInP layer, and the doping element can be Mg / Zn with a doping concentration of 1E18~5E18cm. -3 ;

[0095] 9. A transition layer 40 is grown on the second type confinement layer 30. The transition layer 40 is a P-type doped layer. The doping element of the P-type dopant in the transition layer 40 can be Mg or Zn. The transition layer 40 is as described above and will not be repeated here.

[0096] 10. A second type current spreading layer 50 is grown on the transition layer 40. The second type current spreading layer 50 is a P-type GaP layer. The P-type doping element in the second type current spreading layer 50 can be Mg, Zn or C.

[0097] The LED chip prepared by the method provided in the embodiments of this application is subjected to a second type of confinement layer 30 (Al). m In (1-m) A transition layer 40 is provided between the AlInP confinement layer 50 and the second-type current spreading layer 50 (GaP layer) to improve the lattice mismatch between the AlInP confinement layer and the GaP current spreading layer in the LED chip, reduce the lattice defects generated at the interface between the AlInP confinement layer and the GaP current spreading layer, improve the crystal quality of the GaP current spreading layer and the epitaxial structure of the LED chip, make the current diffusion more uniform, and thus improve the photoelectric performance and stability of the LED device.

[0098] Specifically, the specific implementation of the transition layer 40 has been described in detail in the foregoing embodiments, and can be referred to the foregoing, and will not be repeated here.

[0099] The various parts of this manual are described in a combination of parallel and progressive methods. Each part focuses on the differences between the other parts, and the same or similar parts can be referred to each other.

[0100] The features described above regarding the disclosed embodiments can be substituted or combined with each other to enable those skilled in the art to implement or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, It includes a first-type confinement layer, an active layer, a second-type confinement layer, a transition layer, and a second-type current spreading layer stacked in sequence. The second-type confinement layer is Al m In (1-m) P layer, where 0 < m < 1. The second-type current spreading layer is a GaP layer. The transition layer includes a first transition layer and a second transition layer stacked in sequence along the direction from the second-type confinement layer to the second-type current spreading layer. Both the first transition layer and the second transition layer are composite layers; The first transition layer includes first sub-layers and second sub-layers stacked alternately. In the first transition layer, along the direction from the second-type confinement layer to the second-type current spreading layer, the i-th first sub-layer is a Ga y(i) In (1-y)(i) P layer, the (i + 1)-th first sub-layer is a Ga y(i+1) In (1-y)(i+1) P layer, y(i + 1)>y(i), the lattice constant of the (i + 1)-th first sub-layer is greater than that of the i-th first sub-layer, and each second sub-layer is a GaAs n P (1-n) layer, 0 < y < 1, 0 < n < 1, i≥1 and i is an integer; the first sub-layers and the second sub-layers stacked alternately in the first transition layer form a superlattice structure; The second transition layer includes third sub-layers and fourth sub-layers stacked alternately. In the second transition layer, along the direction from the second type of confinement layer to the second type of current spreading layer, the j-th third sub-layer is a GaAs z（j） P (1-z)(j) layer, the (j + 1)-th third sub-layer is a GaAs z（j+1） P (1-z)(j+1) layer, z ≤ n, z(j + 1) < z(j), the last third sub-layer is a GaP layer, and each fourth sub-layer is a GaP layer, j ≥ 1, and j is an integer; the alternately stacked third sub-layers and fourth sub-layers in the second transition layer form a superlattice structure.

2. The LED chip according to claim 1, characterized in that, The layer closest to the second transition layer in the first transition layer is the first sub-layer, and the layer closest to the first transition layer in the second transition layer is the third sub-layer.

3. The LED chip according to claim 1, characterized in that, The layer closest to the second transition layer in the first transition layer is the second sub-layer, and the layer closest to the first transition layer in the second transition layer is the fourth sub-layer.

4. The LED chip according to any one of claims 1-3, characterized in that, In the first transition layer, the thickness of the first sub-layer ranges from 2nm to 15nm, including the endpoint values; In the first transition layer, the thickness of the second sublayer ranges from 2nm to 15nm, including the endpoint values.

5. The LED chip according to any one of claims 1-3, characterized in that, In the first transition layer, a first sub-layer and an adjacent second sub-layer constitute a first periodic structure. The number of periods in the first periodic structure in the first transition layer is 3-10, including endpoint values.

6. The LED chip according to any one of claims 1-3, characterized in that, In the second transition layer, the thickness of the third sub-layer ranges from 2nm to 15nm, including the endpoint values; In the second transition layer, the thickness of the fourth sub-layer ranges from 2nm to 15nm, including the endpoint values.

7. The LED chip according to any one of claims 1-3, characterized in that, In the second transition layer, one layer of the third sub-layer and the adjacent layer of the fourth sub-layer constitute a second periodic structure. The number of periods of the second periodic structure in the second transition layer is 3-10, including the endpoint values.

8. The LED chip according to any one of claims 1-3, characterized in that, The first type of confinement layer is an N-type confinement layer, the second type of confinement layer is a P-type confinement layer, and the transition layer and the second type of current spreading layer are both P-type doped layers.

Images