Display panel and electronic device comprising the same

Abstract

The utility model relates to a display panel and electronic device including the display panel, the display panel includes: base layer;Pixel definition membrane, set up on base layer and have emission opening portion;Partition wall, set up on pixel definition membrane and have the partition wall opening portion in the region of setting up corresponding with emission opening portion;Emitting element, including the anode of contact with partition wall, emission pattern and cathode, and set up in emission opening portion and partition wall opening portion;And lower inorganic packaging pattern has the groove with partition wall and emitting element interval and covers emitting element, and emission opening portion can have the shape of symmetry about at least two axes through the center of emission opening portion in plan view.

Description

[0001] Cross-reference with related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0083766, filed on June 26, 2024, and Korean Patent Application No. 10-2024-0107768, filed on August 12, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to display panels, electronic devices, and methods for manufacturing the display panels, and more specifically, to display panels and electronic devices having improved display quality. Background Technology

[0004] Electronic devices that provide images to users, such as televisions, monitors, smartphones, and tablet computers, include display panels that display images. Various display panels, such as liquid crystal display panels, organic light-emitting diode display panels, electrowetting display panels, and electrophoretic display panels, have been developed as display panels.

[0005] An organic light-emitting display panel may include an anode, a cathode, and an emission pattern. The emission pattern may be separated for each emission area, and the cathode may provide a common voltage to each emission area. Utility Model Content

[0006] This disclosure provides a display panel with improved display quality by forming light-emitting elements without using a metal mask, and a method for manufacturing the display panel.

[0007] An embodiment of this inventive concept provides a display panel, comprising: a substrate layer; a pixel defining film disposed on the substrate layer and having an emission opening portion; a partition wall disposed on the pixel defining film and having a partition wall opening portion disposed in a region corresponding to the emission opening portion; a light-emitting element including an anode, an emission pattern, and a cathode in contact with the partition wall, and disposed in the emission opening portion and the partition wall opening portion; and a lower inorganic encapsulation pattern having grooves spaced apart from the partition wall and the light-emitting element and covering the light-emitting element, wherein the emission opening portion may have a shape symmetrical about at least two axes passing through the center of the emission opening portion in a plan view.

[0008] In an embodiment, the light-emitting element may include a first light-emitting element, a second light-emitting element, and a third light-emitting element that emit light of different colors from each other, and the emission opening portion may include a first emission opening portion disposed in a region corresponding to the first light-emitting element, a second emission opening portion disposed in a region corresponding to the second light-emitting element, and a third emission opening portion disposed in a region corresponding to the third light-emitting element.

[0009] In an embodiment, at least one of the first to third emission opening portions may have a circular shape in a plan view.

[0010] In an embodiment, at least one of the first to third emission opening portions may be symmetrical about all axes passing through the center of the at least one emission opening portion in a plan view.

[0011] In an embodiment, each of the first to third emission opening portions may have a circular shape in a plan view.

[0012] In an embodiment, at least one of the first to third emission opening portions may have a rectangular or rhomboid shape in a plan view.

[0013] In an embodiment, at least one of the first to third emission opening portions may have four inner surfaces.

[0014] In an embodiment, each of the first to third emission opening portions may have a rectangular or rhomboid shape in a plan view.

[0015] In an embodiment, the end of the lower inorganic packaging pattern may surround the edge of the emission opening portion in a plan view.

[0016] In an embodiment, the lower inorganic package pattern may have a shape that is symmetrical about at least two axes passing through the center of the lower inorganic package pattern in a plan view.

[0017] In an embodiment, the lower inorganic packaging pattern may include a first lower inorganic packaging pattern that covers a first light-emitting element and has a first groove spaced apart from the partition wall and the first light-emitting element, a second lower inorganic packaging pattern that covers a second light-emitting element and has a second groove spaced apart from the partition wall and the second light-emitting element, and a third lower inorganic packaging pattern that covers a third light-emitting element and has a third groove spaced apart from the partition wall and the third light-emitting element.

[0018] In an embodiment, at least one of the first to third lower inorganic packaging patterns may be symmetrical about all axes passing through the center of the at least one lower inorganic packaging pattern in a plan view.

[0019] In an embodiment, each of the first to third lower inorganic packaging patterns may have a circular shape in a plan view.

[0020] In an embodiment, at least one of the first to third lower inorganic packaging patterns may have a rectangular or rhomboid shape in a plan view.

[0021] In the embodiments, each of the first to third lower inorganic packaging patterns may have a rectangular or rhomboid shape in the plan view.

[0022] In an embodiment of this inventive concept, a method for manufacturing a display panel includes: providing a preliminary display panel, the preliminary display panel including a substrate layer, a pixel defining film disposed on the substrate layer, and preliminary partitions disposed on the pixel defining film; patterning a first photoresist layer using a first mask to form a first photoresist pattern, the first mask including a first transmissive portion and a first light-shielding portion surrounding the first transmissive portion in a planar view; etching the preliminary partitions using the first photoresist pattern as a mask to form partitions with undercuts; etching the pixel defining film using the first photoresist pattern as a mask to form an emission opening portion corresponding to the shape of the first transmissive portion; and forming light-emitting elements in the emission opening portion and the partition opening portion, the light-emitting elements including an anode, an emission pattern, and a cathode. The first transmissive portion may have a shape symmetrical about at least two axes passing through the center of the first transmissive portion.

[0023] In an embodiment, the method for manufacturing a display panel may further include: depositing a lower inorganic encapsulation layer covering the partitions and light-emitting elements; patterning a second photoresist layer using a second mask to form a second photoresist pattern, the second mask including a second light-shielding portion and a second transmissive portion surrounding the second light-shielding portion in a planar view; and etching the lower inorganic encapsulation layer using the second photoresist pattern to form the lower inorganic encapsulation pattern in a region corresponding to the second light-shielding portion. The second light-shielding portion may have a shape symmetrical about at least two axes passing through the center of the second light-shielding portion.

[0024] In one embodiment, depositing a lower inorganic encapsulation layer covering the partition wall and the light-emitting element may include forming grooves spaced apart from the partition wall and the light-emitting element.

[0025] In an embodiment, etching the lower inorganic encapsulation layer to form a lower inorganic encapsulation pattern may include forming a lower inorganic encapsulation pattern having a circular shape, a rectangular shape, or a rhombus shape in a planar view.

[0026] In an embodiment, the formation of the emission opening portion in the pixel-defining film may include: forming an emission opening portion having a circular shape, a rectangular shape, or a rhomboid shape in a planar view.

[0027] Embodiments of this inventive concept provide an electronic device that provides an image and includes a window, a display panel disposed below the window, and a housing disposed below the display panel and connected to the window to house the display panel. The display panel includes: a substrate layer; a pixel defining film disposed on the substrate layer and having an emission opening portion; a partition wall disposed on the pixel defining film and having a partition wall opening portion disposed in a region corresponding to the emission opening portion; a light-emitting element including an anode, an emission pattern, and a cathode in contact with the partition wall, and disposed in the emission opening portion and the partition wall opening portion; and a lower inorganic encapsulation pattern having grooves spaced apart from the partition wall and the light-emitting element and covering the light-emitting element, wherein the emission opening portion may have a shape symmetrical about at least two axes passing through the center of the emission opening portion in a plan view. Attached Figure Description

[0028] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept. In the drawings:

[0029] Figure 1A This is a perspective view of an electronic device according to an embodiment of the present invention.

[0030] Figure 1B This is an exploded perspective view of an electronic device according to an embodiment of the present invention.

[0031] Figure 2 This is a cross-sectional view of a display module according to an embodiment of the present invention.

[0032] Figure 3 This is a plan view of a display panel according to an embodiment of the present invention.

[0033] Figure 4 This is an enlarged plan view of a portion of the display area of ​​a display panel according to an embodiment of the present invention.

[0034] Figure 5 It is along Figure 3 A cross-sectional view of the display panel taken by line I-I' in the diagram;

[0035] Figure 6 It is along Figure 4 The cross-sectional view taken by cutting line II-II' in the diagram;

[0036] Figure 7 This is an enlarged plan view of a portion of the display area of ​​a display panel according to an embodiment of the present invention.

[0037] Figure 8This is an enlarged plan view of a portion of the display area of ​​a display panel according to an embodiment of the present invention.

[0038] Figure 9 and Figure 10A This is a cross-sectional view illustrating some of the steps in a method for manufacturing a display panel according to an embodiment of the present invention.

[0039] Figure 10B This is a plan view of a mask according to an embodiment of the present invention.

[0040] Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 15A This is a cross-sectional view illustrating some of the steps in a method for manufacturing a display panel according to an embodiment of the present invention.

[0041] Figure 15B This is a plan view of a mask according to an embodiment of the present invention; and

[0042] Figure 16 and Figure 17 This is a cross-sectional view illustrating some of the steps in a method for manufacturing a display panel according to an embodiment of the present invention. Detailed Implementation

[0043] In this disclosure, it will be understood that when an element (or area, layer, portion, etc.) is referred to as being “on”, “connected to” or “coupled to” another element, the element may be directly on, directly connected to or directly coupled to the other element, or a third element may be disposed between the element and the other element.

[0044] The same reference numerals or symbols refer to the same elements throughout. Furthermore, in the drawings, the thickness, proportions, and dimensions of elements are exaggerated for the purpose of effectively describing the technical content. The term "and / or" includes one or more combinations that can be defined by the relevant elements.

[0045] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element without departing from the teachings of the present invention, and similarly, a second element may be referred to as a first element. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise.

[0046] Furthermore, terms such as "below," "under," "above," and "over" are used to explain the relationships between the elements shown in the accompanying drawings. These terms are relative concepts and are interpreted based on the directions shown in the drawings.

[0047] It will be further understood that, when used herein, terms such as “comprising” or “having” indicate the presence of the stated features, figures, steps, operations, elements, components or combinations thereof, but do not preclude the presence or addition of one or more other features, figures, steps, operations, elements, components or combinations thereof.

[0048] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms such as those defined in common dictionaries shall be interpreted as having meanings consistent with their meanings in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0049] In the following description, embodiments of the present invention will be described with reference to the accompanying drawings.

[0050] Figure 1A This is a perspective view of an electronic device DD according to an embodiment of the present invention. Figure 1B This is an exploded perspective view of an electronic device DD according to an embodiment of the present invention.

[0051] In embodiments, the electronic device DD can be a large electronic device such as a television, monitor, or outdoor billboard. Alternatively, the electronic device DD can be a small to medium-sized electronic device such as a personal computer (e.g., a laptop or tablet), personal digital assistant, vehicle navigation unit, game console, smartphone, and camera. However, the above-described devices are examples, and the electronic device DD can also be used as another electronic device, unless departing from the inventive concept. Figure 1A and Figure 1B In the illustration, a smartphone is shown as an example of an electronic device DD.

[0052] refer to Figure 1A and Figure 1B The electronic device DD can display an image IM on a third direction DR3 on a display surface FS extending parallel to each of the first direction DR1 and the second direction DR2. The image IM can include not only moving images but also still images. Figure 1A In the image, a clock window and icons are illustrated as an example of an image IM. The display surface FS on which the image IM is displayed can correspond to the front surface of the electronic device DD.

[0053] In this embodiment, the front (or top) and rear (or bottom) surfaces of each component are defined based on the orientation in which the image IM is displayed. The front and rear surfaces may be opposite to each other on a third direction DR3, and the normal direction of each of the front and rear surfaces may be parallel to the third direction DR3. Meanwhile, the directions indicated by the first to third directions DR1, DR2, and DR3 are relative concepts and can be changed to other directions. The term "in plan view" as used herein may mean the state as viewed on the third direction DR3.

[0054] An electronic device DD may include a window WP, a display module DM, and a housing HAU. The window WP and the housing HAU may be connected to each other to form the appearance of the electronic device DD.

[0055] The window WP may include an optically transparent insulating material. For example, the window WP may include glass or plastic. The front surface of the window WP may define the display surface FS of the electronic device DD. The display surface FS may include a transmissive region TA and a bezel region BZA. The transmissive region TA may be an optically transparent region. For example, the transmissive region TA may be a region with a visible light transmittance of approximately 90% or more.

[0056] The border region BZA may be a region with relatively low transmittance compared to the transmissive region TA. The border region BZA may define the shape of the transmissive region TA. The border region BZA may be disposed adjacent to and surround the transmissive region TA. However, this is illustrated as an example, and the border region BZA of the window WP may be omitted. The window WP may include at least one functional layer selected from an anti-fingerprint layer, a hard coating layer, and an anti-reflective layer, and is not limited to any one embodiment.

[0057] The display module DM can be positioned below the window WP. The display module DM can be the component that essentially generates the image IM. The image IM generated by the display module DM is displayed on the display surface IS of the display module DM and is visible to the user from the outside through the transmission area TA.

[0058] The display module DM may include a display area DA and a non-display area NDA. The display area DA may be an area that is activated in response to an electrical signal. The non-display area NDA may be located adjacent to the display area DA. The non-display area NDA may surround the display area DA. The non-display area NDA may be an area covered by a border area BZA and may not be visible from the outside.

[0059] The housing HAU can be attached to the window WP. The housing HAU can be attached to the window WP to provide a predetermined internal space. The display module DM can be housed in this internal space.

[0060] The housing HAU can comprise materials with relatively high rigidity. For example, the housing HAU can comprise multiple frames and / or plates, each of which comprises glass, plastic, or metal, or a combination thereof. The housing HAU can stably protect the components of the electronic device DD housed within its internal space from external impacts.

[0061] Figure 2 This is a cross-sectional view of the display module DM according to an embodiment of the present invention.

[0062] refer to Figure 2 The display module DM may include a display panel DP and an input sensor INS. Although not shown separately, the electronic device DD according to an embodiment of the present invention (see [reference]) Figure 1A It may further include a protective member disposed on the bottom surface of the display panel DP, or an anti-reflective member and / or a window member disposed on the top surface of the input sensor INS.

[0063] The display panel DP can be an emitting display panel. However, this is exemplary, and embodiments of the present invention are not specifically limited thereto. For example, the display panel DP can be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer in an organic light-emitting display panel may include organic light-emitting materials. The light-emitting layer in an inorganic light-emitting display panel may include quantum dots, quantum rods, or micro-LEDs. Hereinafter, the display panel DP is described as an organic light-emitting display panel.

[0064] The display panel DP may include a substrate layer BL and a circuit element layer DP-CL, a display element layer DP-OLED, and a thin-film encapsulation layer TFE disposed on the substrate layer BL. An input sensor INS may be directly disposed on the thin-film encapsulation layer TFE. In this disclosure, when "component A is directly disposed on component B," it means that an adhesive layer is not disposed between component A and component B.

[0065] The substrate layer BL may include at least one plastic film. The substrate layer BL may be a flexible substrate, and includes plastic substrates, glass substrates, metal substrates, or organic / inorganic composite material substrates, etc. (Refer to reference) Figure 1B The described display area DA and non-display area NDA are the same as or similar to the display area DA and non-display area NDA, and can be defined in the base layer BL.

[0066] The circuit element layer DP-CL may include circuit elements and at least one insulating layer. The insulating layer includes at least one inorganic layer and at least one organic layer. The circuit elements include signal lines and pixel driving circuits, etc.

[0067] The display element layer of a DP-OLED may include a separator and a light-emitting element. The light-emitting element may include an anode, an intermediate layer, and a cathode.

[0068] The thin-film encapsulation layer TFE may include multiple thin films. Some of the thin films may be configured to improve optical efficiency, and some of the thin films may be configured to protect the organic light-emitting diode.

[0069] An input sensor INS acquires coordinate information from an external input. The input sensor INS can have a multi-layered structure. The input sensor INS may include a conductive layer with a single-layer or multi-layered structure. Furthermore, the input sensor INS may include an insulating layer with a single-layer or multi-layered structure. The input sensor INS can detect external input using a capacitive method. However, this is exemplary, and embodiments of the present invention are not limited thereto. For example, in embodiments, the input sensor INS can detect external input using an electromagnetic induction method or a pressure detection method. Alternatively, the input sensor INS may be omitted in embodiments of the present invention.

[0070] Figure 3 This is a plan view of a display panel DP according to an embodiment of the present invention.

[0071] refer to Figure 3 The display area DA and the surrounding non-display area NDA can be defined within the display panel DP. The display panel DP may include pixels PX and signal lines SGL electrically connected to the pixels PX. The display panel DP may include drive circuitry GDC and pad portion PLD. The display area DA and the non-display area NDA can be classified based on whether pixels PX are present. Pixels PX can be located within the display area DA. The drive circuitry GDC and pad portion PLD can be located within the non-display area NDA.

[0072] Pixels PX can be arranged in a first direction DR1 and a second direction DR2. Pixels PX can include multiple rows of pixels extending in the first direction DR1 and arranged in the second direction DR2, and multiple columns of pixels extending in the second direction DR2 and arranged in the first direction DR1.

[0073] The signal line SGL may include gate lines GL, data lines DL, power lines PL, and control signal lines CSL. Each gate line GL can be connected to a corresponding pixel PX in the pixel PX, and each data line DL can be connected to a corresponding pixel PX in the pixel PX. The power line PL can be electrically connected to the pixel PX. The control signal line CSL can be connected to the drive circuit GDC to provide control signals to the drive circuit GDC.

[0074] The driving circuit GDC may include a gate driving circuit. The gate driving circuit generates gate signals and sequentially outputs the generated gate signals to the gate lines GL. The gate driving circuit may further output another control signal to the pixel driving circuit.

[0075] The pad portion PLD can be a part of a flexible circuit board connected thereto. The pad portion PLD can include pixel pads D-PDs, and these pixel pads D-PDs can be pads used to connect the flexible circuit board to the display panel DP. Each pixel pad D-PD can be connected to a corresponding signal line SGL in the signal lines SGL. Each pixel pad D-PD can be connected to a corresponding pixel PX via the signal line SGL. Furthermore, one pixel pad D-PD can be connected to the drive circuit GDC.

[0076] The pad portion of the PLD may further include input pads. These input pads may be for connecting the flexible circuit board to an input sensor INS (see [link to PLD]). Figure 2 The input pads are located on the input sensor INS (see [reference]). However, embodiments of this invention are not limited thereto, and the input pads may be located on the input sensor INS (see [reference]). Figure 2 It is located within and connected to a circuit board separate from the pixel pads D-PD. Alternatively, the input sensor INS (see [link to INS]) can be omitted. Figure 2 And it may not need to further include input pads.

[0077] Figure 4 The display panel DP (see embodiment of the present invention) is an embodiment of the present invention. Figure 2 A magnified plan view of a portion of the display area DA. Figure 4 The illustration shows the display module DM (see...). Figure 1B The display surface IS (see) Figure 1B When viewing on the DM module (see) Figure 1B The diagram shows the plan view of the emission areas PXA-R, PXA-G and PXA-B (or emission openings OP1-E, OP2-E and OP3-E) and the arrangement of the lower inorganic package patterns LIL1, LIL2 and LIL3.

[0078] refer to Figure 4 The display area DA may include first to third transmission areas PXA-R, PXA-G, and PXA-B, and a peripheral area NPXA surrounding the first to third transmission areas PXA-R, PXA-G, and PXA-B. The first to third transmission areas PXA-R, PXA-G, and PXA-B may be oriented according to the orientation of the display module DM (see [link to relevant documentation]). Figure 2The colors of the light emitted externally from the light-emitting element are classified. The first to third emission regions PXA-R, PXA-G, and PXA-B can each correspond to the regions from which light provided from the light-emitting element is emitted. The first to third emission regions PXA-R, PXA-G, and PXA-B can each correspond to the first to third emission opening portions OP1-E, OP2-E, and OP3-E, respectively. For example, the first emission region PXA-R can correspond to the first emission opening portion OP1-E, the second emission region PXA-G can correspond to the second emission opening portion OP2-E, and the third emission region PXA-B can correspond to the third emission opening portion OP3-E.

[0079] The first to third emission regions PXA-R, PXA-G, and PXA-B can each provide light with a first to a third color that are different from each other. For example, the light with the first color can be red light, the light with the second color can be green light, and the light with the third color can be blue light. However, examples of light with the first to third colors are not limited to the examples described above.

[0080] The outer region NPXA can be the boundary between the first to third emission regions PXA-R, PXA-G and PXA-B, and prevents color mixing between the first to third emission regions PXA-R, PXA-G and PXA-B.

[0081] The first to third transmission regions PXA-R, PXA-G, and PXA-B can each be provided in multiples and repeatedly arranged in the display area DA to have a predetermined arrangement shape. For example, the first transmission region PXA-R and the third transmission region PXA-B can be alternately arranged in the first direction DR1 to form a "first group". The second transmission region PXA-G can be arranged in the first direction DR1 to form a "second group". Each of the "first group" and the "second group" can be provided in multiples, and the "first group" and the "second group" can be alternately arranged in the second direction DR2.

[0082] A second transmission region PXA-G can be separately positioned from a first transmission region PXA-R or a third transmission region PXA-B in the fourth direction DR4. The fourth direction DR4 can be defined as the direction between the first direction DR1 and the second direction DR2.

[0083] Figure 4 The illustration shows an example of the arrangement shape of the first to third emission regions PXA-R, PXA-G, and PXA-B. However, embodiments of the present invention are not limited to this, and the first to third emission regions PXA-R, PXA-G, and PXA-B can be arranged in various shapes. In embodiments, the first to third emission regions PXA-R, PXA-G, and PXA-B can have, for example... Figure 4 The diagram in the middle Arrangement shape. Alternatively, the first to third emission regions PXA-R, PXA-G, and PXA-B can have a striped arrangement shape or a diamond shape. Arrange the shapes.

[0084] The first to third emission openings OP1-E, OP2-E, and OP3-E can have various shapes in the plan view. Each of the first to third emission openings OP1-E, OP2-E, and OP3-E can have a shape such as a polygon or a circle. At least one of the first to third emission openings OP1-E, OP2-E, and OP3-E can have a circular shape in the plan view.

[0085] Each of the first to third emission opening portions OP1-E, OP2-E, and OP3-E may have a shape symmetrical about at least two axes passing through its center. For example, the second emission opening portion OP2-E may have a shape symmetrical about a first axis AX1 and a second axis AX2, respectively, passing through its center. Regions A1-1 and A2-1 of the second emission opening portion OP2-E, divided by the first axis AX1, may be symmetrical to each other. Furthermore, regions B1-2 and B2-2 of the second emission opening portion OP2-E, divided by the second axis AX2, may be symmetrical to each other.

[0086] exist Figure 4 In the example, the embodiment is described using two axes AX1 and AX2, but in the plan view, at least one of the first to third emission opening portions OP1-E, OP2-E, and OP3-E can be symmetrical about all axes passing through the center of at least one of the first to third emission opening portions OP1-E, OP2-E, and OP3-E. Furthermore, in Figure 4 The embodiment is described using the example of the second emission opening portion OP2-E, but the content regarding the second emission opening portion OP2-E can be applied to the first emission opening portion OP1-E and the third emission opening portion OP3-E.

[0087] The first to third emission regions PXA-R, PXA-G, and PXA-B (or the first to third emission opening portions OP1-E, OP2-E, and OP3-E) may have the same shape in the plan view, or alternatively, at least some of the first to third emission regions PXA-R, PXA-G, and PXA-B (or the first to third emission opening portions OP1-E, OP2-E, and OP3-E) may have different shapes in the plan view. As an example, Figure 4The diagram shows the first to third emission openings OP1-E, OP2-E, and OP3-E, which have the same circular shape in the plan view.

[0088] At least some of the first to third emitting regions PXA-R, PXA-G, and PXA-B may have different surface areas in the plan view. In an embodiment, the surface area of ​​the first emitting region PXA-R, which emits red light, may be larger than the surface area of ​​the second emitting region PXA-G, which emits green light, and may be smaller than the surface area of ​​the third emitting region PXA-B, which emits blue light. However, the size relationship between the surface areas of the first to third emitting regions PXA-R, PXA-G, and PXA-B according to the color of the emitted light is not limited to this, and can be determined according to the display module DM (see [link to relevant documentation]). Figure 2 The design varies. Furthermore, the embodiments of this invention are not limited thereto, and the first to third emission regions PXA-R, PXA-G, and PXA-B may have the same surface area in a plan view.

[0089] The display module DM according to an embodiment of the present invention (see Figure 2 The shape, surface area, and arrangement of the first to third emission regions PXA-R, PXA-G, and PXA-B can be determined based on the color of the emitted light or the display module DM (see [link to relevant documentation]). Figure 2 The size or configuration of the ) is designed differently, and is not limited to Figure 4 The embodiment is illustrated in the figure.

[0090] Lower inorganic packaging pattern (LIL) (see Figure 5 This can cover the light-emitting element ED, which will be described later (see [link]). Figure 5 The lower inorganic package pattern LIL can be provided in multiple forms. Lower inorganic package patterns LIL1, LIL2, and LIL3 may include covering the first light-emitting element ED1 (see...). Figure 6 The first inorganic package pattern LIL1 covers the second light-emitting element ED2 (see...). Figure 6 The second inorganic package pattern LIL2 and the covering third light-emitting element ED3 (see) Figure 6 The third inorganic encapsulation pattern LIL3.

[0091] In the plan view, the ends of the lower inorganic package patterns LIL1, LIL2, and LIL3 can surround the emission opening portions OP1-E, OP2-E, and OP3-E, respectively. For example, the end of the first lower inorganic package pattern LIL1 can surround the first emission opening portion OP1-E, the end of the second lower inorganic package pattern LIL2 can surround the second emission opening portion OP2-E, and the end of the third lower inorganic package pattern LIL3 can surround the third emission opening portion OP3-E.

[0092] The first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can have various shapes in the plan view. The shapes of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can correspond to the shapes of the first to third emission opening portions OP1-E, OP2-E, and OP3-E, respectively. Each of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can have a shape such as a polygon or a circle. At least one of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can have a circular shape in the plan view. That is, in the plan view, at least one of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can be symmetrical about all axes passing through the center of the at least one of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3.

[0093] Each of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 may have a shape symmetrical about at least two axes passing through the center of each of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3. For example, the second lower inorganic package pattern LIL2 may have a shape symmetrical about a first axis AX1 and a second axis AX2, respectively, passing through the center of the second lower inorganic package pattern LIL2. Regions 1-1 and 1-2 of the second lower inorganic package pattern LIL2, divided by the first axis AX1 (corresponding to regions 1-1 A1 and 1-2 A2 of the second emission opening portion OP2-E, respectively), may be symmetrical to each other. Furthermore, regions 2-1 and 2-2 of the second lower inorganic package pattern LIL2, divided by the second axis AX2 (corresponding to regions 2-1 B1 and 2-2 B2 of the second emission opening portion OP2-E, respectively), may be symmetrical to each other.

[0094] exist Figure 4 In the example, embodiments are described using two axes AX1 and AX2; however, in the plan view, at least one of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 can be symmetrical about all axes passing through the center of at least one of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3. Furthermore, in Figure 4 The embodiment is described using an example of the second lower inorganic package pattern LIL2, but the content regarding the second lower inorganic package pattern LIL2 can be applied to the first lower inorganic package pattern LIL1 and the third lower inorganic package pattern LIL3.

[0095] The first to third lower inorganic package patterns LIL1, LIL2, and LIL3 may have the same shape in the planar view, or alternatively, at least some of the first to third lower inorganic package patterns LIL1, LIL2, and LIL3 may have different shapes in the planar view. As an example, Figure 4 The illustration shows the first to third lower inorganic package patterns LIL1, LIL2 and LIL3 with the same circular shape in the plan view.

[0096] Figure 5 It is along Figure 3 The image shows a cross-sectional view of the display panel DP taken by line I-I'. This will be viewed through a reference. Figure 2 describe Figure 5 The embodiments are described in the figures, and repeated interpretations of parts represented by the same reference numerals or symbols are avoided. Figure 5 The diagram shows area DA (see Figure 4 An enlarged view of the PXA emission region in ), and Figure 5 The emission region PXA in the middle can correspond to Figure 4 Any one of the first to third launch regions PXA-R, PXA-G, and PXA-B.

[0097] refer to Figure 5 The display panel DP may include a substrate layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and a thin film encapsulation layer TFE.

[0098] The display panel (DP) may include semiconductor patterns, conductive patterns, signal lines, and multiple insulating layers. The insulating layers, semiconductor layers, and conductive layers are formed using methods such as coating or deposition. Subsequently, the insulating layers, semiconductor layers, and conductive layers can be selectively patterned using photolithography and etching processes. The semiconductor patterns, conductive patterns, and signal lines included in the circuit element layer (DP-CL) and the display element layer (DP-OLED) can be formed using such methods.

[0099] The circuit element layer DP-CL can be disposed on the base layer BL. The circuit element layer DP-CL may include a buffer layer BFL, a transistor TR1, a signal transmission layer SCL, first to fifth insulating layers 10, 20, 30, 40 and 50, an electrode EE, and multiple connecting electrodes CNE1 and CNE2.

[0100] A buffer layer (BFL) can be disposed on the substrate layer (BL). The buffer layer (BFL) can improve the adhesion between the substrate layer (BL) and the semiconductor pattern. The buffer layer (BFL) may include a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer can be stacked alternately.

[0101] Semiconductor patterns can be disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon. However, embodiments of the present invention are not limited thereto, and the semiconductor pattern may include amorphous silicon or metal oxide. As an example, Figure 5 The illustration shows only a portion of the semiconductor pattern, and the semiconductor pattern can be further disposed in multiple emitter regions PXA-R, PXA-G, and PXA-B (see [reference]). Figure 4 In ), semiconductor patterns can be applied across multiple emitter regions PXA-R, PXA-G, and PXA-B according to specific rules (see...). Figure 4 The semiconductor pattern can have different electrical characteristics depending on whether it is doped. A semiconductor pattern may include a first region with a high doping concentration and a second region with a low doping concentration. The first region may be doped with either n-type or p-type dopant. A p-type transistor may include a first region doped with p-type dopant.

[0102] The first region has higher conductivity than the second region and is essentially used as an electrode or signal line. The second region can essentially correspond to the active region (or channel) of a transistor. In other words, a portion of the semiconductor pattern can be the active region of a transistor, another portion can be the source or drain region of a transistor, and yet another portion can be the conductive region.

[0103] The source region S, active region A, and drain region D of transistor TR1 can be provided from a semiconductor pattern. Figure 5 The illustration shows a portion of the signal transmission layer SCL provided from a semiconductor pattern. Although not shown separately, in a planar view, the signal transmission layer SCL may be connected to the drain region D of transistor TR1.

[0104] The first to fifth insulating layers 10, 20, 30, 40 and 50 may be disposed on the buffer layer BFL. Each of the first to fifth insulating layers 10, 20, 30, 40 and 50 may be an inorganic layer or an organic layer.

[0105] A first insulating layer 10 can be disposed on a buffer layer BFL. The first insulating layer 10 can cover the source region S, active region A, and drain region D of transistor TR1 disposed on the buffer layer BFL, as well as the signal transmission layer SCL. The gate G of transistor TR1 can be disposed on the first insulating layer 10. A second insulating layer 20 can be disposed on the first insulating layer 10 and cover the gate G. The electrode EE can be disposed on the second insulating layer 20. A third insulating layer 30 can be disposed on the second insulating layer 20 and cover the electrode EE.

[0106] The first connecting electrode CNE1 can be disposed on the third insulating layer 30. The first connecting electrode CNE1 can be connected to the signal transmission layer SCL through contact holes CNT-1 passing through the first to third insulating layers 10, 20 and 30. The fourth insulating layer 40 can be disposed on the third insulating layer 30 and cover the first connecting electrode CNE1. The fourth insulating layer 40 can be an organic layer.

[0107] The second connecting electrode CNE2 can be disposed on the fourth insulating layer 40. The second connecting electrode CNE2 can be connected to the first connecting electrode CNE1 through the contact hole CNT-2 passing through the fourth insulating layer 40. The fifth insulating layer 50 can be disposed on the fourth insulating layer 40 and cover the second connecting electrode CNE2. The fifth insulating layer 50 can be an organic layer.

[0108] The display element layer DP-OLED can be disposed on the circuit element layer DP-CL. The display element layer DP-OLED may include light-emitting elements ED, sacrificial patterns SP, pixel-defining films PDL, and partition walls PW.

[0109] The light-emitting element ED may include an anode AE ​​(or a first electrode), an emission pattern EP, and a cathode CE (or a second electrode). The light-emitting element ED may be disposed in the emission opening portion OP-E and the partition opening portion OP-P, which will be described later.

[0110] The anode AE ​​can be disposed on the fifth insulating layer 50 of the circuit element layer DP-CL. The anode AE ​​can be a transmitting electrode, a semi-transmitting electrode, or a reflecting electrode. The anode AE ​​can be connected to the second connecting electrode CNE2 through a connecting contact hole CNT-3 that passes through and is defined in the fifth insulating layer 50. Therefore, the anode AE ​​can be electrically connected to the signal transmission layer SCL and to the corresponding circuit element through the first connecting electrode CNE1 and the second connecting electrode CNE2. The anode AE ​​can have a single-layer structure or a multi-layer structure. The anode AE ​​can include multiple layers containing ITO or Ag. For example, the anode AE ​​can include a layer containing ITO (hereinafter referred to as the lower ITO layer), a layer disposed on the lower ITO layer and containing Ag (hereinafter referred to as the Ag layer), and a layer disposed on the Ag layer and containing ITO (hereinafter referred to as the upper ITO layer).

[0111] The sacrificial pattern SP can be disposed between the anode AE ​​and the pixel-defining film PDL. A sacrificial opening portion OP-S, which exposes a portion of the top surface of the anode AE ​​during the manufacturing process, can be defined (or provided) in the sacrificial pattern SP. The sacrificial opening portion OP-S can be a region corresponding to the emission opening portion OP-E described later.

[0112] A pixel-defining film (PDL) may be disposed on the fifth insulating layer 50 of the circuit element layer (DP-CL). An emission opening portion (OP-E) may be defined (or provided) in the pixel-defining film (PDL). The emission opening portion (OP-E) may be formed in a region corresponding to the anode (AE), and the pixel-defining film (PDL) may expose at least a portion of the anode (AE) through the emission opening portion (OP-E) during the manufacturing process.

[0113] Furthermore, in the plan view, the emission opening portion OP-E can be smaller than the sacrificial opening portion OP-S of the sacrificial pattern SP. The pixel defining film PDL can cover the edge of the sacrificial pattern SP in the plan view. According to this embodiment, the top surface of the anode AE ​​can be spaced apart from the pixel defining film PDL in the cross-sectional view, and the sacrificial pattern SP is disposed between the top surface of the anode AE ​​and the pixel defining film PDL, and therefore, the anode AE ​​can be protected from damage during the process of forming the emission opening portion OP-E.

[0114] In the planar view, the surface area of ​​the emission opening portion OP-E can be smaller than the surface area of ​​the sacrificial opening portion OP-S. That is, the inner surface of the emission opening portion OP-E of the pixel-defining film PDL can protrude towards the center of the anode AE ​​compared to the inner surface of the sacrificial opening portion OP-S of the sacrificial pattern SP. However, embodiments of the present invention are not limited to this, and the inner surface of the sacrificial opening portion OP-S of the sacrificial pattern SP can be substantially aligned with the inner surface of the emission opening portion OP-E of the pixel-defining film PDL. Here, the emission region PXA can refer to the area of ​​the anode AE ​​not covered by the pixel-defining film PDL.

[0115] Pixel-defined film (PDL) can include inorganic insulating materials. For example, pixel-defined film (PDL) can include silicon nitride (SiN). x The pixel-limiting film (PDL) can be disposed between the anode (AE) and the partition wall (PW) to block the electrical connection between the anode (AE) and the partition wall (PW).

[0116] The emission pattern EP can be disposed on the anode AE. The emission pattern EP may include a light-emitting layer containing a light-emitting material. The emission pattern EP may further include a hole injection layer and a hole transport layer disposed between the anode AE ​​and the light-emitting layer, and may further include an electron transport layer and an electron injection layer disposed on the light-emitting layer. The emission pattern EP may be referred to as an "organic layer" or an "intermediate layer".

[0117] The emission pattern EP can be patterned via a pointed portion defined in the partition wall PW. This will be described in detail later in the method for manufacturing the display panel. The emission pattern EP can be disposed inside the sacrificial opening portion OP-S and the emission opening portion OP-E. However, this is illustrated as an example, and the emission pattern EP can be disposed inside at least one of the sacrificial opening portion OP-S, the emission opening portion OP-E, and the partition wall opening portion OP-P. The emission pattern EP can cover a portion of the top surface of the pixel defining film PDL.

[0118] The cathode CE can be disposed on the emission pattern EP. The cathode CE can be patterned by a tip portion defined in the partition wall PW. At least a portion of the cathode CE can be disposed in the partition wall opening portion OP-P. As an example, Figure 5 The illustration shows a cathode CE disposed in the emission opening portion OP-E and the partition opening portion OP-P, but the embodiments of the present invention are not limited thereto. For example, the cathode CE may be disposed only in the partition opening portion OP-P.

[0119] The cathode CE can extend along the first inner surface of the first partition layer L1, and the end of the cathode CE can contact the first partition layer L1. As an example, Figure 5 The illustration shows a cathode CE in contact with the first inner surface of the first partition layer L1 and the inner surface of the pixel defining film PDL, but embodiments of the present invention are not limited thereto. For example, the cathode CE may be provided to contact only the first inner surface of the first partition layer L1.

[0120] The cathode (CE) can be conductive. The cathode (CE) can be made of various materials such as metals, transparent conductive oxides (TCOs), or conductive polymers, as long as these materials are conductive. For example, the cathode (CE) can include silver (Ag), magnesium (Mg), lead (Pb), copper (Cu), or compounds thereof.

[0121] In embodiments of this inventive concept, the display element layer DP-OLED may further include a capping pattern CP. The capping pattern CP may be disposed in the partition opening portion OP-P and on the cathode CE. The capping pattern CP can be patterned through a pointed portion defined in the partition PW. In embodiments, the capping pattern CP may be omitted.

[0122] The partition wall (PW) can be disposed on the pixel-defining film (PDL). The partition wall opening portion (OP-P) can be defined in the partition wall (PW). The partition wall opening portion (OP-P) can be the region corresponding to the emission opening portion (OP-E) in the plan view, and at least a portion of the anode (AE) is exposed during the manufacturing process.

[0123] The partition wall (PW) may include multiple layers stacked sequentially. For example, the partition wall PW may include a first partition wall layer L1 and a second partition wall layer L2. The first partition wall layer L1 may be disposed on the pixel-defining film (PDL), and the second partition wall layer L2 may be disposed on the first partition wall layer L1. Figure 5 As shown in the diagram, the thickness of the first partition layer L1 can be greater than the thickness of the second partition layer L2, but is not limited to this.

[0124] Each of the first partition layer L1 and the second partition layer L2 may include a conductive material. For example, the conductive material may include a metal, a transparent conductive oxide (TCO), or a combination thereof. For example, the metal may include gold (Au), silver (Ag), aluminum (Al), magnesium (Mg), lithium (Li), molybdenum (Mo), titanium (Ti), copper (Cu), or alloys thereof. The transparent conductive oxide may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide, indium oxide, indium gallium oxide, indium gallium zinc oxide (IGZO), or aluminum zinc oxide.

[0125] The partition wall PW may have an undercut shape in cross-sectional view. At least one of the multiple layers of the partition wall PW may be recessed from the other layers, and therefore, the partition wall PW may include a pointed portion projecting toward the center of the anode AE. For example, the first partition wall layer L1 may have an undercut shape relative to the second partition wall layer L2. The second partition wall layer L2 may project from the first partition wall layer L1 toward the emission opening portion OP-E and provide a pointed portion. The portion of the second partition wall layer L2 projecting from the first partition wall layer L1 toward the emission region PXA may be defined as the pointed portion in the partition wall PW. That is, the second inner surface of the second partition wall layer L2 may be configured to be closer to the center of the anode AE ​​than the first inner surface of the first partition wall layer L1.

[0126] As an example, Figure 5 The diagram illustrates the first inner surface of the first partition layer L1 and the second inner surface of the second partition layer L2, each of which is perpendicular to the top surface of the pixel defining film PDL, but embodiments of the present invention are not limited thereto. For example, the partition PW may have a conical shape or may have an inverted conical shape.

[0127] The adjacent PW can receive the drive voltage, and therefore the cathode CE can be electrically connected to the adjacent PW and receive the drive voltage.

[0128] The thin-film encapsulation layer (TFE) can be disposed on the display element layer of the DP-OLED. The thin-film encapsulation layer (TFE) may include a lower inorganic encapsulation pattern (LIL), an organic encapsulation film (OL), and an upper inorganic encapsulation film (UIL).

[0129] The lower inorganic package pattern (LIL) can be disposed in the area corresponding to the emission opening portion (OP-E). The lower inorganic package pattern (LIL) can be disposed on the capping pattern (CP) and cover the light-emitting element (ED). A portion of the lower inorganic package pattern (LIL) can be provided in the partition opening portion (OP-P), and another portion of the lower inorganic package pattern (LIL) can be provided on the partition wall (PW).

[0130] In this process, a recess HM, which is absent from the lower inorganic package pattern LIL due to poor step coverage, can be formed within the lower inorganic package pattern LIL. The recess HM of the lower inorganic package pattern LIL can be spaced apart from the partition wall PW and the light-emitting element ED. The lower inorganic package pattern LIL can have a shape symmetrical about an axis AX_LIL passing through the center of the lower inorganic package pattern LIL.

[0131] An organic encapsulation film OL can be disposed on the lower inorganic encapsulation pattern LIL. The organic encapsulation film OL can cover the lower inorganic encapsulation pattern LIL and provide a flat top surface. An upper inorganic encapsulation film UIL can be disposed on the organic encapsulation film OL. The lower inorganic encapsulation pattern LIL and the upper inorganic encapsulation film UIL can protect the DP-OLED display element layer from moisture / oxygen, and the organic encapsulation film OL can protect the DP-OLED display element layer from foreign matter such as dust particles.

[0132] Figure 6 It is along Figure 4 The cross-sectional view taken by cutting line II-II' in the diagram. Figure 6 The illustration shows an enlarged view of a first transmission region PXA-R, a second transmission region PXA-G, and a third transmission region PXA-B, and regarding... Figure 5 The interpretation of a PXA (Purpose X-ray Area) in a transmission region can be applied to... Figure 6 Each of the first to third emission regions PXA-R, PXA-G, and PXA-B. (Refer to...) Figure 6 By referencing Figure 5 Components that are identical or similar to those described are indicated by identical or similar reference numerals or symbols, and redundant explanations are avoided in describing embodiments.

[0133] refer to Figure 6 The display panel DP may include a substrate layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and a thin film encapsulation layer TFE. The display element layer DP-OLED may include light-emitting elements ED1, ED2, and ED3, sacrificial patterns SP1, SP2, and SP3, a pixel-defining film PDL, and a partition wall PW.

[0134] The light-emitting elements ED1, ED2, and ED3 may include a first light-emitting element ED1, a second light-emitting element ED2, and a third light-emitting element ED3 that emit light of different colors from each other. Each of the first light-emitting element ED1, the second light-emitting element ED2, and the third light-emitting element ED3 may be provided in multiples. For the sake of simplicity, one of the multiple first light-emitting elements ED1, one of the multiple second light-emitting elements ED2, and one of the multiple third light-emitting elements ED3 will be described.

[0135] The first light-emitting element ED1 may include a first anode AE1, a first emission pattern EP1, and a first cathode CE1. The second light-emitting element ED2 may include a second anode AE2, a second emission pattern EP2, and a second cathode CE2. The third light-emitting element ED3 may include a third anode AE3, a third emission pattern EP3, and a third cathode CE3. The first to third anodes AE1, AE2, and AE3 may be provided as multiple patterns. In an embodiment, the first emission pattern EP1 may provide red light, the second emission pattern EP2 may provide green light, and the third emission pattern EP3 may provide blue light.

[0136] The first to third emission openings OP1-E, OP2-E, and OP3-E can be defined within a pixel-defining film (PDL). During the manufacturing process, the first emission opening OP1-E can expose at least a portion of the first anode AE1. During the manufacturing process, the second emission opening OP2-E can expose at least a portion of the second anode AE2. During the manufacturing process, the third emission opening OP3-E can expose at least a portion of the third anode AE3.

[0137] In this embodiment, the first emission region PXA-R can be defined as the region of the first anode AE1 that is not covered by the pixel limiting film PDL. The second emission region PXA-G can be defined as the region of the second anode AE2 that is not covered by the pixel limiting film PDL. The third emission region PXA-B can be defined as the region of the third anode AE3 that is not covered by the pixel limiting film PDL.

[0138] The sacrificial patterns SP1, SP2, and SP3 may include a first sacrificial pattern SP1, a second sacrificial pattern SP2, and a third sacrificial pattern SP3. The first to third sacrificial patterns SP1, SP2, and SP3 may be respectively disposed on the top surfaces of the first to third anodes AE1, AE2, and AE3. The first to third sacrificial openings OP1-S, OP2-S, and OP3-S, respectively disposed in the regions corresponding to the first to third emission openings OP1-E, OP2-E, and OP3-E, may be respectively confined within the first to third sacrificial patterns SP1, SP2, and SP3.

[0139] In this embodiment, the first to third partition wall openings OP1-P, OP2-P, and OP3-P, which are respectively located in the regions corresponding to the first to third emission openings OP1-E, OP2-E, and OP3-E, can be confined in the partition wall PW.

[0140] In this embodiment, the first to third emission patterns EP1, EP2, and EP3, and the first to third cathodes CE1, CE2, and CE3, can be physically separated and confined within emission openings OP1-E, OP2-E, and OP3-E, and partition openings OP1-P, OP2-P, and OP3-P, due to the second partition layer L2 including the tip portion. That is, light-emitting elements ED1, ED2, and ED3 can be disposed within partition openings OP1-P, OP2-P, and OP3-P, and emission openings OP1-E, OP2-E, and OP3-E. For example, the first light-emitting element ED1 can be disposed within the first partition opening OP1-P and the first emission opening OP1-E, the second light-emitting element ED2 can be disposed within the second partition opening OP2-P and the second emission opening OP2-E, and the third light-emitting element ED3 can be disposed within the third partition opening OP3-P and the third emission opening OP3-E.

[0141] According to embodiments of the present invention, multiple first emission patterns EP1 can be patterned and deposited pixel by pixel due to the pointed portion defined in the partition PW. That is, the first emission patterns EP1 can be formed commonly using an open mask, but can be disconnected to form independent patterns due to the pointed portion in the partition PW.

[0142] On the other hand, when patterning the first emission pattern EP1 using a fine metal mask (FMM), spacers protruding from the conductive partitions need to be provided to support the fine metal mask. Furthermore, the height of the partitions and spacers may limit the achievement of high resolution because the fine metal mask is spaced apart from the substrate surface on which the patterning is performed. Additionally, when the fine metal mask contacts the spacers, foreign matter may remain on the spacers after the process of patterning the first emission pattern EP1, or the spacers may be damaged due to the penetration of the fine metal mask. Therefore, a defective display panel may be provided.

[0143] According to this embodiment, since the partition wall PW is included, physical separation between the light-emitting elements ED1, ED2, and ED3 can be easily achieved. Therefore, driving errors or current leakage between adjacent emitting regions PXA-R, PXA-G, and PXA-B can be prevented, and the light-emitting elements ED1, ED2, and ED3 can be driven independently of each other.

[0144] Specifically, multiple first emission patterns EP1 can be patterned without being associated with the display area DA (see [link]). Figure 1B The internal components in the display panel (DP) are contacted by a mask, thereby reducing the defect rate and providing improved process reliability. Patterning can be performed even without providing individual spacers protruding from the adjacent PW, thus miniaturizing the corresponding surface areas of the emitting regions PXA-R, PXA-G, and PXA-B. Therefore, a display panel (DP) with high resolution can be provided.

[0145] Furthermore, when manufacturing a display panel DP with a large area, the manufacturing of a large-area mask can be omitted. Therefore, process costs can be reduced, and the display panel DP is unaffected by defects that may occur in the large-area mask, thus providing improved process reliability for the display panel DP. The content regarding multiple first emission patterns EP1 can be applied to multiple second emission patterns EP2 and multiple third emission patterns EP3.

[0146] The thin-film encapsulation layer TFE may include a lower inorganic encapsulation pattern LIL1, LIL2 and LIL3, an organic encapsulation film OL and an upper inorganic encapsulation film UIL.

[0147] The lower inorganic package patterns LIL1, LIL2, and LIL3 may include a first lower inorganic package pattern LIL1 covering the first light-emitting element ED1, a second lower inorganic package pattern LIL2 covering the second light-emitting element ED2, and a third lower inorganic package pattern LIL3 covering the third light-emitting element ED3. The first to third lower inorganic package patterns LIL1, LIL2, and LIL3 may respectively cover the first to third emission opening portions OP1-E, OP2-E, and OP3-E. The first to third lower inorganic package patterns LIL1, LIL2, and LIL3 may be provided as separate patterns spaced apart from each other.

[0148] Recesses HM1, HM2, and HM3 can be formed in the first to third lower inorganic package patterns LIL1, LIL2, and LIL3, respectively. For example, the first lower inorganic package pattern LIL1 can have a first recess HM1 spaced apart from the partition wall PW and the first light-emitting element ED1, the second lower inorganic package pattern LIL2 can have a second recess HM2 spaced apart from the partition wall PW and the second light-emitting element ED2, and the third lower inorganic package pattern LIL3 can have a third recess HM3 spaced apart from the partition wall PW and the third light-emitting element ED3.

[0149] The organic encapsulation film OL can cover the lower inorganic encapsulation patterns LIL1, LIL2, and LIL3. The upper inorganic encapsulation film UIL can be set on the organic encapsulation film OL.

[0150] Figure 7The display panel DP (see embodiment of the present invention) is an embodiment of the present invention. Figure 2 A magnified plan view of a portion of the display area DAa. Figure 7 The illustration shows the display module DM (see...). Figure 1B The display surface IS (see) Figure 1B When viewing on the DM module (see) Figure 1B (A floor plan of the building).

[0151] Figure 7 The diagram has the same Figure 4 The arrangement of emission regions PXA-Ra, PXA-Ga, and PXA-Ba (or emission openings OP1-Ea, OP2-Ea, and OP3-Ea) of different shapes, and the underlying inorganic packaging patterns LIL1a, LIL2a, and LIL3a. Besides shape, Figure 7 The characteristics of the emission openings OP1-Ea, OP2-Ea, and OP3-Ea, as well as the lower inorganic package patterns LIL1a, LIL2a, and LIL3a, such as their arrangement shape and surface area, can be compared with... Figure 4 The characteristics of the emission opening portions OP1-E, OP2-E and OP3-E, as well as the lower inorganic package patterns LIL1, LIL2 and LIL3, are basically the same.

[0152] refer to Figure 7 The display area DAa may include the first to third emission areas PXA-Ra, PXA-Ga, and PXA-Ba, and the peripheral area NPXAa surrounding the first to third emission areas PXA-Ra, PXA-Ga, and PXA-Ba. The first to third emission areas PXA-Ra, PXA-Ga, and PXA-Ba may be oriented according to the orientation of the display module DM (see [link to relevant documentation]). Figure 2 The colors of the light emitted externally from the light-emitting element are classified. The first to third emission regions PXA-Ra, PXA-Ga, and PXA-Ba can each correspond to the regions from which light provided from the light-emitting element is emitted. The first to third emission regions PXA-Ra, PXA-Ga, and PXA-Ba can each correspond to the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea, respectively. For example, the first emission region PXA-Ra can correspond to the first emission opening portion OP1-Ea, the second emission region PXA-Ga can correspond to the second emission opening portion OP2-Ea, and the third emission region PXA-Ba can correspond to the third emission opening portion OP3-Ea.

[0153] At least one of the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea may have a rectangular or rhomboid shape in a plan view. At least one of the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea may have four inner surfaces.

[0154] Each of the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea may have a shape symmetrical about at least two axes passing through the center of the emission opening portion. For example, the second emission opening portion OP2-Ea may have a shape symmetrical about a first axis AX1 and a second axis AX2, respectively passing through the center of the second emission opening portion OP2-Ea. The first-1 region A1a and the first-2 region A2a of the second emission opening portion OP2-Ea, divided by the first axis AX1, may be symmetrical to each other. Furthermore, the second-1 region B1a and the second-2 region B2a of the second emission opening portion OP2-Ea, divided by the second axis AX2, may be symmetrical to each other.

[0155] exist Figure 7 The embodiment is described using the example of the second emission opening portion OP2-Ea, but the content regarding the second emission opening portion OP2-Ea can be applied to the first emission opening portion OP1-Ea and the third emission opening portion OP3-Ea.

[0156] The first to third emission regions PXA-Ra, PXA-Ga, and PXA-Ba (or the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea) may have the same shape in the plan view, or alternatively, at least some of the first to third emission regions PXA-Ra, PXA-Ga, and PXA-Ba (or the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea) may have different shapes in the plan view. As an example, Figure 7 The illustration shows the first to third emission openings OP1-Ea, OP2-Ea, and OP3-Ea, which have the same rectangular (or rhomboid) shape in the plan view.

[0157] The first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a can have various shapes in the planar view. The shapes of the first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a can correspond to the shapes of the first to third emission opening portions OP1-Ea, OP2-Ea, and OP3-Ea, respectively. At least one of the first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a can have a rectangular or rhomboid shape in the planar view.

[0158] Each of the first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a may have a shape symmetrical about at least two axes passing through the center of each of the first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a. For example, the second lower inorganic package pattern LIL2a may have a shape symmetrical about a first axis AX1 and a second axis AX2, respectively, passing through the center of the second lower inorganic package pattern LIL2a. The first-1 region and the first-2 region of the second lower inorganic package pattern LIL2a, divided by the first axis AX1 (corresponding to the first-1 region A1a and the first-2 region A2a of the second emission opening portion OP2-Ea, respectively), may be symmetrical to each other. Furthermore, the second-1 region and the second-2 region of the second lower inorganic package pattern LIL2a, divided by the second axis AX2 (corresponding to the second-1 region B1a and the second-2 region B2a of the second emission opening portion OP2-Ea, respectively), may be symmetrical to each other.

[0159] exist Figure 7 The embodiment is described using the example of the second lower inorganic package pattern LIL2a, but the content regarding the second lower inorganic package pattern LIL2a can be applied to the first lower inorganic package pattern LIL1a and the third lower inorganic package pattern LIL3a.

[0160] The first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a may have the same shape in the planar view, or alternatively, at least some of the first to third lower inorganic package patterns LIL1a, LIL2a, and LIL3a may have different shapes in the planar view. As an example, Figure 7 The illustrations show the first to third lower inorganic package patterns LIL1a, LIL2a and LIL3a with the same rectangular (or rhomboid) shape in the plan view.

[0161] Figure 8 The display panel DP (see embodiment of the present invention) is an embodiment of the present invention. Figure 2 A magnified plan view of a portion of the display area DAb. Figure 8 The illustration shows the display module DM (see...). Figure 1B The display surface IS (see) Figure 1B When viewing on the DM module (see) Figure 1B (A floor plan of the building).

[0162] Figure 8 The diagram has the same Figure 4 The arrangement of emission regions PXA-Ra, PXA-G, and PXA-Ba (or emission openings OP1-Ea, OP2-E, and OP3-Ea) of different shapes, and the underlying inorganic package patterns LIL1a, LIL2, and LIL3a. Besides shape, Figure 8 The characteristics of the emission openings OP1-Ea, OP2-E, and OP3-Ea, as well as the lower inorganic package patterns LIL1a, LIL2, and LIL3a, such as their arrangement shape and surface area, can be compared with... Figure 4 The characteristics of the emission opening portions OP1-E, OP2-E and OP3-E, as well as the lower inorganic package patterns LIL1, LIL2 and LIL3, are basically the same.

[0163] Figure 8 The shapes of the first launch opening portion OP1-Ea and the third launch opening portion OP3-Ea can be similar to... Figure 7 The first launch opening portion OP1-Ea and the third launch opening portion OP3-Ea have the same shape, and Figure 8 The shape of the second launch opening portion OP2-E in the middle can be consistent with... Figure 4 The second emission opening portion OP2-E has the same shape. That is, in the plan view, some of the emission opening portions OP1-Ea, OP2-E, and OP3-Ea (emission opening portions OP1-Ea and OP3-Ea) can have a rectangular or rhomboid shape, while others (emission opening portion OP2-E) can have a circular shape. For example, the first emission opening portion OP1-Ea and the third emission opening portion OP3-Ea can have a rectangular or rhomboid shape, and the second emission opening portion OP2-E can have a circular shape. Each of the first to third emission opening portions OP1-Ea, OP2-E, and OP3-Ea can have a shape that is symmetrical about at least two axes passing through the center of the emission opening portion.

[0164] also, Figure 8 The shapes of the first lower inorganic package pattern LIL1a and the third lower inorganic package pattern LIL3a can be similar to... Figure 7 The first lower inorganic package pattern LIL1a and the third lower inorganic package pattern LIL3a have the same shape, and Figure 8 The shape of the second inorganic encapsulation pattern LIL2 in the middle can be consistent with... Figure 4The second lower inorganic package pattern LIL2 has the same shape. That is, in the plan view, some of the lower inorganic package patterns LIL1a, LIL2, and LIL3a (lower inorganic package patterns LIL1a and LIL3a) can have rectangular or rhomboid shapes, while others (lower inorganic package pattern LIL2) can have circular shapes. For example, the first lower inorganic package pattern LIL1a and the third lower inorganic package pattern LIL3a can have rectangular or rhomboid shapes, and the second lower inorganic package pattern LIL2 can have a circular shape. Each of the first to third lower inorganic package patterns LIL1a, LIL2, and LIL3a can have a shape that is symmetrical about at least two axes passing through the center of the lower inorganic package pattern.

[0165] refer to Figures 4 to 8 According to embodiments of the present invention, each of the emission opening portions OP1-E, OP2-E, and OP3-E, as well as OP1-Ea, OP2-Ea, and OP3-Ea, can have a shape symmetrical about at least two axes. Correspondingly, each of the lower inorganic package patterns LIL1, LIL2, and LIL3, as well as LIL1a, LIL2a, and LIL3a, can have a shape symmetrical about these at least two axes. Because the lower inorganic package patterns LIL1, LIL2, and LIL3, as well as LIL1a, LIL2a, and LIL3a, have symmetrical shapes, stress can be prevented from concentrating at specific locations on the lower inorganic package patterns LIL1, LIL2, and LIL3, as well as LIL1a, LIL2a, and LIL3a, and the lower inorganic package patterns LIL1, LIL2, and LIL3, as well as LIL1a, LIL2a, and LIL3a, can be more robust. Therefore, foreign matter introduced through the separation area between the partition wall PW and each of the lower inorganic package patterns LIL1, LIL2 and LIL3, as well as LIL1a, LIL2a and LIL3a in the cross-sectional view, and foreign matter introduced into the grooves HM1, HM2 and HM3 of the lower inorganic package patterns LIL1, LIL2 and LIL3, as well as LIL1a, LIL2a and LIL3a, can be reduced or eliminated, and pixel defects (black spots and pixel shrinkage, etc.) of the display panel DP caused by foreign matter can be reduced or eliminated.

[0166] Figure 9 , Figure 10A , Figures 11 to 14 , Figure 15A , Figure 16 as well as Figure 17 This is a cross-sectional view illustrating some of the steps in a method for manufacturing a display panel according to an embodiment of the present invention. Figure 10B and Figure 15B These are plan views of masks MK1 and MK2, respectively, according to embodiments of the present invention. (Refer to...) Figures 9 to 17 By referencing Figures 1A to 6 Components that are identical or similar to those described are indicated by identical or similar reference numerals or symbols, and redundant explanations are avoided in describing embodiments.

[0167] A method for manufacturing a display panel according to an embodiment of the present invention may include: providing a preliminary display panel, the preliminary display panel including a substrate layer, a pixel defining film disposed on the substrate layer, and preliminary partitions disposed on the pixel defining film; patterning a first photoresist layer using a first mask to form a first photoresist pattern, the first mask including a first transmissive portion and a first light-shielding portion surrounding the first transmissive portion in a planar view; etching the preliminary partitions using the first photoresist pattern to form partitions having undercut shapes with partition openings defined therein; etching the pixel defining film using the first photoresist pattern to form emission openings in the pixel defining film corresponding to the shape of the first transmissive portion; and forming light-emitting elements in the emission openings and partition openings, the light-emitting elements including an anode, an emission pattern, and a cathode. The first transmissive portion may have a shape symmetrical about at least two axes passing through the center of the first transmissive portion.

[0168] In the following text, reference will be made to Figures 9 to 17 This describes a method for forming a light-emitting element (ED) and a lower inorganic encapsulation pattern (LIL), an organic encapsulation film (OL), and an upper inorganic encapsulation film (UIL) covering the ED. (See reference...) Figures 9 to 17 The described method forms a display panel DP that can correspond to Figure 5 The display panel DP in the middle.

[0169] refer to Figure 9 A method for manufacturing a display panel according to an embodiment of the present invention may include providing a preliminary display panel DP-I. The preliminary display panel DP-I provided in this embodiment may include a substrate layer BL, a circuit element layer DP-CL, an anode AE, a sacrificial layer SP-I, a pixel defining film PDL, and a preliminary spacer PW-I. The preliminary display panel DP-I may include a first preliminary spacer layer L1-I and a second preliminary spacer layer L2-I.

[0170] The circuit element layer DP-CL can be formed using typical processes for manufacturing circuit elements by forming insulating layers, semiconductor layers, and conductive layers via methods such as coating or deposition, and then selectively patterning the insulating layers, semiconductor layers, and conductive layers via photolithography and etching processes to form semiconductor patterns, conductive patterns, and signal lines, etc.

[0171] The preliminary anode layer and preliminary sacrificial layer can be formed on the circuit element layer DP-CL. The anode AE ​​and sacrificial layer SP-I can be formed using the same mask and the same patterning process. The pixel-defining film PDL can be formed on the substrate layer BL. The pixel-defining film PDL can cover both the anode AE ​​and the sacrificial layer SP-I.

[0172] A first preliminary barrier layer L1-I can be formed on a pixel-defining film (PDL), and a second preliminary barrier layer L2-I can be formed on the first preliminary barrier layer L1-I. Both the first and second preliminary barrier layers L1-I can be formed using a conductive material deposition process. In embodiments of this inventive concept, the first preliminary barrier layer L1-I may comprise aluminum (Al), and the second preliminary barrier layer L2-I may comprise titanium (Ti). However, the materials of the first and second preliminary barrier layers L1-I are not limited thereto. For example, the first and second preliminary barrier layers L1-I may each comprise a metal, a transparent conductive oxide (TCO), or a combination thereof. The metal may include gold (Au), silver (Ag), aluminum (Al), magnesium (Mg), lithium (Li), molybdenum (Mo), titanium (Ti), copper (Cu), or alloys thereof. Transparent conductive oxides may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide, indium oxide, indium gallium oxide, indium gallium zinc oxide (IGZO), or aluminum zinc oxide.

[0173] Subsequently, refer to Figure 10A and Figure 10B A method for manufacturing a display panel according to an embodiment of the present invention may include forming a first photoresist pattern PR1 on a preliminary partition wall PW-I. The first photoresist pattern PR1 can be formed on the preliminary partition wall PW-I (see... Figure 9 A first photoresist layer is formed on the substrate and then patterned using a first mask MK1. The first mask MK1 may include a first transmissive portion TTA1 and a first light-shielding portion NTA1 surrounding the first transmissive portion TTA1. The first transmissive portion TTA1 of the first mask MK1 may have a shape that is symmetrical about at least two axes passing through the center of the first transmissive portion TTA1 in a plan view. As an example, Figure 10B The illustration shows a first transmissive portion TTA1 with a circular shape, but embodiments of the present invention are not limited thereto. For example, the first transmissive portion TTA1 may have a rectangular or rhomboid shape.

[0174] The photoresist opening portion OP-PR can be defined within the first photoresist pattern PR1 using a patterning process. The photoresist opening portion OP-PR can be located in the region corresponding to the anode AE. The photoresist opening portion OP-PR can correspond to the shape of the first transmission portion TTA1. That is, the photoresist opening portion OP-PR can have a circular, rectangular, or rhomboid shape in the planar view.

[0175] Subsequently, refer to Figure 11 and Figure 12 A method for manufacturing a display panel according to an embodiment of the present invention may include etching a preliminary partition wall PW-I to form a partition wall PW having an undercut shape, wherein a partition wall opening portion OP-P is defined therein. The formation of the partition wall PW may include an initial etching of a first preliminary partition wall layer L1-I and a second preliminary partition wall layer L2-I, and a secondary etching of the first preliminary partition wall layer L1-I.

[0176] refer to Figure 11 In the initial etching of the first preliminary partition layer L1-I and the second preliminary partition layer L2-I, the first preliminary partition layer L1-I and the second preliminary partition layer L2-I can be anisotropically dry etched using a first photoresist pattern PR1 as a mask. The portions of the preliminary partition PW-I not covered by the first photoresist pattern PR1 can be etched and removed. For example, the preliminary partition opening portion OP-PI can be formed in the area not covered by the first photoresist pattern PR1.

[0177] The anisotropic initial dry etching process in this embodiment can be performed in an etching environment in which the etching rates of the first preliminary partition layer L1-I and the second preliminary partition layer L2-I are substantially the same. Therefore, the inner surfaces of the first preliminary partition layer L1-I defining the preliminary partition opening portion OP-PI and the second preliminary partition layer L2-I defining the preliminary partition opening portion OP-PI can be substantially aligned with each other.

[0178] After that, as Figure 12 As shown in the diagram, in the first preliminary partition layer L1-I (see...) Figure 11 In the secondary etching of the anode AE, the first preliminary partition layer L1-I can be wet-etched using a first photoresist pattern PR1 as a mask. Therefore, a portion of the first preliminary partition layer L1-I can be etched to form a partition opening portion OP-P. The partition opening portion OP-P can be formed in a region corresponding to a portion of the anode AE.

[0179] In the embodiments of this invention, the secondary wet etching process can be implemented in a first preliminary partition layer L1-I and a second preliminary partition layer L2-I (see...). Figure 11The etching is performed in an etching environment with high selectivity between the two layers. Therefore, the inner surface of the defining partition opening portion OP-P of the partition wall PW can have an undercut shape in the cross-sectional view. Specifically, since the first preliminary partition wall layer L1-I has a higher etching rate to the etchant than the second preliminary partition wall layer L2-I, the first preliminary partition wall layer L1-I can be primarily etched. Therefore, the first inner surface of the first partition wall layer L1 can be formed to be recessed inward from the second inner surface of the second partition wall layer L2. Due to the difference in etching rates between the first preliminary partition wall layer L1-I and the second preliminary partition wall layer L2-I, a tip portion can be formed in the partition wall PW.

[0180] As an example, Figure 11 and Figure 12 The diagram illustrates the formation of a partition opening OP-P corresponding to a transmission region. In an embodiment, the formation of the first transmission region PXA-R (see [reference]) can be performed. Figure 6 The first partition opening OP1-P corresponding to ) (see Figure 6 ) and forming the first light-emitting element ED1 (see Figure 6 And then the formation of the second emission region PXA-G can be performed (see...). Figure 6 The corresponding second partition opening OP2-P (see) Figure 6 ) and forming the second light-emitting element ED2 (see Figure 6 After this, the formation of the third launch region PXA-B can be performed (see...). Figure 6 The corresponding third partition opening OP3-P (see) Figure 6 And form the third light-emitting element ED3 (see...) Figure 6 Alternatively, in the embodiments, the first to third partition wall openings OP1-P, OP2-P and OP3-P corresponding to the first to third emission regions PXA-R, PXA-G and PXA-B respectively can be formed simultaneously, and then the first to third light-emitting elements ED1, ED2 and ED3 can be formed.

[0181] Subsequently, refer to Figure 13 A method for manufacturing a display panel according to an embodiment of the present invention may include etching a pixel-defining film PDL by using a first photoresist pattern PR1 to form an emission opening portion OP-E in the pixel-defining film PDL.

[0182] When etching the pixel-defined film (PDL), the PDL can be dry-etched using a first photoresist pattern PR1 and spacers PW (e.g., a second spacer layer L2) as a mask. Portions of the PDL not covered by the first photoresist pattern PR1 and spacers PW can be etched and removed. As a result, an emission opening portion OP-E, surrounded by the edge of the spacer opening portion OP-P in a planar view, can be formed in the pixel-defined film (PDL).

[0183] Because the first photoresist pattern PR1 uses the first mask MK1 (see...) Figure 10A The pixel-defined film (PDL) is patterned, and the first photoresist pattern PR1 is etched, so that the emission opening portion OP-E defined in the pixel-defined film (PDL) can be connected to the first transmission portion TTA1 (see...). Figure 10A The shape corresponds to the shape. That is, the formation of the emission opening portion OP-E in the pixel-defined film PDL can include the emission opening portion OP-E having a circular shape, a rectangular shape or a rhombus shape in the planar view.

[0184] Furthermore, a method for manufacturing a display panel according to embodiments of the present invention may include etching a sacrificial layer SP-I (see Figure 12 A sacrificial pattern SP with a sacrificial opening portion OP-S is formed in the region corresponding to the emission opening portion OP-E.

[0185] In the etching of the sacrificial layer SP-I, the sacrificial layer SP-I can be wet-etched using a first photoresist pattern PR1 and spacer PW (e.g., a second spacer layer L2) as a mask. The portions of the sacrificial layer SP-I not covered by the first photoresist pattern PR1 and spacer PW can be etched and removed. As a result, the sacrificial pattern SP can be formed from the sacrificial layer SP-I. The sacrificial opening portion OP-S, located in the region corresponding to the emission opening portion OP-E, can be defined within the sacrificial pattern SP.

[0186] During the etching of the sacrificial layer SP-I, the sacrificial layer SP-I can be anisotropically dry etched using a first photoresist pattern PR1 and spacer PW (e.g., a second spacer layer L2) as a mask. In this case, the undercut portion in the sacrificial layer SP-I may not be formed.

[0187] The etching of the sacrificial pattern SP can be performed in an etching environment where the etch selectivity between the sacrificial pattern SP and the anode AE ​​is high, and therefore, the anode AE ​​can be prevented from being etched during the etching of the sacrificial pattern SP. That is, the sacrificial pattern SP, which has a high etch rate compared to the anode AE, can be placed between the pixel-defining film PDL and the anode AE, thereby preventing the anode AE ​​from being etched together and damaged during the etching of the sacrificial pattern SP.

[0188] Subsequently, refer to Figure 14 A method for manufacturing a display panel according to an embodiment of the present invention may include removing a first photoresist pattern PR1 (see...). Figure 13 Furthermore, light-emitting elements ED are formed in the emission opening portion OP-E and the partition opening portion OP-P. The light-emitting elements ED include an anode AE, an emission pattern EP, and a cathode CE.

[0189] The formation of the light-emitting element ED may include forming an emission pattern EP and forming a cathode CE. Furthermore, the formation of the light-emitting element ED may include forming a dummy layer DMP on the spacer PW, comprising the same material as each of the emission pattern EP and the cathode CE.

[0190] The formation of the emission pattern EP may include a deposition process of the light-emitting layer. For example, the formation of the emission pattern EP may include thermally evaporating the light-emitting layer. The light-emitting layer may be separated due to the tip portion formed in the partition wall PW, and the separated light-emitting layer may be deposited inside the partition wall opening portion OP-P and on the partition wall PW. The light-emitting layer formed in the partition wall opening portion OP-P may form the emission pattern EP, and the light-emitting layer formed on the partition wall PW may form the first dummy layer D1. That is, the emission pattern EP may be formed on the anode AE ​​to overlap with the partition wall opening portion OP-P, and the emission pattern EP may be formed simultaneously over the anode AE ​​and the pixel defining film PDL.

[0191] The first dummy layer D1, formed together with the emission pattern EP, may include an organic material. For example, the first dummy layer D1 may include the same material as the emission pattern EP. The first dummy layer D1 may be formed simultaneously with the emission pattern EP in a single process and may be separated from the emission pattern EP due to the undercut shape of the partition wall PW.

[0192] The formation of the cathode CE may include a cathode layer deposition process. For example, the formation of the cathode CE may include sputtering a cathode layer. Due to the tip portion formed in the partition wall PW, the cathode layer can be separated, and the separated cathode layer can be deposited inside the partition wall opening OP-P and on the partition wall PW. The cathode layer formed in the partition wall opening OP-P can form the cathode CE, and the cathode layer formed on the partition wall PW can form a second dummy layer D2. That is, the cathode CE can be formed on the emission pattern EP in the region corresponding to the partition wall opening OP-P, and the cathode CE can be formed while covering the emission pattern EP. Furthermore, the cathode CE can contact the inner surface of the first partition wall layer L1 and be formed to extend along the inner surface of the first partition wall layer L1.

[0193] The second dummy layer D2, formed concurrently with the cathode CE, may comprise a conductive material. For example, the second dummy layer D2 may comprise the same material as the cathode CE. The second dummy layer D2 may be formed simultaneously with the cathode CE in a single process and may be separated from the cathode CE due to the undercut shape of the partition wall PW.

[0194] The anode AE, emission pattern EP, and cathode CE can be sequentially stacked on a third-direction DR3. The anode AE, emission pattern EP, and cathode CE can form a light-emitting element ED.

[0195] In an embodiment, the method for manufacturing a display panel according to an embodiment of the present invention may further include forming a capping pattern CP. The formation of the capping pattern CP may include a deposition process of a capping pattern layer. Due to the pointed portion formed in the partition wall PW, the capping pattern layer can be separated, and the separated capping pattern layer can be deposited inside the partition opening portion OP-P and on the partition wall PW. The capping pattern layer formed in the partition opening portion OP-P can form the capping pattern CP, and the capping pattern layer formed on the partition wall PW can form a third dummy layer D3.

[0196] The third dummy layer D3, formed concurrently with the capping pattern CP, may include a conductive material. For example, the third dummy layer D3 may include the same material as the capping pattern CP. The third dummy layer D3 may be formed simultaneously with the capping pattern CP in a single process and may be separated from the capping pattern CP due to the undercut shape of the partition wall PW. In embodiments of this inventive concept, the processes for forming the capping pattern CP and the third dummy layer D3 may be omitted.

[0197] The first dummy layer D1, the second dummy layer D2, and the third dummy layer D3 can be stacked sequentially on the third-direction DR3. The first dummy layer D1, the second dummy layer D2, and the third dummy layer D3 can form a dummy layer DMP.

[0198] refer to Figure 15A and Figure 15B A method for manufacturing a display panel according to an embodiment of the present invention may include depositing a lower inorganic encapsulation layer LIL-I covering the partition wall PW and the light-emitting element ED.

[0199] The lower inorganic encapsulation layer (LIL-I) can be formed using a chemical vapor deposition (CVD) process. The LIL-I can be formed to cover the cathode (CE) (or capping pattern (CP)) and the spacer (PW). A portion of the LIL-I can fill the spacer opening (OP-P). The LIL-I can have a recess (HM) in which the lower inorganic encapsulation pattern (LIL) is absent due to poor step coverage of the LIL-I. The recess (HM) can be formed during the formation of the LIL-I to fill the spacer opening (OP-P). The recess (HM) can be spaced apart from the spacer (PW) and the light-emitting element (ED).

[0200] Subsequently, a method for manufacturing a display panel according to an embodiment of the present invention may include forming a second photoresist pattern PR2 on a lower inorganic encapsulation layer LIL-I. The second photoresist pattern PR2 can be formed by forming a second photoresist layer on the lower inorganic encapsulation layer LIL-I and then patterning the second photoresist layer using a second mask MK2. The second mask MK2 may include a second light-shielding portion NTA2 and a second transmissive portion NTA2 surrounding the second light-shielding portion NTA2. The second light-shielding portion NTA2 of the second mask MK2 may have a shape symmetrical about at least two axes passing through the center of the second light-shielding portion NTA2. As an example, Figure 15B The illustration shows a second light-shielding portion NTA2 with a circular shape, but the embodiments of the present invention are not limited thereto. For example, the second light-shielding portion NTA2 may have a rectangular or rhomboid shape.

[0201] The second photoresist pattern PR2 can be formed in the form of a pattern corresponding to the light-emitting element ED through a patterning process. The second photoresist pattern PR2 can correspond to the shape of the second light-shielding portion NTA2. That is, the second photoresist pattern PR2 can have a circular shape, a rectangular shape, or a rhomboid shape, etc.

[0202] refer to Figure 16 The method for manufacturing a display panel according to an embodiment of the present invention may include etching the inorganic encapsulation layer LIL-I (see Figure 15AThis process forms the lower inorganic package pattern LIL. The lower inorganic package layer LIL-I can be dry etched using a second photoresist pattern PR2 as a mask. The portions of the lower inorganic package layer LIL-I not covered by the second photoresist pattern PR2 can be removed, and the portions of the lower inorganic package layer LIL-I that are retained and not etched can become the lower inorganic package pattern LIL.

[0203] Since the second photoresist pattern PR2 is patterned using the second mask MK, and the lower inorganic package layer LIL-I is etched using the second photoresist pattern PR2 as a mask, the lower inorganic package pattern LIL can correspond to the shape of the second light-shielding portion NTA2. In other words, etching the lower inorganic package layer LIL-I to form the lower inorganic package pattern LIL can include forming a lower inorganic package pattern LIL with a circular, rectangular, or rhomboid shape in a planar view.

[0204] Subsequently, a method for manufacturing a display panel according to embodiments of the present invention may include removing the dummy layer (DMP) (see...). Figure 15A The second dummy layer D2 and the third dummy layer D3 in dummy layers D1, D2 and D3 can be removed by wet etching, and the first dummy layer D1 in dummy layers D1, D2 and D3 can be removed by a stripper.

[0205] Subsequently, refer to Figure 17 A method for manufacturing a display panel according to an embodiment of the present invention may include removing a second photoresist pattern PR2 (see...). Figure 16 And form an organic encapsulation film OL that covers the inorganic encapsulation pattern LIL. The organic encapsulation film OL can be formed by coating organic materials via inkjet printing, but the process for forming the organic encapsulation film OL is not limited to this. The organic encapsulation film OL can provide a flat top surface.

[0206] Furthermore, the method for manufacturing a display panel according to embodiments of the present invention may include forming an upper inorganic encapsulation film (UIL) to complete the display panel (DP). Inorganic materials may be deposited to form the upper inorganic encapsulation film (UIL). Therefore, a display panel (DP) comprising a substrate layer (BL), a circuit element layer (DP-CL), a display element layer (DP-OLED), and a thin-film encapsulation layer (TFE) can be formed.

[0207] As described above, each of the emission opening portions according to the embodiments of the present invention can have a shape symmetrical about at least two axes, and correspondingly, each of the lower inorganic encapsulation patterns can have a shape symmetrical about these at least two axes. Because the lower inorganic encapsulation patterns have symmetrical shapes, stress can be prevented from concentrating at specific locations on each of the lower inorganic encapsulation patterns, and the lower inorganic encapsulation patterns can be more robust. Therefore, foreign matter introduced through the separation area between the partition wall and each of the lower inorganic encapsulation patterns in the cross-sectional view, as well as foreign matter introduced into the grooves of the lower inorganic encapsulation patterns, can be reduced or eliminated, and pixel defects (black spots and pixel shrinkage, etc.) of the display panel caused by foreign matter can be reduced or eliminated.

[0208] Although embodiments of the present invention have been described, it should be understood that the present invention is not limited to these embodiments, and those skilled in the art can make various changes and modifications within the spirit and scope of the claimed present invention. Therefore, the technical scope of the present invention is not limited to what is described in the detailed description of the specification, but should be determined by the claims.

Claims

1. A display panel, comprising: basal layer; A pixel defining film is disposed on the substrate layer and has an emission opening portion; A partition wall is disposed on the pixel defining film and has a partition wall opening portion disposed in a region corresponding to the emission opening portion; A light-emitting element includes an anode, an emission pattern, and a cathode in contact with the partition wall, and is disposed in the emission opening portion and the partition wall opening portion; and The lower inorganic encapsulation pattern has grooves spaced apart from the partition wall and the light-emitting element, and is configured to cover the light-emitting element. The emission opening portion has a shape that is symmetrical about at least two axes about the center of the emission opening portion in a plan view.

2. The display panel according to claim 1, wherein, The light-emitting element includes a first light-emitting element, a second light-emitting element, and a third light-emitting element that emit light of different colors from each other, and The emission opening portion includes a first emission opening portion disposed in the region corresponding to the first light-emitting element, a second emission opening portion disposed in the region corresponding to the second light-emitting element, and a third emission opening portion disposed in the region corresponding to the third light-emitting element.

3. The display panel according to claim 2, wherein, At least one of the first to the third emission opening portions has a circular shape in the plan view.

4. The display panel according to claim 2, wherein, At least one of the first to the third emission opening portions is symmetrical about all axes passing through the center of the at least one emission opening portion in the plan view.

5. The display panel according to claim 2, wherein, Each of the first to the third emission opening portions has a circular shape in the plan view.

6. The display panel according to claim 2, wherein, At least one of the first to the third emission opening portions has a rectangular or rhomboid shape in the plan view.

7. The display panel according to claim 2, wherein, At least one of the first to the third emission opening portions has four inner surfaces.

8. The display panel according to claim 2, wherein, Each of the first to the third emission opening portions has a rectangular or rhomboid shape in the plan view.

9. The display panel according to claim 2, wherein, The end of the lower inorganic packaging pattern surrounds the edge of the emission opening portion in the plan view.

10. An electronic device that provides an image, and includes: window; The display panel according to any one of claims 1 to 9 is disposed below the window; as well as A housing is disposed below the display panel and is connected to the window to accommodate the display panel.

Images