Ultrasonic chip, ultrasonic fingerprint module and electronic equipment

CN224611203UActive Publication Date: 2026-08-07SHENZHEN GOODIX TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SHENZHEN GOODIX TECH CO LTD
Filing Date
2025-09-18
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

然而,相关技术中的超声波芯片的制作成本较高,并且超声波芯片与外部电路结构(如电路板)的电连接性能仍有待提升

Benefits of technology

[0038]The ultrasonic chip in this embodiment has several advantages. Firstly, its substrate has a top metal layer that includes at least a target electrode, and a passivation layer that is at least partially disposed above the top metal layer. The passivation layer includes a window portion, the first vertical projection of which faces the target electrode is located on the target electrode. A connecting electrode is at least partially disposed on the passivation layer and forms an electrical connection with the target electrode through the window portion, which includes at least one window. The connecting electrode covers the window portion, enabling a stable electrical connection between the connecting electrode and the target electrode in the top metal layer. This facilitates electrical connection between the target electrode, the connecting electrode, and external circuits during use. Using this structure, the fabrication of the connecting electrode is more convenient, with lower process complexity requirements, effectively reducing the processing cycle of the ultrasonic chip. Compared to bump electrodes in related technologies, it also helps reduce the fabrication cost of the connecting electrode and the ultrasonic chip. Secondly, in the ultrasonic chip of this embodiment, the connecting electrode covers the portion including at least one window... The window portion allows for electrical connection with the target electrode, enabling the size of the connecting electrode to be designed as needed, no longer limited by the size of the target electrode. This makes the fabrication of the ultrasonic chip more convenient and flexible, thereby improving the performance of the connecting electrode and further enhancing the performance of the ultrasonic chip. Furthermore, in the ultrasonic chip of this embodiment, at least one window in the passivation layer can be located within the edge region of the second vertical projection, where the second vertical projection is the vertical projection of the outer contour of the connecting electrode towards the passivation layer. The edge region is the area within 26µm of the edge of the second vertical projection. This allows the edge region of the connecting electrode to be electrically connected to the target electrode through at least one window. With the same number of windows, the number of windows located in the middle region can be reduced, effectively increasing the effective electrical connection area when the connecting electrode is electrically connected to the external circuit, thereby improving the performance and stability of the electrical connection and further enhancing the performance of the ultrasonic chip.

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Abstract

Embodiments of the present application provide an ultrasonic chip, an ultrasonic fingerprint module and an electronic device. The ultrasonic chip comprises: a substrate, a passivation layer and a connecting electrode; the substrate is provided with a plurality of metal layers, and a top layer metal layer in the plurality of metal layers at least comprises a target electrode; the passivation layer is at least partially arranged above the top layer metal layer, and the passivation layer comprises a windowed portion, a first vertical projection of the windowed portion towards the target electrode is located on the target electrode; the connecting electrode is at least partially arranged above the passivation layer and forms an electrical connection with the target electrode through the windowed portion, and the connecting electrode covers the windowed portion; wherein the windowed portion comprises at least one window, and the at least one window is located in an edge region of a second vertical projection, the second vertical projection is a vertical projection of an outer contour of the connecting electrode towards the passivation layer, and the edge region is a region in the second vertical projection within 26 um from an edge of the second vertical projection.
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Description

Technical Field

[0001] This application relates to the field of ultrasonic chip technology, and in particular to an ultrasonic chip, an ultrasonic fingerprint module, and an electronic device. Background Technology

[0002] Currently, there is a demand for thinner and lighter ultrasonic fingerprint modules. One way to improve this is to achieve electrical connection between the ultrasonic chip of the ultrasonic fingerprint module and a circuit board, such as a flexible printed circuit (FPC), using conductive adhesive to bond them together. In related technologies, the ultrasonic fingerprint chip substrate can have multiple metal layers. Additional "bump electrodes" need to be fabricated on the top metal layer. These bump electrodes need to protrude above the substrate surface to ensure that during conductive adhesive bonding, the pressure effectively falls between the gold fingers and bump electrodes on the circuit board, ensuring effective electrical connection between them through the conductive adhesive. However, the manufacturing cost of ultrasonic chips in these technologies is relatively high, and the electrical connection performance between the ultrasonic chip and external circuit structures (such as circuit boards) still needs improvement. Utility Model Content

[0003] This application provides an ultrasonic chip, an ultrasonic fingerprint module, and an electronic device.

[0004] According to a first aspect of the embodiments of this application, an ultrasonic chip is provided, comprising:

[0005] A substrate having multiple metal layers, wherein the top metal layer of the multiple metal layers includes at least a target electrode;

[0006] A passivation layer is at least partially disposed above the top metal layer, and the passivation layer includes a window portion, the first vertical projection of the window portion toward the target electrode being located on the target electrode;

[0007] A connecting electrode is at least partially disposed above the passivation layer and forms an electrical connection with the target electrode through the window portion, wherein the connecting electrode covers the window portion;

[0008] The window portion includes at least one window, and at least one of the windows is located within the edge region of the second vertical projection. The second vertical projection is the vertical projection of the outer contour of the connecting electrode toward the passivation layer, and the edge region is the area within 26 μm of the edge of the second vertical projection.

[0009] In some optional embodiments, the window portion includes N windows, and the connecting electrode forms an electrical connection with the target electrode through the N windows, where N ≥ 2 and is an integer.

[0010] In some optional embodiments, the number of windows located in the edge region of the N windows is greater than the number of windows located in the middle region, wherein the middle region is the entire region surrounded by the edge region in the second vertical projection.

[0011] In some alternative embodiments, all N windows are located within the edge region.

[0012] In some optional embodiments, the N windows include at least P windows located in the edge region and Q windows located in the middle region, wherein the middle region is the entire region surrounded by the edge region in the second vertical projection, and P and Q are both integers, and P≤Q.

[0013] In some optional embodiments, the Q windows are arranged in at least one group of windows along a first direction, and each group of windows includes at least one column of windows arranged along the first direction, and each column of windows includes a plurality of windows arranged along a second direction, which is perpendicular to the first direction.

[0014] In some alternative embodiments, each group of windows includes multiple columns of windows arranged along a first direction.

[0015] In some optional embodiments, the edge region includes two first sub-edge regions spaced apart along a first direction, wherein the two first sub-edge regions are flush with the middle region in a second direction; the number of windows in each window group is greater than the number of windows in each of the first sub-edge regions.

[0016] In some alternative embodiments, each group of windows has at least one column of windows with a number greater than the number of windows in each of the first sub-edge regions.

[0017] In some optional embodiments, the connecting electrode is used to electrically connect to a gold finger including multiple fingers in an external circuit structure, and multiple electrical connection regions are oriented toward the third vertical projection of the passivation layer and overlap with multiple target regions respectively, wherein the multiple electrical connection regions are the electrical connection regions when the connecting electrode is electrically connected to the multiple fingers; wherein the multiple target regions include: along a first direction, the region in the middle region located between the edge region and the adjacent window group, and the region in the middle region located between every two adjacent window groups.

[0018] In some optional embodiments, the edge region includes two second sub-edge regions spaced apart along a second direction, wherein both second sub-edge regions are flush with the middle region in a first direction, the middle region being the entire area surrounded by the edge regions in the second vertical projection, and the second direction being perpendicular to the first direction; along the second direction, in the two second sub-edge regions, the number of windows in the second sub-edge region closer to the substrate edge is less than the number of windows in the second sub-edge region farther from the substrate edge.

[0019] In some alternative embodiments, the window opening satisfies at least one of the following conditions:

[0020] At least one of the said windows has a perimeter greater than or equal to 20 μm;

[0021] The maximum side length of at least one of the aforementioned windows ranges from 5µm to 25µm;

[0022] The shape of the window includes at least one of a rectangle and a rounded rectangle;

[0023] The window section includes a number of windows of 6 or more.

[0024] In some optional embodiments, the ultrasonic chip also satisfies at least one of the following conditions:

[0025] The thickness of the passivation layer is greater than or equal to 1.2 μm;

[0026] The passivation layer comprises a multi-layer structure, and the thickness of the top layer of the passivation layer is greater than 0.5 μm;

[0027] The thickness of the connecting electrode is greater than or equal to 400 nm;

[0028] The size of the connecting electrode is larger than the size of the target electrode;

[0029] The connecting electrode is in contact with each side wall of the window and covers the target electrode inside the window;

[0030] The portion of the connecting electrode located inside the window forms a recessed blind hole relative to the portion of the connecting electrode located outside the window.

[0031] The plurality of metal layers also includes a subtop metal layer located below the top metal layer, the subtop metal layer being equipotentially connected to the top metal layer;

[0032] Along a direction parallel to the substrate, the minimum spacing between the top metal layer and the target signal line is greater than 30 μm, wherein the target signal line is not part of the top metal layer and transmits a different electrical signal from the top metal layer;

[0033] The connecting electrode is used to make an electrical connection with the gold finger in the external circuit structure through a conductive adhesive layer.

[0034] The ultrasonic chip includes multiple connecting electrodes, the top metal layer includes multiple target electrodes, and the passivation layer includes multiple openings. Each connecting electrode is electrically connected to the corresponding target electrode through the corresponding opening.

[0035] In some optional embodiments, a bottom electrode is further disposed on the substrate, and a piezoelectric layer and a top electrode are stacked sequentially above the bottom electrode; the top electrode is used to obtain an excitation signal from an external circuit structure through the target electrode and the connecting electrode, and is used to form an electric field between itself and the bottom electrode after the excitation signal is applied, so as to excite the piezoelectric layer to emit an ultrasonic signal; the bottom electrode is used to receive the ultrasonic detection signal generated between the bottom electrode and the top electrode when the returned ultrasonic signal acts on the piezoelectric layer.

[0036] According to a second aspect of the embodiments of this application, an ultrasonic fingerprint module is provided, which includes: the ultrasonic chip provided in the first aspect above.

[0037] According to a third aspect of the embodiments of this application, an electronic device is provided, which includes: the ultrasonic fingerprint module provided in the second aspect above.

[0038] The ultrasonic chip in this embodiment has several advantages. Firstly, its substrate has a top metal layer that includes at least a target electrode, and a passivation layer that is at least partially disposed above the top metal layer. The passivation layer includes a window portion, the first vertical projection of which faces the target electrode is located on the target electrode. A connecting electrode is at least partially disposed on the passivation layer and forms an electrical connection with the target electrode through the window portion, which includes at least one window. The connecting electrode covers the window portion, enabling a stable electrical connection between the connecting electrode and the target electrode in the top metal layer. This facilitates electrical connection between the target electrode, the connecting electrode, and external circuits during use. Using this structure, the fabrication of the connecting electrode is more convenient, with lower process complexity requirements, effectively reducing the processing cycle of the ultrasonic chip. Compared to bump electrodes in related technologies, it also helps reduce the fabrication cost of the connecting electrode and the ultrasonic chip. Secondly, in the ultrasonic chip of this embodiment, the connecting electrode covers the portion including at least one window... The window portion allows for electrical connection with the target electrode, enabling the size of the connecting electrode to be designed as needed, no longer limited by the size of the target electrode. This makes the fabrication of the ultrasonic chip more convenient and flexible, thereby improving the performance of the connecting electrode and further enhancing the performance of the ultrasonic chip. Furthermore, in the ultrasonic chip of this embodiment, at least one window in the passivation layer can be located within the edge region of the second vertical projection, where the second vertical projection is the vertical projection of the outer contour of the connecting electrode towards the passivation layer. The edge region is the area within 26µm of the edge of the second vertical projection. This allows the edge region of the connecting electrode to be electrically connected to the target electrode through at least one window. With the same number of windows, the number of windows located in the middle region can be reduced, effectively increasing the effective electrical connection area when the connecting electrode is electrically connected to the external circuit, thereby improving the performance and stability of the electrical connection and further enhancing the performance of the ultrasonic chip. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0040] Figure 1 A schematic diagram of an example of an ultrasonic chip in the related art is shown.

[0041] Figure 2 A schematic diagram of an example ultrasonic chip according to an embodiment of this application is shown.

[0042] Figure 3A A schematic diagram of the second vertical projection and window distribution of the connecting electrodes in an embodiment of this application is shown.

[0043] Figure 3B An example of a gold finger is shown. Figure 3A A schematic diagram of the electrical connection of the connecting electrodes corresponding to the second vertical projection in the diagram.

[0044] Figure 4A A schematic diagram of the second vertical projection and window distribution of the connecting electrodes in another example of an embodiment of this application is shown.

[0045] Figure 4B An example of a gold finger is shown. Figure 4A A schematic diagram of the electrical connection of the connecting electrodes corresponding to the second vertical projection in the diagram.

[0046] Figure 5A A schematic diagram of the second vertical projection and window distribution of the connecting electrodes in another example of an embodiment of this application is shown.

[0047] Figure 5B An example of a gold finger is shown. Figure 5A A schematic diagram of the electrical connection of the connecting electrodes corresponding to the second vertical projection in the diagram.

[0048] Figure 6A A schematic diagram of the second vertical projection and window distribution of the connecting electrodes in another example of an embodiment of this application is shown.

[0049] Figure 6B An example of a gold finger is shown. Figure 6A A schematic diagram of the electrical connection of the connecting electrodes corresponding to the second vertical projection in the diagram.

[0050] Figure 7 A partial schematic diagram is shown showing the electrical connection between multiple connecting electrodes of the ultrasonic chip in an embodiment of this application and multiple gold fingers.

[0051] Figure 8A A schematic block diagram of an example ultrasonic fingerprint module according to an embodiment of this application is shown.

[0052] Figure 8B A schematic diagram of an example ultrasonic fingerprint module according to an embodiment of this application is shown.

[0053] Figure 9 A schematic block diagram of an example electronic device according to an embodiment of this application is shown.

[0054] Explanation of reference numerals in the attached figures: 100, ultrasonic chip; 10, substrate; 20, bottom electrode; 30, piezoelectric layer; 40, top electrode; 50, passivation layer; 51, window; 510, window group; 60, connecting electrode; 61, top metal layer; 611, target electrode; 62, second top metal layer; 70, protective layer; 80, second vertical projection; 81, edge region; 811, first sub-edge region; 812, second sub-edge region; 82, middle region; 821, target region; 90, target signal line; 200, ultrasonic fingerprint module; 210, circuit board; 220, gold finger; 230, conductive adhesive layer; 300, electronic device. Detailed Implementation

[0055] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0056] Currently, there is a demand for thinner and lighter ultrasonic fingerprint modules. One way to improve this is to achieve electrical connection between the ultrasonic chip of the ultrasonic fingerprint module and the circuit board (such as a flexible printed circuit board, FPC) using conductive adhesive bonding. In related technologies, the ultrasonic fingerprint chip substrate can have multiple metal layers. An additional "bump electrode" needs to be fabricated on the top metal layer. This bump electrode needs to protrude above the substrate surface to ensure that during conductive adhesive bonding, the pressure effectively falls between the gold fingers and the bump electrode on the circuit board, ensuring effective electrical connection between them through the conductive adhesive. However, the manufacturing cost of the ultrasonic chip in these technologies is relatively high, and the electrical connection performance between the ultrasonic chip and external circuit structures (such as circuit boards) still needs improvement.

[0057] For example, Figure 1 A partial cross-sectional schematic diagram of an ultrasonic chip, as an example of related art, is shown. (e.g.) Figure 1 As shown, the ultrasonic chip 100' may include a substrate 10', on which a bottom electrode 20', a piezoelectric layer 30', a top electrode 40', and a protective layer 70' are sequentially stacked; furthermore, the substrate 10' may also include a passivation layer 50', multiple metal layers, and bump electrodes 60', such as... Figure 1Only two metal layers are shown: a top metal layer 61' and a second-to-top metal layer 62'. More metal layers are possible but not shown here. The top metal layer 61' may include one or more electrodes for signal transmission. A passivation layer 50' is at least partially disposed above the top metal layer 61', exposing the top metal layer 61' through a window. Bump electrodes 60' are fabricated on the electrodes in the exposed top metal layer 61' for use with the gold fingers 220' in the circuit board 210' (e.g., an FPC circuit board) via conductive adhesive 230' (e.g., anisotropic conductive film (ACF conductive film)). Figure 1 As shown, in the related technology, the bump electrode 60' of the ultrasonic chip 100' needs to be fabricated with a passivation layer 50' that extends beyond the ultrasonic chip 100' by a height of H. That is, the thickness of the bump electrode 60' needs to be equal to P + H, where P is the thickness of the passivation layer 50'. This ensures that when the conductive adhesive 220' is pressed, the pressure can effectively fall between the gold fingers 210' and the bump electrode 60' in the circuit board 200', ensuring effective electrical connection between the gold fingers 220' and the bump electrode 60' through the conductive adhesive 230'. Furthermore, in the related technology, there is a gap between the bump electrode 60' of the ultrasonic chip 100' and the opening edge of the passivation layer 50', such as... Figure 1 As shown, the window size of the passivation layer 50' is a, while the size of the bump electrode 60' is c, and the distance between the bump electrode 60' and the edge of the window of the passivation layer 50' is b. The size of the bump electrode 60' is obviously smaller than the window size of the passivation layer 50' and the size of a single electrode in the top metal layer 61'.

[0058] It should be noted that the above combination Figure 1 The related technologies mentioned above are not necessarily existing technologies. Figure 1 The ultrasonic chip 100' in the related technology shown has at least the following problems:

[0059] Problem 1: Long processing cycle and high manufacturing cost. Taking the ultrasonic chip 100' in the above-mentioned related technologies as an example, which uses CMOS (Complementary Metal Oxide Semiconductor) chip manufacturing process, the bump electrode 60' in the ultrasonic chip 100' is incompatible with the CMOS chip manufacturing process. Therefore, in the manufacturing process of the ultrasonic chip 100', a portion needs to be manufactured using the CMOS chip manufacturing process in one factory first, and then the bump electrode 60' needs to be manufactured in another factory. Such a processing of the ultrasonic chip 100' is cumbersome, has a long processing cycle, and has a high manufacturing cost.

[0060] Question 2: The small bonding area makes it difficult to meet the requirements of electrical connection performance. For example... Figure 1 As can be seen from the content, in the ultrasonic chip 100' of the related technology, the size of the bump electrode 60' is smaller than the window size of the passivation layer 50', and it must also be smaller than the size of a single electrode in the top metal layer 61'. When the bump electrode 60' is electrically connected to the gold finger 210' through the conductive adhesive lamination process, it is usually desirable to have a larger lamination area. Therefore, it can be seen that, under the same size of a single electrode in the top metal layer 61', the size of the bump electrode 60' manufactured by the ultrasonic chip 100' in the related technology is too small, making it difficult to meet the requirements of electrical connection performance.

[0061] Question 3: Material costs are too high. Figure 1 As can be seen from the content, the bump electrode 60' needs to be made with a passivation layer 50' that extends beyond the ultrasonic chip 100' by a height of H. That is, the thickness of the bump electrode 60' is equal to P+H, where P is the thickness of the passivation layer 50'. Therefore, the bump electrode 60' will inevitably use more material in the thickness direction. Under the condition that other dimensions are fixed (e.g., the length and width are fixed), the material cost of the bump electrode 60' will be relatively high.

[0062] It is evident that the manufacturing cost of ultrasonic chips in related technologies is relatively high, and the electrical connection performance between ultrasonic chips and external circuit structures (such as FPC circuit boards) still needs to be improved.

[0063] It should be understood that the embodiments of this application provide some technical solutions that differ from related technologies, which can improve the above-mentioned... Figure 1 At least some of the problems existing in the process can be effectively addressed to reduce the manufacturing cost of ultrasonic chips and improve the electrical connection performance between ultrasonic chips and external circuits.

[0064] The specific implementation of the technical solutions of the embodiments of this application is described below with reference to the accompanying drawings. It should be noted that, for ease of illustration, the structures in the various drawings are not necessarily drawn to scale. The various drawings are not intended to limit the embodiments of this application.

[0065] According to a first aspect of the embodiments of this application, an ultrasonic chip 100 is provided. (Refer to...) Figure 2 , Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6BAs shown, the ultrasonic chip 100 may include: a substrate 10, a passivation layer 50, and a connecting electrode 60; the substrate 10 is provided with a plurality of metal layers, the top metal layer 61 of which includes at least a target electrode 611; the passivation layer 50 is at least partially disposed above the top metal layer 61, and the passivation layer 50 includes a window portion, the first vertical projection of the window portion toward the target electrode 611 being located on the target electrode 611; the connecting electrode 60 is at least partially disposed above the passivation layer 50, and forms an electrical connection with the target electrode 611 through the window portion, and the connecting electrode 60 covers the window portion; wherein, the window portion includes at least one window 51, and at least one window 51 is located within the edge region 81 of the second vertical projection 80, the second vertical projection 80 being a vertical projection of the outer contour of the connecting electrode 60 toward the passivation layer 50, and the edge region 81 being a region within 26 μm of the edge of the second vertical projection 80.

[0066] Based on this, the ultrasonic chip 100 in this embodiment of the application, on the one hand, has a top metal layer 61 of its substrate 10 that includes at least a target electrode 611, and a passivation layer 50 that is at least partially disposed above the top metal layer 61, and the passivation layer 50 includes a window portion, the first vertical projection of the window portion toward the target electrode 611 being located on the target electrode 611, and a connecting electrode 60 that is at least partially disposed on the passivation layer 50, and forms an electrical connection with the target electrode 611 through the window portion including at least one window 51, and the connecting electrode 60 covers the window portion, thereby enabling the connecting electrode 60 to achieve a stable electrical connection with the target electrode 611 of the top metal layer 61, so that when the connecting electrode 60 is used, it can realize the electrical connection between the target electrode 611, the connecting electrode 60 and the external circuit structure (e.g., circuit board 210 (e.g., FPC circuit board)). With this structure in the embodiment of the application, the fabrication of the connecting electrode 60 is more convenient, the process complexity requirement is lower, and the processing cycle of the ultrasonic chip 100 can be effectively reduced. Moreover, compared with the bump electrode in the related technology (e.g., which can be combined with...), it is more efficient and efficient. Figure 1(This explanation is provided for the intended meaning.) It also helps reduce the manufacturing cost of the connecting electrode 60 and the ultrasonic chip 100. On the other hand, since the ultrasonic chip 100 in this embodiment uses the connecting electrode 60 to cover the window portion including at least one opening 51 to form an electrical connection with the target electrode 611, the size of the connecting electrode 60 can be designed as needed, no longer limited by the size of the target electrode 611. This makes the manufacturing of the ultrasonic chip 100 more convenient and flexible, thereby improving the performance of the connecting electrode 60. For example, in some cases, the size of the connecting electrode 60 can be made larger as needed to increase the pressing area when the connecting electrode 60 and the gold fingers 220 of the external circuit structure (such as the circuit board 210) are electrically connected through the conductive adhesive layer 230, thereby improving the electrical connection effect and further enhancing the performance of the ultrasonic chip 100. In addition to the performance of 0, in the ultrasonic chip 100 of the present application embodiment, at least one window 51 of the window portion of the passivation layer 50 can be located within the edge region 81 of the second vertical projection 80, and the second vertical projection 80 is the vertical projection of the outer contour of the connecting electrode 60 toward the passivation layer 50. The edge region 81 is the region within 26um of the edge of the second vertical projection 80. This allows the edge region of the connecting electrode 60 to be electrically connected to the target electrode 611 through at least one window 51. With the same number of windows, the number of windows 51 located in the middle region can be reduced. This can effectively increase the effective electrical connection area when the connecting electrode 60 is electrically connected to the external circuit structure (including but not limited to the FPC circuit board), thereby improving the performance and stability of the electrical connection between the two, and further improving the performance of the ultrasonic chip 100.

[0067] Optionally, in this embodiment, the ultrasonic chip 100 can be fabricated using CMOS chip manufacturing technology. Optionally, the substrate 10 can be a silicon substrate, or other types of substrates, as long as they meet the requirements.

[0068] In this embodiment, the substrate 10 may have multiple metal layers, which can be embedded in the substrate 10. These multiple metal layers can be used for the same or different functions. This embodiment does not specifically limit the number of metal layers; for example, in some examples, there can be five metal layers, sequentially designated as M5, M4, M3, M2, and M1 from the direction closest to the passivation layer 50 to the direction furthest from the passivation layer 50. For example, as... Figure 2 The example shown illustrates that there can be at least two metal layers among a plurality of metal layers, namely a top metal layer 61 and a second-to-top metal layer 62.

[0069] The top metal layer 61 can be exposed by a window portion of the passivation layer 50, and the window portion may include at least one window 51. Optionally, the top metal layer 61 may include one or more electrodes, and one or more of these electrodes may be target electrodes 611. The electrodes in the top metal layer 61 can be used for the transmission of independent signals, and each electrode can be used for the transmission of an independent signal. For example, the independent signal may include, but is not limited to, at least one of power supply signals, excitation signals (or drive signals), control signals, etc.

[0070] In some alternative embodiments, refer to Figure 2 As shown, a bottom electrode 20 is also disposed on the substrate 10, and a piezoelectric layer 30 and a top electrode 40 are stacked on top of the bottom electrode 20 in sequence. The top electrode 40 is used to obtain an excitation signal from an external circuit structure through the target electrode 611 and the connecting electrode 60, and is used to form an electric field between the bottom electrode 20 after the excitation signal is applied, so as to excite the piezoelectric layer 30 to emit ultrasonic signals. The bottom electrode 20 is used to receive the ultrasonic detection signal generated between the bottom electrode 20 and the top electrode 40 when the returned ultrasonic signal acts on the piezoelectric layer 30.

[0071] In this embodiment, the bottom electrode 20, piezoelectric layer 30, and top electrode 40 can form a piezoelectric transducer module. This module is disposed on the substrate 10, and the top electrode 40 is electrically connected to the connecting electrode 60 via a target electrode 611 in the top metal layer 61. The connecting electrode 60 can be electrically connected to an external circuit structure. Optionally, the external circuit structure can be a circuit board 210, such as an FPC circuit board. Alternatively, the external circuit structure can be other circuit structures that need to be electrically connected to the connecting electrode 60. For example, the connecting electrode 60 can be electrically connected to the circuit board 210 via gold fingers 220. The circuit board 210 can acquire an excitation signal (e.g., generated by a signal source on the circuit board 210, or acquired from other signal sources connected to the circuit board 210) to output an excitation signal to the connecting electrode 60. Optionally, the excitation signal can include, but is not limited to, pulse signals, AC signals, etc. Therefore, after the connecting electrode 60 can be electrically connected to the external circuit structure, the top electrode 40 can obtain an excitation signal from the external circuit structure, thereby being excited to form an electric field with the bottom electrode 20. The piezoelectric layer 30 emits an ultrasonic signal based on the piezoelectric effect. The returned ultrasonic signal acts on the piezoelectric layer 30, which converts the returned ultrasonic signal based on the inverse piezoelectric effect, forming an ultrasonic detection signal in the form of an electrical signal between the bottom electrode 20 and the top electrode 40. Optionally, the ultrasonic detection signal can be used to generate an ultrasonic image, which can be used for ultrasonic feature detection. Taking the ultrasonic chip 100 as an ultrasonic fingerprint chip as an example, the ultrasonic detection signal can be used to generate an ultrasonic fingerprint image and for ultrasonic fingerprint feature detection. Optionally, the process of generating an ultrasonic fingerprint image can be implemented by the processing circuit in the ultrasonic chip 100, or it can be sent to an external processing unit (such as the processing unit in an electronic device in which the ultrasonic chip 100 is installed).

[0072] It should be understood that the ultrasonic chip 100 with the substrate 10 having the bottom electrode 20, piezoelectric layer 30 and top electrode 40 as described in the embodiments of this application can enable the ultrasonic chip 100 to be effectively used for ultrasonic detection, so that the ultrasonic chip 100 can be effectively applied.

[0073] Optionally, the substrate 10 may include a first region and a second region, with no overlap between the first region and the second region. Multiple metal layers may be located in the first region, and the bottom electrode 20 may be located in the second region.

[0074] In some alternative embodiments, refer to Figure 2As shown, the top electrode 40 is covered with a protective layer 70. The protective layer 70 can be used to protect the top electrode 40 to at least ensure its performance, thereby improving the performance of the ultrasonic chip 100. Optionally, the protective layer 70 can protect all layers of the covered ultrasonic chip 100; it can be an insulating layer that provides electrical insulation while also isolating it from the influence of external water, oxygen, and other adverse environmental factors, ensuring that the ultrasonic chip 100 can operate normally and effectively for a long period. Optionally, referring to... Figure 2 As shown, the protective layer 70 can also cover the piezoelectric layer 30 to protect the piezoelectric layer 30.

[0075] In some alternative embodiments, refer to Figure 2 As shown, the multiple metal layers also include a sub-top metal layer 62 located below the top metal layer 61, and the sub-top metal layer 62 is equipotentially connected to the top metal layer 61.

[0076] In this embodiment, the second-to-top metal layer 62 can support the top metal layer 61, and the equipotential connection between the second-to-top metal layer 62 and the top metal layer 61 can avoid adverse effects on the signal transmission function of each electrode (including the target electrode 611) of the top metal layer 61.

[0077] In some alternative embodiments, refer to Figure 2 As shown, the substrate 10 is also provided with a target signal line 90. Along the direction parallel to the substrate 10, the minimum distance d between the top metal layer 61 and the target signal line 90 is greater than 30 μm. The target signal line 90 is not part of the top metal layer 61 and transmits a different electrical signal than the top metal layer 61.

[0078] The signal transmitted by the target signal line 90 can be set according to the actual needs of the chip. Each electrode of the top metal layer 61 (including the target electrode 611) can transmit different independent signals. Therefore, by setting the minimum distance between the target signal line 90, which transmits different electrical signals from the top metal layer 61 (including the target electrode 611), and the top metal layer 61, it is possible to achieve clearance between the top metal layer 61 and the target signal line 90, reduce interference when the signals transmitted by the top metal layer 61 and the target signal line 90 are transmitted, and thus improve the performance of the ultrasonic chip 100.

[0079] In the embodiments of this application, reference is made to Figure 2As shown, a passivation layer 50 is disposed on the substrate 10, at least partially above the top metal layer 61. The passivation layer 50 includes a window portion, the first vertical projection of which faces the target electrode 611 and is located on the target electrode 611. The window portion may include at least one window 51. The passivation layer 50 can serve to support the connection electrode 60. Furthermore, when the passivation layer 50 is pressed together with the conductive adhesive layer 230 (such as ACF conductive film) to achieve electrical connection between the connection electrode 60 and the gold finger 220 in the circuit board 210, it can also simultaneously prevent the conductive adhesive layer 230 from causing pressure damage to the chip during the pressing process.

[0080] The passivation layer 50 can be an inorganic or organic passivation layer, and the specific material can be selected as needed. For example, the inorganic passivation layer can be at least one of silicon dioxide (SiO2) layer, silicon nitride (Si3N4) layer, and aluminum oxide (Al2O3) layer, or a stack of at least two. The organic passivation layer can be at least one of polyimide (PI) layer and epoxy resin material layer, or a stack of at least two. Each window 51 in the window portion of the passivation layer 50 can be prepared on the passivation layer 50 using any windowing process during preparation, and there is no limitation here.

[0081] In some alternative embodiments, refer to Figure 2 As shown, the thickness P of the passivation layer 50 is greater than or equal to 1.2 μm. This thickness range ensures that the passivation layer 50 is not too thin, effectively protecting the underlying structure from damage and thus guaranteeing the electrical performance and reliability of the ultrasonic chip 100. For example, within the aforementioned range, the thickness P of the passivation layer 50 can be selected from, but is not limited to, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, 2.0 μm, etc.

[0082] In some optional embodiments, the passivation layer 50 may include a multilayer structure, and the thickness of the top layer of the passivation layer 50 is greater than 0.5 μm. Such a structure can effectively improve the reliability of the passivation layer 50, thereby ensuring the electrical performance and reliability of the ultrasonic chip 100. For example, within the aforementioned range, the thickness of the top layer of the passivation layer 50 can be selected from, but is not limited to, 0.5 μm, 0.55 μm, 0.6 μm, 0.65 μm, 0.7 μm, 0.75 μm, 0.8 μm, 0.85 μm, 0.9 μm, 0.95 μm, 1.0 μm, etc.

[0083] For example, in some examples, the passivation layer 50 may include a two-layer structure, wherein the top layer may be a Si3N4 layer and the bottom layer may be a SiO2 layer, and the thickness of the Si3N4 layer may be greater than 0.5 μm. In addition, the total thickness of the Si3N4 layer and the SiO2 layer may be greater than or equal to 1.2 μm.

[0084] The window portion in this embodiment may include one or more windows 51. The connecting electrode 60 can form an electrical connection with the target electrode 611 exposed by the window 51 through one or more windows 51 of the window portion, and the connecting electrode 60 can cover each window 51 of the window portion. The window 51 in this embodiment may also be referred to as a via.

[0085] In some alternative embodiments, refer to Figure 2 As shown, the connection electrode 60 in this embodiment can be used to electrically connect to the gold finger 220 in an external circuit structure (such as a circuit board 210) via the conductive adhesive layer 230. Optionally, the external circuit structure can be a circuit board 210. The circuit board 210 can be a flexible printed circuit (FPC) or a printed circuit board (PCB). For example, it can be combined with... Figure 2 As shown, this example illustrates the situation before the gold finger 220 and the connecting electrode 60 are electrically connected through the conductive adhesive layer 230. It can also be combined with... Figure 8B As shown, the case of the gold finger 220 being electrically connected to the connecting electrode 60 via the conductive adhesive layer 230 is illustrated.

[0086] Optionally, combined Figure 8B As shown, after the connection electrode 60 of the ultrasonic chip 100 and the conductive adhesive layer 230 are electrically connected to the gold finger 220 in the external circuit structure (such as the circuit board 210), if the ultrasonic chip 100 is used for ultrasonic fingerprinting, the ultrasonic chip 100 and the external circuit structure can form an ultrasonic fingerprint module 200.

[0087] It should be understood that the connecting electrode 60 is electrically connected to the gold finger 220 in the external circuit structure (such as the circuit board 210) through the conductive adhesive layer 230, which can make the module formed by the ultrasonic chip 100 and the external circuit structure (such as the ultrasonic fingerprint module 200) thinner and lighter.

[0088] It should also be understood that, since the window 51 is located below the gold finger 220 when the connecting electrode 60 is electrically connected to the gold finger 220, the conductive adhesive layer 230 (such as ACF conductive film) at the window 51 position will experience local collapse. This local collapse will weaken the pressing force of the gold finger 220 on the conductive adhesive layer 230, thereby reducing the electrical connection effect of the conductive adhesive layer 230 pressing. Therefore, in the scenario where the ultrasonic chip 100 is electrically connected to the conductive adhesive layer 230 in this embodiment, at least one window 51 of the window portion of the passivation layer 50 can be located within the edge region 81 of the second vertical projection 80. The second vertical projection 80 is the vertical projection of the outer contour of the connecting electrode 60 toward the passivation layer 50, and the edge region 81 is the region within 26 μm of the edge of the second vertical projection 80. This allows the edge region of the connecting electrode 60 to be electrically connected to the target electrode 611 through at least one window 51. With the same number of windows, the number of windows 51 located in the middle region can be reduced. This can effectively increase the effective electrical connection area when the connecting electrode 60 and the gold finger 220 in the external circuit structure are electrically connected through the conductive adhesive layer 230, reduce the adverse effects of local collapse of the conductive adhesive layer 230, and improve the electrical connection effect of the conductive adhesive layer 230 pressing. This improves the performance and stability of the electrical connection between the connecting electrode 60 and the gold finger 220 in the external circuit structure, and further improves the performance of the ultrasonic chip 100.

[0089] The reason why the opening 51 is located in the edge region of the connecting electrode 60, that is, the area corresponding to the edge region 81 of the second vertical projection 80 on the connecting electrode 60, can increase the effective electrical connection area when the connecting electrode 60 and the gold finger 220 are electrically connected through the conductive adhesive layer 230, is that the gold finger 220 inevitably forms rounded corners at the finger edges during manufacturing. Therefore, by setting the opening 51 in the edge region of the connecting electrode 60, when the gold finger 220 and the connecting electrode 60 are pressed together through the conductive adhesive layer 230 to form an electrical connection, at least part of the rounded corners of the finger edges of the gold finger 220 can avoid the conductivity caused by the opening 51 in the edge region. The partial collapse of the adhesive layer 230 during pressing allows the gold fingers 220 in the external circuit structure (such as the circuit board 210) to be pressed more into locations without partial collapse, such as the middle area with fewer openings 51, thus increasing the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected through the conductive adhesive layer 230. This also reduces the adverse effects of partial collapse of the conductive adhesive layer 230, which is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 pressing and improving the performance and stability of the electrical connection between the connecting electrode 60 and the gold fingers 220 in the external circuit structure (such as the circuit board 210).

[0090] The specific shape of the window 51 is not limited in this application embodiment, and the window 51 can be opened into any suitable regular shape as needed. For example, in some optional embodiments, the shape of the window 51 includes at least one of a rectangle and a rounded rectangle. The rectangle here can include a square. For example, as shown... Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6B Examples of rectangular openings 51 are shown. Rectangular and rounded rectangular openings 51 are more compatible with chip manufacturing and easier to produce.

[0091] The specific size of the window 51 is not limited in the embodiments of this application, and a suitable size can be selected as needed. In some optional embodiments, the perimeter of at least one window 51 in the window portion is greater than or equal to 20 μm. Optionally, the perimeter of each window 51 in the window portion is greater than or equal to 20 μm.

[0092] Based on this, in this embodiment of the application, the perimeter of the window portion 51 is set to be greater than or equal to 20 μm, which enables the connecting electrode 60 to achieve a more stable and reliable electrical connection with the target electrode 611, ensuring that the current-carrying interface of the window portion 51 is large and long enough, thereby improving the electrical connection performance between the connecting electrode 60 and the target electrode 611.

[0093] Optionally, the perimeter of the window 51 is greater than or equal to 20 μm and less than or equal to 100 μm. It should be understood that the window 51 within this optional perimeter range is neither too small nor too large, which satisfies the requirement that the connecting electrode 60 can achieve a more stable and reliable electrical connection with the target electrode 611, and can also be well set within the edge region 81 of the second vertical projection 80. Furthermore, since the window 51 is not too large, it will not cause excessive local collapse of the conductive adhesive layer 230. This allows the gold fingers 220 in the external circuit structure (such as the circuit board 210) to be pressed into more positions without local collapse when there are the same number of windows. This increases the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected through the conductive adhesive layer 230, and can reduce the adverse effects of local collapse of the conductive adhesive layer 230. This is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 pressing, and improving the performance and stability of the electrical connection between the connecting electrode 60 and the gold fingers 220 in the external circuit structure.

[0094] For example, within the above range (i.e., 20um to 100um), the perimeter of the window 51 can be selected from, but is not limited to, 20um, 25um, 30um, 35um, 40um, 45um, 50um, 55um, 60um, 65um, 70um, 75um, 80um, 85um, 90um, 95um, 100um, etc.

[0095] In some optional embodiments, the maximum side length of at least one window 51 in the window portion ranges from 5µm to 25µm. Optionally, the maximum side length of each window 51 in the window portion ranges from 5µm to 25µm.

[0096] For example, for example Figure 2 As shown, the dimension of each window 51 in the window opening section is Q; refer to Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6B As shown, window 51 can be a square, then Q can be the side length of the square (i.e., the maximum side length). Figure 2 The range of Q is 5um to 25um (it can be understood that if the side length of a square is between 5um and 25um, then its perimeter ranges from 20um to 100um as mentioned above). For example, if the window 51 is a non-square rectangle, then the maximum side length of the window 51 is the long side of the rectangle, and the length of the long side ranges from 5um to 25um.

[0097] It should be understood that the selectable window 51 is neither too small nor too large. It satisfies the requirement that the connecting electrode 60 can achieve a more stable and reliable electrical connection with the target electrode 611, and is also well positioned within the edge region 81 of the second vertical projection 80. Furthermore, since the window 51 is not too large, it will not cause excessive local collapse of the conductive adhesive layer 230. This allows the gold fingers 220 in the external circuit structure (such as the circuit board 210) to be pressed into more positions without local collapse, thus increasing the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected through the conductive adhesive layer 230. It can also reduce the adverse effects of local collapse of the conductive adhesive layer 230, which is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 and improving the performance and stability of the electrical connection between the connecting electrode 60 and the gold fingers 220 in the external circuit structure.

[0098] The number of windows 51 included in the windowed portion is not limited in the embodiments of this application, and an appropriate number of windows 51 can be set as needed. For example, in some optional embodiments, the number of windows 51 included in the windowed portion is greater than or equal to 6, to ensure that the electrical connection formed between the connecting electrode 60 and the target electrode 611 through the windows 51 has sufficient current flow capacity.

[0099] For example, assuming a square window 51 (via) with a perimeter of 20um can carry a current of 10mA, then when the window section includes 6 or more identical windows 51, it can carry at least 60mA of current to meet the current flow requirements. Of course, the number of windows 51 can be flexibly adjusted according to the application requirements.

[0100] For example, within the above range, the number of windows 51 can be selected from, but is not limited to, 6, 8, 10, 16, 20, 30, 40, 50, etc.

[0101] In some alternative embodiments, refer to Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6B As shown, the windowed section includes N windows, and the connecting electrode 60 is electrically connected to the target electrode 611 through the N windows 51, where N ≥ 2 and is an integer. That is, as... Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6B The examples all show that the window portion includes multiple windows 51, and the connecting electrode 60 forms an electrical connection with the target electrode 611 through the multiple windows 51.

[0102] It should be understood that in the above optional structure, the connecting electrode 60 forms an electrical connection with the target electrode 611 through multiple openings 51, so that the connecting electrode 60 can achieve a more stable and reliable electrical connection with the target electrode 611 and ensure sufficient current flow capacity.

[0103] Optionally, the N windows 51 can be spaced out. Optionally, as mentioned above, N can be greater than or equal to 6 to ensure sufficient current flow capacity.

[0104] It should be understood that, compared to Figure 1 The bump electrode 60' shown in the related art, and the connecting electrode 60 in this embodiment can reduce processing cycle, manufacturing cost, and material cost, thereby improving the... Figure 1 The technical solution shown has "Problem 1" and "Problem 3". This is because the thickness of the connecting electrode 60 in this embodiment is... Figure 2 H in, without needing to be Figure 1 In the P+H (where P is the thickness of the passivation layer), the thickness of the connecting electrode 60 is relatively low, and the connecting electrode 60 is electrically connected to the target electrode 611 of the top metal layer 61 through at least one opening 51 of the opening portion. Furthermore, the morphology and size of the opening portion can be well compatible with chip manufacturing processes such as CMOS processes. Therefore, the connecting electrode 60 does not need to be like... Figure 1 The bump electrode 60' shown is the same as that shown, and is manufactured in another factory. This effectively reduces the complexity of the ultrasonic chip 100 manufacturing process, reduces the processing cycle and manufacturing cost, and, given that other dimensions are constant (e.g., length and width are constant), the connecting electrode 60 in this embodiment is significantly more efficient than... Figure 1 The bump electrode 60' shown can use less material in the thickness direction, thus resulting in relatively low material costs.

[0105] In this embodiment, the connecting electrode 60 can be made of any suitable metal material, or it can be made of other types of conductive materials.

[0106] The thickness of the connecting electrode 60 is not limited in this embodiment; a suitable thickness can be selected. In some optional embodiments, refer to... Figure 2 As shown, the thickness H of the connecting electrode 60 is greater than or equal to 400 nm. Figure 2 As shown, the thickness H of the connecting electrode 60 can be calculated as the thickness of the portion of the connecting electrode 60 located on the upper surface of the passivation layer 50.

[0107] It should be understood that the aforementioned connecting electrode 60 with a thickness greater than or equal to 400 μm is not too thin, which ensures the strength of the connecting electrode 60 and reduces the probability of damage when the connecting electrode 60 is electrically connected to an external circuit structure. For example, when the connecting electrode 60 is electrically connected to the gold finger 220 in an external circuit structure (such as an FPC circuit board) through a conductive adhesive layer 230 (such as an ACF conductive film), a connecting electrode 60 with a thickness greater than or equal to 400 nm can effectively avoid damage caused by the pressing force during the pressing of the conductive adhesive layer 230.

[0108] For example, within the aforementioned thickness range, the thickness H of the connecting electrode 60 can be selected from, but is not limited to, 400um, 450um, 500um, 550um, 600um, 650um, 700um, 750um, 800um, 850um, 900um, 950um, 1000um, etc.

[0109] In some alternative embodiments, refer to Figure 2 As shown, the size of the connecting electrode 60 can be larger than the size of the target electrode 611.

[0110] The previous text introduced Figure 1 Regarding the problem 2 of the related technology shown, the ultrasonic chip 100 in the embodiment of this application, since the connecting electrode 60 covers the window portion including at least one opening 51 to form an electrical connection with the target electrode 611 through the opening portion, allows the size of the connecting electrode 60 to be designed as needed, and is no longer limited by the size of the target electrode 611, making the fabrication of the ultrasonic chip 100 more convenient and flexible, and improving the performance of the connecting electrode 60.

[0111] Therefore, compared to Figure 1 The size of the bump electrode 60' shown is smaller than the opening size of the passivation layer 50', and also necessarily smaller than the size of a single electrode in the top metal layer 61'. In this embodiment, the size of the connecting electrode 60 can be made larger, and the size of the connecting electrode 60 can be larger than the size of the target electrode 611, so as to increase the pressing area when the connecting electrode 60 and the gold fingers 220 of the external circuit structure (such as the circuit board 210) are electrically connected through the conductive adhesive layer 230, thereby improving the electrical connection effect and better meeting the electrical connection performance requirements. Therefore, the above-mentioned technical solution of this embodiment can effectively improve... Figure 1 Problem 2 in the related technologies shown.

[0112] It is understood that the size of the connecting electrode 60 can be calculated by the area of ​​the vertical projection (i.e., the second vertical projection 80) of the outer contour of the connecting electrode 60 toward the passivation layer 50; similarly, the size of the target electrode 611 can be calculated by the area of ​​the vertical projection of the outer contour of the target electrode 611 toward the passivation layer 50. For example, assuming that both the connecting electrode 60 and the target electrode 611 are square, then as shown in Figure 2, the size of the connecting electrode 60 can be denoted as A1*A1, and the size of the target electrode 611 can be denoted as A2*A2, where A1*A1 can be greater than A2*A2.

[0113] In some alternative embodiments, refer to Figure 2 As shown, the connecting electrode 60 is in contact with each sidewall of the window 51 and covers the target electrode 611 within the window 51. With this structure, the connecting electrode 60 can stably form an electrical connection with the target electrode 611 of the top metal layer 61 through the window 51, and such a connecting electrode 60 is relatively easy to manufacture.

[0114] In some alternative embodiments, refer to Figure 2As shown, the portion of the connecting electrode 60 located inside the window 51 forms a recessed blind hole relative to the portion of the connecting electrode 60 located outside the window 51.

[0115] The above-mentioned optional features are those of the ultrasonic chip 100 in the embodiments of this application, which are different from... Figure 1 One structural feature of the bump electrode 60' in the related technology is that, because the connecting electrode 60 covers the window 51 of the opening portion, the connecting electrode 60 can fill the opening 51 and electrically connect with the target electrode 611, and also forms a recessed blind hole structure. This structure allows the connecting electrode 60 to stably form an electrical connection with the target electrode 611 of the top metal layer 61 through the opening 51, and such a connecting electrode 60 is relatively easy to manufacture.

[0116] In some optional embodiments, the ultrasonic chip 100 may include a single connection electrode 60, and among the one or more electrodes included in the top metal layer 61, only one electrode may be the target electrode 611. The passivation layer 50 may include only one window, through which all connection electrodes 60 are electrically connected to the corresponding target electrode 611. This improves the performance of electrical connection between a single electrode in the top metal layer 61 and the external circuit structure by using a single connection electrode 60 and a single window.

[0117] In some alternative embodiments, refer to Figure 7 As shown, the ultrasonic chip 100 includes multiple connecting electrodes 60, the top metal layer 61 includes multiple target electrodes 611, and the passivation layer 50 includes multiple openings. Each connecting electrode 60 is electrically connected to its corresponding target electrode 611 through a corresponding opening. In this way, the performance of electrical connection between the multiple electrodes in the top metal layer 61 and the external circuit structure can be improved by using multiple connecting electrodes 60 and multiple openings.

[0118] Optionally, each electrode included in the top metal layer 61 can be a target electrode 611. In this case, the performance of each electrode of the top metal layer 61 in electrically connecting with an external circuit structure (such as a circuit board 210) can be improved by using multiple connecting electrodes 60 and multiple openings (e.g., through a conductive adhesive layer 230).

[0119] For example, refer to Figure 7 As shown, the multiple connection electrodes 60 of the ultrasonic chip 100 can be electrically connected to multiple gold fingers 220 in an external circuit structure (such as circuit board 210). Optionally, the multiple gold fingers 220 may include the same or different numbers of fingers. Optionally, the multiple connection electrodes 60 may have different sizes. Figure 7The example shown illustrates multiple gold fingers 220 (such as gold finger 220A, gold finger 220B, and gold finger 220C) including different numbers of fingers. Among the multiple gold fingers 220, gold finger 220A may include a single finger (i.e., a single finger), gold finger 220A may include two fingers (i.e., two fingers), gold finger 220A may include three fingers (i.e., three fingers), or other gold fingers 220 may include more fingers; there is no unique limitation here.

[0120] Optionally, such as Figure 7 As shown, the effective working area of ​​the ultrasonic chip 100 can be the active area (AA) of ultrasonic detection, for example, it can correspond to the area where the bottom electrode 20 is located. Optionally, if the ultrasonic chip 100 is applied to the ultrasonic fingerprint module 200, the effective working area can be the fingerprint recognition area.

[0121] In this embodiment of the application, in the window portion, at least one window 51 is located within the edge region 81 of the second vertical projection 80. The second vertical projection 80 is a vertical projection of the outer contour of the connecting electrode 60 toward the passivation layer 50, and the edge region 81 is the region within 26 μm of the edge of the second vertical projection 80.

[0122] like Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, a schematic diagram of the second vertical projection 80 of several example connection electrodes 60 is illustrated, which is shown as a rectangular solid line, wherein, Figure 3A , Figure 4A , Figure 5A , Figure 6A The image shows the edge region 81 of the second vertical projection 80. It is evident that the edge region 81 is a rectangular ring, and it is the region within 26 μm of the edge of the second vertical projection 80. For example, as... Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the window opening includes multiple windows 51, and at least one window 51 may be located within the edge region 81. Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the second vertical projection 80 also includes a central region 82, which is the entire region in the second vertical projection 80 surrounded by the edge region 81. Corresponding to Figure 3A , Figure 4A , Figure 5A , Figure 6AIn the example, the middle area 82 is the area enclosed by the rectangular dashed line, while the edge area 81 is the area between the rectangular dashed line and the rectangular solid line.

[0123] For ease of explanation of the embodiments below, as Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the edge region 81 also includes two first sub-edge regions 811 spaced apart along the first direction F1, such as... Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the first sub-edge region 811A on the left and the first sub-edge region 811B on the right can be represented respectively. As shown in the figure, the first sub-edge region 811 is represented by a rectangle enclosed by two double-dotted lines, one dashed line, and one solid line. Both first sub-edge regions 811 are flush with the middle region 82 in the second direction F2, as shown... Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the lengths of the two first sub-edge regions 811 are both flush with and equal to the length of the middle region 82; as Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the edge region 81 also includes two second sub-edge regions 812 spaced apart along the second direction F2, such as... Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the upper second sub-edge region 812A and the lower second sub-edge region 812B are respectively. The second sub-edge region 812 is shown as a rectangle enclosed by two double-dotted lines, one dashed line, and one solid line. Both second sub-edge regions 812 are flush with the middle region 82 in the first direction F1. Figure 3A , Figure 4A , Figure 5A , Figure 6A As shown, the lengths of the two second sub-edge regions 812 are both flush with and equal to the width of the middle region 82.

[0124] like Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B , Figure 6A and Figure 6B As shown, the windowed section includes N windows 51, and the connecting electrode 60 can form an electrical connection with the target electrode 611 through the N windows, where N ≥ 2 and is an integer.

[0125] In some alternative embodiments, refer to Figure 3A As shown, the number of windows 51 located in the edge region 81 among the N windows 51 is greater than the number of windows 51 located in the middle region 82, where the middle region 82 is the entire region surrounded by the edge region 81 in the second vertical projection 80.

[0126] It should be understood that, in the ultrasonic chip 100 of this application embodiment, through such an optional structure, the number of windows 51 located in the edge region 81 of the second vertical projection 80 among the N windows 51 included in the passivation layer 50 is greater than the number of windows 51 located in the middle region 82 of the second vertical projection 80. This allows the edge region of the connecting electrode 60 to be electrically connected to the target electrode 611 through more windows 51. With the same number of windows, the number of windows 51 located in the middle region can be reduced. This can effectively increase the effective electrical connection area when the connecting electrode 60 is electrically connected to an external circuit structure (such as a circuit board 210, including but not limited to an FPC circuit board), thereby improving the performance and stability of the electrical connection between the two, and thus improving the performance of the ultrasonic chip 100.

[0127] For example, when the connecting electrode 60 is electrically connected to the gold finger 220 in the external circuit structure (such as the circuit board 210, which can be an FPC circuit board) through the conductive adhesive layer 230, since more of the N openings 51 are located in the edge region of the connecting electrode 60, at least part of the rounded corners of the gold finger 220 can avoid pressing on a part of the partial collapse of the conductive adhesive layer 230 caused by the openings 51 in the edge region. This allows the gold finger 220 in the external circuit structure (such as the circuit board 210) to be pressed on more locations without local collapse (such as the middle region with fewer openings 51) with the same number of openings. This increases the effective electrical connection area when the connecting electrode 60 and the gold finger 220 are electrically connected through the conductive adhesive layer 230, and can reduce the adverse effects of the local collapse of the conductive adhesive layer 230. This is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 pressing, and improving the performance and stability of the electrical connection between the connecting electrode 60 and the gold finger 220 in the external circuit structure.

[0128] In some alternative embodiments, refer to Figure 3A and Figure 3B As shown, all N windows 51 are located within the edge region 81 of the second vertical projection 80. For example, in Figure 3A and Figure 3B In the example shown, N=12 windows 51 are all located within the edge region 81 of the second vertical projection 80.

[0129] Therefore, in the ultrasonic chip 100 of this embodiment, with such an optional structure, the N windows 51 of the passivation layer 50 are all located within the edge region 81 of the second vertical projection 80, so that the edge region of the connecting electrode 60 can be electrically connected to the target electrode 611 through the N windows 51. With the same number of windows, this can effectively increase the effective electrical connection area when the connecting electrode 60 is electrically connected to the external circuit structure (such as the circuit board 210, including but not limited to the FPC circuit board), thereby improving the performance and stability of the electrical connection between the two, and thus improving the performance of the ultrasonic chip 100.

[0130] For example, such as Figure 3B As shown, Figure 3A The connection electrode 60 in the example can be used for electrical connection to a gold finger 220A, including a single finger, in an external circuit structure (including but not limited to an FPC circuit board). Optionally, the connection electrode 60, electrically connected to the gold finger 220A including a single finger, can be used for the transmission of any signal, such as at least one of, including but not limited to, excitation signals (or drive signals), control signals, etc., and can also be used for the transmission of power signals if power signal transmission requirements are met. For example, as... Figure 3B As shown, when the gold finger 220A and the connecting electrode 60 are electrically connected through the conductive adhesive layer 230, multiple openings 51 are located below the finger edge of the gold finger 220. In this way, the rounded corners of the finger edge of the gold finger 220 can avoid pressing on a part of the local collapse of the conductive adhesive layer 230 caused by the openings 51, thereby increasing the effective electrical connection area when the connecting electrode 60 and the gold finger 220 are electrically connected through the conductive adhesive layer 230, and can reduce the adverse effects of local collapse of the conductive adhesive layer 230, which is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 pressing.

[0131] In some alternative embodiments, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, the N windows 51 include at least P windows 51 located in the edge region 81 of the second vertical projection 80 and Q windows 51 located in the middle region 82, wherein the middle region 82 is the entire region in the second vertical projection 80 surrounded by the edge region 81, and P and Q are both integers, and P≤Q.

[0132] For example, in some examples, P = Q, that is, the number of windows 51 located in the edge region 81 of the second vertical projection 80 can be equal to the number of windows 51 located in the middle region 82, so as to meet the electrical connection requirements between the connecting electrode 60 and the target electrode 611 in the top metal layer 61, and improve the uniformity of current flow in the edge region and the middle region of the connecting electrode 60.

[0133] For example, in other examples, P < Q, that is, the number of windows 51 located in the edge region 81 of the second vertical projection 80 can be less than the number of windows 51 located in the middle region 82, so as to meet the electrical connection requirements between the connecting electrode 60 and the target electrode 611 in the top metal layer 61.

[0134] Alternatively, P + Q = N.

[0135] In some alternative embodiments, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, Q windows 51 are arranged in at least one group of windows 510 along the first direction F1, and each group of windows 510 includes at least one column of windows 51 arranged along the first direction F1. Each column of windows 51 includes multiple windows 51 arranged along the second direction F2, which is perpendicular to the first direction F1.

[0136] For example, such as Figure 4A and Figure 4B In the example shown, Q windows 51 are arranged into a group of window groups 510 along the first direction F1. For example, Figure 5A and Figure 5B In the example shown, Q openings 51 are arranged into multiple groups of openings 510 along the first direction F1 (two groups of openings 510 in this example), and the multiple groups of openings 510 are spaced apart along the first direction F1. This optional structure allows the connecting electrode 60 to be more easily electrically connected to a gold finger (including multiple fingers) in an external circuit structure (such as circuit board 210), improving the electrical connection performance between the connecting electrode 60 and the gold finger, thereby improving the performance of the ultrasonic chip 100.

[0137] In some optional embodiments, the first direction F1 and the second direction F2 can be the length direction and the width direction of the substrate 10, respectively, or the first direction F1 and the second direction F2 can be the width direction and the length direction of the substrate 10, respectively.

[0138] In some alternative embodiments, it may be combined with Figure 4B , Figure 5B As shown, the connecting electrode 60 is used to electrically connect with the gold finger 220, which includes multiple fingers, in the external circuit structure. The multiple electrical connection regions are projected toward the third vertical projection of the passivation layer 50 and overlap with multiple target regions 821 respectively. The multiple electrical connection regions are the electrical connection regions when the connecting electrode 60 is electrically connected to the multiple fingers. The multiple target regions 821 include: along the first direction F1, the region in the middle region 82 located between the edge region 81 and the adjacent window group 510, and the region in the middle region 82 located between each two adjacent window groups 510.

[0139] like Figure 4A In the example shown, the middle region 82 of the second vertical projection 80 may include two target regions 821, which are the two blank regions between the edge region 81 and the left and right sides of the window group 510. Combined with... Figure 4B as well as Figure 7 As shown, it illustrates a schematic diagram of the electrical connection between the connecting electrode 60 and the gold finger 220B, which includes two fingers. It can be seen that there can be two electrical connection regions between the connecting electrode 60 and the two fingers of the gold finger 220B. The two electrical connection regions are directed toward the third vertical projection of the passivation layer 50 and overlap with the two target regions 821 in the second vertical projection, respectively.

[0140] For example, such as Figure 5A In the example shown, the middle region 82 of the second vertical projection 80 may include three target regions 821: the blank area between the edge region 81 and the leftmost window group 510, the blank area between the edge region 81 and the rightmost window group 510, and the blank area between the two window groups 510. (Combined with...) Figure 5B as well as Figure 7 As shown, it illustrates a schematic diagram of the electrical connection between the connecting electrode 60 and the gold finger 220C, which includes three fingers. It can be seen that there can be three electrical connection regions between the connecting electrode 60 and the three fingers of the gold finger 220C. The three electrical connection regions are directed toward the third vertical projection of the passivation layer 50 and overlap with the three target regions 821 in the second vertical projection, respectively.

[0141] It should be understood that, since there are gaps between the multiple fingers in the gold finger 220, which includes multiple fingers, and these gaps are not used for electrical connection, in the above optional structure, arranging the Q openings 51 located in the middle region 82 of the second vertical projection 80 into at least one group of openings 510 along the first direction F1 can facilitate the concentration of the Q openings 51 more between the electrical connection areas where the multiple fingers of the gold finger 220 are pressed together (e.g., Figure 4B and Figure 5B As shown, this allows the connecting electrode 60 to be more easily electrically connected to the gold fingers 220, which include multiple fingers, in the external circuit structure, and effectively increases the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected, thereby improving the performance and stability of the electrical connection between the two, which is beneficial to improving the performance of the connecting electrode 60, and thus improving the performance of the ultrasonic chip 100.

[0142] For example, when the connecting electrode 60 and the gold finger 220, which includes multiple fingers, are electrically connected through the conductive adhesive layer 230, in the above optional structure, the Q openings 51 located in the middle region 82 of the second vertical projection 80 are arranged into at least one group of openings 510 along the first direction F1. This can concentrate the Q openings 51 more between the electrical connection areas where the multiple fingers of the gold finger 220 are pressed together, and effectively increase the effective pressing area when the gold finger 220 and the connecting electrode 60 are electrically connected through the conductive adhesive layer 230. This effectively increases the effective electrical connection area when the connecting electrode 60 and the gold finger 220 are electrically connected through the conductive adhesive layer 230, thereby improving the performance and stability of the electrical connection between the two, which is beneficial to improving the performance of the connecting electrode 60, and thus improving the performance of the ultrasonic chip 100.

[0143] In some alternative embodiments, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, each window group 510 includes multiple rows of windows 51 arranged along the first direction F1.

[0144] Therefore, each window group 510 in this embodiment can include multiple rows of windows 51 arranged along the first direction F1. This optional structure facilitates the concentration of more windows 51 within the window group 510 in the central region 82, thereby making it easier for Q windows 51 to be concentrated between the multiple finger-pressed electrical connection areas of the gold fingers 220 (e.g., Figure 4B and Figure 5B As shown, this allows the connecting electrode 60 to be more easily electrically connected to the gold fingers 220, which include multiple fingers, in the external circuit structure, and effectively increases the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected, thereby improving the performance and stability of the electrical connection between the two, which is beneficial to improving the performance of the connecting electrode 60, and thus improving the performance of the ultrasonic chip 100.

[0145] For example, such as Figure 4A and Figure 4B As shown, one group of window openings 510 includes multiple columns of windows 51. In this example, the group of window openings 510 includes 3 columns of windows 51, and each column of windows 51 includes 11 windows 51 arranged along the second direction F2. For example, as... Figure 5A and Figure 5B As shown, each of the two window groups 510 includes multiple columns of windows 51. In this example, each window group 510 includes 3 columns of windows 51, and each column of windows 51 includes 11 windows 51 arranged along the second direction F2.

[0146] Alternatively, at least one set of window groups 510 may include a single row of windows 51, as long as the electrical connection requirements can be met.

[0147] In some alternative embodiments, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, the edge region 81 of the second vertical projection 80 includes two first sub-edge regions 811 (e.g., first sub-edge regions 811A and 811B) arranged at intervals along the first direction F1, wherein both first sub-edge regions 811 are flush with the middle region 82 in the second direction F2; the number of windows 51 in each group of windows 510 is greater than the number of windows 51 in each first sub-edge region 811.

[0148] Therefore, the number of windows 51 in each group of window openings 510 in this embodiment can be greater than the number of windows 51 in each first sub-edge region 811. Through this optional structure, the windows 51 can be more concentrated in the window group 510 within the middle region 82, so that the windows 51 are more concentrated between the multiple finger-pressed electrical connection areas of the gold finger 220 (e.g., ...). Figure 4B and Figure 5B As shown, this allows the connecting electrode 60 to be more easily electrically connected to the gold fingers 220, which include multiple fingers, in the external circuit structure, and effectively increases the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected, thereby improving the performance and stability of the electrical connection between the two, which is beneficial to improving the performance of the connecting electrode 60, and thus improving the performance of the ultrasonic chip 100.

[0149] In some alternative embodiments, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, each group of windows 510 has at least one column of windows 51 with a number greater than the number of windows 51 in each first sub-edge region 811.

[0150] Therefore, in each group of window openings 510 in this embodiment, there is at least one column of windows 51, which can be greater than the number of windows 51 in each first sub-edge region 811. Through this optional structure, the windows 51 can be more concentrated in the window group 510 within the middle region 82, so that the windows 51 are more concentrated between the multiple finger-pressed electrical connection areas of the gold finger 220 (e.g., ...). Figure 4B and Figure 5BAs shown, this allows the connecting electrode 60 to be more easily electrically connected to the gold fingers 220, which include multiple fingers, in the external circuit structure, and effectively increases the effective electrical connection area when the connecting electrode 60 and the gold fingers 220 are electrically connected, thereby improving the performance and stability of the electrical connection between the two, which is beneficial to improving the performance of the connecting electrode 60, and thus improving the performance of the ultrasonic chip 100.

[0151] Optionally, refer to Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, the number of windows 51 in each column of each window group 510 is greater than the number of windows 51 in each first sub-edge region 811. Of course, the above figures are merely examples and are not intended to limit the embodiments of this application.

[0152] In some optional embodiments, the edge region 81 of the second vertical projection 80 includes two second sub-edge regions 812 (e.g., second sub-edge regions 812A and 812B) spaced apart along the second direction F2, wherein both second sub-edge regions 812 are flush with the middle region 82 in the first direction F1, the middle region 82 being the entire area of ​​the second vertical projection 80 surrounded by the edge region 81, and the second direction F2 being perpendicular to the first direction F1; along the second direction F2, in the two second sub-edge regions 812, the number of windows 51 in the second sub-edge region 812 closer to the edge of the substrate 10 is less than the number of windows 51 in the second sub-edge region 812 farther from the edge of the substrate 10.

[0153] like Figure 6A and Figure 6B As shown, when the gold fingers 220 in the external circuit structure (such as the FPC circuit board) are electrically connected to the connecting electrode 60 (such as through the conductive adhesive layer 230), the finger tips of the gold fingers 220 are usually electrically connected to the part of the connecting electrode 60 away from the edge of the substrate 10, while the part of the connecting electrode 60 near the edge of the substrate 10 is usually electrically connected to the non-finger area of ​​the gold fingers 220.

[0154] Therefore, in this embodiment, by setting the number of openings 51 in the second sub-edge region 812 near the edge of the substrate 10 to be less than the number of openings 51 in the second sub-edge region 812 far from the edge of the substrate 10, when the part of the connecting electrode 60 near the edge of the substrate 10 is pressed with the non-terminal region of the gold finger 220 to achieve electrical connection, it can be less affected by the local collapse of the conductive adhesive layer 230 caused by the openings 51, thereby effectively increasing the effective pressing area, increasing the effective electrical connection area when the connecting electrode 60 and the gold finger 220 are electrically connected through the conductive adhesive layer 230, which is beneficial to improving the electrical connection effect of the conductive adhesive layer 230 pressing, and improving the performance and stability of the electrical connection between the connecting electrode 60 and the gold finger 220 in the external circuit structure.

[0155] In some alternative embodiments, refer to Figure 3A and Figure 3B , Figure 4A and Figure 4B , Figure 5A and Figure 5B As shown, along the second direction F2, in the two second sub-edge regions 812 (e.g., second sub-edge regions 812A and 812B), the number of windows 51 in the second sub-edge region 812 closer to the edge of the substrate 10 can be equal to the number of windows 51 in the second sub-edge region 812 farther from the edge of the substrate 10. This optional structure allows for more uniform current flow between the connecting electrode 60 and the target electrode 611 of the top metal layer 61.

[0156] It is understood that the various optional embodiments described above can be selected according to actual needs. The descriptions of various aspects of the embodiments of this application are merely illustrative examples of some optional technical solutions of the embodiments of this application, and are not intended to limit the embodiments of this application in any way.

[0157] According to a second aspect of the embodiments of this application, in conjunction with Figure 8A and Figure 8B As shown, an ultrasonic fingerprint module 200 is provided, including: an ultrasonic chip 100 as provided in the first aspect.

[0158] Since the ultrasonic fingerprint module 200 of the second aspect includes the ultrasonic chip 100 of the first aspect, it has better performance and can better realize the ultrasonic fingerprint function.

[0159] In some alternative embodiments, it may be combined with Figure 8B As shown, the ultrasonic fingerprint module 200 also includes a circuit board 210, which includes gold fingers 220; the gold fingers 220 in the circuit board 210 are electrically connected to the connecting electrode 60 through a conductive adhesive layer 230.

[0160] Optionally, the circuit board 210 may be, but is not limited to, a flexible printed circuit board (FPC) or a printed circuit board (PCB).

[0161] Optionally, the conductive adhesive layer 230 may be, but is not limited to, an ACF conductive film.

[0162] Optionally, each gold finger 220 may include a single finger or multiple fingers, such as two, three, or more fingers. Optionally, the circuit board 210 may include multiple gold fingers 220, which may respectively form electrical connections with multiple connection electrodes 60 of the ultrasonic chip 100.

[0163] According to the third aspect of the embodiments of this application, referring to Figure 9 As shown, an electronic device 300 is provided, including: the ultrasonic fingerprint module 200 provided in the second aspect above.

[0164] In some alternative embodiments, the electronic device 300 also includes a screen, a back panel, and a side bezel.

[0165] Optionally, when the electronic device 300 includes an ultrasonic fingerprint module 200, the ultrasonic fingerprint module 200 can be attached to the lower surface of the screen, the inner side of the back panel, or the inner side of the side bezel. That is, the ultrasonic fingerprint module 200 can be an under-display ultrasonic fingerprint module, a rear ultrasonic fingerprint module, or a side ultrasonic fingerprint module of the electronic device 300. This enables under-display ultrasonic fingerprint recognition, rear ultrasonic fingerprint recognition, or side ultrasonic fingerprint recognition.

[0166] Optionally, the electronic device 300 can be any electronic device, including but not limited to mobile phones, computers, etc. It should be understood that the embodiments of this application do not limit the way the ultrasonic fingerprint module 200 is installed on the electronic device 300. As an example, taking a mobile phone as the electronic device 300 and including the ultrasonic fingerprint module 200, the ultrasonic fingerprint module 200 can be adhered to the underside of the mobile phone screen of the electronic device 300 through an adhesive layer to achieve under-display ultrasonic fingerprint recognition. It should be understood that in optional embodiments where the ultrasonic fingerprint module 200 is a rear ultrasonic fingerprint module or a side ultrasonic fingerprint module of the electronic device 300, the adhesive connection can also be achieved through an adhesive layer.

[0167] It should be understood that the above are merely illustrative applications and are not intended to limit the embodiments of this application.

[0168] The optional embodiments of the present application have been described in detail above with reference to the accompanying drawings. However, the embodiments of the present application are not limited thereto. It should be noted that, for the convenience of explaining the embodiments of the present application, the various drawings of the embodiments of the present application are not necessarily drawn to scale, and are only used to facilitate the explanation of the technical solution, and are not intended to limit the embodiments of the present application in any way. Within the scope of the technical concept of the embodiments of the present application, various simple modifications can be made to the technical solutions of the embodiments of the present application. The various technical features included in the different embodiments of the present application can be combined and / or separated in any suitable manner. In order to avoid unnecessary repetition, the embodiments of the present application will not describe the various possible combinations separately. However, these simple modifications and combinations should also be regarded as the content disclosed in the embodiments of the present application, and all fall within the protection scope of the embodiments of the present application.

[0169] The term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". It should be noted that the concepts of "first", "second", etc., mentioned in the embodiments of this application are only used to distinguish different devices, modules, or units, and are not used to limit the order of functions performed by these devices, modules, or units or their interdependencies. It should be noted that the modifications of "a" and "a plurality" mentioned in the embodiments of this application are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0170] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them; although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. An ultrasonic chip, characterized in that, include: A substrate having multiple metal layers, wherein the top metal layer of the multiple metal layers includes at least a target electrode; A passivation layer is at least partially disposed above the top metal layer, and the passivation layer includes a window portion, the first vertical projection of the window portion toward the target electrode being located on the target electrode; A connecting electrode is at least partially disposed above the passivation layer and forms an electrical connection with the target electrode through the window portion, wherein the connecting electrode covers the window portion; The window portion includes at least one window, and at least one of the windows is located within the edge region of the second vertical projection. The second vertical projection is the vertical projection of the outer contour of the connecting electrode toward the passivation layer, and the edge region is the area within 26 μm of the edge of the second vertical projection.

2. The ultrasonic chip according to claim 1, characterized in that, The windowed portion includes N windows, and the connecting electrode is electrically connected to the target electrode through the N windows, where N ≥ 2 and is an integer.

3. The ultrasonic chip according to claim 2, characterized in that, The number of windows located within the edge region of the N windows is greater than the number of windows located within the middle region, wherein the middle region is the entire area surrounded by the edge region in the second vertical projection.

4. The ultrasonic chip according to claim 3, characterized in that, All N windows are located within the edge area.

5. The ultrasonic chip according to claim 2, characterized in that, The N windows include at least P windows located in the edge region and Q windows located in the middle region, wherein the middle region is the entire region surrounded by the edge region in the second vertical projection, and P and Q are both integers, and P≤Q.

6. The ultrasonic chip according to claim 5, characterized in that, The Q windows are arranged in at least one group of windows along the first direction, and each group of windows includes at least one column of windows arranged along the first direction. Each column of windows includes multiple windows arranged along the second direction, which is perpendicular to the first direction.

7. The ultrasonic chip according to claim 6, characterized in that, Each window group includes multiple rows of windows arranged along the first direction.

8. The ultrasonic chip according to claim 6, characterized in that, The edge region includes two first sub-edge regions spaced apart along a first direction, wherein the two first sub-edge regions are flush with the middle region in a second direction; The number of windows in each window group is greater than the number of windows in each of the first sub-edge regions.

9. The ultrasonic chip according to claim 8, characterized in that, Each group of windows has at least one column of windows with a number greater than the number of windows in each of the first sub-edge regions.

10. The ultrasonic chip according to claim 6, characterized in that, The connecting electrode is used to electrically connect with a gold finger including multiple fingers in an external circuit structure, and the multiple electrical connection areas are oriented toward the third vertical projection of the passivation layer and overlap with multiple target areas respectively. The multiple electrical connection areas are the electrical connection areas when the connecting electrode is electrically connected to the multiple fingers. The plurality of target areas include: along the first direction, the area in the middle region located between the edge region and the adjacent window group, and the area in the middle region located between each two adjacent window groups.

11. The ultrasonic chip according to claim 2, characterized in that, The edge region includes two second sub-edge regions spaced apart along the second direction, wherein the two second sub-edge regions are both flush with the middle region in the first direction, and the middle region is the entire area surrounded by the edge regions in the second vertical projection, and the second direction is perpendicular to the first direction; Along the second direction, in the two second sub-edge regions, the number of windows in the second sub-edge region closer to the substrate edge is less than the number of windows in the second sub-edge region farther from the substrate edge.

12. The ultrasonic chip according to any one of claims 1-11, characterized in that, The window opening satisfies at least one of the following conditions: At least one of the said windows has a perimeter greater than or equal to 20 μm; The maximum side length of at least one of the aforementioned windows ranges from 5µm to 25µm; The shape of the window includes at least one of a rectangle and a rounded rectangle; The window section includes a number of windows of 6 or more.

13. The ultrasonic chip according to any one of claims 1-11, characterized in that, The ultrasonic chip also satisfies at least one of the following conditions: The thickness of the passivation layer is greater than or equal to 1.2 μm; The passivation layer comprises a multi-layer structure, and the thickness of the top layer of the passivation layer is greater than 0.5 μm; The thickness of the connecting electrode is greater than or equal to 400 nm; The size of the connecting electrode is larger than the size of the target electrode; The connecting electrode is in contact with each side wall of the window and covers the target electrode inside the window; The portion of the connecting electrode located inside the window forms a recessed blind hole relative to the portion of the connecting electrode located outside the window. The plurality of metal layers also includes a subtop metal layer located below the top metal layer, the subtop metal layer being equipotentially connected to the top metal layer; Along a direction parallel to the substrate, the minimum spacing between the top metal layer and the target signal line is greater than 30 μm, wherein the target signal line is not part of the top metal layer and transmits a different electrical signal from the top metal layer; The connecting electrode is used to make an electrical connection with the gold finger in the external circuit structure through a conductive adhesive layer. The ultrasonic chip includes multiple connecting electrodes, the top metal layer includes multiple target electrodes, and the passivation layer includes multiple openings. Each connecting electrode is electrically connected to the corresponding target electrode through the corresponding opening.

14. The ultrasonic chip according to any one of claims 1-11, characterized in that, A bottom electrode is also disposed on the substrate, and a piezoelectric layer and a top electrode are stacked sequentially on top of the bottom electrode. The top electrode is used to obtain an excitation signal from an external circuit structure through the target electrode and the connecting electrode, and is used to form an electric field between itself and the bottom electrode after the excitation signal is applied, so as to excite the piezoelectric layer to emit an ultrasonic signal. The bottom electrode is used to receive the ultrasonic detection signal generated between the bottom electrode and the top electrode when the returned ultrasonic signal acts on the piezoelectric layer.

15. An ultrasonic fingerprint module, characterized in that, include: The ultrasonic chip as described in any one of claims 1-14.

16. An electronic device, characterized in that, include: The ultrasonic fingerprint module as described in claim 15.