A humidity sensor test circuit

Abstract

This utility model discloses a humidity sensor test circuit, belonging to the field of sensor testing technology. It includes a chip under test (DUT) U1, whose output terminal is simultaneously connected to the input terminal of a test sub-circuit and the input terminal of a sampling sub-circuit. The output terminal of the test sub-circuit is connected to the input terminal of the sampling sub-circuit, and the output terminal of the sampling sub-circuit is connected to a standard comparison chip U2. The standard comparison chip U2 acquires the test output signal of the test sub-circuit and the sampling output signal of the sampling sub-circuit. The standard comparison chip U2 is used for comparison and processing of the test output signal and the sampling output signal. The signal output terminals of the DUT U1 and the comparison chip U2 are connected to the communication channel of a testing machine, which is used for signal output. This utility model can quickly identify humidity sensors with abnormal performance, preventing abnormal humidity sensors from entering subsequent processes.

Description

Technical Field

[0001] This utility model belongs to the field of sensor testing technology, and specifically relates to a humidity sensor testing circuit. Background Technology

[0002] Automotive-grade humidity sensors have stringent requirements for stability and reliability. However, in actual production, foreign objects can rub against the chip, causing scratches and resulting in chip failure. Because it's difficult to accurately screen out products with inaccurate performance, substandard humidity sensors end up in subsequent assembly processes and are mounted on circuit boards, leading to significant resource waste and losses. To address these issues, this application proposes a humidity sensor testing circuit that can identify humidity sensors with abnormal performance before the product is packaged and fed into the reel, preventing defective humidity sensors from entering subsequent processes. Utility Model Content

[0003] Purpose of the utility model: To provide a humidity sensor test circuit that solves the above-mentioned problems existing in the prior art.

[0004] Technical Solution: A humidity sensor test circuit includes a chip under test (DUT) U1. The output terminal of the DUT is simultaneously connected to the input terminal of a test sub-circuit and the input terminal of a sampling sub-circuit. The output terminal of the test sub-circuit is connected to the input terminal of the sampling sub-circuit. The output terminal of the sampling sub-circuit is connected to a standard comparison chip U2. The standard comparison chip U2 acquires the test output signal of the test sub-circuit and the sampling output signal of the sampling sub-circuit. The standard comparison chip U2 is used for comparison and processing of the test output signal and the sampling output signal. The signal output terminals of the DUT U1 and the comparison chip U2 are connected to the communication channel of a testing machine, which is used for signal output.

[0005] Preferably, the test sub-circuit includes single-pole switches K1A, K1B, K2A, and K2B, resistors R1 and R2, capacitor C1, connection port DIO1, and connection port DIO2. The contact 8 of single-pole switch K1A is simultaneously connected to the contact 3 of single-pole switch K2B and pin 1 of the chip under test U1. Pin 7 of single-pole switch K1A is connected to the input terminal of the sampling sub-circuit through connection port DIO2. The contact 4 of single-pole switch K2B is connected to one end of resistor R1, and the other end of resistor R1 is simultaneously connected to… One end of resistor R2 is connected to the communication channel of the test set, and the other end of resistor R2 is connected to contact 7 of single-pole switch K2A. Contact 8 of single-pole switch K2A is also connected to contact 3 of single-pole switch K1B and pin 4 of chip U1 under test. Contact 4 of single-pole switch K1B is connected to the input terminal of sampling sub-circuit through connection port DIO1. Contact 2 of single-pole switch K2B and contact 9 of single-pole switch K2A are respectively connected to the communication channel of the test machine. One end of capacitor C1 is connected to pin 5 of chip U1 under test, and the other end of capacitor C1 is grounded.

[0006] Preferably, both resistors R1 and R2 are 1 kΩ resistors, used for circuit protection and current limiting of the test sub-circuit.

[0007] Preferably, the sampling sub-circuit includes a single-pole switch K3A, a single-pole switch K3B, resistors R3, R4, and R5, and a capacitor C2. The contact 8 of the single-pole switch K3A is simultaneously connected to one end of resistor R4 and pin 1 of the standard comparison chip U2. The contact 7 of the single-pole switch K3A is connected to the output terminal of the test sub-circuit via connection port DIO2. The contact 3 of the single-pole switch K3B is simultaneously connected to one end of resistor R5 and pin 4 of the standard comparison chip U2. The contact 4 of the single-pole switch K3B is connected to the output terminal of the test sub-circuit via connection port DIO1. The other end of resistor R3 is simultaneously connected to the other end of resistor R4 and the communication channel of the tester. One end of resistor R3 is connected to pin 7 of the standard comparison chip U2, and the other end of resistor R3 is simultaneously connected to pin 5 of the standard comparison chip U2 and one end of capacitor C2. The other end of capacitor C2 is grounded.

[0008] Preferably, resistors R3, R4, and R5 are all 1 kΩ resistors, used for circuit protection and current limiting of the test sub-circuit.

[0009] Preferably, both the chip under test U1 and the standard comparison chip U2 are NSHT30 chips.

[0010] Beneficial effects: This utility model relates to a humidity sensor testing circuit. It uses a testing sub-circuit to acquire the electrical signal of the chip under test U1. The sampling sub-circuit acquires the output signal of the testing sub-circuit and the electrical signal of the standard comparison chip U2. The electrical signals of the chip under test U1 and the standard comparison chip U2 are compared by a program burned into the standard comparison chip U2. When the comparison difference is within a predetermined range, the chip under test U1 is valid and performs normally. Otherwise, the chip under test U1 is invalid and performs abnormally. This allows for the rapid identification of humidity sensors with abnormal performance, preventing abnormal humidity sensors from entering subsequent processes. Attached Figure Description

[0011] Figure 1 This is a circuit diagram of the sampling sub-circuit of this utility model; Figure 2 This is the circuit diagram of the test sub-circuit of this utility model. Detailed Implementation

[0012] like Figures 1 to 2 As shown, this utility model provides a technical solution: a humidity sensor test circuit, including a chip under test (DUT) U1. The output terminal of the DUT is simultaneously connected to the input terminal of a test sub-circuit and the input terminal of a sampling sub-circuit. The output terminal of the test sub-circuit is connected to the input terminal of the sampling sub-circuit. The output terminal of the sampling sub-circuit is connected to a standard comparison chip U2. Both the DUT U1 and the standard comparison chip U2 are NSHT30 chips. The standard comparison chip U2 acquires the test output signal of the test sub-circuit and the sampling output signal of the sampling sub-circuit. The standard comparison chip U2 is used for comparison processing of the test output signal and the sampling output signal. The DUT U1... The signal output terminal of the comparison chip U2 is connected to the communication channel of the test machine. The test machine is used for signal output and uses the test sub-circuit to acquire the electrical signal of the chip under test U1. The sampling sub-circuit acquires the output signal of the test sub-circuit and the electrical signal of the standard comparison chip U2. The program burned into the standard comparison chip U2 compares the electrical signal of the chip under test U1 with the electrical signal of the standard comparison chip U2. When the comparison difference is within a predetermined range, the chip under test U1 is valid and performs normally. Otherwise, the chip under test U1 is invalid and performs abnormally. This can quickly identify the humidity sensor with abnormal performance and prevent abnormal humidity sensors from flowing into subsequent processes.

[0013] In a further embodiment, the test sub-circuit includes single-pole switches K1A, K1B, K2A, and K2B, resistors R1 and R2, capacitor C1, connection port DIO1, and connection port DIO2. Resistors R1 and R2 are both 1kΩ resistors, used for circuit protection and current limiting of the test sub-circuit. Contact 8 of single-pole switch K1A is simultaneously connected to contact 3 of single-pole switch K2B and pin 1 of the chip under test U1. Pin 7 of single-pole switch K1A is connected to the input terminal of the sampling sub-circuit through connection port DIO2. Contact 4 of single-pole switch K2B is connected to… One end of resistor R1 is connected to the other end of resistor R2, which is simultaneously connected to one end of the test set's communication channel. The other end of resistor R2 is connected to contact 7 of single-pole switch K2A. Contact 8 of single-pole switch K2A is simultaneously connected to contact 3 of single-pole switch K1B and pin 4 of the chip under test U1. Contact 4 of single-pole switch K1B is connected to the input terminal of the sampling sub-circuit through connection port DIO1. Contact 2 of single-pole switch K2B and contact 9 of single-pole switch K2A are respectively connected to the communication channel of the test machine. One end of capacitor C1 is connected to pin 5 of the chip under test U1, and the other end of capacitor C1 is grounded.

[0014] In a further embodiment, the sampling sub-circuit includes a single-pole switch K3A, a single-pole switch K3B, resistors R3, R4, and R5, and a capacitor C2. Resistors R3, R4, and R5 are all 1 kΩ resistors, used for circuit protection and current limiting of the test sub-circuit. Contact 8 of the single-pole switch K3A is simultaneously connected to one end of resistor R4 and pin 1 of the standard comparison chip U2. Contact 7 of the single-pole switch K3A is connected to the output terminal of the test sub-circuit through connection port DIO2. Contact 3 of the single-pole switch K3B is simultaneously connected to one end of resistor R5 and pin 4 of the standard comparison chip U2. Contact 4 of the single-pole switch K3B is connected to the output terminal of the test sub-circuit through connection port DIO1. The other end of resistor R3 is simultaneously connected to the other end of resistor R4 and the communication channel of the tester. One end of resistor R3 is connected to pin 7 of the standard comparison chip U2. The other end of resistor R3 is simultaneously connected to pin 5 of the standard comparison chip U2 and one end of capacitor C2. The other end of capacitor C2 is grounded.

[0015] Through the above technical solution, this utility model can achieve the following working process: Circuit switching is achieved using single-pole switches K1A, K1B, K2A, K2B, K3A, and K3B to test different electrical performance characteristics, such as... Figure 1 and Figure 2As shown, single-pole switches K2A and K2B are connected to the communication channels of the test machine via OVI5 and OVI8, respectively. Basic OS and electrical tests of the chip under test U1 are performed using OVI1, OVI2, OVI3, OVI5, OVI6, OVI7, and OVI8. After the basic OS and electrical tests of the chip under test U1 are completed, single-pole switches K1A, K1B, K3A, and K3B are switched to connection ports DIO1 and DIO2, respectively, while single-pole switches K2A and K2B are switched to the OVI1 channel. Simultaneously, functional tests are performed on the chip under test (U1) and the standard comparison chip (U2). After the ambient humidity is sensed and converted into a digital signal by the chip under test (U1), the register value in the standard comparison chip (U2) is converted and calculated. The electrical signal of the chip under test (U1) and the electrical signal of the standard comparison chip (U2) are compared by the program burned into the standard comparison chip (U2). When the difference is within a predetermined range, the chip under test (U1) is valid and performs normally. Otherwise, the chip under test (U1) is invalid and performs abnormally. This allows for the rapid identification of humidity sensors with abnormal performance, preventing abnormal humidity sensors from flowing into subsequent processes.

[0016] The program programmed into the standard comparison chip U2 is as follows: 1. Write 0x00 delay 50ms to 0x24; 2. Next, read the values ​​of 0x01 (V1), 0x02 (V2), 0x04 (V3), and 0x05 (V4); 3. T=-45+175*(V1*256+V2) / 65535; RH=100*(V3*256+V4) / 65535; 4. VDD = 3.3V (golden); 5. Enter engineering mode (same as the chip under test); 5. Write 0x00 instead of 0x24; 6. Delay 50ms; 7. Read the values ​​of 0x01 (V5), 0x02 (V6), 0x04 (V7), and 0x05 (V8); 8. T_G=-45+175*(V5*256+V6) / 65535, RH_G=100*(V7*256+V8) / 65535; 9. Diff_T=T-T_G(SPEC:±3); Diff_RH=RH-RH_G(SPEC:±5).

[0017] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various equivalent transformations can be made to the technical solutions of the present invention, and all such equivalent transformations fall within the protection scope of the present invention.

Claims

1. A humidity sensor test circuit, characterized by, The system includes a chip under test (DUT) U1. The output of the DUT is connected to both the input of a test sub-circuit and the input of a sampling sub-circuit. The output of the test sub-circuit is connected to the input of the sampling sub-circuit. The output of the sampling sub-circuit is connected to a standard comparison chip U2. The standard comparison chip U2 acquires the test output signal of the test sub-circuit and the sampled output signal of the sampling sub-circuit. The standard comparison chip U2 is used for comparison and processing of the test output signal and the sampled output signal. The signal outputs of the DUT U1 and the comparison chip U2 are connected to the communication channel of the test machine, which is used for signal output.

2. A humidity sensor test circuit according to claim 1, wherein, The test sub-circuit includes single-pole switches K1A, K1B, K2A, and K2B, resistors R1 and R2, capacitor C1, connection port DIO1, and connection port DIO2. Contact 8 of single-pole switch K1A is simultaneously connected to contact 3 of single-pole switch K2B and pin 1 of the chip under test U1. Pin 7 of single-pole switch K1A is connected to the input terminal of the sampling sub-circuit via connection port DIO2. Contact 4 of single-pole switch K2B is connected to one end of resistor R1, and the other end of resistor R1 is simultaneously connected to... One end of resistor R2 is connected to the communication channel of the test set, and the other end of resistor R2 is connected to contact 7 of single-pole switch K2A. Contact 8 of single-pole switch K2A is simultaneously connected to contact 3 of single-pole switch K1B and pin 4 of chip U1 under test. Contact 4 of single-pole switch K1B is connected to the input terminal of sampling sub-circuit through connection port DIO1. Contact 2 of single-pole switch K2B and contact 9 of single-pole switch K2A are respectively connected to the communication channel of the test machine. One end of capacitor C1 is connected to pin 5 of chip U1 under test, and the other end of capacitor C1 is grounded.

3. A humidity sensor test circuit according to claim 2, wherein, Both resistors R1 and R2 are 1 kΩ resistors, used for circuit protection and current limiting of the test sub-circuit.

4. The humidity sensor test circuit of claim 1, wherein, The sampling sub-circuit includes a single-pole switch K3A, a single-pole switch K3B, resistors R3, R4, and R5, and a capacitor C2. Contact 8 of single-pole switch K3A is simultaneously connected to one end of resistor R4 and pin 1 of the standard comparison chip U2. Contact 7 of single-pole switch K3A is connected to the output of the test sub-circuit via connection port DIO2. Contact 3 of single-pole switch K3B is simultaneously connected to one end of resistor R5 and pin 4 of the standard comparison chip U2. Contact 4 of single-pole switch K3B is connected to the output of the test sub-circuit via connection port DIO1. The other end of resistor R3 is simultaneously connected to the other end of resistor R4 and the communication channel of the tester. One end of resistor R3 is connected to pin 7 of the standard comparison chip U2, and the other end of resistor R3 is simultaneously connected to pin 5 of the standard comparison chip U2 and one end of capacitor C2. The other end of capacitor C2 is grounded.

5. A humidity sensor test circuit according to claim 4, wherein, The resistors R3, R4, and R5 are all 1 kΩ resistors, used for circuit protection and current limiting of the test sub-circuit.

6. A humidity sensor test circuit according to claim 1, wherein, Both the chip under test U1 and the standard comparison chip U2 are NSHT30 chips.

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