Voltage sampling circuit and device of photovoltaic inverter

Abstract

This utility model relates to the field of photovoltaic inverter technology, providing a voltage sampling circuit and a voltage sampling device for a photovoltaic inverter. The voltage sampling circuit includes a signal input terminal, a high-impedance module, a first-stage voltage follower circuit, a differential operation circuit, a second-stage voltage follower circuit, and a signal output terminal connected in sequence. The signal input terminal includes a first signal input terminal, a second signal input terminal, and a third signal input terminal. The high-impedance module includes a first high-impedance module, a second high-impedance module, and a third high-impedance module. The first-stage voltage follower circuit includes a first voltage follower, a second voltage follower, and a third voltage follower. The differential operation circuit includes a first differential circuit and a second differential circuit. The second-stage voltage follower circuit includes a fourth voltage follower and a fifth voltage follower. The signal output terminal includes a first signal output terminal and a second signal output terminal. The technical solution of this utility model can reduce the area of ​​the PCB board.

Description

Technical Field

[0001] This utility model belongs to the field of photovoltaic inverter technology, and in particular relates to a voltage sampling circuit and device for a photovoltaic inverter. Background Technology

[0002] During the operation of a photovoltaic inverter, it is necessary to accurately sample various voltage signals such as inverter voltage, grid voltage, and bus voltage in order to achieve effective control and monitoring of the inverter's operating status.

[0003] In existing technologies, the voltage sampling circuit of a photovoltaic inverter typically employs the following approach: first, the voltage signal is acquired through high-impedance sampling, and then the voltage signal is sequentially connected to a voltage follower, a differential amplifier, and a voltage bias circuit for processing. When multiplexing of the sampled voltage points is required, a parallel connection needs to be made at the source of the voltage sampling, i.e., another high-impedance path is used for sampling. For example, to sample three inverter line voltages, six high-impedance paths are needed to sample six phase voltages.

[0004] It is evident that the voltage sampling circuit of existing photovoltaic inverters has significant defects: the high impedance used in the sampling process is not multiplexed, and the voltage follower is also not multiplexed, resulting in an excessive number of operational amplifiers. With limited PCB layout area, too many components will occupy too much PCB space, leading to layout difficulties. Furthermore, too many components will also result in excessively high voltage sampling costs for photovoltaic inverters. Utility Model Content

[0005] This invention provides a voltage sampling circuit and device for a photovoltaic inverter, aiming to reduce the area of ​​the PCB board.

[0006] This invention is implemented as follows: a voltage sampling circuit for a photovoltaic inverter includes a signal input terminal, a high-impedance module, a first-stage voltage follower circuit, a differential operation circuit, a second-stage voltage follower circuit, and a signal output terminal connected in sequence. The signal input terminal includes a first signal input terminal, a second signal input terminal, and a third signal input terminal; the high-impedance module includes a first high-impedance module, a second high-impedance module, and a third high-impedance module; the first-stage voltage follower circuit includes a first voltage follower, a second voltage follower, and a third voltage follower; the differential operation circuit includes a first differential circuit and a second differential circuit; the second-stage voltage follower circuit includes a fourth voltage follower and a fifth voltage follower; and the signal output terminal includes a first signal output terminal and a second signal output terminal. The first signal input terminal is connected to the first input terminal of the first differential circuit via the first high-impedance module and the first voltage follower in sequence; The second signal input terminal is connected sequentially to the second input terminal of the first differential circuit and the first input terminal of the second differential circuit via the second high-impedance module and the second voltage follower. The third signal input terminal is connected to the second input terminal of the second differential circuit via the third high-impedance module and the third voltage follower in sequence; The output terminal of the first differential circuit is connected to the first signal output terminal via the fourth voltage follower, and the output terminal of the second differential circuit is connected to the second signal output terminal via the fifth voltage follower.

[0007] Furthermore, the first voltage follower includes a first resistor, a second resistor, a first capacitor, and a first operational amplifier; One end of the first resistor and the first capacitor are connected in parallel to the positive input terminal of the first operational amplifier, and the other end is grounded; one end of the second resistor is connected to the first high-impedance module, and the other end is connected to the positive input terminal of the first operational amplifier; the output terminal of the first operational amplifier is connected to the negative input terminal of the first operational amplifier and the first input terminal of the first differential circuit. The second voltage follower includes a third resistor, a fourth resistor, a second capacitor, and a second operational amplifier; The third resistor is connected in parallel with the second capacitor, with one end connected to the positive input terminal of the second operational amplifier and the other end grounded; one end of the fourth resistor is connected to the second high-impedance module and the other end is connected to the positive input terminal of the second operational amplifier; the output terminal of the second operational amplifier is connected to the negative input terminal of the second operational amplifier, the second input terminal of the first differential circuit, and the first input terminal of the second differential circuit. The third voltage follower includes a fifth resistor, a sixth resistor, a third capacitor, and a third operational amplifier; The fifth resistor is connected in parallel with the third capacitor, with one end connected to the positive input terminal of the third operational amplifier and the other end grounded; one end of the sixth resistor is connected to the third high-impedance module and the other end is connected to the positive input terminal of the third operational amplifier; the output terminal of the third operational amplifier is connected to the negative input terminal of the third operational amplifier and the second input terminal of the second differential circuit.

[0008] Furthermore, the first differential circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor, a fifth capacitor, and a fourth operational amplifier; One end of the seventh resistor is connected to the output terminal of the first voltage follower, and the other end is connected to the positive input terminal of the fourth operational amplifier; the ninth resistor is connected in parallel with the fourth capacitor, and one end is connected to the positive input terminal of the fourth operational amplifier, while the other end is grounded. One end of the eighth resistor is connected to the output terminal of the second voltage follower, and the other end is connected to the negative input terminal of the fourth operational amplifier; one end of the tenth resistor and the fifth capacitor are connected in parallel to the negative input terminal of the fourth operational amplifier, and the other end is connected to the output terminal of the fourth operational amplifier; and the output terminal of the fourth operational amplifier is connected to the input terminal of the fourth voltage follower. The second differential circuit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a seventh capacitor, and a fifth operational amplifier; One end of the eleventh resistor is connected to the output terminal of the second voltage follower, and the other end is connected to the positive input terminal of the fifth operational amplifier; the thirteenth resistor is connected in parallel with the sixth capacitor, and one end is connected to the positive input terminal of the fifth operational amplifier, while the other end is grounded. One end of the twelfth resistor is connected to the output terminal of the third voltage follower, and the other end is connected to the negative input terminal of the fifth operational amplifier; the fourteenth resistor and the seventh capacitor are connected in parallel, with one end connected to the negative input terminal of the fifth operational amplifier and the other end connected to the output terminal of the fifth operational amplifier; and the output terminal of the fifth operational amplifier is connected to the input terminal of the fifth voltage follower.

[0009] Furthermore, the fourth voltage follower includes a fifteenth resistor, an eighth capacitor, and a sixth operational amplifier; One end of the fifteenth resistor is connected to the output terminal of the first differential circuit, and the other end is connected to the positive input terminal of the sixth operational amplifier; one end of the eighth capacitor is connected to the positive input terminal of the sixth operational amplifier, and the other end is grounded; the output terminal of the sixth operational amplifier is connected to the negative input terminal of the sixth operational amplifier and the first signal output terminal. The fifth voltage follower includes a sixteenth resistor, a ninth capacitor, and a seventh operational amplifier; One end of the sixteenth resistor is connected to the output terminal of the second differential circuit, and the other end is connected to the positive input terminal of the seventh operational amplifier; one end of the ninth capacitor is connected to the positive input terminal of the seventh operational amplifier, and the other end is grounded; the output terminal of the seventh operational amplifier is connected to the negative input terminal of the seventh operational amplifier and the second signal output terminal.

[0010] Furthermore, the voltage sampling circuit of the photovoltaic inverter further includes a first bias circuit, a second bias circuit, and a third bias circuit; the differential operation circuit further includes a third differential circuit; the second-stage voltage follower circuit further includes a sixth voltage follower; and the signal output terminal further includes a third signal output terminal. The first input terminal of the third differential circuit is connected to the output terminal of the third voltage follower, the second input terminal of the third differential circuit is connected to the output terminal of the first voltage follower, and the output terminal of the third differential circuit is connected to the third signal output terminal via the sixth voltage follower. The first bias circuit is connected to the bias terminal of the fourth voltage follower, the second bias circuit is connected to the bias terminal of the fifth voltage follower, and the third bias circuit is connected to the bias terminal of the sixth voltage follower.

[0011] Furthermore, the third differential circuit includes a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a tenth capacitor, an eleventh capacitor, and an eighth operational amplifier; One end of the seventeenth resistor is connected to the output terminal of the third voltage follower, and the other end is connected to the positive input terminal of the eighth operational amplifier; the nineteenth resistor and the tenth capacitor are connected in parallel, with one end connected to the positive input terminal of the eighth operational amplifier and the other end grounded. One end of the eighteenth resistor is connected to the output terminal of the first voltage follower, and the other end is connected to the negative input terminal of the eighth operational amplifier; the twentieth resistor and the eleventh capacitor are connected in parallel, with one end connected to the negative input terminal of the eighth operational amplifier and the other end connected to the output terminal of the eighth operational amplifier; and the output terminal of the eighth operational amplifier is connected to the input terminal of the sixth voltage follower.

[0012] Furthermore, the sixth voltage follower includes a twenty-first resistor, a twelfth capacitor, and a ninth operational amplifier; One end of the 21st resistor is connected to the output terminal of the third differential circuit, and the other end is connected to the positive input terminal of the ninth operational amplifier; One end of the twelfth capacitor is connected to the positive input terminal of the ninth operational amplifier, and the other end is grounded; the output terminal of the ninth operational amplifier is connected to the negative input terminal of the ninth operational amplifier and the third signal output terminal.

[0013] Furthermore, the first bias circuit includes a twenty-second resistor, one end of which is connected to a power supply and the other end of which is connected to the positive input terminal of the sixth operational amplifier. The second bias circuit includes a twenty-third resistor, one end of which is connected to the power supply and the other end of which is connected to the positive input terminal of the seventh operational amplifier. The third bias circuit includes a twenty-fourth resistor, one end of which is connected to the power supply and the other end of which is connected to the positive input terminal of the ninth operational amplifier.

[0014] This utility model also provides a voltage sampling device for a photovoltaic inverter, the voltage sampling device for the photovoltaic inverter including the voltage sampling circuit of the photovoltaic inverter as described in any of the above claims.

[0015] The technical solution of this utility model involves setting three signal input terminals to respectively connect to the voltage signal being sampled. The sampled voltage signal is processed by corresponding high-impedance modules and voltage followers, and then output to the first and second differential circuits. After further processing by the fourth and fifth voltage followers, it is output to the corresponding first and second signal output terminals. Since the sampled voltage signal transmitted by a set of high-impedance modules and voltage followers can simultaneously provide input for the operation of multiple differential circuits, the number of operational amplifiers can be reduced in the voltage sampling circuit design. This reduces hardware costs while ensuring sampling accuracy, saves PCB board layout area, and improves the utilization rate and power density of the photovoltaic inverter's internal space. Attached Figure Description

[0016] Figure 1 This is a circuit structure block diagram of the first embodiment of the voltage sampling circuit of the photovoltaic inverter provided by this utility model; Figure 2 This is a structural block diagram of the photovoltaic inverter system to which the voltage sampling circuit of the photovoltaic inverter provided by this utility model is applied; Figure 3 yes Figure 1 A schematic diagram of the voltage sampling circuit of the corresponding photovoltaic inverter; Figure 4 This is a circuit structure block diagram of the second embodiment of the voltage sampling circuit of the photovoltaic inverter provided by this utility model; Figure 5 yes Figure 4 A schematic diagram of the voltage sampling circuit of the corresponding photovoltaic inverter. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0018] In existing technologies, when implementing the multiplexing of sampled voltage signals, multiple high-impedance modules need to be set up in parallel at the sampling source for signal sampling. Furthermore, the voltage follower stage after the high-impedance modules is not multiplexed, resulting in an excessive number of operational amplifiers required. The technical solution of this invention, by multiplexing the high-impedance modules and the first-stage voltage follower circuit, significantly reduces the number of circuit components, optimizes PCB layout space, and lowers system costs while ensuring the accuracy of the sampled voltage signal.

[0019] Example 1 Reference Figure 1 This utility model provides a voltage sampling circuit for a photovoltaic inverter, comprising a signal input terminal, a high-impedance module, a first-stage voltage follower circuit, a differential operation circuit, a second-stage voltage follower circuit, and a signal output terminal connected in sequence; wherein, The signal input terminals include a first signal input terminal A1, a second signal input terminal B1, and a third signal input terminal C1. The high-impedance modules include a first high-impedance module 11, a second high-impedance module 12, and a third high-impedance module 13. The first-stage voltage follower circuit includes a first voltage follower 21, a second voltage follower 22, and a third voltage follower 23. The differential operation circuit includes a first differential circuit 31 and a second differential circuit 32. The second-stage voltage follower circuit includes a fourth voltage follower 41 and a fifth voltage follower 42. The signal output terminals include a first signal output terminal Vout1 and a second signal output terminal Vout2.

[0020] Connection relationship: The first signal input terminal A1 is connected to the first input terminal of the first differential circuit 31 via the first high-impedance module 11 and the first voltage follower 21 in sequence; the second signal input terminal B1 is connected to the second input terminal of the first differential circuit 31 and the first input terminal of the second differential circuit 32 via the second high-impedance module 12 and the second voltage follower 22 in sequence; the third signal input terminal C1 is connected to the second input terminal of the second differential circuit 32 via the third high-impedance module 13 and the third voltage follower 23 in sequence; the output terminal of the first differential circuit 31 is connected to the first signal output terminal Vout1 via the fourth voltage follower 41, and the output terminal of the second differential circuit 32 is connected to the second signal output terminal Vout2 via the fifth voltage follower 42.

[0021] In this embodiment, the first high-impedance module 11, the second high-impedance module 12, and the third high-impedance module 13 are used to achieve impedance-isolated sampling. Since the sampling voltage, such as grid voltage, inverter voltage, and bus voltage, is typically high voltage, reaching hundreds of volts or thousands of volts, the high-impedance modules can attenuate the high-voltage signal into a low-voltage signal suitable for the output of subsequent circuits through voltage division. Each of the first high-impedance module 11, the second high-impedance module 12, and the third high-impedance module 13 can be composed of multiple resistors connected in series, and the specific number of resistors connected in series can be set according to actual needs; furthermore, the resistance values ​​of each of the three modules can be set to the megaohm level.

[0022] In this embodiment, the first voltage follower 21, the second voltage follower 22, and the third voltage follower 23 are used to achieve impedance matching and signal buffering to ensure signal accuracy.

[0023] In this embodiment, the first differential circuit 31 and the second differential circuit 32 are used to suppress common-mode interference and extract the target sampling voltage.

[0024] In this embodiment, the fourth voltage follower 41 and the fifth voltage follower 42 are used to perform secondary buffering and impedance matching on the signals output by the first differential circuit 31 and the second differential circuit 32, respectively. By driving the input terminal of the subsequent controller with low output impedance, the controller avoids affecting the output characteristics of the differential operation circuit, thus ensuring the stability and accuracy of the sampled signal.

[0025] The voltage sampling circuit of this photovoltaic inverter is applicable to scenarios where one of the three sampled voltage signals needs to be multiplexed. For example, when applied to... Figure 2 The sampling of the positive half bus voltage signal BUS_P, the negative half bus voltage signal BUS_N, and the midpoint of the bus voltage BUS_M of the photovoltaic inverter system shown.

[0026] The specific processing procedure is as follows: The first signal input terminal A1 receives the first sampled voltage signal, such as the positive half-bus voltage signal BUS_P. This first sampled voltage signal is divided by the first high-impedance module 11 and then input to the first voltage follower 21. The second signal input terminal B1 receives the second sampled voltage signal, such as the midpoint of the bus voltage BUS-M. This second sampled voltage signal is divided by the second high-impedance module 12 and then used as a common reference signal input to the second voltage follower 22. The third signal input terminal C1 receives the third sampled voltage signal, such as the negative half-bus voltage signal BUS_N. This third sampled voltage signal is divided by the third high-impedance module 13 and then input to the third voltage follower 23. The high impedance at the input terminals of the first voltage follower 21, the second voltage follower 22, and the third voltage follower 23 ensures the accuracy of the high-impedance voltage division, while the low impedance at the output terminals drives the subsequent differential circuit.

[0027] The first input terminal of the first differential circuit 31 is connected to the first sampled voltage signal after processing, such as the processed positive half-bus voltage signal BUS_P. The second input terminal is connected to the second sampled voltage signal, such as the midpoint of the bus voltage BUS_M. The first differential circuit 31 calculates the difference between the two input voltage signals to obtain the first set of voltage difference signals. The first input terminal of the second differential circuit 32 is connected to the second sampled voltage signal, the midpoint of the bus voltage BUS_M. The second input terminal is connected to the third sampled voltage signal, such as the negative half-bus voltage signal BUS_N. The second differential circuit 32 calculates the difference between the two input voltage signals to obtain the second set of voltage difference signals.

[0028] The first set of voltage difference signals output from the first differential circuit 31 and the second set of voltage difference signals output from the second differential circuit 32 need to be transmitted to the inverter controller. To avoid the influence of the controller's input impedance on the differential output, the signals output from the first differential circuit 31 and the second differential circuit 32 are buffered and impedance matched twice by the fourth voltage follower 41 and the fifth voltage follower 42 respectively to ensure stable signal transmission and guarantee sampling accuracy. It should be noted that if the circuit is used to sample the bus voltage, since the sampling of the bus voltage does not require boosting the output voltage, a bias circuit is not required, and the differential output directly reflects the true voltage difference.

[0029] In this circuit, the second sampled voltage signal is processed sequentially by the second high-impedance module 12 and the second voltage follower 22, and then synchronously transmitted to the first differential circuit 31 and the second differential circuit 32 for differential operation. That is, the sampled voltage signal transmitted by a set of high-impedance modules and voltage followers can simultaneously provide input for the operation of two differential circuits. Understandably, the circuit structure can be optimized as needed to allow the sampled voltage signal transmitted by a set of high-impedance modules and voltage followers to simultaneously provide input for the operation of multiple differential circuits. Therefore, during voltage sampling, there is no need to repeatedly set up high-impedance modules and voltage followers for the same sampled signal, effectively reducing the number of related components such as operational amplifiers, and thus reducing the PCB layout area.

[0030] The technical solution of this embodiment involves setting three signal input terminals to connect to the sampled voltage signal. The sampled voltage signal is processed by corresponding high-impedance modules and voltage followers, and then output to the first differential circuit 31 and the second differential circuit 32. After further processing by the fourth voltage follower 41 and the fifth voltage follower 42, it is output to the corresponding first signal output terminal Vout1 and the second signal output terminal Vout2. The sampled voltage signal transmitted through a set of high-impedance modules and voltage followers can simultaneously provide input for the operation of multiple differential circuits, reducing the number of operational amplifiers in the sampling circuit. This ensures sampling accuracy while reducing hardware costs, saving PCB board layout area, and improving the utilization rate and power density of the photovoltaic inverter's internal space.

[0031] Reference Figure 3 In one embodiment, the first voltage follower 21 includes a first resistor R1, a second resistor R2, a first capacitor C1, and a first operational amplifier U1; one end of the first resistor R1 and the first capacitor C1 are connected in parallel and connected to the positive input terminal of the first operational amplifier U1, and the other end is grounded; one end of the second resistor R2 is connected to the first high-impedance module 11, and the other end is connected to the positive input terminal of the first operational amplifier U1; the output terminal of the first operational amplifier U1 is connected to the negative input terminal of the first operational amplifier U1 and the first input terminal of the first differential circuit 31. The second voltage follower 22 includes a third resistor R3, a fourth resistor R4, a second capacitor C2, and a second operational amplifier U2; one end of the third resistor R3 and the second capacitor C2 are connected in parallel to the positive input terminal of the second operational amplifier U2, and the other end is grounded; one end of the fourth resistor R4 is connected to the second high-impedance module 12, and the other end is connected to the positive input terminal of the second operational amplifier U2; the output terminal of the second operational amplifier U2 is connected to the negative input terminal of the second operational amplifier U2, the second input terminal of the first differential circuit 31, and the first input terminal of the second differential circuit 32. The third voltage follower 23 includes a fifth resistor R5, a sixth resistor R6, a third capacitor C3, and a third operational amplifier U3; one end of the fifth resistor R5 and the third capacitor C3 are connected in parallel to the positive input terminal of the third operational amplifier U3, and the other end is grounded; one end of the sixth resistor R6 is connected to the third high-impedance module 13, and the other end is connected to the positive input terminal of the third operational amplifier U3; the output terminal of the third operational amplifier U3 is connected to the negative input terminal of the third operational amplifier U3 and the second input terminal of the second differential circuit 32.

[0032] In this embodiment, the first voltage follower 21, the second voltage follower 22, and the third voltage follower 23 achieve voltage following function by connecting the output terminal of the corresponding operational amplifier to the negative input terminal. The parallel resistor and capacitor can suppress high-frequency noise, and the resistor also serves as a current limiting protection. The output terminal of the second voltage follower 22 is connected to two differential circuits at the same time, realizing the reuse of the follower and the corresponding second high-impedance module 12, reducing the number of components and PCB layout area.

[0033] Reference Figure 3 In one embodiment, the first differential circuit 31 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fourth capacitor C4, a fifth capacitor C5, and a fourth operational amplifier U4; one end of the seventh resistor R7 is connected to the output terminal of the first voltage follower 21, and the other end is connected to the positive input terminal of the fourth operational amplifier U4; one end of the ninth resistor R9 connected in parallel with the fourth capacitor C4 is connected to the positive input terminal of the fourth operational amplifier U4, and the other end is grounded; one end of the eighth resistor R8 is connected to the output terminal of the second voltage follower 22, and the other end is connected to the negative input terminal of the fourth operational amplifier U4; one end of the tenth resistor R10 connected in parallel with the fifth capacitor C5 is connected to the negative input terminal of the fourth operational amplifier U4, and the other end is connected to the output terminal of the fourth operational amplifier U4; and the output terminal of the fourth operational amplifier U4 is connected to the input terminal of the fourth voltage follower 41. The second differential circuit 32 includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a sixth capacitor C6, a seventh capacitor C7, and a fifth operational amplifier U5. One end of the eleventh resistor R11 is connected to the output of the second voltage follower 22, and the other end is connected to the positive input of the fifth operational amplifier U5. The thirteenth resistor R13 and the sixth capacitor C6 are connected in parallel, with one end connected to the positive input of the fifth operational amplifier U5 and the other end grounded. One end of the twelfth resistor R12 is connected to the output of the third voltage follower 23, and the other end is connected to the negative input of the fifth operational amplifier U5. The fourteenth resistor R14 and the seventh capacitor C7 are connected in parallel, with one end connected to the negative input of the fifth operational amplifier U5 and the other end connected to the output of the fifth operational amplifier U5. The output of the fifth operational amplifier U5 is connected to the input of the fifth voltage follower 42.

[0034] In this embodiment, the first differential circuit 31 takes the outputs of the first voltage follower 21 and the second voltage follower 22 as inputs, and the second differential circuit 32 takes the outputs of the second voltage follower 22 and the third voltage follower 23 as inputs. The two circuits multiplex the second sampled signal processed by the second high-impedance module 12 and the second voltage follower 22, which simplifies the circuit structure while ensuring the accuracy of differential operation.

[0035] Reference Figure 3 In one embodiment, the aforementioned fourth voltage follower 41 includes a fifteenth resistor R15, an eighth capacitor C8, and a sixth operational amplifier U6; one end of the fifteenth resistor R15 is connected to the output terminal of the first differential circuit 31, and the other end is connected to the positive input terminal of the sixth operational amplifier U6; one end of the eighth capacitor C8 is connected to the positive input terminal of the sixth operational amplifier U6, and the other end is grounded; the output terminal of the sixth operational amplifier U6 is connected to the negative input terminal of the sixth operational amplifier U6 and the first signal output terminal Vout1; The fifth voltage follower 42 includes a sixteenth resistor R16, a ninth capacitor C9, and a seventh operational amplifier U7; one end of the sixteenth resistor R16 is connected to the output of the second differential circuit 32, and the other end is connected to the positive input of the seventh operational amplifier U7; one end of the ninth capacitor C9 is connected to the positive input of the seventh operational amplifier U7, and the other end is grounded; the output of the seventh operational amplifier U7 is connected to the negative input of the seventh operational amplifier U7 and the second signal output Vout2.

[0036] In this embodiment, the fourth voltage follower 41 and the fifth voltage follower 42 realize the voltage following function, and can buffer and impedance match the voltage signals output by the first differential circuit 31 and the second differential circuit 32 respectively, so as to ensure that the signal is stably transmitted to the signal output terminal; the resistor plays the role of current limiting protection, and the capacitor is used to filter out high-frequency noise and optimize the quality of the output signal [1].

[0037] Example 2 Reference Figure 4 In the second embodiment, the voltage sampling circuit of the photovoltaic inverter further includes a first bias circuit 51, a second bias circuit 52 and a third bias circuit 53, the differential operation circuit further includes a third differential circuit 33, the second-stage voltage follower circuit further includes a sixth voltage follower 43, and the signal output terminal further includes a third signal output terminal Vout3. The first input terminal of the third differential circuit 33 is connected to the output terminal of the third voltage follower 23, the second input terminal of the third differential circuit 33 is connected to the output terminal of the first voltage follower 21, and the output terminal of the third differential circuit 33 is connected to the third signal output terminal Vout3 via the sixth voltage follower 43; the first bias circuit 51 is connected to the bias terminal of the fourth voltage follower 41, the second bias circuit 52 is connected to the bias terminal of the fifth voltage follower 42, and the third bias circuit 53 is connected to the bias terminal of the sixth voltage follower 43.

[0038] In this embodiment, the third differential circuit 33 calculates the third set of voltage difference signals by multiplexing the output signals of the first voltage follower 21 and the third voltage follower 23, thus expanding the types of sampling signals.

[0039] The first bias circuit 51, the second bias circuit 52, and the third bias circuit 53 are used to introduce a reference voltage signal to boost the voltage signals that may contain negative values ​​output by the corresponding first differential circuit 31, second differential circuit 32, and third differential circuit 33, making them greater than or equal to 0.

[0040] This embodiment is applicable to application scenarios that require sampling and processing of negative voltages and where multiple sampled voltage signals need to be multiplexed, such as sampling. Figure 2 The inverter voltages Uinv_a, Uinv_b, Uinv_c and the grid voltages Gird_a, Gird_b, Gird_c are shown.

[0041] The voltage sampling circuit of the photovoltaic inverter in this embodiment is an extension of the first embodiment. It is suitable for sampling scenarios with negative voltage components, such as sampling AC voltage signals like grid voltage and inverter voltage. The addition of a new circuit module enables effective processing of negative voltage signals. The specific sampling process is as follows: The first signal input terminal A1 is connected to the first sampled voltage signal, such as the A-phase voltage of the power grid or the A-phase voltage of the inverter; the second signal input terminal B1 is connected to the second sampled voltage signal, such as the B-phase voltage of the power grid or the B-phase voltage of the inverter; and the third signal input terminal C1 is connected to the third sampled voltage signal, such as the C-phase voltage of the power grid or the C-phase voltage of the inverter. The first sampled voltage signal, the second sampled voltage signal, and the third sampled voltage signal are respectively processed by voltage divider by the first high-impedance module 11, the second high-impedance module 12, and the third high-impedance module 13, and then respectively connected to the first voltage follower 21, the second voltage follower 22, and the third voltage follower 23.

[0042] The first differential circuit 31 receives the output signal of the first voltage follower 21 at its first input terminal and the output signal of the second voltage follower 22 at its second input terminal. Through calculation, it obtains a first set of voltage difference signals, such as the line voltage between phase A and phase B. The second differential circuit 32 receives the output signal of the second voltage follower 22 at its first input terminal and the output signal of the third voltage follower 23 at its second input terminal. Through calculation, it obtains a second set of voltage difference signals, such as the line voltage between phase B and phase C. The third differential circuit 33 receives the output signal of the third voltage follower 23 at its first input terminal and the output signal of the first voltage follower 21 at its second input terminal. Through calculation, it obtains a third set of voltage difference signals, such as the line voltage between phase C and phase A.

[0043] In this circuit, the output signal of the first voltage follower 21 simultaneously provides input to both the first differential circuit 31 and the third differential circuit 33; the output signal of the second voltage follower 22 simultaneously provides input to both the first differential circuit 31 and the second differential circuit 32; and the output signal of the third voltage follower 23 simultaneously provides input to both the second differential circuit 32 and the third differential circuit 33. This achieves the multiplexing of three high-impedance modules and three voltage followers, eliminating the need to set up separate high-impedance modules and voltage followers for each group of line voltage sampling. The sampling of three groups of line voltages can be completed using only three groups of high-impedance modules and three voltage followers in the first-stage voltage calculation circuit, significantly reducing the number of components.

[0044] Since the mains voltage and inverter voltage contain negative voltage components, such as the positive and negative half-cycles of an AC signal, this embodiment connects a first bias circuit 51, a second bias circuit 52, and a third bias circuit 53 between the three differential circuits and the corresponding second-stage voltage follower, respectively. By setting the bias circuits to introduce a reference voltage, the signal output by the differential circuit, which may contain negative values, is amplified to a voltage signal greater than or equal to 0, ensuring that the signal can be effectively identified and acquired by the controller.

[0045] The voltage signal output from the first differential circuit 31 is boosted by the first bias circuit 51 and then fed into the fourth voltage follower 41; the voltage signal output from the second differential circuit 32 is boosted by the second bias circuit 52 and then fed into the fifth voltage follower 42; the voltage signal output from the third differential circuit 33 is boosted by the third bias circuit 53 and then fed into the newly added sixth voltage follower 43. The fourth, fifth, and sixth voltage followers drive the first, second, and third signal output terminals respectively through low output impedance, stably transmitting the three sets of processed voltage signals to the controller to ensure sampling accuracy.

[0046] This embodiment further achieves effective sampling of negative voltage signals by expanding the number of differential circuits and introducing a bias circuit, thus expanding the circuit's applicability. Simultaneously, the bias circuit design ensures effective conversion of negative voltage signals, and combined with the impedance matching of the two-stage voltage follower, it maintains high sampling accuracy even in complex voltage scenarios, meeting the sampling and monitoring needs of photovoltaic inverters for various types of voltage signals.

[0047] Reference Figure 5 In one embodiment, the third differential circuit 33 described above includes a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a tenth capacitor C10, an eleventh capacitor C11, and an eighth operational amplifier U8. One end of the seventeenth resistor R17 is connected to the output of the third voltage follower 23, and the other end is connected to the positive input of the eighth operational amplifier U8; the nineteenth resistor R19 and the tenth capacitor C10 are connected in parallel, with one end connected to the positive input of the eighth operational amplifier U8 and the other end grounded. One end of the eighteenth resistor R18 is connected to the output of the first voltage follower 21, and the other end is connected to the negative input of the eighth operational amplifier U8; the twentieth resistor R20 and the eleventh capacitor C11 are connected in parallel, with one end connected to the negative input of the eighth operational amplifier U8 and the other end connected to the output of the eighth operational amplifier U8; and the output of the eighth operational amplifier U8 is connected to the input of the sixth voltage follower 43.

[0048] In this embodiment, the third differential circuit 33 reuses the signals processed by the previous stage, namely the outputs of the third voltage follower 23 and the first voltage follower 21, to calculate the third set of voltage difference signals, such as the voltage difference between the first signal input terminal and the third signal input terminal. For example, in a power grid voltage sampling scenario, it can be used to calculate the line voltages of phase C and phase A, and work with the first and second differential circuits to achieve full sampling of the three-phase line voltages. At the same time, this circuit, in conjunction with the third bias circuit 53, raises the difference signal that may contain negative voltage components to a non-negative signal, ensuring that the signal can be effectively acquired by the controller, adapting to sampling scenarios containing negative voltages, such as AC voltage sampling.

[0049] Reference Figure 5 In one embodiment, the sixth voltage follower 43 includes a twenty-first resistor R21, a twelfth capacitor C12, and a ninth operational amplifier U9; one end of the twenty-first resistor R21 is connected to the output terminal of the third differential circuit 33, and the other end is connected to the positive input terminal of the ninth operational amplifier U9; one end of the twelfth capacitor C12 is connected to the positive input terminal of the ninth operational amplifier U9, and the other end is grounded; the output terminal of the ninth operational amplifier U9 is connected to the negative input terminal of the ninth operational amplifier U9 and the third signal output terminal Vout3.

[0050] In this embodiment, the sixth voltage follower 43 not only ensures the stable transmission of the third set of sampling signals, such as the voltage difference signal of the power grid or inverter line, but also avoids the need to set up an additional high-impedance module and the first-stage voltage follower by reusing the signals processed by the previous stage circuit, further simplifying the circuit structure and saving PCB layout area.

[0051] Reference Figure 5 In one embodiment, the first bias circuit 51 includes a twenty-second resistor R22, one end of which is connected to a power supply VCC, and the other end is connected to the positive input terminal of the sixth operational amplifier U6; the second bias circuit 52 includes a twenty-third resistor R23, one end of which is connected to the power supply VCC, and the other end is connected to the positive input terminal of the seventh operational amplifier U7; the third bias circuit 53 includes a twenty-fourth resistor R24, one end of which is connected to the power supply VCC, and the other end is connected to the positive input terminal of the ninth operational amplifier U9.

[0052] In sampling scenarios such as mains voltage and inverter voltage, the voltage difference signal output by the differential circuit may contain negative voltage components, such as the negative half-cycle of an AC signal, while the controller can usually only recognize non-negative voltage signals. In this case, by using pull-up resistors, namely resistors R22 (22nd), R23 (23rd), and R24 (24th), bias voltages are injected into the output terminals of the three differential circuits respectively, raising the originally potentially negative signal to a non-negative voltage signal, ensuring that the signal can be effectively acquired and processed by the controller.

[0053] This utility model also provides a voltage sampling device for a photovoltaic inverter, which includes the voltage sampling circuit of the photovoltaic inverter as described above. The detailed structure of the voltage sampling circuit can be found in the above embodiments and will not be repeated here. It is understood that since the voltage sampling circuit of the photovoltaic inverter described above is used in the voltage sampling device of this utility model, the embodiments of the voltage sampling device of this utility model include all the technical solutions of all embodiments of the voltage sampling circuit of the photovoltaic inverter described above, and the achieved technical effects are also completely the same, and will not be repeated here.

[0054] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A voltage sampling circuit of a photovoltaic inverter, characterized by, It includes a signal input terminal, a high-impedance module, a first-stage voltage follower circuit, a differential operation circuit, a second-stage voltage follower circuit, and a signal output terminal connected in sequence. The signal input terminal includes a first signal input terminal, a second signal input terminal, and a third signal input terminal; the high-impedance module includes a first high-impedance module, a second high-impedance module, and a third high-impedance module; the first-stage voltage follower circuit includes a first voltage follower, a second voltage follower, and a third voltage follower; the differential operation circuit includes a first differential circuit and a second differential circuit; the second-stage voltage follower circuit includes a fourth voltage follower and a fifth voltage follower; and the signal output terminal includes a first signal output terminal and a second signal output terminal. The first signal input terminal is connected to the first input terminal of the first differential circuit via the first high-impedance module and the first voltage follower in sequence; The second signal input terminal is connected sequentially to the second input terminal of the first differential circuit and the first input terminal of the second differential circuit via the second high-impedance module and the second voltage follower. The third signal input terminal is connected to the second input terminal of the second differential circuit via the third high-impedance module and the third voltage follower in sequence; The output terminal of the first differential circuit is connected to the first signal output terminal via the fourth voltage follower, and the output terminal of the second differential circuit is connected to the second signal output terminal via the fifth voltage follower.

2. The voltage sampling circuit of the photovoltaic inverter as described in claim 1, characterized in that, The first voltage follower includes a first resistor, a second resistor, a first capacitor, and a first operational amplifier; One end of the first resistor and the first capacitor are connected in parallel to the positive input terminal of the first operational amplifier, and the other end is grounded; one end of the second resistor is connected to the first high-impedance module, and the other end is connected to the positive input terminal of the first operational amplifier; the output terminal of the first operational amplifier is connected to the negative input terminal of the first operational amplifier and the first input terminal of the first differential circuit. The second voltage follower includes a third resistor, a fourth resistor, a second capacitor, and a second operational amplifier; The third resistor is connected in parallel with the second capacitor, with one end connected to the positive input terminal of the second operational amplifier and the other end grounded; one end of the fourth resistor is connected to the second high-impedance module and the other end is connected to the positive input terminal of the second operational amplifier; the output terminal of the second operational amplifier is connected to the negative input terminal of the second operational amplifier, the second input terminal of the first differential circuit, and the first input terminal of the second differential circuit. The third voltage follower includes a fifth resistor, a sixth resistor, a third capacitor, and a third operational amplifier; The fifth resistor is connected in parallel with the third capacitor, with one end connected to the positive input terminal of the third operational amplifier and the other end grounded; one end of the sixth resistor is connected to the third high-impedance module and the other end is connected to the positive input terminal of the third operational amplifier; the output terminal of the third operational amplifier is connected to the negative input terminal of the third operational amplifier and the second input terminal of the second differential circuit.

3. The voltage sampling circuit of the photovoltaic inverter as described in claim 1, characterized in that, The first differential circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor, a fifth capacitor, and a fourth operational amplifier; One end of the seventh resistor is connected to the output terminal of the first voltage follower, and the other end is connected to the positive input terminal of the fourth operational amplifier; the ninth resistor and the fourth capacitor are connected in parallel, with one end connected to the positive input terminal of the fourth operational amplifier and the other end grounded. One end of the eighth resistor is connected to the output terminal of the second voltage follower, and the other end is connected to the negative input terminal of the fourth operational amplifier; one end of the tenth resistor and the fifth capacitor are connected in parallel to the negative input terminal of the fourth operational amplifier, and the other end is connected to the output terminal of the fourth operational amplifier; and the output terminal of the fourth operational amplifier is connected to the input terminal of the fourth voltage follower. The second differential circuit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a seventh capacitor, and a fifth operational amplifier; One end of the eleventh resistor is connected to the output terminal of the second voltage follower, and the other end is connected to the positive input terminal of the fifth operational amplifier; the thirteenth resistor is connected in parallel with the sixth capacitor, and one end is connected to the positive input terminal of the fifth operational amplifier, while the other end is grounded. One end of the twelfth resistor is connected to the output terminal of the third voltage follower, and the other end is connected to the negative input terminal of the fifth operational amplifier; the fourteenth resistor and the seventh capacitor are connected in parallel, with one end connected to the negative input terminal of the fifth operational amplifier and the other end connected to the output terminal of the fifth operational amplifier; and the output terminal of the fifth operational amplifier is connected to the input terminal of the fifth voltage follower.

4. The voltage sampling circuit of the photovoltaic inverter as described in claim 1, characterized in that, The fourth voltage follower includes a fifteenth resistor, an eighth capacitor, and a sixth operational amplifier; One end of the fifteenth resistor is connected to the output terminal of the first differential circuit, and the other end is connected to the positive input terminal of the sixth operational amplifier; one end of the eighth capacitor is connected to the positive input terminal of the sixth operational amplifier, and the other end is grounded; the output terminal of the sixth operational amplifier is connected to the negative input terminal of the sixth operational amplifier and the first signal output terminal. The fifth voltage follower includes a sixteenth resistor, a ninth capacitor, and a seventh operational amplifier; One end of the sixteenth resistor is connected to the output terminal of the second differential circuit, and the other end is connected to the positive input terminal of the seventh operational amplifier; one end of the ninth capacitor is connected to the positive input terminal of the seventh operational amplifier, and the other end is grounded; the output terminal of the seventh operational amplifier is connected to the negative input terminal of the seventh operational amplifier and the second signal output terminal.

5. The voltage sampling circuit of a photovoltaic inverter as claimed in claim 4, characterized in that, The voltage sampling circuit of the photovoltaic inverter further includes a first bias circuit, a second bias circuit, and a third bias circuit; the differential operation circuit further includes a third differential circuit; the second-stage voltage follower circuit further includes a sixth voltage follower; and the signal output terminal further includes a third signal output terminal. The first input terminal of the third differential circuit is connected to the output terminal of the third voltage follower, the second input terminal of the third differential circuit is connected to the output terminal of the first voltage follower, and the output terminal of the third differential circuit is connected to the third signal output terminal via the sixth voltage follower. The first bias circuit is connected to the bias terminal of the fourth voltage follower, the second bias circuit is connected to the bias terminal of the fifth voltage follower, and the third bias circuit is connected to the bias terminal of the sixth voltage follower.

6. The voltage sampling circuit of the photovoltaic inverter as described in claim 5, characterized in that, The third differential circuit includes a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a tenth capacitor, an eleventh capacitor, and an eighth operational amplifier; One end of the seventeenth resistor is connected to the output terminal of the third voltage follower, and the other end is connected to the positive input terminal of the eighth operational amplifier; the nineteenth resistor and the tenth capacitor are connected in parallel, with one end connected to the positive input terminal of the eighth operational amplifier and the other end grounded. One end of the eighteenth resistor is connected to the output terminal of the first voltage follower, and the other end is connected to the negative input terminal of the eighth operational amplifier; the twentieth resistor and the eleventh capacitor are connected in parallel, with one end connected to the negative input terminal of the eighth operational amplifier and the other end connected to the output terminal of the eighth operational amplifier; and the output terminal of the eighth operational amplifier is connected to the input terminal of the sixth voltage follower.

7. The voltage sampling circuit of a photovoltaic inverter as claimed in claim 5, characterized in that, The sixth voltage follower includes a twenty-first resistor, a twelfth capacitor, and a ninth operational amplifier; One end of the 21st resistor is connected to the output terminal of the third differential circuit, and the other end is connected to the positive input terminal of the ninth operational amplifier; One end of the twelfth capacitor is connected to the positive input terminal of the ninth operational amplifier, and the other end is grounded; the output terminal of the ninth operational amplifier is connected to the negative input terminal of the ninth operational amplifier and the third signal output terminal.

8. The voltage sampling circuit of the photovoltaic inverter as described in claim 7, characterized in that, The first bias circuit includes a twenty-second resistor, one end of which is connected to a power supply and the other end is connected to the positive input terminal of the sixth operational amplifier. The second bias circuit includes a twenty-third resistor, one end of which is connected to the power supply and the other end of which is connected to the positive input terminal of the seventh operational amplifier. The third bias circuit includes a twenty-fourth resistor, one end of which is connected to the power supply and the other end of which is connected to the positive input terminal of the ninth operational amplifier.

9. A voltage sampling device for a photovoltaic inverter, characterized by The voltage sampling device of the photovoltaic inverter includes the voltage sampling circuit of the photovoltaic inverter as described in any one of claims 1-8.

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