Display circuitry and storage devices

Abstract

This utility model relates to the field of storage device technology, and more particularly to a display circuit and storage device for a storage device. The display circuit includes: a data acquisition module, a processing module, a display module, and a storage module. The data acquisition module is located between the data transmission interface and the storage module within the storage device. The processing module is connected to both the data acquisition module and the display module. The data transmission interface is also used to connect to external devices. The data transmission interface is used to transmit the operating current provided by the external device to the storage module for power supply through the data acquisition module. The data acquisition module is used to acquire the operating current and transmit the generated current signal to the processing module. The processing module, upon receiving the current signal, generates a power consumption display signal and transmits it to the display module for power consumption display. Compared to existing technologies, this utility model allows users to promptly understand the current power consumption of the storage module by viewing the power consumption displayed on the display module.

Description

Technical Field

[0001] This utility model relates to the field of storage device technology, and in particular to a display circuit and storage device for a storage device. Background Technology

[0002] In the digital age, portable storage devices (such as USB flash drives) play an important role in data storage and transmission.

[0003] In some cases, storage modules (such as storage chips) in storage devices may experience excessive power consumption. For example, aging storage devices can lead to increased power consumption of the storage modules, prolonged large-scale data transfers (such as high-definition video or large datasets) can cause the storage modules to operate under high load, resulting in increased power consumption, and operating in high-temperature environments can also lead to increased power consumption of storage devices.

[0004] Excessive power consumption of storage modules can lead to data corruption or data transmission errors within the storage device, resulting in the loss or damage of important user data. Therefore, enabling users to understand the current power consumption of storage modules in a timely manner is a technical problem that urgently needs to be solved. Utility Model Content

[0005] The main purpose of this utility model is to provide a display circuit and storage device for a storage device, which aims to solve the existing technical problem that users cannot know the current power consumption of the storage module in a timely manner.

[0006] To achieve the above objectives, this utility model proposes a display circuit for a storage device, the display circuit comprising: a data acquisition module, a processing module, a display module, and a storage module;

[0007] The acquisition module is located between the data transmission interface in the storage device and the storage module. The processing module is connected to both the acquisition module and the display module. The data transmission interface is also used to connect to external devices.

[0008] The data transmission interface is used to transmit the operating current provided by the external device to the storage module through the acquisition module for power supply;

[0009] The acquisition module is used to acquire the operating current and transmit the generated current signal to the processing module;

[0010] The processing module is used to transmit the generated power consumption display signal to the display module for power consumption display when the current signal is received.

[0011] In one embodiment, the acquisition module includes: an acquisition unit and an amplification unit;

[0012] The acquisition unit is connected to the data transmission interface, the amplification unit, and the storage module, respectively; the amplification unit is connected to the processing module.

[0013] The acquisition unit is used to acquire the operating current, shunt the operating current, and transmit the obtained high-side current signal and low-side current signal to the amplification unit.

[0014] The amplification unit is used to receive a reference voltage signal, and differentially amplify the high-side current signal and the low-side current signal through the reference voltage signal, and transmit the obtained differentially amplified current signal to the processing module.

[0015] The processing module is also used to generate a power consumption display signal when it receives the reference voltage signal and the differentially amplified current signal.

[0016] In one embodiment, the acquisition unit includes: a first capacitor and a first resistor to a third resistor;

[0017] The first end of the first capacitor is connected to the second end of the second resistor and the amplification unit, the second end of the first capacitor is connected to the second end of the third resistor and the amplification unit, the first end of the first resistor is connected to the data transmission interface and the first end of the second resistor, and the second end of the first resistor is connected to the storage module and the first end of the third resistor.

[0018] In one embodiment, the amplification unit includes: an amplification chip, a second capacitor, a third capacitor, and a fourth to a sixth resistor;

[0019] The first and second input terminals of the amplification chip are both connected to the acquisition unit. The output terminal of the amplification chip is connected to the first terminal of the second capacitor and the first terminal of the fourth resistor, respectively. The reference input terminal of the amplification chip is connected to the first terminal of the third capacitor, the first terminal of the fifth resistor, and the first terminal of the sixth resistor, respectively. The ground terminal of the amplification chip is grounded. The power supply terminal of the amplification chip is connected to the data transmission interface. The second terminal of the second capacitor is grounded. The first terminal of the third capacitor is connected to the processing module. The second terminal of the third capacitor is grounded. The second terminal of the fourth resistor is connected to the processing module. The second terminal of the fifth resistor is connected to the second terminal of the third capacitor. The second terminal of the sixth resistor is connected to the data transmission interface.

[0020] In one embodiment, the display module includes: a reset unit and a display unit;

[0021] The reset unit is connected to both the processing module and the display unit, and the display unit is also connected to the processing module.

[0022] The processing module is further configured to transmit the generated delay signal to the reset unit and the generated power consumption display signal to the display unit when the current signal is received;

[0023] The reset unit is used to transmit the generated backlight power to the display unit for power supply after a preset delay when the delay signal is received;

[0024] The display unit is used to display the power consumption display signal.

[0025] In one embodiment, the reset unit includes: a reset chip, a fourth capacitor, a first switching transistor, and a seventh to a tenth resistor;

[0026] The power supply terminal of the reset chip is connected to the chip power supply and the first terminal of the fourth capacitor, respectively. The ground terminal of the reset chip is grounded, and the delay output terminal of the reset chip is connected to the second terminal of the seventh resistor and the first terminal of the eighth resistor, respectively.

[0027] The first terminal of the fourth capacitor is connected to the first terminal of the seventh resistor, the second terminal of the fourth capacitor is grounded, the gate of the first switch is connected to the second terminal of the eighth resistor, the second terminal of the ninth resistor and the first terminal of the tenth resistor respectively, the source of the first switch is grounded, the drain of the first switch is connected to the display unit, the first terminal of the ninth resistor is connected to the processing module, and the second terminal of the tenth resistor is grounded.

[0028] In one embodiment, the display unit includes: a display chip, a second switching transistor, and eleventh to thirteenth resistors;

[0029] The first ground terminal, the second ground terminal, and the third ground terminal of the display chip are all grounded. The backlight power input terminal of the display chip is connected to the first terminal of the eleventh resistor. The reset terminal of the display chip is connected to the processing module and the second terminal of the twelfth resistor. The command terminal, the data terminal, the clock terminal, and the chip select terminal of the display chip are respectively connected to the processing module. The power supply terminal of the display chip is connected to the first terminal of the twelfth resistor and the chip power supply.

[0030] The drain of the second switching transistor is connected to the second end of the eleventh resistor, the gate of the second switching transistor is connected to the reset unit and the first end of the thirteenth resistor, the source of the second switching transistor is connected to the chip power supply, and the second end of the thirteenth resistor is connected to the chip power supply.

[0031] In one embodiment, the storage module is also connected to the processing module;

[0032] The storage module is also used to transmit data with the external device through the data transmission interface;

[0033] The storage module is also used to transmit the generated capacity status signal to the processing module;

[0034] The processing module is further configured to transmit the generated capacity display signal to the display module for capacity display when the capacity status signal is received.

[0035] In one embodiment, the display circuit further includes: a positioning module;

[0036] The positioning module is connected to both the acquisition module and the processing module.

[0037] The positioning module is used to locate the storage device;

[0038] The positioning module is also used to transmit the generated positioning status signal to the processing module;

[0039] The processing module is further configured to transmit the generated status display signal to the display module for displaying the positioning status when the positioning status signal is received.

[0040] In addition, to achieve the above objectives, this utility model also proposes a storage device, which includes the display circuit of the storage device as described above.

[0041] This utility model proposes a display circuit and a storage device for a storage device. The display circuit includes: a data acquisition module, a processing module, a display module, and a storage module. The data acquisition module is located between the data transmission interface within the storage device and the storage module. The processing module is connected to both the data acquisition module and the display module. The data transmission interface is also used to connect to an external device. The data transmission interface is used to transmit the operating current provided by the external device to the storage module through the data acquisition module for power supply. The data acquisition module is used to acquire the operating current and transmit the generated current signal to the processing module. The processing module is used to, upon receiving the current signal, transmit the generated power consumption display signal to the display module for power consumption display.

[0042] Because this invention incorporates a display circuit within the storage device, the acquisition module in the display circuit can be located between the data transmission interface of the storage device and the storage module within the storage device. The acquisition module can acquire the operating current transmitted to the storage module and transmit the corresponding current signal to the processing module. Upon receiving the current signal, the processing module generates a power consumption display signal and transmits it to the display module for power consumption display. Compared to existing methods where users cannot immediately understand the current power consumption of the storage module, this invention converts the acquired operating current into a power consumption display signal and displays it through the display module, allowing users to promptly understand the current power consumption of the storage module by viewing the power consumption displayed on the display module. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0044] Figure 1 This is a schematic diagram of the structure of the first embodiment of the display circuit proposed in this utility model.

[0045] Figure 2 The circuit diagram of the acquisition unit and the amplification unit in the first embodiment of the display circuit proposed in this utility model embodiment;

[0046] Figure 3 This is a schematic diagram of the structure of the second embodiment of the display circuit proposed in this utility model.

[0047] Figure 4 The circuit diagram of the reset unit and the display unit in the second embodiment of the display circuit proposed in this utility model is shown.

[0048] Figure 5 This is a schematic diagram of the structure of the third embodiment of the display circuit proposed in this utility model.

[0049] Explanation of icon numbers:

[0050]

[0051] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0052] It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0053] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0054] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0055] Furthermore, the use of terms such as "first" and "second" in this utility model is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. If the combination of technical solutions is contradictory or impossible to implement, the user should consider such a combination of technical solutions to be non-existent and not within the scope of protection claimed by this utility model.

[0056] It should be noted that in the digital age, portable storage devices (such as USB flash drives) occupy an important position in the field of data storage and transmission.

[0057] In some cases, storage modules (such as storage chips) in storage devices may experience excessive power consumption. For example, aging storage devices can lead to increased power consumption of the storage modules, prolonged large-scale data transfers (such as high-definition video or large datasets) can cause the storage modules to operate under high load, resulting in increased power consumption, and operating in high-temperature environments can also lead to increased power consumption of storage devices.

[0058] Excessive power consumption of storage modules can lead to data corruption or data transmission errors within the storage device, resulting in the loss or damage of important user data. Therefore, enabling users to understand the current power consumption of storage modules in a timely manner is a technical problem that urgently needs to be solved.

[0059] To address the aforementioned technical problems, this embodiment provides a display circuit for a storage device. The present invention includes a display circuit within the storage device. A data acquisition module within the display circuit can be located between the data transmission interface of the storage device and the storage module. The acquisition module acquires the operating current transmitted to the storage module and transmits the corresponding current signal to a processing module. Upon receiving the current signal, the processing module generates a power consumption display signal and transmits it to the display module for power consumption display. Compared to existing methods where users cannot immediately understand the current power consumption of the storage module, this invention converts the acquired operating current into a power consumption display signal, which is then displayed by the display module. This allows users to promptly understand the current power consumption of the storage module by viewing the power consumption displayed on the display module.

[0060] For ease of understanding, the following is combined with Figures 1 to 5 The display circuit of the storage device provided in the embodiments of this utility model will be described in detail.

[0061] Reference Figure 1 , Figure 1 This is a schematic diagram of the structure of the first embodiment of the display circuit proposed in this utility model.

[0062] like Figure 1 As shown, in this embodiment, the display circuit of the storage device may include: a data acquisition module 2, a processing module 3, a display module 4, and a storage module 5;

[0063] The acquisition module 2 is located between the data transmission interface 1 and the storage module 5 in the storage device. The processing module 3 is connected to the acquisition module 2 and the display module 4 respectively. The data transmission interface 1 is also used to connect to the external device 6.

[0064] It should be noted that the aforementioned data transmission interface 1 can be an interface used to physically connect the storage module 5 within the storage device to the external device 6.

[0065] It is understood that the aforementioned external device 6 can be any device with data transmission capabilities, such as a computer, mobile phone, or tablet. Therefore, in this embodiment, the aforementioned data transmission interface 1 can be any data transmission interface that can be adapted to different types or models of the aforementioned external devices 6, such as a Type-C interface or a USB interface.

[0066] It is also understood that, in this embodiment, the storage module 5 can be any module in a traditional storage device that needs to store data through the data transmission interface 1, such as a storage chip or memory used for data storage in a storage device. This embodiment does not limit this. Figure 1As shown, in this embodiment, the data transmission end of the data transmission interface 1 can be directly connected to the storage module 5, thereby realizing data transmission between the storage module 5 and the external device 6.

[0067] To achieve power consumption display, such as Figure 1 As shown, in this embodiment, the data transmission interface 1 is used to transmit the operating current provided by the external device 6 to the storage module 5 through the acquisition module 2 for power supply.

[0068] The aforementioned acquisition module 2 is used to acquire the aforementioned operating current and transmit the generated current signal to the aforementioned processing module 3;

[0069] The aforementioned processing module 3 is used to transmit the generated power consumption display signal to the aforementioned display module 4 for power consumption display when the aforementioned current signal is received.

[0070] It should also be noted that the aforementioned acquisition module 2 can be a module with current or voltage acquisition function, such as a current sensor or voltage sensor. The aforementioned operating current can be the current required for the storage module 5 to operate. In traditional solutions, the data transmission interface 1 within the storage device can transmit the operating current provided by the external device 6 to the storage module 5 for power supply, enabling the storage module 5 to operate normally.

[0071] The aforementioned processing module 3 can be a module capable of receiving and processing current signals and transmitting the generated power consumption display signal to other modules, such as a microcontroller or single-chip microcomputer. This embodiment uses a CH32V208C chip for illustration. The aforementioned display module 4 can be a module with display functionality, such as a display screen. The aforementioned current signal can be a signal carrying the aforementioned operating current information. The aforementioned power consumption display signal can be a power consumption information display signal indicating the operation of the storage device and external device 6.

[0072] It should be emphasized that in this embodiment, the acquisition module 2 can be connected to the data transmission interface 1 and the storage module 5 respectively, so that the working current transmitted by the data transmission interface 1 can flow through the acquisition module 2 and then be transmitted to the storage module 5.

[0073] In the specific implementation, the user manually inserts the storage device (e.g., USB flash drive) into the external device 6 (e.g., mobile phone). When the data transmission interface 1 of the USB flash drive is connected to the external device 6, the external device 6 will provide the USB flash drive with the current required for operation (i.e., working current). At this time, the working current reaches the acquisition module 2 through the data transmission interface 1. While acquiring the working current, the acquisition module 2 also transmits the working current to the storage module 5 so that the storage module 5 can work normally.

[0074] When the acquisition module 2 completes the acquisition of the working current, it will generate a current signal and transmit the current signal to the processing module 3. The processing module 3 can process and calculate the current signal to obtain the power consumption display signal, and then transmit the power consumption display signal to the display module 4 for power consumption display.

[0075] It should also be emphasized that since calculating power consumption based on current is an existing technology, the processing module 3 in this embodiment can use any method to calculate power consumption based on current, and this embodiment does not limit this.

[0076] Furthermore, in order to acquire the operating current, continue as follows: Figure 1 As shown. In this embodiment, the acquisition module 2 includes: an acquisition unit 21 and an amplification unit 22.

[0077] The acquisition unit 21 is connected to the data transmission interface 1, the amplification unit 22 and the storage module 5 respectively, and the amplification unit 22 is connected to the processing module 3;

[0078] The acquisition unit 21 is used to acquire the operating current, shunt the operating current, and transmit the obtained high-side current signal and low-side current signal to the amplification unit 22.

[0079] The amplification unit 22 is used to receive a reference voltage signal, and differentially amplify the high-side current signal and the low-side current signal through the reference voltage signal, and transmit the obtained differentially amplified current signal to the processing module 3.

[0080] The processing module 3 is also used to generate a power consumption display signal when it receives the reference voltage signal and the differentially amplified current signal.

[0081] It should be noted that the aforementioned acquisition unit 21 can be any unit that has the function of acquiring the operating current and converting it into an electrical signal, such as a resistor. The aforementioned amplification unit 22 can be any unit that amplifies the acquired signal.

[0082] It should also be noted that the aforementioned high-side current signal can be a current signal acquired from the high-potential side of the current sampling point. The aforementioned low-side current signal can be a current signal acquired from the low-potential side of the current sampling point.

[0083] The aforementioned reference voltage signal can be any reference voltage value. It is understood that the aforementioned reference voltage signal is used to provide a stable voltage signal as a reference or comparison standard for the aforementioned amplification unit 22 to differentially amplify the aforementioned high-side current signal and the aforementioned low-side current signal, thereby improving the stability and accuracy of the differentially amplified current signal.

[0084] In the specific implementation, after the data transmission interface 1 transmits the working current to the acquisition unit 21, the acquisition unit 21 divides the working current, introduces part of the working current into the high-side inlet to obtain the high-side current signal, and introduces the remaining working current into the low-side inlet to obtain the low-side current signal. At the same time, the current signal can also be transmitted to the storage module 5.

[0085] Next, the acquisition unit 21 can transmit the acquired high-side current signal and low-side current signal to the amplification unit 22. When the amplification unit 22 receives the high-side current signal and low-side current signal, it can also receive a reference voltage from any position as a reference voltage signal, and perform differential amplification on the high-side current signal and low-side current signal with reference to the reference voltage signal to obtain the differentially amplified current signal.

[0086] It should be noted that the differentially amplified current signal is the difference between the high-side and low-side current signals, which is used to represent the actual current magnitude and is transmitted to the processing module 3.

[0087] After receiving the current signal, the processing module 3 can still receive the reference voltage signal from any position, calculate the current value corresponding to the current signal by combining the reference voltage value, and generate the corresponding power consumption display signal to be transmitted to the display module 4 for display.

[0088] Furthermore, in order to complete the initial acquisition of the operating current, such as Figure 2 As shown, Figure 2 This is a circuit diagram of the acquisition unit and amplification unit in the first embodiment of the display circuit proposed in this utility model. In this embodiment, the acquisition unit 21 includes: a first capacitor C1 and first resistors R1 to third resistors R3;

[0089] The first end of the first capacitor C1 is connected to the second end of the second resistor R2 and the amplification unit 22, the second end of the first capacitor C1 is connected to the second end of the third resistor R3 and the amplification unit 22, the first end of the first resistor R1 is connected to the data transmission interface 1 and the first end of the second resistor R2, and the second end of the first resistor R1 is connected to the storage module 5 and the first end of the third resistor R3.

[0090] In the specific implementation, the operating current reaches the first resistor R1 through the data transmission interface 1, and is shunted through the first resistor R1. The current flowing through the second resistor R2 is used as the high-side current signal and enters the amplification unit 22, while the current flowing through the third resistor R3 is used as the low-side current signal and enters the amplification unit 22. In addition, the operating current also reaches the storage module 5 through the first resistor R1 to power the storage module 5.

[0091] Furthermore, in order to differentially amplify the high-side current and the low-side current, the following continues... Figure 2 As shown, in this embodiment, the amplification unit 22 includes: an amplification chip U1, a second capacitor C2, a third capacitor C3, and a fourth resistor R4 to a sixth resistor R6;

[0092] The first input terminal and the second input terminal of the amplifier chip U1 are both connected to the acquisition unit 21. The output terminal of the amplifier chip U1 is connected to the first terminal of the second capacitor C2 and the first terminal of the fourth resistor R4, respectively. The reference input terminal of the amplifier chip U1 is connected to the first terminal of the third capacitor C3, the first terminal of the fifth resistor R5, and the first terminal of the sixth resistor R6, respectively. The ground terminal of the amplifier chip U1 is grounded. The power supply terminal of the amplifier chip U1 is connected to the data transmission interface 1. The second terminal of the second capacitor C2 is grounded. The first terminal of the third capacitor C3 is connected to the processing module 3. The second terminal of the third capacitor C3 is grounded. The second terminal of the fourth resistor R4 is connected to the processing module 3. The second terminal of the fifth resistor R5 is connected to the second terminal of the third capacitor C3. The second terminal of the sixth resistor R6 is connected to the data transmission interface 1.

[0093] It should be noted that the aforementioned amplifier chip U1 can be any chip with the function of amplifying current signals, such as the amplifier chip U1 with the model number INA199A1. Of course, other models of chips can also be used. This embodiment uses INA199A1 for illustration.

[0094] Understandably, in this embodiment, the first input terminal of the amplifier chip U1 is the first pin of the amplifier chip U1, which can be connected to the first terminal of the first capacitor C1. The second input terminal of the amplifier chip U1 is the second pin of the amplifier chip U1, which can be connected to the second terminal of the first capacitor C1. The output terminal of the amplifier chip U1 is the third pin of the amplifier chip U1, the reference input terminal of the amplifier chip U1 is the fourth pin of the amplifier chip U1, and the power supply terminal of the amplifier chip U1 can be the sixth pin of the amplifier chip U1, and can be connected to the data transmission interface 1 (i.e., Figure 2 The VCC_5V) is used to receive current transmitted from external device 6.

[0095] In the specific implementation, the amplifier chip U1 outputs power through the first input terminal (… Figure 2 The high-side current signal transmitted by the acquisition unit 21 is obtained through the second input terminal (IN+). Figure 2 The low-side current signal transmitted by the acquisition unit 21 is obtained through the IN-) and transmitted through the reference input terminal ( Figure 2After acquiring the reference voltage signal from the REF (in the image), the high-side current signal and the low-side current signal are differentially amplified to obtain the differentially amplified current signal, which is then output through the output terminal (…). Figure 2 The OUT output passes through the fourth resistor R4 and then reaches the processing module 3.

[0096] It is also understood that the reference voltage signal in this embodiment (i.e. Figure 2 The VCC_5V can also be provided by the current output from the external device 6 connected to the data transmission interface 1. Of course, it can also be provided in other ways, and this embodiment does not limit this.

[0097] In addition, the sixth resistor R6 transmits the reference voltage signal to the processing module 3 through the reference input terminal. It should also be emphasized that the fourth resistor R4 can be used for current limiting protection and impedance matching, while the fifth resistor R5 and the sixth resistor R6 can be used for voltage divider protection.

[0098] The display circuit in this embodiment may include a data acquisition module 2, a processing module 3, and a display module 4. The data acquisition module 2 is located between the data transmission interface 1 and the storage module 5 within the storage device. The processing module 3 is connected to both the data acquisition module 2 and the display module 4. The data transmission interface 1 is also used to connect to an external device 6. The data transmission interface transmits the operating current provided by the external device 6 to the storage module 5 through the data acquisition module 2 for power supply. The data acquisition module 2 acquires the operating current and transmits the generated current signal to the processing module 3. When the processing module 3 receives the current signal, it transmits the generated power consumption display signal to the display module 4 for power consumption display. Compared to existing methods where users cannot promptly understand the current power consumption of the storage module, this invention can convert the acquired operating current into a power consumption display signal and display it through the display module 4, allowing users to promptly understand the current power consumption of the storage module by viewing the power consumption displayed on the display module 4.

[0099] Reference Figure 3 , Figure 3 This is a schematic diagram of the structure of the second embodiment of the display circuit proposed in this utility model.

[0100] Based on the above embodiments, a second embodiment of the present invention is proposed. In order to display the power consumption information of the storage module 5, such as... Figure 3 As shown, in this embodiment, the display module 4 includes: a reset unit 41 and a display unit 42;

[0101] The reset unit 41 is connected to the processing module 3 and the display unit 42 respectively, and the display unit 42 is also connected to the processing module 3;

[0102] The processing module 3 is also used to transmit the generated delay signal to the reset unit 41 and the generated power consumption display signal to the display unit 42 when the current signal is received;

[0103] The reset unit 41 is used to transmit the generated backlight power to the display unit 42 for power supply after a preset delay when the delay signal is received.

[0104] The display unit 42 is used to display the power consumption display signal.

[0105] It should be noted that the aforementioned reset unit 41 may be a unit used to provide backlight power to the aforementioned display unit 42 with a delay, thereby preventing the display screen from burning out. The aforementioned delay signal may be a signal indicating delayed display; it is understood that the magnitude of the aforementioned delay signal can determine the length of the delay when the display unit 42 performs display. The aforementioned preset delay duration can be set according to actual conditions, and this embodiment does not impose any restrictions on it.

[0106] It should also be noted that the above-mentioned display unit 42 can be any unit with display function, such as an LCD display screen, etc., and this embodiment does not limit it.

[0107] In a specific implementation, when the processing module 3 receives the current signal, it transmits the generated delay signal to the reset unit 41 and the generated power consumption display signal to the display unit 42. When the reset unit 41 receives the delay signal, it transmits the generated backlight power to the display unit 42 after a preset delay to provide power. When the display unit 42 receives the power from the reset unit 41, it can display the power consumption display signal transmitted by the processing module 3.

[0108] Furthermore, in order for the reset unit 41 to supply power to the display unit 42, such as... Figure 4 As shown, Figure 4 This is a circuit diagram of the reset unit and the display unit in the second embodiment of the display circuit proposed in this utility model. In this embodiment, the reset unit 41 includes: a reset chip U2, a fourth capacitor C4, a first switch Q1, and a seventh resistor R7 to a tenth resistor R10;

[0109] The power supply terminal of the reset chip U2 is connected to the chip power supply and the first terminal of the fourth capacitor C4, respectively. The ground terminal of the reset chip U2 is grounded. The delay output terminal of the reset chip U2 is connected to the second terminal of the seventh resistor R7 and the first terminal of the eighth resistor R8, respectively.

[0110] The first terminal of the fourth capacitor C4 is connected to the first terminal of the seventh resistor R7, and the second terminal of the fourth capacitor C4 is grounded. The gate of the first switch Q1 is connected to the second terminal of the eighth resistor R8, the second terminal of the ninth resistor R9, and the first terminal of the tenth resistor R10, respectively. The source of the first switch Q1 is grounded, and the drain of the first switch Q1 is connected to the display unit 42. The first terminal of the ninth resistor R9 is connected to the processing module 3, and the second terminal of the tenth resistor R10 is grounded.

[0111] It should be noted that the aforementioned reset chip U2 can be used arbitrarily as a chip that provides backlight power after a delay, such as the reset chip with model number SGM818D-2.7XN3G / TR. Of course, other models can also be used, and this embodiment does not limit this.

[0112] In this embodiment, the power supply terminal of the reset chip U2 is the third pin of the reset chip U2, the ground terminal of the reset chip U2 is the second pin of the reset chip U2, and the delay output terminal of the reset chip U2 is the first pin of the reset chip U2.

[0113] It should also be noted that the first switch Q1 mentioned above can be an NMOS transistor or a PMOS transistor; this embodiment uses an NMOS transistor for illustration. The above-mentioned chip power supply (i.e....) Figure 4 VCC3V3_MCU can be the power supply required for the chip to operate. It can be obtained by transforming the operating current output by the acquisition module. Of course, it can also be obtained in other ways, but this embodiment does not limit it.

[0114] Understandably, the chip power supply is connected to the data transmission interface 1 and the reset unit 41 respectively. In this embodiment, the operating current provided by the external device 6 is 5V when it reaches the data transmission interface 1. Then, the 5V power supply can be transformed into 3.3V power supply by transformer to serve as the chip power supply, and the current of the 3.3V power supply is transmitted to the reset unit 41.

[0115] In the specific implementation, the reset chip U2 is connected to the power supply terminal ( Figure 4 The 3.3V power supply (VDD) received by the reset chip U2 is used to start the reset chip U2. The delay output terminal of the reset chip ( Figure 4 The nRESET signal in the output continuously outputs a level. At this time, the processing module 3 transmits a delay signal to the gate of the first switching transistor Q1 so that the source and drain of the first switching transistor Q1 are grounded. Then, the reset chip U2 outputs backlight power to the display unit 42 after a preset delay.

[0116] Furthermore, continue as Figure 4As shown, in this embodiment, the display unit includes: a display chip U3, a second switching transistor Q2, and eleventh resistors R1 to thirteenth resistors R13;

[0117] The first ground terminal, the second ground terminal, and the third ground terminal of the display chip U3 are all grounded. The backlight power input terminal of the display chip U3 is connected to the first terminal of the eleventh resistor R11. The reset terminal of the display chip U3 is connected to the processing module 3 and the second terminal of the twelfth resistor R12. The command terminal, the data terminal, the clock terminal, and the chip select terminal of the display chip U3 are respectively connected to the processing module 3. The power supply terminal of the display chip U3 is connected to the first terminal of the twelfth resistor R12 and the chip power supply respectively.

[0118] The drain of the second switch Q2 is connected to the second end of the eleventh resistor R11, the gate of the second switch Q2 is connected to the reset unit 41 and the first end of the thirteenth resistor R13, the source of the second switch Q2 is connected to the chip power supply, and the second end of the thirteenth resistor R13 is connected to the chip power supply.

[0119] It should be noted that the second switch Q2 mentioned above can be either a PMOS transistor or an NMOS transistor; this embodiment uses a PMOS transistor for illustration. The display chip U3 mentioned above can be any chip with display functionality, such as a chip with the model number LCD240X240_2, etc.; this embodiment does not impose any restrictions on this.

[0120] It should also be noted that the first ground terminal of display chip U3 is the second pin of display chip U3, the second ground terminal of display chip U3 is the ninth pin of display chip U3, and the third ground terminal of display chip U3 is the tenth pin of display chip U3. The reset terminal of display chip U3 is the third pin of display chip U3. The backlight power input terminal of display chip U3 can be the first pin of display chip U3. The command terminal of display chip U3 can be the fourth pin of display chip U3. The data terminal of display chip U3 can be the fifth pin of display chip U3. The clock terminal of display chip U3 can be the sixth pin of display chip U3. The chip select terminal of display chip U3 can be the eighth pin of display chip U3. The power supply terminal of display chip U3 can be the seventh pin of display chip U3.

[0121] Understandably, in this embodiment, the first terminal of the thirteenth resistor R13 can be specifically connected to the drain of the first switching transistor Q1. Furthermore, in this embodiment, the source of the second switching transistor Q2 can be connected to the chip power supply (i.e.,...). Figure 4 Connect the VCC3V3_MCU to serve as the backlight power supply.

[0122] In the specific implementation, after the display unit 42 receives the signal transmitted by the first switch Q1 through the thirteenth resistor R13, it causes the second switch Q2 to turn on the connection between the chip power supply and the display chip U3. At this time, the 3.3V power supply is supplied through the backlight power input terminal of the display chip U3. Figure 4 LEDA in the display chip provides the backlight anode power supply for the display chip U3, and the power supply terminal of the display chip U3 ( Figure 4 The VDD pin is used to receive the backlight cathode power supplied by the chip's power supply. The display chip U3 also connects to the data pin (VDD). Figure 4 The SDA in the process module receives the power consumption display signal transmitted by the processing module and displays the power consumption display information.

[0123] In addition, the reset terminal of display chip U3 ( Figure 4 The RST pin in the display chip U3 is used to receive the reset signal transmitted by the processing module 3 and then perform a reset. Figure 4 The D / C signal in the display chip U3 is used to receive command signals transmitted by the processing module 3 and the clock signal of the display chip U3. Figure 4 The SCL pin in the display chip U3 is used to receive the clock signal transmitted by the processing module 3. Figure 4 The CS segment is used to receive the specified signal transmitted by the processing module 3. It is understood that the chip select segment will only start working when it receives the specified signal transmitted by the processing module 3.

[0124] Reference Figure 5 , Figure 5 This is a schematic diagram of the structure of the third embodiment of the display circuit proposed in this utility model.

[0125] Based on the above embodiments, a third embodiment of this utility model is proposed. To allow users to understand the current capacity of the storage device in real time, such as... Figure 5 As shown, in this embodiment, the storage module 5 is also connected to the processing module 3;

[0126] The storage module 5 is connected to the acquisition module 2, the processing module 3 and the data transmission interface 1 respectively;

[0127] The storage module 5 is also used to transmit data with the external device 6 through the data transmission interface 1;

[0128] The storage module 5 is also used to transmit the generated capacity status signal to the processing module 3;

[0129] The processing module 3 is also used to transmit the generated capacity display signal to the display module 4 for capacity display when the capacity status signal is received.

[0130] It should be noted that the aforementioned storage module 5 can be any module with the function of storing information and data, such as a memory. The aforementioned capacity status signal can be a signal used to indicate the used capacity and available capacity of the storage module 5.

[0131] It should also be emphasized that the above-mentioned storage device may also include a fingerprint unlocking module (not shown in the figure). In this embodiment, the above-mentioned storage device may require fingerprint authentication and unlocking by the fingerprint unlocking module before it can perform data transmission or data storage.

[0132] In its implementation, when a user uses the storage device, they can first perform fingerprint unlock authentication. After successful authentication, the storage module 5 obtains the operating current transmitted by the acquisition module 2 and acquires data information transmitted by the external device 6 through the data transmission interface 1, thus transmitting data with the external device. Simultaneously, the storage module 5 can generate a capacity status signal based on the current capacity and transmit it to the processing module 3. Upon receiving the capacity status signal, the processing module 3 transmits a generated capacity display signal to the display module 4 for capacity display. At this point, the user can directly understand the current storage status of the storage device through the display module 4 on the storage device.

[0133] Furthermore, considering that existing storage devices generally also have location functions, in order to allow users to know in a timely manner whether this location function is enabled, we will continue as follows: Figure 5 As shown, in this embodiment, the display circuit further includes a positioning module 7;

[0134] The positioning module 7 is connected to the acquisition module 2 and the processing module 3 respectively;

[0135] The positioning module 7 is used to locate the storage device;

[0136] The positioning module 7 is also used to transmit the generated positioning status signal to the processing module 3;

[0137] The processing module 3 is also used to transmit the generated status display signal to the display module 4 for positioning status display when the positioning status signal is received.

[0138] It should be noted that the aforementioned positioning module 7 can be any module with positioning functionality, such as a GPS positioning chip, Bluetooth positioning chip, BeiDou positioning chip, etc. The aforementioned positioning status signal can be a signal used to indicate whether the positioning function is enabled.

[0139] It should also be emphasized that before the above-mentioned storage device can be located, it may require fingerprint authentication by the fingerprint unlocking module. That is, the fingerprint unlocking module can be connected to the positioning module. When the user's fingerprint unlocking authentication is successful, the positioning module can start working to locate the device.

[0140] In the specific implementation, when a user uses the storage device, they can first perform fingerprint unlock authentication. After successful authentication, the positioning module 7 obtains the operating current transmitted by the acquisition module 2. When the user manually starts the positioning mode, the positioning module 7 activates the positioning function. At this time, the positioning status of the positioning module 7 is activated, and the generated positioning status signal is transmitted to the processing module 3. When the processing module 3 receives the positioning status signal, it transmits the generated status display signal to the display module 4 to display the positioning status. At this time, the user can directly understand whether the current positioning status of the storage device is activated through the display module 4 on the storage device.

[0141] To achieve the above objectives, this utility model also proposes a storage device, which includes the display circuit of the storage device as described above.

[0142] It should be noted that the specific implementation of the storage device provided in this embodiment can refer to the above embodiments, and this embodiment will not elaborate on them. Therefore, the effects achieved by the storage device in this embodiment can also refer to the above embodiments, and this embodiment will not elaborate on them either.

[0143] The above are merely preferred embodiments of this utility model and do not limit the patent scope of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this utility model.

Claims

1. A display circuit for a storage device, characterized in that, The display circuit includes: a data acquisition module, a processing module, a display module, and a storage module; The acquisition module is located between the data transmission interface in the storage device and the storage module. The processing module is connected to both the acquisition module and the display module. The data transmission interface is also used to connect to external devices. The data transmission interface is used to transmit the operating current provided by the external device to the storage module through the acquisition module for power supply; The acquisition module is used to acquire the operating current and transmit the generated current signal to the processing module; The processing module is used to transmit the generated power consumption display signal to the display module for power consumption display when the current signal is received.

2. The display circuit of the storage device as described in claim 1, characterized in that, The acquisition module includes: an acquisition unit and an amplification unit; The acquisition unit is connected to the data transmission interface, the amplification unit, and the storage module, respectively; the amplification unit is connected to the processing module. The acquisition unit is used to acquire the operating current, shunt the operating current, and transmit the obtained high-side current signal and low-side current signal to the amplification unit. The amplification unit is used to receive a reference voltage signal, and differentially amplify the high-side current signal and the low-side current signal through the reference voltage signal, and transmit the obtained differentially amplified current signal to the processing module. The processing module is also used to generate a power consumption display signal when it receives the reference voltage signal and the differentially amplified current signal.

3. The display circuit of the storage device as described in claim 2, characterized in that, The acquisition unit includes: a first capacitor and a first resistor to a third resistor; The first end of the first capacitor is connected to the second end of the second resistor and the amplification unit, the second end of the first capacitor is connected to the second end of the third resistor and the amplification unit, the first end of the first resistor is connected to the data transmission interface and the first end of the second resistor, and the second end of the first resistor is connected to the storage module and the first end of the third resistor.

4. The display circuit of the storage device as described in claim 2, characterized in that, The amplification unit includes: an amplification chip, a second capacitor, a third capacitor, and a fourth to a sixth resistor; The first and second input terminals of the amplification chip are both connected to the acquisition unit. The output terminal of the amplification chip is connected to the first terminal of the second capacitor and the first terminal of the fourth resistor, respectively. The reference input terminal of the amplification chip is connected to the first terminal of the third capacitor, the first terminal of the fifth resistor, and the first terminal of the sixth resistor, respectively. The ground terminal of the amplification chip is grounded. The power supply terminal of the amplification chip is connected to the data transmission interface. The second terminal of the second capacitor is grounded. The first terminal of the third capacitor is connected to the processing module. The second terminal of the third capacitor is grounded. The second terminal of the fourth resistor is connected to the processing module. The second terminal of the fifth resistor is connected to the second terminal of the third capacitor. The second terminal of the sixth resistor is connected to the data transmission interface.

5. The display circuit of the storage device as described in claim 1, characterized in that, The display module includes: a reset unit and a display unit; The reset unit is connected to both the processing module and the display unit, and the display unit is also connected to the processing module. The processing module is further configured to transmit the generated delay signal to the reset unit and the generated power consumption display signal to the display unit when the current signal is received; The reset unit is used to transmit the generated backlight power to the display unit for power supply after a preset delay when the delay signal is received; The display unit is used to display the power consumption display signal.

6. The display circuit of the storage device as described in claim 5, characterized in that, The reset unit includes: a reset chip, a fourth capacitor, a first switching transistor, and a seventh to a tenth resistor; The power supply terminal of the reset chip is connected to the chip power supply and the first terminal of the fourth capacitor, respectively. The ground terminal of the reset chip is grounded, and the delay output terminal of the reset chip is connected to the second terminal of the seventh resistor and the first terminal of the eighth resistor, respectively. The first terminal of the fourth capacitor is connected to the first terminal of the seventh resistor, the second terminal of the fourth capacitor is grounded, the gate of the first switch is connected to the second terminal of the eighth resistor, the second terminal of the ninth resistor and the first terminal of the tenth resistor respectively, the source of the first switch is grounded, the drain of the first switch is connected to the display unit, the first terminal of the ninth resistor is connected to the processing module, and the second terminal of the tenth resistor is grounded.

7. The display circuit of the storage device as described in claim 5, characterized in that, The display unit includes: a display chip, a second switching transistor, and eleventh to thirteenth resistors; The first ground terminal, the second ground terminal, and the third ground terminal of the display chip are all grounded. The backlight power input terminal of the display chip is connected to the first terminal of the eleventh resistor. The reset terminal of the display chip is connected to the processing module and the second terminal of the twelfth resistor. The command terminal, the data terminal, the clock terminal, and the chip select terminal of the display chip are respectively connected to the processing module. The power supply terminal of the display chip is connected to the first terminal of the twelfth resistor and the chip power supply. The drain of the second switching transistor is connected to the second end of the eleventh resistor, the gate of the second switching transistor is connected to the reset unit and the first end of the thirteenth resistor, the source of the second switching transistor is connected to the chip power supply, and the second end of the thirteenth resistor is connected to the chip power supply.

8. The display circuit of the storage device as described in claim 1, characterized in that, The storage module is also connected to the processing module; The storage module is also used to transmit data with the external device through the data transmission interface; The storage module is also used to transmit the generated capacity status signal to the processing module; The processing module is further configured to transmit the generated capacity display signal to the display module for capacity display when the capacity status signal is received.

9. The display circuit of the storage device as described in claim 1, characterized in that, The display circuit further includes: a positioning module; The positioning module is connected to both the acquisition module and the processing module. The positioning module is used to locate the storage device; The positioning module is also used to transmit the generated positioning status signal to the processing module; The processing module is further configured to transmit the generated status display signal to the display module for displaying the positioning status when the positioning status signal is received.

10. A storage device, characterized in that, The storage device includes the display circuitry of the storage device according to any one of claims 1 to 9.

Images