A circuit capable of realizing direct current large current two-way input and output timing switching control
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-24
- Publication Date
- 2026-08-11
AI Technical Summary
特别是对于那些拥有两路或以上独立充放电接口的电池包，在进行充放电性能老化测试时，传统老化测试设备的应用显得尤为不便
[0021]本实用新型通过引入微控制器与P-MOS驱动电路相结合的方法，实现了对电池包两个独立充放电通道的高效定时切换控制。具体来说，该电路包括第一路输入输出接口和第二路输入输出接口，它们分别连接至待测电池包的独立充放电通道；一个共用的输出接口和直流负极接口，用于连接老化测试设备。微控制器通过编程配置的定时器控制这两路接口的交替导通与截止，使得老化测试设备的充放电电流能够依次通过这两个接口输入至待测电池包。仅需一次充放电老化测试循环即可完成对电池包两个独立通道的测试，将原有老化时间缩短了一半，显著提高了生产效率。此外，由于采用了P-MOS管隔离正极的设计，避免了电压或电流信号之间的串扰，进一步增强了测试的安全性和可靠性。因此，本发明解决了现有技术中双路或多路接口电池包老化测试效率低下的问题，为相关产品的快速检测提供了一个有效解决方案。
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Figure CN224626318U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of battery testing technology, specifically relating to a circuit that can realize DC high current dual-channel input-output timing switching control. Background Technology
[0002] Rechargeable lithium-ion battery packs, as core components for storing electrical energy, are widely used in consumer digital products, drones, electric vehicles, backup power supplies, and home energy storage. In the battery pack manufacturing process, performance aging testing is one of the key steps to ensure product quality. This is especially true for battery packs with two or more independent charge / discharge interfaces, where the use of traditional aging testing equipment is particularly inconvenient when conducting charge / discharge performance aging tests.
[0003] Currently, equipment typically requires multiple ports to test each interface separately, or to perform multiple test processes on the same battery pack. This not only increases testing time but also significantly reduces production efficiency. Utility Model Content
[0004] The purpose of this invention is to provide a circuit that can realize DC high current dual-channel input-output timing switching control, effectively perform one-time aging test on battery packs with dual independent charging and discharging interfaces, so as to improve production efficiency and solve the problems mentioned in the background art.
[0005] To achieve the above objectives, this utility model adopts the following technical solution: a circuit capable of realizing DC high-current dual-channel input / output timing switching control, comprising:
[0006] The first input / output interface and the second input / output interface are respectively connected to the independent charging and discharging channels of the battery pack under test;
[0007] The output interface and the common DC negative terminal interface are used to connect to the aging test equipment.
[0008] The microcontroller controls the switching between two input / output interfaces through a programmed timer.
[0009] The P-MOS driving circuit includes multiple sets of P-MOS transistors, which are respectively connected to the first input / output interface and the second input / output interface to realize the alternating conduction and cutoff of the two input / output channels;
[0010] The microcontroller drives the P-MOS transistor to turn on and off through control signals, and alternately switches the connection status of the two input / output interfaces through a timer, so that the charging and discharging current of the aging test equipment is input to the battery pack under test through the first input / output interface and the second input / output interface in sequence, thereby realizing the timed switching control of the dual input / output channels.
[0011] Preferably, the microcontroller is a high-performance microprocessor based on the ARM Cortex-M4 core.
[0012] Preferably, the P-MOS driving circuit includes at least four sets of P-MOS transistors for the first input / output interface and at least four sets of P-MOS transistors for the second input / output interface.
[0013] Preferably, it also includes a DC-DC conversion circuit for converting the input voltage provided by the aging test equipment into the operating voltage of the microcontroller and powering the microcontroller through a diode.
[0014] Preferably, in the charging step, the microcontroller turns on the P-MOS transistor of the first input / output interface through the control signals PREDSG and PRECHG, and starts the timer;
[0015] When the timer reaches the preset time, the microcontroller turns on the P-MOS transistor of the second input / output interface through the control signals DFETOFF and CFETOFF, while turning off the P-MOS transistor of the first input / output interface, so as to realize the alternating charging of the two channels.
[0016] Preferably, in the discharge step, the microcontroller turns on the P-MOS transistor of the first input / output interface through the control signals DFETOFF and CFETOFF, and starts the timer;
[0017] When the timer reaches the preset time, the microcontroller turns on the P-MOS transistor of the second input / output interface through the control signals PREDSG and PRECHG, while turning off the P-MOS transistor of the first input / output interface, so as to realize the alternating discharge of the two channels.
[0018] Preferably, the first input / output interface and the second input / output interface share a common DC negative terminal interface.
[0019] Preferably, the voltage and current signals of the first input / output interface and the second input / output interface are isolated by controlling the positive terminal of the P-MOS transistor.
[0020] The technical effects and advantages of this utility model are as follows: Compared with the prior art, the circuit proposed in this utility model, which can realize DC high current dual-channel input-output timing switching control, has the following advantages:
[0021] This invention achieves efficient timing switching control of two independent charge / discharge channels of a battery pack by combining a microcontroller with a P-MOS drive circuit. Specifically, the circuit includes a first input / output interface and a second input / output interface, which are respectively connected to the independent charge / discharge channels of the battery pack under test; a shared output interface and a DC negative interface for connecting to aging test equipment. The microcontroller controls the alternating conduction and cutoff of these two interfaces through a programmed timer, allowing the charge / discharge current of the aging test equipment to be sequentially input to the battery pack under test through these two interfaces. Only one charge / discharge aging test cycle is needed to complete the test of both independent channels of the battery pack, halving the original aging time and significantly improving production efficiency. Furthermore, the use of a P-MOS transistor to isolate the positive terminal avoids crosstalk between voltage or current signals, further enhancing the safety and reliability of the test. Therefore, this invention solves the problem of low efficiency in existing dual- or multi-interface battery pack aging tests, providing an effective solution for the rapid testing of related products. Attached Figure Description
[0022] Figure 1 This is the circuit diagram of this utility model. Detailed Implementation
[0023] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. The specific embodiments described herein are only used to explain the present utility model and are not intended to limit the present utility model. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0024] This utility model provides, for example Figure 1 The circuit shown is capable of realizing DC high-current dual-channel input / output timing switching control, comprising:
[0025] The first input / output interface P1+ and the second input / output interface P2+ are respectively connected to the independent charging and discharging channels of the battery pack under test.
[0026] The output interface OUT+ and the common DC negative interface OUT- are used to connect to the aging test equipment.
[0027] The microcontroller U2 controls the switching between two input / output interfaces via a programmable timer. Furthermore, the microcontroller U2 is a high-performance microprocessor based on the ARM Cortex-M4 core, specifically model GD32F303, integrating a floating-point unit and rich peripherals to support timer control functions. In addition, the circuit supports expansion, allowing the number of input / output channels to be increased as needed, and multi-channel timed switching control can be achieved through the programmable configuration of the microcontroller U2.
[0028] The P-MOS driving circuit includes multiple P-MOS transistors, which are respectively connected to the first input / output interface P1+ and the second input / output interface P2+, to realize the alternating conduction and cutoff of the two input / output channels;
[0029] The microcontroller U2 drives the P-MOS transistor to turn on and off through control signals (PREDSG, PRECHG, DFETOFF, CFETOFF), and alternately switches the connection status of the two input / output interfaces through a timer, so that the charging and discharging current of the aging test equipment is input to the battery pack under test through the first input / output interface P1+ and the second input / output interface P2+ in sequence, thereby realizing the timed switching control of the dual input / output channels.
[0030] The aforementioned P-MOS drive circuit includes at least four sets of P-MOS transistors (QD11-QD14, QC11-QC14) for the first input / output interface P1+, and at least four sets of P-MOS transistors (QD21-QD24, QC21-QC24) for the second input / output interface P2+. The number of P-MOS transistors can be dynamically adjusted according to actual current requirements.
[0031] During the charging process, microcontroller U2 turns on the P-MOS transistor of the first input / output interface P1+ through control signals (PREDSG, PRECHG) and starts the timer. When the timer reaches the preset time (e.g., 15 minutes), microcontroller U2 turns on the P-MOS transistor of the second input / output interface P2+ through control signals (DFETOFF, CFETOFF) and turns off the P-MOS transistor of the first input / output interface P1+, thereby realizing the alternating charging of the two channels.
[0032] In the discharge step, microcontroller U2 turns on the P-MOS transistor of the first input / output interface P1+ through control signals (DFETOFF, CFETOFF) and starts the timer; when the timer reaches the preset time, microcontroller U2 turns on the P-MOS transistor of the second input / output interface P2+ through control signals (PREDSG, PRECHG) and turns off the P-MOS transistor of the first input / output interface P1+, so as to realize the alternating discharge of the two channels.
[0033] The first input / output interface P1+ and the second input / output interface P2+ share the DC negative terminal OUT-, and the voltage and current signals of the two input / output interfaces are isolated by controlling the positive terminal of the P-MOS transistor to avoid crosstalk.
[0034] In another embodiment, a DC-DC conversion circuit U1 is also included to convert the input voltage provided by the aging test equipment into the operating voltage (DC3.3V) of the microcontroller U2, and to power the microcontroller U2 through diode D1.
[0035] The working principle is as follows:
[0036] Under normal operating conditions, the first input / output interface P1+ / P1- is connected to the A-channel charge / discharge interface of the PACK battery pack, the second input / output interface P2+ / P2- is connected to the B-channel charge / discharge interface of the PACK battery pack, and the OUT+ / OUT- interface is connected to the charge / discharge interface of the aging chamber. When the aging chamber is set up and charging is started, the charging voltage input at OUT+ will pass through F1 and D4 sequentially, and finally supply U1. U1, as a DC-DC circuit, converts the voltage to DC 3.3V, and then supplies it to the microcontroller U2 through D1 as its operating start voltage.
[0037] After microcontroller U2 starts up, it sends control signals via PREDSG and PRECHG to turn on the discharge MOSFETs QD11, QD12, QD13, and QD14 and the charging MOSFETs QC11, QC12, QC13, and QC14 in the P1+ channel. Simultaneously, microcontroller U2 starts a pre-programmed 15-minute timer, enabling the aging cabinet to charge the PACK battery pack for 15 minutes via the P1+ channel.
[0038] After the 15-minute timer expires, microcontroller U2 first sends control signals via DFETOFF and CFETOFF to turn on the discharge MOSFETs QD21, QD22, QD23, and QD24 and the charging MOSFETs QC21, QC22, QC23, and QC24 in the P2+ channel. Four seconds later, microcontroller U2 turns off the PREDSG and PRECHG control signals, causing the discharge MOSFETs QD11, QD12, QD13, and QD14 and the charging MOSFETs QC11, QC12, QC13, and QC14 in the P1+ channel to turn off. Simultaneously, microcontroller U2 resets the 15-minute timer, and the aging cabinet can then charge the PACK battery pack for 15 minutes via the P2+ channel.
[0039] The charging operation is controlled by alternately switching between channels P1+ and P2+. When charging is complete, the battery pack shuts down the charging MOS, and the aging chamber stops charging. At this time, the battery pack provides voltage through P1+, which is then supplied to U1 via D3. U1, acting as a DC-DC circuit, converts the voltage to DC 3.3V, which is then supplied to the microcontroller U2 via D1 as its operating voltage, ensuring uninterrupted operation of the microcontroller U2.
[0040] After the aging chamber has settled, the battery pack automatically enters the discharge step. During discharge, the microcontroller U2 alternately switches between controlling channels P1+ and P2+. This way, a single battery pack only needs to undergo one charge-discharge aging test cycle to simultaneously test both independent channels, thus halving the original aging time and significantly improving production efficiency.
[0041] Finally, it should be noted that the above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.
Claims
1. A circuit capable of realizing DC high-current dual-channel input / output timing switching control, characterized in that, include: The first input / output interface and the second input / output interface are respectively connected to the independent charging and discharging channels of the battery pack under test; The output interface and the common DC negative terminal interface are used to connect to the aging test equipment. The microcontroller controls the switching between two input / output interfaces through a programmed timer. The P-MOS driving circuit includes multiple sets of P-MOS transistors, which are respectively connected to the first input / output interface and the second input / output interface to realize the alternating conduction and cutoff of the two input / output channels; The microcontroller drives the P-MOS transistor to turn on and off through control signals, and alternately switches the connection status of the two input / output interfaces through a timer, so that the charging and discharging current of the aging test equipment is input to the battery pack under test through the first input / output interface and the second input / output interface in sequence, thereby realizing the timed switching control of the dual input / output channels.
2. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, The microcontroller is a high-performance microprocessor based on the ARM Cortex-M4 core.
3. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, The P-MOS driving circuit includes at least four sets of P-MOS transistors for the first input / output interface and at least four sets of P-MOS transistors for the second input / output interface.
4. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, It also includes a DC-DC conversion circuit to convert the input voltage provided by the aging test equipment into the operating voltage of the microcontroller and to power the microcontroller through a diode.
5. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, During the charging process, the microcontroller turns on the P-MOS transistor of the first input / output interface through the control signals PREDSG and PRECHG, and starts the timer. When the timer reaches the preset time, the microcontroller turns on the P-MOS transistor of the second input / output interface through the control signals DFETOFF and CFETOFF, while turning off the P-MOS transistor of the first input / output interface, so as to realize the alternating charging of the two channels.
6. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, During the discharge step, the microcontroller turns on the P-MOS transistor of the first input / output interface through the control signals DFETOFF and CFETOFF, and starts the timer. When the timer reaches the preset time, the microcontroller turns on the P-MOS transistor of the second input / output interface through the control signals PREDSG and PRECHG, while turning off the P-MOS transistor of the first input / output interface, so as to realize the alternating discharge of the two channels.
7. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, The first input / output interface and the second input / output interface share a DC negative terminal interface.
8. The circuit for realizing DC high-current dual-channel input / output timing switching control according to claim 1, characterized in that, The voltage and current signals of the first input / output interface and the second input / output interface are isolated by controlling the positive terminal of the P-MOS transistor.