Gate drive circuit, motor controller, electric drive system of vehicle, and vehicle

Abstract

This application provides a gate drive circuit, a motor controller, an electric drive system for a vehicle, and a vehicle, relating to the field of new energy vehicle technology. The circuit includes a driver chip, a logic circuit, and a drive resistor switching circuit. The driver chip includes an input terminal and an output terminal. Its input terminal is connected to the saturation voltage drop detection circuit of the power device, receives a level signal reflecting the operating current, and generates a gate drive signal based on this signal before outputting it from the output terminal. The input terminal of the logic circuit is connected to the input terminal of the driver chip. After receiving the level signal, it outputs a control signal based on the level signal. The first and second input terminals of the drive resistor switching circuit are respectively connected to the output terminal of the driver chip and the output terminal of the logic circuit. Based on the control signal, it adjusts the gate drive resistor. The gate drive signal, after passing through the adjusted resistor, forms a regulated signal and is output to the gate of the power device, thereby realizing the adjustment of the gate drive resistor according to the change of the load current of the power device, significantly improving the efficiency of the electric drive system.

Description

Technical Field

[0001] This application relates to the field of new energy vehicle technology, and in particular to a gate drive circuit, a motor controller, an electric drive system for a vehicle, and a vehicle. Background Technology

[0002] In the field of new energy vehicles, driving range is a key indicator for measuring vehicle performance. With a fixed battery capacity, the losses in the electric drive system directly affect the vehicle's driving range. As the core component of the electric drive system, the motor controller accounts for a significant proportion of the system's losses, and power device losses constitute the main part of the motor controller's losses. Specifically, power device losses mainly include three parts: switching losses, conduction losses, and reverse recovery losses. Among these, switching losses are significantly affected by the external drive circuit, while conduction losses are closely related to the drive level. In the pursuit of high efficiency and lean design, optimizing the external drive circuit to fully utilize the performance of power devices has become a pressing issue for the industry.

[0003] In related technologies, the drive circuits of power devices typically use fixed gate drive resistors to ensure circuit stability under all temperature and current conditions. However, this results in a relatively low overall efficiency of the electric drive system. Utility Model Content

[0004] The gate drive circuit, motor controller, electric drive system, and vehicle provided in this application are intended to improve the problem of low overall efficiency of electric drive systems in related technologies.

[0005] In a first aspect, this application provides a gate driver circuit, comprising: a driver chip, a logic circuit, and a driver resistor switching circuit; wherein:

[0006] The driver chip includes an input terminal and an output terminal. The input terminal is connected to the saturation voltage drop detection circuit of the power device to receive the level signal that reflects the operating current of the power device. The driver chip generates a gate drive signal based on the level signal and outputs it through the output terminal.

[0007] The input terminal of the logic circuit is connected to the input terminal of the driver chip to input level signals. The logic circuit is used to output control signals based on the level signals and outputs them through the output terminal of the logic circuit.

[0008] The first input terminal of the drive resistor switching circuit is connected to the output terminal of the driver chip, and the second input terminal of the drive resistor switching circuit is connected to the output terminal of the logic circuit. The drive resistor switching circuit is used to adjust the gate drive resistor based on the control signal. The gate drive signal flows through the adjusted gate drive resistor to form the regulated gate drive signal, and is output to the gate of the power device through the output terminal of the drive resistor switching circuit.

[0009] In one possible implementation, the logic circuit includes a first voltage comparator, a second voltage comparator, and a logic processing unit. The positive terminals of the first and second voltage comparators are connected as inputs to the logic circuit. The negative terminal of the first voltage comparator is used to input a first voltage threshold, and the first voltage comparator compares a level signal with the first voltage threshold to obtain a first comparison result. The negative terminal of the second voltage comparator is used to input a second voltage threshold, and the second voltage comparator compares a level signal with the second voltage threshold to obtain a second comparison result. The first input terminal of the logic processing unit is connected to the output terminal of the first voltage comparator, and the second input terminal of the logic processing unit is connected to the output terminal of the second voltage comparator. The logic processing unit generates a control signal based on the first and second comparison results and outputs it through its output terminal.

[0010] In one possible implementation, the logic processing unit includes an OR gate, a latch circuit, and an isolation diode. The first input terminal of the OR gate serves as the first input terminal of the logic processing unit, the anode of the isolation diode serves as the second input terminal of the logic processing unit, the cathode of the isolation diode is connected to the second input terminal of the OR gate, and the output terminal of the OR gate serves as the output terminal of the logic processing unit. The latch circuit is formed by connecting the output terminal of the OR gate to the cathode of the isolation diode through a feedback resistor, and is used to latch the control signal output by the logic processing unit.

[0011] In one possible implementation, the drive resistor switching circuit includes an adjustable resistor network comprising at least two parallel resistor branches. The adjustable resistor network is used to selectively turn on different resistor branches according to a control signal to dynamically adjust the gate drive resistor.

[0012] In one possible implementation, the adjustable resistor network includes a first resistor branch and a second resistor branch, wherein the first resistor branch includes a first resistor, and the second resistor branch includes a second resistor connected in series and a switching device, the control terminal of the switching device being connected to the output terminal of the logic circuit; the switching device is turned on when the control signal is low, so that the first resistor and the second resistor form a parallel structure, and the gate drive resistor is adjusted to the parallel resistance value of the first resistor and the second resistor; and the switching device is turned off when the control signal is high, and the gate drive resistor is adjusted to the first resistor.

[0013] In one possible implementation, the switching device is an N-channel enhancement-mode MOSFET, wherein the gate of the N-channel enhancement-mode MOSFET is connected as a controlled terminal to the output terminal of the logic circuit, the drain of the N-channel enhancement-mode MOSFET is connected to one end of a second resistor, and the source of the N-channel enhancement-mode MOSFET is grounded.

[0014] In one possible implementation, the driver chip is a gate driver with desaturation current source protection.

[0015] In a second aspect, this application provides a motor controller, including power devices and a gate drive circuit as described in any one of the first aspects.

[0016] Thirdly, this application provides an electric drive system for a vehicle, including an electric motor and a motor controller as described in the second aspect.

[0017] Fourthly, this application provides a vehicle including a motor controller as described in the second aspect, or the vehicle includes an electric drive system as described in the third aspect.

[0018] The gate drive circuit, motor controller, electric drive system, and vehicle provided in this application include a gate drive circuit comprising: a driver chip, a logic circuit, and a drive resistor switching circuit. The driver chip includes an input terminal and an output terminal. The input terminal is connected to the saturation voltage drop detection circuit of the power device and is used to receive a level signal reflecting the operating current of the power device. The driver chip generates a gate drive signal based on the level signal and outputs it through the output terminal. The input terminal of the logic circuit is connected to the input terminal of the driver chip and is used to input the level signal. The logic circuit outputs a control signal based on the level signal and outputs it through the output terminal of the logic circuit. The first input terminal of the drive resistor switching circuit is connected to the output terminal of the driver chip, and the second input terminal of the drive resistor switching circuit is connected to the output terminal of the logic circuit. The drive resistor switching circuit adjusts the gate drive resistor based on the control signal. The gate drive signal flows through the adjusted gate drive resistor to form an regulated gate drive signal, which is output to the gate of the power device through the output terminal of the drive resistor switching circuit. This application organically combines a driver chip, logic circuit, and drive resistor switching circuit. The driver chip receives a level signal reflecting the operating current of the power device and generates a gate drive signal. The logic circuit outputs a control signal based on this level signal. The drive resistor switching circuit dynamically adjusts the gate drive resistor according to the control signal. This achieves fine-grained, segmented adjustment of the gate drive resistor based on changes in the load current of the power device, effectively overcoming the problem of fixed and singular drive parameters in existing systems. It can fully utilize the electrical performance of the power device. By dynamically adjusting the gate drive resistor, the switching losses of the power device can be reduced under low current conditions, thereby significantly improving the overall efficiency of the electric drive system and thus increasing the vehicle's range. At the same time, it can effectively control electrical stress under high current conditions, which helps improve the robustness of the motor controller and provides strong support for the performance improvement of new energy vehicles. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0020] Figure 1 This is an example of a drive circuit that uses a fixed gate drive resistor in related technologies;

[0021] Figure 2 Schematic diagram of the gate drive circuit provided in the exemplary embodiments of this application Figure 1 ;

[0022] Figure 3 Schematic diagram of the logic circuit provided for an exemplary embodiment of this application Figure 1 ;

[0023] Figure 4 Schematic diagram of the logic circuit provided for an exemplary embodiment of this application Figure 2 ;

[0024] Figure 5 Schematic diagram of the gate drive circuit provided in the exemplary embodiments of this application Figure 2 .

[0025] Figure label:

[0026] 20. Gate drive circuit; 21. Driver chip; 22. Logic circuit; 23. Drive resistor switching circuit; 24. Saturation voltage drop detection circuit; 25. Power device.

[0027] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0028] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0029] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "fixation," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the connection within two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0030] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0031] In the above description, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0032] First, let me explain the terms used in this application:

[0033] Discrete devices are electronic components with a single function, existing as individual devices. They are distinctly different from integrated circuits (ICs), which integrate multiple components onto a single chip. Each discrete device independently performs a specific electronic function, such as amplification, switching, or rectification. Common types include diodes, transistors, and thyristors.

[0034] In order to enable those skilled in the art to better understand the technical solutions provided in the embodiments of this application, the solutions of related technologies will be introduced before introducing the technical solutions provided in the embodiments of this application.

[0035] Figure 1This is an example of a drive circuit using a fixed gate drive resistor in related technologies. For example... Figure 1 As shown, R is a fixed gate drive resistor. In related technologies, to ensure the drive circuit can withstand electrical stress under all temperature and current conditions, the gate drive resistor is typically chosen to be relatively large. This fixed resistance design aims to balance switching speed and circuit stability across all operating conditions. However, in most cases, this design sacrifices power consumption to reduce electrical stress and thus improve system stability. This also results in fixed and singular drive parameters, failing to fully utilize the electrical performance of power devices and leading to low overall efficiency of the electric drive system.

[0036] To address the aforementioned issues, this application provides a gate drive circuit solution. By introducing a logic circuit and a drive resistor switching circuit, and through the coordinated operation of the drive chip, logic circuit, and drive resistor switching circuit, the gate drive resistor is dynamically adjusted according to the load current changes of the power device. This effectively improves the switching speed and reduces the switching losses of the power device by sacrificing electrical stress, thereby effectively improving the overall efficiency of the electric drive system and ultimately increasing the vehicle's driving range.

[0037] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0038] Figure 2 Schematic diagram of the gate drive circuit provided in the exemplary embodiments of this application Figure 1 .like Figure 2 As shown, the gate drive circuit 20 provided in this embodiment includes: a driver chip 21, a logic circuit 22, and a drive resistor switching circuit 23; wherein:

[0039] The driver chip 21 includes an input terminal and an output terminal. The input terminal is connected to the saturation voltage drop detection circuit 24 of the power device 25 and is used to receive the level signal reflecting the operating current of the power device 25. The driver chip 21 is used to generate a gate drive signal based on the level signal and output it through the output terminal.

[0040] The input terminal of logic circuit 22 is connected to the input terminal of driver chip 21 for inputting level signals. Logic circuit 22 is used to output control signals based on level signals and outputs them through the output terminal of logic circuit 22.

[0041] The first input terminal of the drive resistor switching circuit 23 is connected to the output terminal of the drive chip 21, and the second input terminal of the drive resistor switching circuit 23 is connected to the output terminal of the logic circuit 22. The drive resistor switching circuit 23 is used to adjust the gate drive resistor based on the control signal. The gate drive signal flows through the adjusted gate drive resistor to form the adjusted gate drive signal, and is output to the gate of the power device 25 through the output terminal of the drive resistor switching circuit 23.

[0042] The logic circuit 22 is an electronic circuit composed of discrete components, used to control the drive resistor switching circuit 23, and is connected to the drive chip 21. The drive chip 21 generally refers to the gate driver of the power device, which is connected to the drive resistor switching circuit 23 and is used to provide the gate drive signal. The power device 25 includes power modules such as insulated gate bipolar transistors (IGBTs), silicon carbide (SIC), and gallium nitride (GaN), which are connected to the drive resistor switching circuit 23. The logic circuit 22 controls the drive resistor switching circuit 23 to achieve dynamic adjustment of the drive gate resistance of the power device 25 under different currents.

[0043] For example, the saturation voltage drop detection circuit 24 detects the operating state of the power device 25 in real time and transmits the level signal reflecting the operating current of the power device 25 to the input terminal of the driver chip 21. The driver chip 21 has a specific signal processing and conversion mechanism to generate a matching gate drive signal based on the received level signal using a preset algorithm and logic. This gate drive signal is output through the output terminal of the driver chip 21 to provide a basic signal for the subsequent driving process. For example, when the power device 25 is operating under low current conditions, the driver chip 21 will generate a gate drive signal suitable for low current driving to ensure that the power device 25 can operate efficiently and stably. Correspondingly, the logic circuit 22 contains a logic judgment and processing unit to analyze and process the input level signal. Specifically, based on the operating current information of the power device 25 reflected by the level signal, it generates corresponding control signals using preset logic rules and judgment conditions. For example, the logic circuit 22 can determine whether the power device 25 is currently operating under low current or high current conditions based on the magnitude of the level signal, and output control signals for different states accordingly. The drive resistor switching circuit 23 contains multiple resistors with different resistance values ​​and corresponding switching switches. When it receives a control signal output from the logic circuit 22, the drive resistor switching circuit 23 adjusts the gate drive resistor value by controlling the on / off state of the switching switches according to the instructions of the control signal. For example, under low current conditions, the control signal output from the logic circuit 22 will cause a certain switching switch in the drive resistor switching circuit 23 to close, connecting multiple resistors in parallel, thereby reducing the gate drive resistor value. Under high current conditions, the control signal will cause the switching switch to open, restoring the original resistance value of the gate drive resistor. Correspondingly, the gate drive signal flows through the adjusted gate drive resistor to form an adjusted gate drive signal, which is output to the gate of the power device 25 through the output terminal of the drive resistor switching circuit 23, thereby realizing precise control of the operating state of the power device.

[0044] This embodiment of the application organically combines a driver chip, logic circuit, and drive resistor switching circuit. The driver chip receives a level signal reflecting the operating current of the power device and generates a gate drive signal. The logic circuit outputs a control signal based on this level signal. The drive resistor switching circuit dynamically adjusts the gate drive resistor according to the control signal. This achieves fine-grained, segmented adjustment of the gate drive resistor based on changes in the load current of the power device. This effectively overcomes the problem of fixed and singular drive parameters in existing systems, and can fully utilize the electrical performance of the power device. By dynamically adjusting the gate drive resistor, the switching losses of the power device can be reduced under low current conditions, thereby significantly improving the overall efficiency of the electric drive system and thus increasing the vehicle's range. At the same time, it can effectively control electrical stress under high current conditions, which helps improve the robustness of the motor controller and provides strong support for the performance improvement of new energy vehicles.

[0045] In some embodiments, the driver chip is a gate driver with desaturation current source protection.

[0046] For example, the driver chip uses a gate driver with desaturation (DESAT) current source protection, such as TI's UCC21750. Specifically, the analog level signal of the driver chip's built-in desaturation protection detection pin DESAT is directly reused. This signal indirectly reflects the load current by detecting the collector-emitter saturation voltage drop of the power device (such as an IGBT or SiC MOSFET).

[0047] This embodiment of the application reuses the hardware resources of existing DESAT protection circuits, eliminating the need for additional current sampling circuits (such as Hall sensors or shunt resistors), which not only simplifies the circuit topology but also significantly reduces material costs such as bill of materials (BOM) costs. Simultaneously, this highly integrated design saves printed circuit board (PCB) layout space, making it particularly suitable for the compact layout requirements of new energy vehicle electric drive systems. Furthermore, this hardware reuse strategy achieves intelligent adjustment through pure hardware circuitry, ensuring system dynamic response performance while balancing reliability and cost optimally, which is of positive significance for achieving miniaturization, lightweighting, and cost reduction of new energy vehicle electric drive systems.

[0048] In some embodiments, the logic circuit includes a first voltage comparator, a second voltage comparator, and a logic processing unit. The positive terminals of the first and second voltage comparators are connected as input terminals of the logic circuit. The negative terminal of the first voltage comparator is used to input a first voltage threshold, and the first voltage comparator compares a level signal with the first voltage threshold to obtain a first comparison result. The negative terminal of the second voltage comparator is used to input a second voltage threshold, and the second voltage comparator compares a level signal with the second voltage threshold to obtain a second comparison result. The first input terminal of the logic processing unit is connected to the output terminal of the first voltage comparator, and the second input terminal of the logic processing unit is connected to the output terminal of the second voltage comparator. The logic processing unit generates a control signal based on the first and second comparison results, and outputs it through its output terminal.

[0049] For example, Figure 3 Schematic diagram of the logic circuit provided for an exemplary embodiment of this application Figure 1 .like Figure 3As shown, V_DESAT refers to the analog level signal of the desaturation protection detection pin (DESAT) built into the driver chip, and its voltage value changes with the collector current of the power device; Vref_H refers to the preset first voltage threshold; Vref_L refers to the preset second voltage threshold, which forms a hysteresis window with Vref_H to prevent oscillation during operating condition switching; U1 refers to the first voltage comparator, and U2 refers to the second voltage comparator. Accordingly, the positive terminal of the first voltage comparator U1 is directly connected to V_DESAT to monitor the saturation voltage drop of the power device in real time, and its negative terminal is connected to the Vref_H threshold voltage. The output terminal of the first voltage comparator U1 outputs the first comparison result corresponding to V_DESAT and Vref_H; the positive terminal of the second voltage comparator U2 is also connected to the V_DESAT signal, and its negative terminal is connected to the Vref_L threshold voltage. The output terminal of the second voltage comparator U2 outputs the second comparison result corresponding to V_DESAT and Vref_L. Correspondingly, the first input terminal of the logic processing unit is used to input the first comparison result, the second input terminal of the logic processing unit is used to input the second comparison result, the logic processing unit generates a control signal based on the first comparison result and the second comparison result, and outputs it through the output terminal of the logic processing unit.

[0050] In this embodiment, by employing a first voltage comparator and a second voltage comparator, and comparing different voltage thresholds with the same level signal, precise range division of the operating current of the power device is achieved. Secondly, by processing the comparison results in real time through a logic processing unit, the drive mode switching can be completed quickly, significantly improving the response speed. In addition, the circuit structure is simple, requiring only a general-purpose comparator and basic logic devices, effectively reducing the circuit design cost and PCB layout space, and providing a drive solution for the electric drive system of new energy vehicles that combines high performance, high reliability and low cost.

[0051] In some embodiments, the logic processing unit includes an OR gate, a latch circuit, and an isolation diode. The first input terminal of the OR gate serves as the first input terminal of the logic processing unit, the anode of the isolation diode serves as the second input terminal of the logic processing unit, the cathode of the isolation diode is connected to the second input terminal of the OR gate, and the output terminal of the OR gate serves as the output terminal of the logic processing unit. The latch circuit is formed by connecting the output terminal of the OR gate to the cathode of the isolation diode through a feedback resistor, and is used to latch the control signal output by the logic processing unit.

[0052] For example, Figure 4 Schematic diagram of the logic circuit provided for an exemplary embodiment of this application Figure 2 .like Figure 4As shown, R1 and R2 are pull-up resistors. One end of R1 and R2 is connected to the output terminals of voltage comparators U1 and U2, respectively, and the other end of R1 and R2 is connected to the power supply VCC_15V. U3 is an OR gate circuit, D1 is an isolation diode, and R3 is a feedback resistor. The output terminal of the OR gate circuit U3 is connected to the cathode of the isolation diode D1 through the feedback resistor R3 to form a latch circuit. Accordingly, it is assumed that the comparison result signals from voltage comparators U1 and U2 are input to the first and second input terminals of the logic processing unit, respectively. When either input signal satisfies the logic condition of the OR gate circuit, the OR gate circuit outputs the corresponding control signal. At the same time, the latch circuit latches the control signal to ensure the stability of the signal during subsequent circuit processing and reduce the instability of the output signal caused by short-term fluctuations in the input signal.

[0053] Based on the above embodiments, in some embodiments, the drive resistor switching circuit includes an adjustable resistor network, which contains at least two parallel resistor branches. The adjustable resistor network is used to selectively turn on different resistor branches according to the control signal to dynamically adjust the gate drive resistor.

[0054] For example, the adjustable resistor network includes multiple parallel resistor branches. When the power device is in low-power operation, the logic circuit outputs control signal 1, which selectively turns on multiple parallel resistor branches. At this time, multiple parallel resistor branches are simultaneously connected to the circuit. Since multiple branches are connected in parallel, the total resistance is the parallel resistance of multiple branches, resulting in a smaller drive resistance. This smaller drive resistance helps to speed up the switching speed of the power device and reduce switching losses, thereby improving the efficiency of the circuit at low power. Correspondingly, when the power device enters high-power operation, the logic circuit outputs control signal 2, which turns off the electronic switches in multiple branches, for example, turning on only one branch A. Then the gate drive resistance becomes the resistance value contained in branch A, resulting in a larger drive resistance. This effectively limits the rate of change of current, reduces electromagnetic interference, and protects the power device from the impact of large currents, ensuring its operation within a safe operating range.

[0055] It should be noted that in practical applications, the number of parallel resistor branches can be increased according to specific needs. For example, three or more parallel branches can be set up, and the resistance value and switching state of each branch can be precisely controlled by the logic circuit according to different operating conditions, thereby achieving more precise gate drive resistor adjustment.

[0056] In some embodiments, the adjustable resistor network includes a first resistor branch and a second resistor branch, wherein the first resistor branch includes a first resistor, and the second resistor branch includes a second resistor connected in series and a switching device, the control terminal of the switching device being connected to the output terminal of the logic circuit; the switching device is turned on when the control signal is low, so that the first resistor and the second resistor form a parallel structure, and the gate drive resistor is adjusted to the parallel resistance value of the first resistor and the second resistor; and the switching device is turned off when the control signal is high, and the gate drive resistor is adjusted to the first resistor.

[0057] For example, Figure 5 Schematic diagram of the gate drive circuit provided in the exemplary embodiments of this application Figure 2 .like Figure 5 As shown, the adjustable resistor network includes a first resistor branch and a second resistor branch. The first resistor branch includes a first resistor R5, and the second resistor branch consists of a second resistor R6 connected in series and a switching device Q1. The control terminal of the switching device Q1 is connected to the output terminal OUT1 of the logic circuit 22. Furthermore, capacitor C1, diodes D2, D3, D4, and resistor R4 together form the saturation voltage drop detection circuit 24 for the power device. Correspondingly, the current range is divided by setting the Vref_H level, and it works in conjunction with the drive resistor switching circuit 23. The circuit's operation consists of the following four stages:

[0058] 1) The first stage is power-on initialization: In this stage, the input Vref_H of voltage comparator U1 is greater than V_DESAT, and the input Vref_L of voltage comparator U2 is also greater than V_DESAT. At this time, both U1 and U2 output low level. Correspondingly, the output terminal OUT1 of logic circuit 22 outputs low level, which makes the switching device Q1 in the adjustable resistor network conduct, and the first resistor branch and the second resistor branch conduct simultaneously. R5 and R6 are connected in parallel, and the gate drive resistor is the parallel resistance value of R5 and R6.

[0059] 2) The second stage is the low torque mode: the input Vref_H of the voltage comparator U1 is still greater than V_DESAT, and the output of U1 is low. At this time, the output state of U2 does not affect the output of U3. The output terminal OUT1 of U3 remains low. The switching device Q1 in the adjustable resistor network remains on. The gate drive resistor is still the parallel resistance of R5 and R6. Since the resistance of the parallel resistor is small, the switching loss (Esw) decreases, which realizes the improvement of the low current drive speed and effectively improves the efficiency of the motor controller.

[0060] 3) The third stage is the high torque mode: In the high torque mode, the input V_DESAT of the U1 voltage comparator is greater than Vref_H, the output of the U1 voltage comparator is high, the output state of the U2 voltage comparator does not affect the output of U3, the output terminal OUT1 of U3 outputs a high level, the switching device Q1 in the adjustable resistor network is cut off, the second resistor branch is not conducting, the gate drive resistor is adjusted to R5 in the first resistor branch, at this time the switching loss Esw returns to normal, the control of electrical stress under high current is completed, and the robustness of the motor controller is effectively improved.

[0061] 4) The fourth stage is the hysteresis interval stage: The hysteresis interval is set by setting the Vref_L level; in this stage, the OR gate U3 and the resistor R3 form a latch circuit, OUT1 outputs a high level until the input V_DESAT of the U2 voltage comparator is less than Vref_L, the output state of OU1 switches to a low level, the switching device Q1 in the adjustable resistor network is turned on, and the gate drive resistor becomes the parallel resistance value of R5 and R6 again. The setting of the hysteresis function ensures that the switching loss of power devices can be reduced under small current.

[0062] For example, Table 1 provides an example of the relationship between gate drive resistance and current provided by an exemplary embodiment of this application. As shown in Table 1, "X" indicates an uncertain situation. In this stage, since the circuit is in the initial power-on state, various parameters have not yet stabilized, and the switching loss (Esw) is in an uncertain state, which cannot be described by a specific trend (such as rising or falling). Therefore, "X" is used to identify this uncertain situation.

[0063] Table 1. An example of the relationship between gate drive resistance and current.

[0064]

[0065] In this embodiment, the switching device state is switched based on high and low level control signals output by the logic circuit, thereby dynamically adjusting the gate drive resistor and achieving precise control of the switching characteristics of the power device. When the switching device is turned on at a low level, the resistance value is reduced by connecting branch resistors in parallel, which can improve the switching speed under low current, reduce switching losses, and improve circuit efficiency. When the switching device is turned off at a high level, the resistance value is increased to control the current change rate under high current, effectively reducing electromagnetic interference and protecting the power device. This design enhances the circuit's adaptability to different operating conditions, simplifies the circuit structure, reduces costs, and improves the stability and reliability of the system, providing a strong guarantee for the safe and efficient operation of the power device.

[0066] In some embodiments, the switching device is an N-channel enhancement-mode MOSFET, wherein the gate of the N-channel enhancement-mode MOSFET is connected as a controlled terminal to the output terminal of the logic circuit, the drain of the N-channel enhancement-mode MOSFET is connected to one end of a second resistor, and the source of the N-channel enhancement-mode MOSFET is grounded.

[0067] For example, still refer to Figure 5 The switching device Q1 is an N-channel enhancement-mode MOSFET. The gate of the N-channel enhancement-mode MOSFET, as the controlled terminal, is directly connected to the output of the logic circuit to receive control signals from the logic circuit. The drain of the N-channel enhancement-mode MOSFET is connected to one end of the second resistor R6, while the source of the N-channel enhancement-mode MOSFET is grounded. Accordingly, during actual circuit operation, the logic circuit outputs corresponding level signals to the MOSFET gate based on the operating state of the power device, such as current magnitude or voltage level. When the logic circuit outputs a low level, the MOSFET is turned on, and the second resistor branch R6 is connected to the circuit, forming a parallel relationship with the first resistor branch R5. The gate drive resistor becomes the parallel resistance of the first resistor R5 and the second resistor R6. When the logic circuit outputs a high level, the MOSFET is in the off state. At this time, the second resistor branch is equivalent to an open circuit, and only the first resistor branch is connected to the circuit. The gate drive resistor is the resistance of the first resistor R5. For example, in an electric drive system, when the motor is running under light load, the logic circuit outputs a low level to turn on the MOSFET, reducing the gate drive resistance through a parallel resistor, thereby improving the switching efficiency of the power device; when the motor enters a heavy load operation state, the logic circuit outputs a high level to turn off the MOSFET, increasing the gate drive resistance, thereby ensuring the safe and stable operation of the power device under high current.

[0068] It should be noted that the types of driver chips and power devices mentioned above are merely examples. In practical applications, the types can be flexibly selected based on various factors such as the actual application scenario, performance requirements, and cost budget. No limitation is placed on the types of driver chips and power devices here. Furthermore, for the drive resistor switching circuit and logic circuit, more settings can be configured for adjustment based on specific needs. For example, in applications with extremely precise requirements for power device performance, multiple different gate drive resistance settings can be configured to precisely match the needs of the power device under different operating states, thereby achieving better switching characteristics, higher efficiency, and better protection. Therefore, in practical applications, the number of settings and parameters can be set based on specific system requirements, power device characteristics, and overall performance optimization goals. No limitation is placed on the number of settings and specific parameters corresponding to the drive resistor switching circuit and logic circuit here.

[0069] This application also provides a motor controller, including a power device and the gate drive circuit described in the above embodiments.

[0070] By applying the gate drive circuit provided in the above embodiments to the motor controller of this application embodiment, the motor controller can perform fine-grained segmented adjustment of the gate drive resistor according to the load current changes of the power devices. This not only improves the switching efficiency and reliability of the power devices and reduces switching losses and electromagnetic interference, but also significantly enhances the overall performance of the motor controller and the efficiency of the electric drive system, providing strong support for the vehicle's power output and energy utilization.

[0071] This application also provides an electric drive system for a vehicle, including a motor and a motor controller as described in the above embodiments.

[0072] By applying the motor controller provided in the above embodiments to the electric drive system of the vehicle in this application embodiment, the gate drive resistor can be finely and segmentally adjusted according to the load current change of the power device, effectively reducing switching losses and conduction losses, giving full play to the performance of the power device, greatly improving the overall efficiency of the electric drive system, and thus significantly enhancing the vehicle's range.

[0073] This application also provides a vehicle including a motor controller as described in the above embodiments, or the vehicle including an electric drive system as described in the above embodiments.

[0074] By applying the motor controller or electric drive system of the vehicle provided in the above embodiments to the vehicle of this application embodiment, the overall performance of the vehicle can be effectively improved, especially the range performance of the vehicle.

[0075] In summary, this application has at least the following advantages:

[0076] I. By organically combining the driver chip, logic circuit, and drive resistor switching circuit, the driver chip receives the level signal reflecting the operating current of the power device and generates a gate drive signal. The logic circuit outputs a control signal based on this level signal, and the drive resistor switching circuit dynamically adjusts the gate drive resistor according to the control signal. This achieves fine-grained, segmented adjustment of the gate drive resistor based on changes in the load current of the power device, effectively overcoming the problem of fixed and singular drive parameters in existing systems. It can fully utilize the electrical performance of the power device. By dynamically adjusting the gate drive resistor, the switching losses of the power device can be reduced under low current conditions, thereby significantly improving the overall efficiency of the electric drive system and thus increasing the vehicle's range. At the same time, it can effectively control electrical stress under high current conditions, which helps improve the robustness of the motor controller and provides strong support for the performance improvement of new energy vehicles.

[0077] Second, by reusing the hardware resources of the existing DESAT protection circuit, the necessary additional current sampling circuit is eliminated, which not only simplifies the circuit topology but also significantly reduces material costs such as BOM costs. At the same time, this highly integrated design also saves PCB layout space, making it particularly suitable for the compact layout requirements of new energy vehicle electric drive systems. In addition, this hardware reuse strategy achieves intelligent adjustment through pure hardware circuits, ensuring the dynamic response performance of the system while taking into account the optimal balance between reliability and cost, which is of positive significance for realizing the miniaturization, lightweighting, and cost reduction of new energy vehicle electric drive systems.

[0078] Third, by employing a first voltage comparator and a second voltage comparator, and comparing different voltage thresholds with the same level signal, precise range division of the operating current of the power device is achieved. Secondly, the comparison results are processed in real time by the logic processing unit, which can quickly complete the drive mode switching and significantly improve the response speed. In addition, the circuit structure is simple, requiring only general-purpose comparators and basic logic devices, which effectively reduces the circuit design cost and PCB layout space, providing a drive solution for the electric drive system of new energy vehicles that combines high performance, high reliability and low cost.

[0079] Fourth, by switching the state of the switching devices based on high and low level control signals output by the logic circuit, and then dynamically adjusting the gate drive resistor, precise control of the switching characteristics of the power devices is achieved. When the switching devices are turned on at a low level, the resistance value is reduced by connecting branch resistors in parallel, which can improve the switching speed under low current, reduce switching losses, and improve circuit efficiency. When the switching devices are turned off at a high level, the resistance value is increased to control the current change rate under high current, effectively reducing electromagnetic interference and protecting the power devices. This design enhances the circuit's adaptability to different operating conditions, simplifies the circuit structure, reduces costs, and improves the stability and reliability of the system, providing a strong guarantee for the safe and efficient operation of the power devices.

[0080] Finally, it should be noted that other embodiments of this application will readily conceive of by those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and alterations may be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A gate drive circuit, characterized in that, include: Driver chip, logic circuit, and drive resistor switching circuit; among which: The driver chip includes an input terminal and an output terminal. The input terminal is connected to the saturation voltage drop detection circuit of the power device and is used to receive a level signal reflecting the operating current of the power device. The driver chip is used to generate a gate drive signal based on the level signal and output it through the output terminal. The input terminal of the logic circuit is connected to the input terminal of the driver chip for inputting the level signal. The logic circuit is used to output a control signal based on the level signal and output it through the output terminal of the logic circuit. The first input terminal of the drive resistor switching circuit is connected to the output terminal of the drive chip, and the second input terminal of the drive resistor switching circuit is connected to the output terminal of the logic circuit. The drive resistor switching circuit is used to adjust the gate drive resistor based on the control signal. The gate drive signal flows through the adjusted gate drive resistor to form an adjusted gate drive signal, and is output to the gate of the power device through the output terminal of the drive resistor switching circuit.

2. The gate drive circuit according to claim 1, characterized in that, The logic circuit includes a first voltage comparator, a second voltage comparator, and a logic processing unit, wherein: The positive terminals of the first voltage comparator and the second voltage comparator are connected as the input terminals of the logic circuit; The negative terminal of the first voltage comparator is used to input a first voltage threshold, and the first voltage comparator is used to compare the level signal with the first voltage threshold to obtain a first comparison result; The negative terminal of the second voltage comparator is used to input a second voltage threshold, and the second voltage comparator is used to compare the level signal with the second voltage threshold to obtain a second comparison result; The first input terminal of the logic processing unit is connected to the output terminal of the first voltage comparator, and the second input terminal of the logic processing unit is connected to the output terminal of the second voltage comparator. The logic processing unit is used to generate the control signal based on the first comparison result and the second comparison result, and output the control signal through the output terminal of the logic processing unit.

3. The gate drive circuit according to claim 2, characterized in that, The logic processing unit includes an OR gate, a latch circuit, and an isolation diode, wherein: The first input terminal of the OR gate circuit serves as the first input terminal of the logic processing unit, the anode of the isolation diode serves as the second input terminal of the logic processing unit, the cathode of the isolation diode is connected to the second input terminal of the OR gate circuit, and the output terminal of the OR gate circuit serves as the output terminal of the logic processing unit. The latching circuit is formed by connecting the output of the OR gate circuit to the cathode of the isolation diode through a feedback resistor, and is used to latch the control signal output by the logic processing unit.

4. The gate drive circuit according to any one of claims 1 to 3, characterized in that, The drive resistor switching circuit includes an adjustable resistor network, which contains at least two parallel resistor branches. The adjustable resistor network is used to selectively turn on different resistor branches according to the control signal to dynamically adjust the gate drive resistor.

5. The gate drive circuit according to claim 4, characterized in that, The adjustable resistor network includes a first resistor branch and a second resistor branch, wherein: The first resistor branch includes a first resistor, and the second resistor branch includes a second resistor connected in series and a switching device. The control terminal of the switching device is connected to the output terminal of the logic circuit. When the control signal is low, the switching device is turned on, so that the first resistor and the second resistor form a parallel structure, and the gate drive resistor is adjusted to the parallel resistance value of the first resistor and the second resistor. When the control signal is high, the switching device is turned off, and the gate drive resistor is adjusted to the first resistor.

6. The gate drive circuit according to claim 5, characterized in that, The switching device is an N-channel enhancement-mode MOSFET, wherein the gate of the N-channel enhancement-mode MOSFET is connected to the output terminal of the logic circuit as a controlled terminal, the drain of the N-channel enhancement-mode MOSFET is connected to one end of the second resistor, and the source of the N-channel enhancement-mode MOSFET is grounded.

7. The gate drive circuit according to any one of claims 1 to 3, characterized in that, The driving chip is a gate driver with desaturation current source protection function.

8. A motor controller, characterized in that, It includes power devices and gate drive circuits as described in any one of claims 1 to 7.

9. An electric drive system for a vehicle, characterized in that, Includes an electric motor and a motor controller as described in claim 8.

10. A vehicle, characterized in that, The vehicle may include the motor controller as described in claim 8, or the vehicle may include the electric drive system of the vehicle as described in claim 9.

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