Key trigger reset circuit and device

Abstract

This utility model discloses a button-triggered reset circuit and device, which has a button signal detection terminal and a reset enable terminal. The reset circuit includes a voltage source terminal, a detection unit, a delayed discharge unit, and a reset inverting module. The voltage source terminal provides the working voltage for the reset circuit. The detection unit connects the voltage source terminal and the button signal detection terminal and outputs a drive current when the button switch is detected to be pressed. The delayed discharge unit receives the drive current to connect the input and output terminals and form a discharge circuit. The reset inverting module pulls the level of the reset enable terminal low when the delayed discharge unit forms a discharge circuit and the voltage drops to a preset threshold, thereby resetting the external control chip. Through the above design, this utility model can restart the system and restore normal use without disassembling the device, disconnecting the power supply, and reconnecting the power, realizing two functions with one button and improving the user experience.

Description

Technical Field

[0001] This utility model relates to the technical field of button circuits, and in particular to a button trigger reset circuit and device. Background Technology

[0002] Currently, many electronic products on the market only have a power switch button in order to achieve a simple and elegant appearance. However, when the system crashes or becomes unstable and the program enters a loop, pressing the power switch will have no effect and the system cannot be restarted. It is necessary to disassemble the device, disconnect the power, and then reconnect the power to restart the system and restore normal use, which seriously affects the user experience. Therefore, those skilled in the art urgently need to address the above-mentioned problems. Utility Model Content

[0003] In order to address the technical deficiencies mentioned in the background section, the purpose of this utility model is to provide a button-triggered reset circuit and device that can restart the system and restore normal use without disassembling the device to disconnect the power supply and reconnect the power, thus realizing two functions with one button and improving the user experience.

[0004] The present invention adopts the following technical solution: In a first aspect, a button-triggered reset circuit is provided, the reset circuit having a button signal detection terminal and a reset enable terminal electrically connected to an external control chip, the reset circuit comprising: The voltage source terminal is electrically connected to an external power supply circuit, and the voltage source terminal is used to provide the working voltage for the reset circuit. The detection unit is electrically connected to the button signal detection terminal. When the button switch is detected to be pressed, the detection unit is used to connect the voltage source terminal to the button signal detection terminal and output a drive current. The delayed discharge unit has a control terminal, an input terminal, and an output terminal. Its control terminal is electrically connected to the output terminal of the detection unit and is used to receive the driving current to make the input terminal and the output terminal conduct and form a discharge circuit. The reset inverting module is electrically connected to the delayed discharge unit, the voltage source terminal, and the external control chip. The reset inverting module is used to pull the level of the reset enable terminal low when the delayed discharge unit forms a discharge circuit and the voltage is released to a preset threshold, so as to reset the external control chip.

[0005] Optionally, the reset inverting module includes a first switching unit and a second switching unit. The control terminal of the first switching unit is electrically connected to the output terminal of the delayed discharge unit, the input terminal is electrically connected to the voltage source terminal, and the output terminal is grounded. The control terminal of the second switching unit is electrically connected to the input terminal of the first switching unit, the input terminal is electrically connected to the reset enable terminal, and the output terminal is grounded. When the first switching unit is pulled low by the delayed discharge unit, the first switching unit is turned off, the second switching unit is turned on, and the level of the reset enable terminal is pulled low to reset the external control chip.

[0006] Optionally, the first switching unit includes a first transistor, the gate of the first transistor is electrically connected to the output terminal of the delayed discharge unit, the drain is electrically connected to the voltage source terminal, and the source is grounded. When the delayed discharge unit forms a discharge circuit, the gate voltage of the first transistor is pulled low, and the drain and source are cut off.

[0007] Optionally, the second switching unit includes a second transistor, the gate of which is electrically connected between a voltage source terminal and the drain of a first transistor, the drain of which is electrically connected to the reset enable terminal of an external control chip, and the source of which is grounded. When the first transistor is off, the operating current output from the voltage source terminal passes through the gate of the second transistor, and the drain and source of the second transistor are turned on, thereby pulling down the level of the reset enable terminal to reset the external control chip.

[0008] Optionally, the detection unit includes a push-button switch, a first resistor, a second resistor, and a first capacitor. The push-button switch is electrically connected to the button signal detection terminal and the voltage source terminal. The first end of the first resistor is electrically connected between the push-button switch and the button signal detection terminal. The first end of the second resistor is electrically connected to the second end of the first resistor, and the second end of the second resistor is grounded. The first end of the first capacitor is electrically connected between the second end of the first resistor and the control terminal of the time-delay discharge unit, and the second end of the first capacitor is grounded. The first capacitor is used to filter the drive current supplied by the first resistor to the time-delay discharge unit. Optionally, the delayed discharge unit includes a transistor, a third resistor, a second capacitor, and a diode. The control terminal of the transistor is electrically connected to the first terminal of the first resistor, the collector is electrically connected to the voltage source terminal, and the emitter is grounded. The first terminal of the third resistor is electrically connected to the voltage source terminal, and the second terminal of the third resistor is grounded. The first terminal of the second capacitor is electrically connected to the second terminal of the third resistor, and the second terminal of the second capacitor is grounded. The anode of the diode is electrically connected to the voltage source terminal, and the cathode is electrically connected to the reset inverting module. When the collector and emitter of the transistor are turned on, the transistor, the third resistor, and the second capacitor form a discharge circuit. After the discharge is completed, the gate voltage of the first transistor is pulled low, and the first transistor is turned off.

[0009] Optionally, a fourth resistor may also be included, which is electrically connected between the voltage source terminal and the collector of the transistor.

[0010] Optionally, a fifth resistor may also be included, which is electrically connected between the voltage source terminal and the drain of the first transistor.

[0011] Optionally, it also includes a sixth resistor and a third capacitor, wherein the first end of the sixth resistor is electrically connected to the voltage source terminal, the second end of the sixth resistor is electrically connected to the first end of the third capacitor, and the second end of the third capacitor is grounded.

[0012] Secondly, embodiments of this application also provide a button-triggered reset device, including the button-triggered reset circuit as described above; and a circuit board, wherein the button-triggered reset circuit is etched onto the circuit board.

[0013] In summary, the beneficial effects of this utility model are as follows: By electrically connecting the button signal detection terminal and the reset enable terminal to an external control chip, the external control chip can be controlled. Simultaneously, a voltage source terminal provides operating voltage to the entire circuit. When the button switch is pressed, the detection unit sends a detection signal to the external control chip, enabling the external control chip to perform its button switch function. Simultaneously, it sends a drive current to the delay discharge unit, which forms a discharge circuit and performs a discharge delay. When the voltage of the delay discharge unit drops below the threshold voltage required by the reset inverting module, the reset inverting module pulls the reset enable terminal low, resetting the external control chip. This achieves two functions with a single button switch, avoiding the need for disassembly and improving the user experience.

[0014] The above description is merely an overview of the technical solution of this utility model. In order to better understand the technical means of this utility model and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this utility model more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the architecture of an embodiment of the present utility model; Figure 2 This is a circuit diagram of an embodiment of the present invention.

[0016] Explanation of the reference numerals in the figure: 100. Detection unit; 200. Delayed discharge unit; 300. Reset inverting module; 310. First switching unit; 320. Second switching unit; Q1, first transistor; Q2, second transistor; S1, push-button switch; R1, first resistor; R2, second resistor; C1, first capacitor; Q3, transistor; R3, third resistor; C2, second capacitor; D1, diode; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; MCU_KEY, push-button signal detection terminal; MCU_REST, reset enable terminal; VCC, voltage source terminal. Detailed Implementation

[0017] To make the content of this utility model easier to understand, the present utility model will be further described below with reference to specific embodiments and accompanying drawings.

[0018] It should be noted that the terms "center," "upper," "lower," "front," "rear," "left," "right," "inner," and "outer" used herein to indicate the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Unless otherwise stated, "a plurality of" means two or more.

[0019] Unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0020] Firstly, such as Figure 1 As shown, this application embodiment provides a button-triggered reset circuit, including a button signal detection terminal MCU_KEY, a reset enable terminal MCU_REST, a voltage source terminal VCC, a detection unit 100, a delayed discharge unit 200, and a reset inverting module 300. The voltage source terminal VCC is electrically connected to an external power supply circuit, and the voltage source terminal VCC is used to provide the operating voltage for the reset circuit. The detection unit 100 is electrically connected to the button signal detection terminal MCU_KEY, and the detection unit 100 is used to, when the button switch S1 is detected to be pressed, cause the voltage source terminal VCC to be connected to the button signal detection terminal MCU_KEY. Y is turned on and outputs a drive current; the delayed discharge unit 200 has a control terminal, an input terminal and an output terminal. Its control terminal is electrically connected to the output terminal of the detection unit 100 and is used to receive the drive current to make the input terminal and the output terminal conduct and form a discharge circuit; the reset inverting module 300 is electrically connected to the delayed discharge unit 200, the voltage source terminal VCC and the external control chip. The reset inverting module 300 is used to pull the level of the reset enable terminal MCU_REST low when the delayed discharge unit 200 forms a discharge circuit and the voltage is released to a preset threshold, so as to reset the external control chip.

[0021] In this embodiment, the reset circuit is mainly used to reset the external control chip, thereby enabling the system to restart. Traditional circuits do not have this reset function. Therefore, by electrically connecting the reset circuit to the external control chip, the control chip can be reset when the reset circuit is working. Specifically, the reset circuit is electrically connected to the detection pin and reset signal pin of the external control chip by setting the key signal detection terminal MCU_KEY and the reset enable terminal MCU_REST. When the reset circuit is working, it can reset the external control chip. Further, the reset circuit includes a voltage source terminal VCC, which provides the operating voltage for the entire circuit. This operating voltage can be 3.3V. The detection unit 100 is electrically connected between the key signal detection terminal MCU_KEY and the voltage source terminal VCC. When the detection unit 100 detects that the key switch S1 is pressed, the voltage source terminal VCC and the key signal detection terminal MCU_KEY are turned on, and the key signal detection terminal MCU_KEY is a high-level signal. The external control chip detects a key press and can then output the corresponding key function control signal.

[0022] Simultaneously, after detecting that the push button switch S1 is pressed, the detection unit 100 outputs a drive current. The delayed discharge unit 200 receives the drive current through its control terminal. This drive current connects the input and output terminals of the delayed discharge unit 200, forming a discharge loop. The voltage in this discharge loop gradually decreases over time. Since the control terminal of the reset inverting module 300 is electrically connected to the output terminal of the delayed discharge unit 200, the reset inverting module 300 will pull down the reset enable terminal MCU_REST when the voltage output by the delayed discharge unit 200 drops to a certain threshold, thus resetting the external control chip. When the delayed discharge unit 200 does not form a discharge loop, i.e., when the detection unit 100 does not output a drive current (when the push button switch S1 is not pressed), the reset inverting module 300 will not pull down the external control chip, and therefore will not reset it.

[0023] By setting a reset function on the push-button switch S1, the traditional method of using only one push-button switch S1 to achieve a reset is avoided, thus eliminating the need to disassemble the device during the reset process and improving the user experience.

[0024] Optional, such as Figure 2As shown, the reset inverting module 300 includes a first switching unit 310 and a second switching unit 320. The control terminal of the first switching unit 310 is electrically connected to the output terminal of the delayed discharge unit 200, the input terminal is electrically connected to the voltage source terminal VCC, and the output terminal is grounded. The control terminal of the second switching unit 320 is electrically connected to the input terminal of the first switching unit 310, the input terminal is electrically connected to the reset enable terminal MCU_REST, and the output terminal is grounded. When the first switching unit 310 is pulled low by the delayed discharge unit 200, the first switching unit 310 is turned off, the second switching unit 320 is turned on, and the level of the reset enable terminal MCU_REST is pulled low to reset the external control chip.

[0025] In this embodiment, by electrically connecting the control terminal of the first switching unit 310 and the output terminal of the delayed discharge unit 200, electrically connecting the input terminal to the voltage source terminal VCC, and grounding the output terminal, the voltage will decrease when the delayed discharge unit 200 forms a discharge circuit because the control terminal of the first switching unit 310 is turned on by voltage. At this time, the input and output terminals of the first switching unit 310 will be turned off as the voltage decreases. Since the control terminal of the second switching unit 320 is electrically connected to the input terminal of the first switch (i.e., electrically connected between the voltage source terminal VCC and the input terminal of the first switching unit 310), the voltage at the voltage source terminal VCC will remain at the control terminal of the second switching unit 320 when the first switching unit 310 is turned off. The second switching unit 320 will then be turned on. The input terminal of the second switching unit 320 is electrically connected to the reset signal pin of the external control chip, thereby pulling the reset enable terminal MCU_REST low. When the reset signal pin of the external control chip is pulled low, the external control chip will perform a reset, thus achieving the reset function.

[0026] Optional, such as Figure 2 As shown, the first switching unit 310 includes a first transistor Q1. The gate of the first transistor Q1 is electrically connected to the output terminal of the delayed discharge unit 200, the drain is electrically connected to the voltage source terminal VCC, and the source is grounded. When the delayed discharge unit 200 forms a discharge circuit, the gate voltage of the first transistor Q1 is pulled low, and the drain and source are cut off.

[0027] In this embodiment, the first switching unit 310 may include a first transistor Q1. Specifically, the first transistor Q1 may be a MOSFET, specifically a P-type MOSFET. The gate of the MOSFET is electrically connected to the second terminal of the third resistor R3, the drain of the MOSFET is electrically connected to the second terminal of the fifth resistor R5, and the source is grounded. As the gate voltage of the first transistor Q1 gradually decreases, the connection between the drain and source will gradually be cut off, causing the voltage that originally flowed through the first transistor Q1 to flow to the second transistor Q2, thus turning on the second transistor Q2.

[0028] Optional, such as Figure 2 As shown, the second switching unit 320 includes a second transistor Q2. The gate of the second transistor Q2 is electrically connected between the voltage source terminal VCC and the drain of the first transistor Q1. The drain of the second transistor Q2 is electrically connected to the reset enable terminal MCU_REST of the external control chip, and the source of the second transistor Q2 is grounded. When the first transistor Q1 is turned off, the operating current output from the voltage source terminal VCC passes through the gate of the second transistor Q2, and the drain and source of the second transistor Q2 are turned on, thereby pulling the level of the reset enable terminal MCU_REST low, so as to reset the external control chip.

[0029] In this embodiment, the second transistor Q2 can also be a P-type MOSFET. The gate of the MOSFET is electrically connected to the second terminal of the third resistor R3, the drain of the MOSFET is electrically connected to the reset enable terminal MCU_REST, and the source of the MOSFET is grounded. When the first transistor Q1 is off, the voltage flowing through the third resistor R3 is input to the gate of the second transistor Q2, and the drain and source of the second transistor Q2 are turned on. When the drain and source of the second transistor Q2 are turned on, the level signal of the reset enable terminal MCU_REST is pulled low. Since the reset enable terminal MCU_REST is electrically connected to the reset signal pin of the external control chip, the external control chip will perform a reset.

[0030] Optional, such as Figure 2As shown, the detection unit 100 includes a push-button switch S1, a first resistor R1, a second resistor R2, and a first capacitor C1. The push-button switch S1 is electrically connected to the button signal detection terminal MCU_KEY and the voltage source terminal VCC. The first end of the first resistor R1 is electrically connected between the push-button switch S1 and the button signal detection terminal MCU_KEY. The first end of the second resistor R2 is electrically connected to the second end of the first resistor R1, and the second end of the second resistor R2 is grounded. The first end of the first capacitor C1 is electrically connected between the second end of the first resistor R1 and the control terminal of the time-delay discharge unit 200, and the second end of the first capacitor C1 is grounded. The first capacitor C1 is used to filter the drive current supplied by the first resistor R1 to the time-delay discharge unit 200.

[0031] In this embodiment, the push-button switch S1 is positioned between the button signal detection terminal MCU_KEY and the voltage source terminal VCC. When the push-button switch S1 is pressed, the connection between the button signal detection terminal MCU_KEY and the voltage source terminal VCC is established. At this time, the external control chip detects a high-level signal and executes the function of the button. When the push-button switch S1 is pressed, the voltage of the push-button switch S1 is divided by the first resistor R1 and the second resistor R2. The drive current is filtered by the first capacitor C1, and the filtered drive current drives the delayed discharge unit 200, causing the delayed discharge unit 200 to conduct.

[0032] Optional, such as Figure 2 As shown, the delayed discharge unit 200 includes a transistor Q3, a third resistor R3, a second capacitor C2, and a diode D1. The control terminal of the transistor Q3 is electrically connected to the first terminal of the first resistor R1, the collector is electrically connected to the voltage source terminal VCC, and the emitter is grounded. The first terminal of the third resistor R3 is electrically connected to the voltage source terminal VCC, and the second terminal of the third resistor R3 is grounded. The first terminal of the second capacitor C2 is electrically connected to the second terminal of the third resistor R3, and the second terminal of the second capacitor C2 is grounded. The anode of the diode D1 is electrically connected to the voltage source terminal VCC, and the cathode is electrically connected to the reset inverting module 300. When the collector and emitter of the transistor Q3 are turned on, the transistor Q3, the third resistor R3, and the second capacitor C2 form a discharge circuit. After the discharge is completed, the gate voltage of the first transistor Q1 is pulled low, and the first transistor Q1 is turned off.

[0033] In this embodiment, a discharge circuit is formed by setting up transistor Q3, third resistor R3, and second capacitor C2. When the button switch S1 is not pressed, the system operates normally and no discharge circuit is formed; the second capacitor C2 is normally fully charged. When the button switch S1 is pressed, transistor Q3 receives a drive current and conducts. At this time, transistor Q3, third resistor R3, and second capacitor C2 form a discharge circuit, thereby releasing the voltage in the second capacitor C2. Since the gate of the first transistor Q1 is electrically connected to the third resistor R3 and the second capacitor C2, the gate voltage of the first transistor Q1 gradually decreases with the discharge time. When the voltage gradually decreases to a certain threshold, the gate voltage of the first transistor Q1 is pulled low, and the drain and source of the first transistor Q1 are cut off.

[0034] It should be noted that when the push-button switch S1 is pressed, in addition to fulfilling its own function, the duration of the press also determines whether the external control chip is reset. The length of this delay is determined by the resistance of the third resistor R3 and the capacitance of the second capacitor C2. By setting up a delay discharge circuit, a single push-button switch S1 can perform two functions. This avoids the drawback of traditional methods where the system cannot be reset via the push-button switch S1 when it freezes, thus improving the user experience. Furthermore, since this application uses fewer components and does not use commercially available triggers to implement the reset function, the cost is lower, the circuit is simpler, and the durability of this embodiment is improved.

[0035] Optionally, the reset circuit also includes a fourth resistor R4, which is electrically connected between the voltage source terminal VCC and the collector of the transistor. By setting the fourth resistor R4, it is possible to prevent the voltage and current supplied by the voltage source terminal VCC from being too large or unstable and burning out the transistor Q3.

[0036] Optionally, the reset circuit further includes a fifth resistor R5, which is electrically connected between the voltage source terminal VCC and the drain of the first transistor Q1. By setting the fifth resistor R5, the voltage supplied by the voltage source terminal VCC can be prevented from burning out the first transistor Q1 and the second transistor Q2.

[0037] Optionally, the reset circuit further includes a sixth resistor R6 and a third capacitor. The first end of the sixth resistor R6 is electrically connected to the voltage source terminal VCC, and the second end of the sixth resistor R6 is electrically connected to the first end of the third capacitor. The second end of the third capacitor is grounded. By setting the sixth resistor R6, it is possible to prevent the voltage supplied by the voltage source terminal VCC from being too high and burning out the external control chip. The third capacitor allows for filtering of the operating voltage supplied by the voltage source terminal VCC, improving the stability of the external control chip. Secondly, embodiments of this application provide a button-triggered reset device, including the button-triggered reset circuit described above; and a circuit board, the button-triggered reset circuit being etched onto the circuit board (not shown in the figure). By setting the button-triggered reset device, two functions can be achieved with one button, avoiding the need for disassembly and power-off when the system freezes, as is the traditional method, thus improving the user experience.

[0038] The embodiments described in this specific implementation are preferred embodiments of this application and are not intended to limit the scope of protection of this application. Identical components are represented by the same reference numerals. Therefore, all equivalent changes made to the structure, shape, and principle of this application should be covered within the scope of protection of this application.

Claims

1. A key triggered reset circuit, characterized by The reset circuit has a key signal detection terminal (MCU_KEY) and a reset enable terminal (MCU_REST) ​​that are electrically connected to an external control chip. The reset circuit includes: The voltage source terminal (VCC) is electrically connected to the external power supply circuit, and the voltage source terminal (VCC) is used to provide the operating voltage for the reset circuit; The detection unit (100) is electrically connected to the key signal detection terminal (MCU_KEY). The detection unit (100) is used to connect the voltage source terminal (VCC) and the key signal detection terminal (MCU_KEY) and output a drive current when the key switch (S1) is detected to be pressed. The delayed discharge unit (200) has a control terminal, an input terminal and an output terminal. Its control terminal is electrically connected to the output terminal of the detection unit (100) and is used to receive the driving current to make the input terminal and the output terminal conduct and form a discharge circuit. The reset inverting module (300) is electrically connected to the delayed discharge unit (200), the voltage source terminal (VCC), and the external control chip. The reset inverting module (300) is used to pull the level of the reset enable terminal (MCU_REST) ​​low when the delayed discharge unit (200) forms a discharge circuit and the voltage is released to a preset threshold, so as to reset the external control chip.

2. The key trigger reset circuit according to claim 1, wherein, The reset inverting module (300) includes a first switching unit (310) and a second switching unit (320). The control terminal of the first switching unit (310) is electrically connected to the output terminal of the delayed discharge unit (200), the input terminal is electrically connected to the voltage source terminal (VCC), and the output terminal is grounded. The control terminal of the second switching unit (320) is electrically connected to the input terminal of the first switching unit (310), the input terminal is electrically connected to the reset enable terminal (MCU_REST), and the output terminal is grounded. When the first switching unit (310) is pulled low by the delayed discharge unit (200), the first switching unit (310) is turned off, the second switching unit (320) is turned on, and the level of the reset enable terminal (MCU_REST) ​​is pulled low to reset the external control chip.

3. The key trigger reset circuit according to claim 2, wherein, The first switching unit (310) includes a first transistor (Q1). The gate of the first transistor (Q1) is electrically connected to the output terminal of the delayed discharge unit (200), the drain is electrically connected to the voltage source terminal (VCC), and the source is grounded. When the delayed discharge unit (200) forms a discharge circuit, the gate voltage of the first transistor (Q1) is pulled low, and the drain and source are cut off.

4. The key trigger reset circuit according to claim 3, wherein, The second switching unit (320) includes a second transistor (Q2), the gate of which is electrically connected between the voltage source terminal (VCC) and the drain of the first transistor (Q1), the drain of which is electrically connected to the reset enable terminal (MCU_REST) ​​of the external control chip, and the source of which is grounded. When the first transistor (Q1) is turned off, the operating current output from the voltage source terminal (VCC) passes through the gate of the second transistor (Q2), and the drain and source of the second transistor (Q2) are turned on, thereby pulling down the level of the reset enable terminal (MCU_REST) ​​to reset the external control chip.

5. The key trigger reset circuit according to claim 3, wherein, The detection unit (100) includes a push button switch (S1), a first resistor (R1), a second resistor (R2), and a first capacitor (C1). The push button switch (S1) is electrically connected to the button signal detection terminal (MCU_KEY) and the voltage source terminal (VCC). The first end of the first resistor (R1) is electrically connected between the push button switch (S1) and the button signal detection terminal (MCU_KEY). The first end of the second resistor (R2) is electrically connected to the second end of the first resistor (R1), and the second end of the second resistor (R2) is grounded. The first end of the first capacitor (C1) is electrically connected between the second end of the first resistor (R1) and the control terminal of the time-delay discharge unit (200), and the second end of the first capacitor (C1) is grounded. The first capacitor (C1) is used to filter the drive current supplied by the first resistor (R1) to the time-delay discharge unit (200).

6. A button-triggered reset circuit according to claim 5, characterized in that, The delayed discharge unit (200) includes a transistor (Q3), a third resistor (R3), a second capacitor (C2), and a diode (D1). The control terminal of the transistor (Q3) is electrically connected to the first terminal of the first resistor (R1), the collector is electrically connected to the voltage source terminal (VCC), and the emitter is grounded. The first terminal of the third resistor (R3) is electrically connected to the voltage source terminal (VCC), and the second terminal of the third resistor (R3) is grounded. The first terminal of the second capacitor (C2) is electrically connected to the second terminal of the third resistor (R3), and the second terminal of the second capacitor (C2) is grounded. The anode of the diode (D1) is electrically connected to the voltage source terminal (VCC), and the cathode is electrically connected to the reset inverting module (300). When the collector and emitter of the transistor (Q3) are turned on, the transistor (Q3), the third resistor (R3), and the second capacitor (C2) form a discharge circuit. After the discharge is completed, the gate voltage of the first transistor (Q1) is pulled low, and the first transistor (Q1) is turned off.

7. A button-triggered reset circuit according to claim 6, characterized in that, It also includes a fourth resistor (R4), which is electrically connected between the voltage source terminal (VCC) and the collector of the transistor.

8. A button-triggered reset circuit according to claim 3, characterized in that, It also includes a fifth resistor (R5), which is electrically connected between the voltage source terminal (VCC) and the drain of the first transistor (Q1).

9. A button-triggered reset circuit according to claim 1, characterized in that, It also includes a sixth resistor (R6) and a third capacitor. The first end of the sixth resistor (R6) is electrically connected to the voltage source terminal (VCC), the second end of the sixth resistor (R6) is electrically connected to the first end of the third capacitor, and the second end of the third capacitor is grounded.

10. A button-triggered reset device, characterized in that, It includes a button-triggered reset circuit as described in any one of claims 1-9; and a circuit board, wherein the button-triggered reset circuit is etched onto the circuit board.

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