A frequency modulation receiver

Abstract

The utility model discloses a frequency modulation receiver, including first chip, main control chip and antenna, high frequency amplifier, frequency converter, crystal filter, second chip, audio power amplifier and loudspeaker that connect in proper order, first chip and second chip are BK4829 chip, PAOUT end of first chip is connected signal input end of frequency converter, is used to with high frequency signal of high frequency amplifier output cooperation in frequency converter to form an intermediate frequency signal, main control chip is connected with first chip, second chip and audio power amplifier two -way respectively. Therefore the utility model discloses under the condition of guaranteeing that cost is lower, still has good anti -interference ability, can be applicable to the scene of car radio, wireless intercom etc. to the higher performance requirement.

Description

Technical Field

[0001] This utility model relates to the field of communications, and more specifically to an FM receiver. Background Technology

[0002] A frequency modulation (FM) receiver is an electronic device used to receive frequency-modulated signals and is widely used in broadcasting, communication, and remote control.

[0003] Currently, FM receivers commonly use integrated circuit (IC) chips as the core components for intermediate frequency demodulation and audio processing. For example, the BK4829 IC chip is used, which features high integration, low power consumption, and low cost. Moreover, the BK4829 is a radio transmitter and receiver chip for simple transmission and reception functions, with complete receiving and transmitting capabilities. However, due to the generally poor performance of its internal receiver filter, the FM receiver's receiving performance is poor, and its anti-interference capability is weak. Therefore, it is currently only suitable for low-cost consumer electronics, such as portable radios, card-insert speakers, and toys, where performance requirements are not high, and cannot be adapted to high-performance scenarios such as car radios.

[0004] In view of this, this application has conducted in-depth research on this basis, resulting in this case. Utility Model Content

[0005] The purpose of this invention is to provide an FM receiver with good reception performance and good anti-interference capability.

[0006] To achieve the above objectives, the solution of this utility model is:

[0007] A frequency modulation receiver includes a first chip, a main control chip, and an antenna, a high-frequency amplifier, a frequency converter, a crystal filter, a second chip, an audio power amplifier, and a speaker connected in sequence. The first chip and the second chip are both BK4829 chips. The first chip has a frequency register that outputs a local oscillator signal. The signal output terminal of the frequency register is electrically connected to the PAOUT terminal of the first chip. The PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter to cooperate with the high-frequency signal output by the high-frequency amplifier in the frequency converter to form an intermediate frequency signal. The main control chip is bidirectionally connected to the first chip, the second chip, and the audio power amplifier.

[0008] The first chip is equipped with peripheral circuitry, and the PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter through the peripheral circuitry.

[0009] The peripheral circuit includes transistor Q4 and several resistors, capacitors, and inductors. The PAOUT terminal of the first chip is connected to the first terminal of capacitor C69 through resistor R149. The second terminal of capacitor C69 branches into three paths: the first path is connected to the first terminal of capacitor C61 through capacitor C45; the second path is connected to the first terminal of capacitor C61 through inductor L21; and the third path is grounded through capacitor C83. The first terminal of capacitor C61 is also grounded through capacitor C82. The second terminal of capacitor C61 is connected to the first terminal of capacitor C240 ​​through resistor R17. The second terminal of capacitor C240 ​​branches into three paths: the first path is connected to the first terminal of resistor R14; the second path is grounded through resistor R18; and the third path is connected to the base of transistor Q4. The second terminal of resistor R14 branches into three paths: the first path is connected to... The first path is grounded via capacitor C26, the second path is connected to the first end of resistor R11, and the third path is grounded via capacitor C25. The collector of transistor Q4 is connected to the first end of resistor R11 via inductor L11, and the emitter of transistor Q4 is grounded. The second end of resistor R11 is connected to the second end of inductor L11, the collector of transistor Q4, and the first end of capacitor C35. The second end of capacitor C35 is connected to the first ends of capacitors C244 and C34 via resistor R13. The second end of capacitor C244 is grounded. The second end of capacitor C34 branches into two paths: one path is grounded via inductor L13, and the other path is connected to the first end of capacitor C29. The second end of capacitor C29 is the FR end, which is connected to the RX-VCO end of the frequency converter.

[0010] The signal output terminal of the frequency converter is electrically connected to the signal input terminal of the crystal filter, so that the intermediate frequency signal output by the frequency converter is filtered by the crystal filter.

[0011] The signal input terminal of the second chip is electrically connected to the signal output terminal of the crystal filter to receive the intermediate frequency signal filtered by the crystal filter and perform FM demodulation and audio processing.

[0012] The audio power amplifier has an SP-EN lead at its signal input terminal, and the PD3 terminal of the main control chip is connected to the SP-EN lead.

[0013] The main control chip's PD10, PA8, and PC6 are respectively connected to the SCK, SCN, and SDATA terminals of the first chip, and the main control chip's PB13 and PB14 are respectively connected to the GPIO0 and GPIO1 terminals of the second chip.

[0014] The main control chip's PD1, PA9, and PA10 are respectively connected to the SCK, SCN, and SDATA terminals of the second chip, and the main control chip's PB13 and PB14 are respectively connected to the GPIO0 and GPIO1 terminals of the second chip.

[0015] With the above structure, this invention has the following beneficial effects: By using two BK4829 chips in cooperation, after the antenna receives the FM signal, the FM signal is amplified by a high-frequency amplifier and then transmitted to the inverter. Simultaneously, the BK4829 chip serves as the first chip, equivalent to a voltage-controlled oscillator (VCO). The first chip outputs a signal equivalent to a local oscillator signal. The inverter then receives the FM amplified signal and the local oscillator signal, synthesizes them to generate an intermediate frequency (IF) signal. This IF signal is filtered by a crystal filter, improving the selectivity of the received signal. The IF signal is then transmitted to the second chip for FM demodulation and audio processing. This invention combines the high integration, low power consumption, and low cost of the BK4829 chip with high selectivity. Because the cost of the two BK4829 chips is low, this invention also has good anti-interference capabilities while maintaining low cost, making it suitable for applications with high performance requirements, such as car radios and walkie-talkies. Attached Figure Description

[0016] Figure 1 This is a block diagram illustrating the principle of the frequency modulation receiver of this utility model.

[0017] Figure 2 This is a circuit diagram of the first chip in this utility model.

[0018] Figure 3 This is a circuit diagram showing the connection between the antenna, high-frequency amplifier, frequency converter, and crystal filter in this utility model.

[0019] Figure 4 This is a circuit diagram of the second chip in this utility model.

[0020] Figure 5 This is a circuit diagram of the audio power amplifier in this utility model.

[0021] Figure 6 This is a circuit diagram of the main control chip in this utility model. Detailed Implementation

[0022] To further explain the technical solution of this utility model, the following detailed description is provided through specific embodiments.

[0023] An FM receiver, optionally a superheterodyne FM receiver, such as... Figure 1-5As shown, the system includes a main control chip, an antenna, a high-frequency amplifier, a frequency converter, a crystal filter, an audio power amplifier, a speaker, and a first chip and a second chip. Both the first chip and the second chip are integrated chips of model BK4829, referred to as BK4829 chips in this embodiment. The BK4829 chip is a commercially available chip. The first chip is used to generate the local oscillator (LO) signal, which is equivalent to a conventional voltage-controlled oscillator (VCO), and can output the local oscillator signal of a conventional superheterodyne receiver. The second chip is used for intermediate frequency modulation and demodulation of the audio signal and audio processing. That is, the second chip is equivalent to the intermediate frequency modem and audio processing functions used in this invention, such as CTCSS decoding and audio frequency response adjustment, which are all completed within the second chip.

[0024] To elaborate, the circuit connections of the aforementioned units are as follows: the antenna is sequentially connected to the high-frequency amplifier, inverter, crystal filter, second chip, audio power amplifier, and speaker. Specifically, the antenna's signal terminal is electrically connected to the signal input terminal of the high-frequency amplifier to amplify the received high-frequency signal. The high-frequency amplifier's signal output terminal is electrically connected to the signal input terminal of the inverter to transmit the amplified high-frequency signal to the inverter. The inverter's signal output terminal is electrically connected to the signal input terminal of the crystal filter. The crystal filter's signal output terminal is electrically connected to the signal input terminal of the second chip. The second chip's signal output terminal is electrically connected to the signal input terminal of the audio power amplifier; that is, the second chip's signal output terminal outputs the demodulated audio signal, which is then input to the audio power amplifier's signal input terminal. The signal output terminal of the audio power amplifier is electrically connected to the output terminal of the speaker. The first chip contains a frequency register for outputting the local oscillator (LO) signal. The signal output terminal of this frequency register is electrically connected to the PAOUT (power amplifier) ​​terminal of the first chip. The PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter to transmit the local oscillator (LO) signal processed by the first chip to the frequency converter. By changing the output frequency of the first chip, the receiving frequency of the entire receiver can be changed. The main control chip is bidirectionally connected to the first chip, the second chip, and the audio power amplifier, respectively, for setting the required functions of the first and second chips and reading the operating status of each chip. The main control chip is connected to the audio power amplifier to control its operating status.

[0025] In this embodiment, the main control chip is connected to the first chip and the second chip via serial ports to control their operating states. It is also connected to the control terminal of the audio power amplifier to control its operating state.

[0026] Specifically, the first chip is equipped with peripheral circuitry for high-frequency filtering and matching. The PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter through the peripheral circuitry, such as... Figure 2 As shown, the peripheral circuit specifically comprises: a transistor Q4 and several resistors, capacitors, and inductors. The PAOUT terminal of the first chip is connected to the first terminal of capacitor C69 via resistor R149. The second terminal of capacitor C69 branches into three paths: the first path connects to the first terminal of capacitor C61 via capacitor C45; the second path connects to the first terminal of capacitor C61 via inductor L21; and the third path is grounded via capacitor C83. The first terminal of capacitor C61 is also grounded via capacitor C82. The second terminal of capacitor C61 is connected to the first terminal of capacitor C240 ​​via resistor R17. The second terminal of capacitor C240 ​​branches into three paths: the first path connects to the first terminal of resistor R14; the second path is grounded via resistor R18; and the third path connects to the base of transistor Q4. The second terminal of resistor R14 branches into three paths: the first path is grounded via capacitor C26. The second path connects to the first terminal of resistor R11, and the third path is grounded through capacitor C25. The collector of transistor Q4 is connected to the first terminal of resistor R11 through inductor L11, and the emitter of transistor Q4 is grounded. The second terminal of resistor R11 is connected to the second terminal of inductor L11, the collector of transistor Q4, and the first terminal of capacitor C35. The second terminal of capacitor C35 is connected to the first terminals of capacitors C244 and C34 through resistor R13. The second terminal of capacitor C244 is grounded. The second terminal of capacitor C34 branches into two paths: one is grounded through inductor L13, and the other is connected to the first terminal of capacitor C29. The second terminal of capacitor C29 is the FR terminal, which is connected to the RX-VCO terminal of the frequency converter. Transistor Q4 is an NPN transistor. Furthermore, the VRAMP terminal of the first chip is grounded through capacitor C76. In this way, the local oscillator (L0) signal output from the frequency register of the first chip is sequentially output to the frequency converter through the PAOUT terminal of the first chip and the peripheral circuit.

[0027] It should be noted that in this embodiment, all ports of the first chip and the second chip are ports that are already present in the BK4829 chip itself, and no modifications have been made to them in this embodiment.

[0028] Furthermore, the signal output terminal of the aforementioned frequency converter is electrically connected to the signal input terminal of the crystal filter. Here, the frequency converter receives the high-frequency signal amplified by the high-frequency amplifier and the local oscillator signal generated by the first chip. The frequency converter then generates a differential intermediate frequency (IF) signal. The crystal filter is used to filter the IF signal output by the frequency converter, removing unwanted signals. The crystal filter can be a commercially available crystal filter. In this embodiment, the circuit connections of the crystal filter and the frequency converter, as well as the connections between them, are as follows: Figure 3 As shown.

[0029] Furthermore, the signal input terminal of the second chip is electrically connected to the signal output terminal of the crystal filter, that is, the LNAIN terminal (RF signal input terminal) of the second chip is electrically connected to the signal output terminal of the crystal filter. The second chip is used to receive the intermediate frequency signal after filtering by the crystal filter and perform FM demodulation and audio processing; wherein, the circuit connection between the second chip and the crystal filter is as follows: Figure 3-4 As shown.

[0030] Furthermore, the signal output terminal of the second chip outputs the demodulated audio signal, which is electrically connected to the signal input terminal of the audio power amplifier. Specifically, the EAR0 terminal (audio output terminal) of the second chip is electrically connected to the IN terminal (audio input terminal) of the audio power amplifier. This audio power amplifier is used to transmit the audio signal after FM demodulation and audio processing to the audio power amplifier for amplification. The aforementioned audio power amplifier is a commercially available audio power amplifier. In this embodiment, the circuit connection between the audio amplifier and the second chip is as follows: Figure 4-5 As shown.

[0031] Furthermore, the signal output terminal (OUT terminal) of the aforementioned audio power amplifier is electrically connected to the signal input terminal of the aforementioned speaker, in order to transmit the audio signal processed by the audio power amplifier to the speaker for output.

[0032] To elaborate further, such as Figure 2-6 As shown, the circuit connections between the main control chip and the first chip, the second chip, and the audio power amplifier are as follows: The PD10, PA8, and PC6 terminals of the main control chip are respectively connected to the SCK, SCN, and SDATA terminals of the first chip, used to control the frequency output of the first chip via the serial port of the main control chip. Here, SCK, SCN, and SDATA terminals are all serial port control ports of the first chip, and PD10, PA8, and PC6 terminals are all I / O control terminals of the main control chip, used to generate serial port control signals and control the first chip. Furthermore, the PD1, PA9, and PA10 terminals of the main control chip are respectively connected to the SCK, SCN, and SDATA terminals of the second chip, and the PB13 and PB14 terminals of the main control chip are respectively connected to the GPIO0 and GPIO1 terminals of the second chip, used to control various operating states of the second chip via the serial port. In this embodiment, each port of the main control chip, and each port of the first and second chips, have conventional ports to allow the main control chip to control the functions, signals, and data transmission of the first chip, the second chip, and the audio power amplifier.

[0033] In this embodiment, the signal input terminal of the audio power amplifier has an SP-EN (amplifier enable control signal) lead, and the PD3 terminal (multi-function terminal) of the main control chip is connected to the SP-EN lead so that the main control chip can control the audio amplifier to turn on and off.

[0034] This invention relates to an FM receiver. Both the first and second chips are BK4829 chips. While the BK4829 chip is a simple radio transmitter and receiver with complete transmission and reception capabilities and low cost, its internal receiving filtering is relatively poor. Therefore, it is not suitable for high-performance applications. This invention uses two BK4829 chips. The first chip is used as a VCO, generating an intermediate frequency (IF) signal. Specifically, the local oscillator signal output from the first chip and the signal output from the high-frequency amplifier are output together to the inverter, causing the inverter to generate a differential IF signal. This IF signal is filtered by a crystal filter to improve anti-interference capability and selectivity. The filtered signal is then transmitted to the second chip for FM demodulation and audio processing, amplified by an audio power amplifier, and played through a speaker. Compared to existing technologies, this invention possesses the functionality of the BK4829 chip, high selectivity, and good anti-interference capability.

[0035] The above description is only a preferred embodiment of this invention. All equivalent changes and modifications made within the scope of the claims of this utility model shall fall within the scope of the claims of this utility model.

Claims

1. A frequency modulation receiver characterized by: The system includes a first chip, a main control chip, and sequentially connected components such as an antenna, a high-frequency amplifier, a frequency converter, a crystal filter, a second chip, an audio power amplifier, and a speaker. Both the first chip and the second chip are BK4829 chips. The first chip has a frequency register that outputs a local oscillator signal. The signal output terminal of the frequency register is electrically connected to the PAOUT terminal of the first chip. The PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter to cooperate with the high-frequency signal output by the high-frequency amplifier in the frequency converter to form an intermediate frequency signal. The main control chip is bidirectionally connected to the first chip, the second chip, and the audio power amplifier.

2. A frequency modulation receiver as claimed in claim 1, characterized in that: The first chip It is equipped with peripheral circuitry, and the PAOUT terminal of the first chip is connected to the signal input terminal of the frequency converter through the peripheral circuitry. The peripheral circuit includes transistor Q4 and several resistors, capacitors, and inductors. The PAOUT terminal of the first chip is connected to the first terminal of capacitor C69 through resistor R149. The second terminal of capacitor C69 branches into three paths: the first path is connected to the first terminal of capacitor C61 through capacitor C45; the second path is connected to the first terminal of capacitor C61 through inductor L21; and the third path is grounded through capacitor C83. The first terminal of capacitor C61 is also grounded through capacitor C82. The second terminal of capacitor C61 is connected to the first terminal of capacitor C240 ​​through resistor R17. The second terminal of capacitor C240 ​​branches into three paths: the first path is connected to the first terminal of resistor R14; the second path is grounded through resistor R18; and the third path is connected to the base of transistor Q4. The second terminal of resistor R14 branches into three paths: the first path is connected to... The first path is grounded via capacitor C26, the second path is connected to the first end of resistor R11, and the third path is grounded via capacitor C25. The collector of transistor Q4 is connected to the first end of resistor R11 via inductor L11, and the emitter of transistor Q4 is grounded. The second end of resistor R11 is connected to the second end of inductor L11, the collector of transistor Q4, and the first end of capacitor C35. The second end of capacitor C35 is connected to the first ends of capacitors C244 and C34 via resistor R13. The second end of capacitor C244 is grounded. The second end of capacitor C34 branches into two paths: one path is grounded via inductor L13, and the other path is connected to the first end of capacitor C29. The second end of capacitor C29 is the FR end, which is connected to the RX-VCO end of the frequency converter.

3. A frequency modulation receiver as claimed in claim 2, characterized in that: The signal output terminal of the frequency converter is electrically connected to the signal input terminal of the crystal filter, so that the intermediate frequency signal output by the frequency converter is filtered by the crystal filter.

4. A frequency modulation receiver as claimed in claim 3, characterized in that: The signal input terminal of the second chip is electrically connected to the signal output terminal of the crystal filter to receive the intermediate frequency signal filtered by the crystal filter and perform FM demodulation and audio processing.

5. A frequency modulation receiver as claimed in any one of claims 1 to 4, characterized in that: The audio power amplifier has an SP-EN lead at its signal input terminal, and the PD3 terminal of the main control chip is connected to the SP-EN lead.

6. A frequency modulation receiver as claimed in any one of claims 1 to 4, characterized in that: The main control chip's PD10, PA8, and PC6 are respectively connected to the SCK, SCN, and SDATA terminals of the first chip, and the main control chip's PB13 and PB14 are respectively connected to the GPIO0 and GPIO1 terminals of the second chip.

7. A frequency modulation receiver as claimed in any one of claims 1 to 4, characterized in that: The main control chip's PD1, PA9, and PA10 are respectively connected to the SCK, SCN, and SDATA terminals of the second chip, and the main control chip's PB13 and PB14 are respectively connected to the GPIO0 and GPIO1 terminals of the second chip.

Images