A leadless connection metal package structure

Abstract

This application belongs to the field of power semiconductor device packaging technology and provides a leadless metal package structure, including: a metal shell with pins on both sides connected to a PCB board, and a first mounting position on the side of the metal shell facing the PCB board for mounting a chip; a first ceramic substrate disposed on the first mounting position and covering the chip, and the first ceramic substrate connected to the PCB board. This application directly connects the chip to the PCB board through the pins of the metal shell and the first ceramic substrate, eliminating the need for wire bonding. Compared with wire bonding, this reduces the impact of current confinement in the package structure, effectively reduces parasitic inductance, and the metal shell packaging improves hermetic electromagnetic interference resistance and enhances the applicability of the package structure in extreme environments.

Description

Technical Field

[0001] This application relates to the field of power semiconductor device packaging technology, and in particular to a leadless metal packaging structure. Background Technology

[0002] With the widespread application of power semiconductor devices in aerospace, military and other fields, semiconductor devices are usually required to achieve miniaturization, lightweight and high density to the greatest extent, while also meeting high reliability. Packaging is the process of assembling integrated circuits into the final chip product. Metal packaging is a common high-reliability packaging form in aerospace, military and other industries. Especially for active devices, metal packaging can prevent moisture and other contaminants from entering.

[0003] In related technologies, the packaging of traditional power semiconductor devices generally uses wire bonding to connect the chip to the metal frame. Wire bonding usually uses metal materials for bonding. Due to the limitations of the materials themselves, such as high resistivity and low yield strength, wire bonding will restrict the current of the device and increase parasitic inductance, which will have a certain impact on the performance of the device. Utility Model Content

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of this application is to provide a leadless metal packaging structure to solve the problems that the use of wire bonding in the packaging of power semiconductor devices in the prior art will limit the current of power semiconductor devices and increase parasitic inductance.

[0005] To achieve the above and other related objectives, this application provides a leadless metal package structure, comprising:

[0006] A metal casing with pins on both sides connected to a PCB board, and a first mounting position on the side of the metal casing facing the PCB board for mounting a chip.

[0007] A first ceramic substrate is disposed on the first mounting position and covers the chip. The first ceramic substrate is connected to the PCB board.

[0008] Optionally, the first mounting position is a recessed structure, the bottom of the first mounting position is a first mounting surface, and the first mounting surface is connected to the chip.

[0009] Optionally, the chip has a first surface and a second surface disposed opposite to each other, the first surface being connected to the first mounting surface, and the second surface having a source and a gate disposed thereon.

[0010] Optionally, the first surface and the first mounting surface are connected by welding.

[0011] Optionally, the first ceramic substrate has a third surface and a fourth surface disposed opposite to each other. A first protrusion is provided on both sides of the third surface. The first protrusion protrudes toward the first mounting surface and is connected to the first mounting surface. A second protrusion is provided on the first ceramic substrate at a position corresponding to the source and the gate. The second protrusion protrudes from both the third surface and the fourth surface. One end of the second protrusion is connected to the source and the gate, and the other end is connected to the PCB board.

[0012] Optionally, the area on the first mounting surface that connects to the first boss is a copper-clad area.

[0013] Optionally, the second protrusion is connected to the source and the gate by a connecting material.

[0014] Optionally, the side of the metal casing facing away from the chip is a heat dissipation surface, and a second ceramic substrate for providing insulation and heat dissipation is disposed on the heat dissipation surface.

[0015] Optionally, the pin is provided with bumps for connecting to the PCB board.

[0016] Optionally, the bump is a stamped structure.

[0017] In the leadless metal package structure provided in this application, the chip is directly connected to the PCB board through the pins of the metal shell and the first ceramic substrate. The package structure does not require wire bonding. Compared with the package structure using wire bonding, the impact of current limitation in the package structure is reduced, parasitic inductance is effectively reduced, and the metal shell package form improves the hermetic electromagnetic interference capability and enhances the applicability of the package structure in extreme environments. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of a leadless metal package structure according to an embodiment of this application;

[0019] Figure 2 This is a partial structural schematic diagram of a leadless metal package structure according to an embodiment of this application.

[0020] Part Number Explanation

[0021] 1-Metal casing; 2-First ceramic substrate; 3-Pin; 4-PCB board; 5-Chip; 6-Second ceramic substrate; 7-First boss; 8-Second boss; 9-Bump; 10-First mounting position; 11-First mounting surface; 12-First surface; 13-Second surface; 14-Third surface; 15-Fourth surface; 16-Source; 17-Gate. Detailed Implementation

[0022] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.

[0023] It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness or purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "front," "back," "left," "right," "middle," and "one" used in this specification are merely for clarity and not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application.

[0024] It should be noted that traditional power semiconductor device packaging generally uses wire bonding to connect the chip to the metal frame and then to the PCB board. Wire bonding typically uses fine metal wires, such as aluminum wire bonding, and utilizes heat, pressure, and ultrasonic energy to tightly weld the metal wires to the metal frame, achieving electrical interconnection between the chip and the metal frame and information exchange between chips. However, due to the limitations of the wire material itself, such as high resistivity and low yield strength, the wire bonding connection method restricts the current of the power semiconductor device and increases parasitic inductance, which has a certain impact on the device performance. Furthermore, existing packaging generally uses epoxy resin to encapsulate the device, resulting in relatively poor mechanical strength, hermeticity, and electromagnetic interference resistance after packaging. At the same time, this packaging method usually involves single-sided heat dissipation, while chip heat dissipation is generally bottom-mounted, which also limits the heat dissipation capacity of the power semiconductor device.

[0025] Please see Figure 1 and Figure 2 This application exemplarily provides a leadless metal package structure, comprising:

[0026] The metal casing 1 has pins 3 on both sides, which are connected to the PCB board 4. The side of the metal casing 1 facing the PCB board 4 has a first mounting position 10, which is used to assemble the chip 5.

[0027] The first ceramic substrate 2 is disposed on the first mounting position 10 and covers the chip 5. The first ceramic substrate 2 is connected to the PCB board 4.

[0028] In the leadless metal package structure provided in this application, the chip 5 is directly connected to the PCB board 4 through the pins 3 of the metal shell 1 and the first ceramic substrate 2. The package structure does not require wire bonding. Compared with the package structure using wire bonding, the impact of current limitation in the package structure is reduced, and parasitic inductance is effectively reduced. Moreover, the package form of the metal shell 1, compared with epoxy resin encapsulation, not only improves the mechanical strength and hermetic electromagnetic interference resistance of the package structure, but also enhances the applicability of the package structure in extreme environments.

[0029] In this embodiment, please refer to Figure 1 The first mounting position 10 is a recessed structure, and the bottom of the first mounting position 10 is the first mounting surface 11. The first mounting surface 11 is connected to the chip 5. The first mounting position 10 is formed by the recessed structure, providing space to accommodate the chip 5 and the first ceramic substrate 2.

[0030] In this embodiment, as Figure 2 As shown, the chip 5 has a first surface 12 and a second surface 13 arranged opposite to each other. The first surface 12 is connected to the first mounting surface 11. A drain is provided on the first surface 12, and a source 16 and a gate 17 are provided on the second surface 13.

[0031] Specifically, the first surface 12 and the first mounting surface 11 are connected by welding, and the chip 5 is connected to the metal casing 1 by dispensing welding.

[0032] In detail, the first ceramic substrate 2 has a third surface 14 and a fourth surface 15 arranged opposite to each other. The third surface 14 has a first protrusion 7 on both sides, which protrudes towards and connects to the first mounting surface 11. The first ceramic substrate 2 has a second protrusion 8 at the position corresponding to the source 16 and the gate 17. The second protrusion 8 protrudes from both the third surface 14 and the fourth surface 15. One end of the second protrusion 8 is connected to the source 16 and the gate 17, and the other end is connected to the PCB board 4. The first ceramic substrate 2 is connected to the metal shell 1 through the first protrusion 7, and the source 16 and the gate 17 of the chip 5 are connected to the PCB board 4 through the second protrusion 8. The drain of the chip 5 is connected to the PCB board 4 through the pin 3 on the metal shell 1. The chip 5 is connected to the PCB board 4 without the need for wire bonding, which reduces current limitation and effectively reduces parasitic inductance.

[0033] In some embodiments, the area on the first mounting surface 11 that is connected to the first boss 7 is a copper-plated area, and the first ceramic substrate 2 is connected to the metal casing 1 by copper plating soldering.

[0034] In this embodiment, the second protrusion 8 is connected to the source 16 and the gate 17 by a connecting material. The connecting material can be epoxy resin, nano silver paste, or other materials, and is not limited to this in this embodiment.

[0035] In the above embodiment, the side of the metal casing 1 facing away from the chip 5 is a heat dissipation surface. A second ceramic substrate 6 for providing insulation and heat dissipation is provided on the heat dissipation surface. Specifically, the second ceramic substrate 6 can be directly connected to the heat sink. A double-sided heat dissipation structure is formed by the first ceramic substrate 2 and the second ceramic substrate 6, which improves the heat dissipation capacity of the packaging structure, reduces the heat loss of the packaging structure during application, and improves the conversion efficiency of the power semiconductor device.

[0036] In this embodiment, a bump 9 is provided on the pin 3 for connecting with the PCB board 4. Specifically, the bump 9 is a stamped structure, and four bumps 9 are provided, distributed on the pin 3 on both sides. Stamping makes it easier to produce and apply. The connection between the pin 3 and the PCB board 4 is achieved through the bump 9.

[0037] In summary, in the leadless metal package structure provided in this application, the chip 5 is directly connected to the PCB board 4 through the pins 3 of the metal shell 1 and the first ceramic substrate 2. The package structure does not require wire bonding. Compared with the package structure using wire bonding, the impact of current limitation in the package structure is reduced, and parasitic inductance is effectively reduced. Moreover, the metal shell 1 package form, compared with epoxy resin encapsulation, not only improves the mechanical strength, hermeticity, and electromagnetic interference resistance of the package structure, but also enhances the applicability of the package structure in extreme environments. At the same time, the double-sided heat dissipation structure formed by the first ceramic substrate 2 and the second ceramic substrate 6 improves the heat dissipation capacity of the package structure, reduces the heat loss of the package structure during application, and improves the conversion efficiency of the power semiconductor device.

[0038] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A leadless metal package structure, characterized in that, include: A metal casing with pins on both sides connected to a PCB board, and a first mounting position on the side of the metal casing facing the PCB board for mounting a chip. A first ceramic substrate is disposed on the first mounting position and covers the chip. The first ceramic substrate is connected to the PCB board.

2. The leadless metal packaging structure according to claim 1, characterized in that: The first mounting position is a recessed structure, and the bottom of the first mounting position is a first mounting surface, which is connected to the chip.

3. The leadless metal packaging structure according to claim 2, characterized in that: The chip has a first surface and a second surface arranged opposite to each other. The first surface is connected to the first mounting surface, and the second surface is provided with a source and a gate.

4. The leadless metal packaging structure according to claim 3, characterized in that: The first surface and the first mounting surface are connected by welding.

5. The leadless metal packaging structure according to claim 3, characterized in that: The first ceramic substrate has a third surface and a fourth surface arranged opposite to each other. A first protrusion is provided on both sides of the third surface. The first protrusion protrudes toward the first mounting surface and is connected to the first mounting surface. A second protrusion is provided on the first ceramic substrate at a position corresponding to the source and the gate. The second protrusion protrudes from both the third surface and the fourth surface. One end of the second protrusion is connected to the source and the gate, and the other end is connected to the PCB board.

6. The leadless metal packaging structure according to claim 5, characterized in that: The area on the first mounting surface that connects to the first boss is a copper-clad area.

7. The leadless metal package structure according to claim 5, characterized in that: The second protrusion is connected to the source electrode and the gate electrode by a connecting material.

8. The leadless metal package structure according to claim 1, characterized in that: The side of the metal casing facing away from the chip is a heat dissipation surface, and a second ceramic substrate for providing insulation and heat dissipation is disposed on the heat dissipation surface.

9. The leadless metal package structure according to claim 1, characterized in that: The pins are provided with bumps for connecting to the PCB board.

10. The leadless metal package structure according to claim 9, characterized in that: The bump is a stamped structure.

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