Chip package structure and electronic device

Abstract

The utility model discloses an embodiment discloses a kind of chip packaging structure and electronic equipment, chip packaging structure includes substrate, first chip and packaging structure piece being set on the upper surface of substrate, the upper surface of first chip is equipped with heat-conducting filling layer, packaging structure piece includes the reinforcing ring and support structure connected as a whole, reinforcing ring is around and is set on the outside of first chip, support structure is fixed in the inside surface of reinforcing ring and extends towards first chip, the upper surface of support structure and the upper surface of heat-conducting filling layer are used to abut with radiator, on the basis of having control warping effect, reduce the risk that chip is cracked, while reinforcing ring and support structure integration as a whole, improve production efficiency and packaging reliability.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, and more specifically to a chip packaging structure and electronic device. Background Technology

[0002] In recent years, to meet the computing power demands of chips, the computing density and power consumption density of new-generation chips have continuously broken through previous specifications. Correspondingly, the challenges of chip heat dissipation have also increased rapidly. Currently, packaging solutions that expose the chip outside the package can reduce the heat dissipation path from the chip to the heat sink by reducing one layer of thermally conductive material, thereby enhancing the chip's heat dissipation effect. However, when the heat sink is assembled onto the chip, due to factors such as the processing capabilities of the heat sink guiding device and assembly fixture, and the precision of assembly operations, it is difficult to ensure that every heat sink on the production line can be pressed vertically onto the chip surface. Therefore, during assembly, the heat sink is usually slightly tilted; in addition, the heat sink is also prone to tilting when subjected to vibration or impact loads. The tilting of the heat sink can cause a certain edge or corner of the chip to contact the bottom of the heat sink first. The pressure of the heat sink is concentrated on one edge or corner, resulting in significantly higher pressure at the chip's corners than at other locations. This can cause the chip's corners to crush or crack, and in severe cases, lead to chip malfunction. Utility Model Content

[0003] In view of this, the present invention provides a chip packaging structure and electronic device that reduces the risk of chip cracking and improves production efficiency and packaging reliability.

[0004] In a first aspect, embodiments of the present invention provide a chip packaging structure, the chip packaging structure comprising: substrate; The first chip is disposed on the upper surface of the substrate; A thermally conductive filling layer is disposed on the upper surface of the first chip; A packaging structure is disposed on the upper surface of the substrate. The packaging structure includes a reinforcing ring and a support structure fixed to the inner side of the reinforcing ring. The reinforcing ring is disposed around the outer side of the first chip. The support structure extends toward the first chip. The upper surface of the support structure and the upper surface of the thermally conductive filling layer are used to abut against a heat sink.

[0005] Optionally, the support structure is a ring structure, which is arranged around the outside of the first chip.

[0006] Optionally, the support structure includes a plurality of spaced-apart support blocks, one side of each of the plurality of support blocks being connected to different positions on the inner side of the reinforcing ring, and the other side of each of the plurality of support blocks extending toward different corners of the first chip.

[0007] Optionally, the support block is square, L-shaped, or has square or rounded ends.

[0008] Optionally, the upper surface of the support structure is flush with the upper surface of the thermally conductive filling layer.

[0009] Optionally, the upper surface of the support structure is lower than the upper surface of the thermally conductive filling layer, and the distance from the upper surface of the support structure to the upper surface of the substrate satisfies the same condition as the distance from the upper surface of the thermally conductive filling layer to the upper surface of the substrate: Where x is the distance from the upper surface of the thermally conductive filling layer to the upper surface of the substrate, y is the distance from the upper surface of the support structure to the upper surface of the substrate, z is the distance between the bottom surface of the heat sink and the contact point between the upper surface of the thermally conductive filling layer and the upper surface of the support structure, and n is the target for controlling the tilt angle of the heat sink.

[0010] Optionally, the upper surface of the reinforcing ring is higher than, equal to, or lower than the upper surface of the supporting structure.

[0011] Optionally, the chip packaging structure further includes a buffer structure disposed on the upper surface of the support structure.

[0012] Optionally, the buffer structure includes multiple buffer pads, which are respectively disposed on the upper surface of the multiple support blocks.

[0013] Optionally, the lower surface of the reinforcing ring is fixed to the upper surface of the substrate by a fixing layer; The lower surface of the support structure is fixed to the upper surface of the substrate by a fixing layer, or the lower surface of the support structure is in direct contact with the upper surface of the substrate.

[0014] Optionally, the chip packaging structure further includes at least one second chip, the first chip and all the second chips are integrated in a first region on the upper surface of the substrate, the reinforcing ring is disposed around the outside of the first region, and the support structure extends to the edge of the first region.

[0015] Secondly, this utility model embodiment provides an electronic device, the electronic device comprising: Printed circuit boards; The chip packaging structure as described in the first aspect is electrically connected to the printed circuit board; A heat sink is press-fitted to the upper surface of the thermally conductive filling layer and the upper surface of the supporting structure, and the heat sink is fixedly connected to the printed circuit board.

[0016] This utility model provides a chip packaging structure and an electronic device. The chip packaging structure includes a substrate, a first chip disposed on the upper surface of the substrate, and a packaging structure component. The upper surface of the first chip is provided with a thermally conductive filling layer. The packaging structure component includes a reinforcing ring and a support structure connected as one piece. The reinforcing ring is disposed around the outer side of the first chip, and the support structure is fixed to the inner side of the reinforcing ring and extends toward the first chip. The upper surface of the support structure and the upper surface of the thermally conductive filling layer are used to abut against a heat sink. This reduces the risk of chip cracking while controlling warpage. At the same time, the integration of the reinforcing ring and the support structure as one piece improves production efficiency and packaging reliability. Attached Figure Description

[0017] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings, in which: Figure 1 This is a cross-sectional view of the chip packaging structure according to an embodiment of the present invention; Figure 2 This is a top view of a chip packaging structure without a thermally conductive filling layer according to an embodiment of the present invention; Figure 3 This is a top view of a chip packaging structure without a thermally conductive filling layer according to an embodiment of the present invention; Figure 4 This is a top view of a chip packaging structure without a thermally conductive filling layer according to an embodiment of the present invention; Figure 5 This is a top view of a chip packaging structure without a thermally conductive filling layer according to an embodiment of the present invention; Figure 6 This is a cross-sectional view of a chip packaging structure according to another embodiment of the present invention; Figure 7 This is a cross-sectional view of a chip packaging structure according to another embodiment of the present invention; Figure 8 This is a top view of a chip packaging structure without a thermally conductive filling layer according to another embodiment of the present invention; Figure 9 This is a cross-sectional view of the electronic device according to an embodiment of the present invention; Figure 10 yes Figure 9 Cross-sectional view of the radiator when it is tilted; Figure 11 This is a flowchart of the manufacturing method of the electronic device according to an embodiment of the present invention.

[0018] Figure label: 1-Substrate; 2-First chip; 3-Thermal conductive filling layer; 4-Packaging structure; 41-Reinforcing ring; 42-Support structure; 421-Support block; 5-Buffer structure; 51-Buffer pad; 6-Fixing layer; 7-Second chip; 8-Printed circuit board; 9-Heat sink; 10-Electrical connection structure; 11-Bottom filling layer; A-First region. Detailed Implementation

[0019] The present application is described below based on embodiments, but it is not limited to these embodiments. In the detailed description of the present application below, certain specific details are described in detail. Those skilled in the art can fully understand the present application without these details. To avoid obscuring the substance of the present application, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0020] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0021] Unless the context explicitly requires it, words such as "including" or "contains" throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".

[0022] In the description of this application, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0023] Figure 1 This is a cross-sectional view of the chip package structure. (Example:) Figure 1 As shown, the chip packaging structure includes a substrate 1, a first chip 2, a thermally conductive filling layer 3, and a packaging structure 4. The first chip 2 and the packaging structure 4 are disposed on the upper surface of the substrate 1. The thermally conductive filling layer 3 is disposed on the upper surface of the first chip 2 and is used to transfer heat from the first chip 2 to the heat sink 9 disposed thereon for heat dissipation. That is, the heat sink 9 is covered on the upper surface of the first chip 2 by the thermally conductive filling layer 3, which shortens the heat dissipation path between the first chip 2 and the heat sink 9, significantly improving the heat dissipation effect, especially for chips with high power consumption, the improvement in heat dissipation efficiency is even more obvious.

[0024] The packaging structure 4 is located on the outside of the first chip 2 and close to the edge of the substrate 1. The packaging structure 4 can suppress the warping of the chip packaging structure. It can also be used to support the heat sink 9 together with the thermally conductive filling layer 3. When the heat sink 9 tilts during the assembly process, the pressure of the heat sink 9 is basically applied to the packaging structure 4, thereby reducing the risk of damage to the edge or corner of the first chip 2.

[0025] In this embodiment, the first chip 2 and the substrate 1 are welded together by metal (the solder joints are omitted in the figure). Optionally, the chip packaging structure also includes an underfill layer 11, which is formed between the first chip 2 and the substrate 1 by filling and curing an underfill material. The underfill layer 11 is used to protect the solder joints between the first chip 2 and the substrate 1 and improve the reliability of the connection between the first chip 2 and the substrate 1. Considering characteristics such as thermal conductivity, flowability, curing characteristics, and thermal expansion coefficient matching, the underfill layer 11 can be formed by filling and curing an epoxy phenol material containing silicon dioxide particles, an epoxy amine material, or other insulating materials. In other embodiments, there may only be solder joints between the first chip 2 and the substrate 1 without an underfill layer 11.

[0026] The thermally conductive filling layer 3 is formed of a thermal interface material (TIM), which can be either a fixed-shape sheet or a non-fixed-shape soft material. The material can be one of gel, silicone grease, graphite, or solid / liquid metal.

[0027] like Figures 2-5 As shown, the packaging structure 4 includes a reinforcing ring 41 and a support structure 42. The reinforcing ring 41 is disposed on the upper surface of the substrate 1 along the edge of the substrate 1 to surround the outer side of the first chip 2. The support structure 42 is fixed to the inner side of the reinforcing ring 41 and extends toward the first chip 2. That is, the support structure 42 is integrally connected to the reinforcing ring 41 and fixed on the substrate 1, and the support structure 42 is located inside the annular hole of the reinforcing ring 41 to be close to the first chip 2. The upper surface of the support structure 42 and the upper surface of the thermally conductive filling layer 3 are used to abut against the heat sink 9. That is, the heat sink 9 covers and presses onto the upper surface of the support structure 42 and the upper surface of the thermally conductive filling layer 3. When the heat sink 9 tilts during assembly, most of the pressure of the heat sink 9 will be applied to the support structure 42, thereby reducing the pressure on the edge or corner of the first chip 2, reducing the risk of the edge or corner of the first chip 2 being crushed or cracked, and improving the reliability of the packaging. In other words, the packaging structure 4 can protect the corners of the first chip 2, and at the same time, the packaging structure 4 can also suppress warping caused by thermal expansion coefficient mismatch.

[0028] Furthermore, since the support structure 42 and the reinforcing ring 41 are integrated, they are simultaneously fixed to the substrate 1 during the chip packaging structure formation process. When the support structure 42 and the reinforcing ring 41 are positioned and connected to the substrate 1, they only need to be clamped using a conventional ring-shaped component assembly machine, eliminating the need for additional clamps on the support structure 42, thus reducing costs and improving production efficiency. If the support structure 42 is clamped and placed separately on the substrate 1, it is more prone to skew during adhesive curing or welding, affecting the protection of the first chip 2. Therefore, in this embodiment, the support structure 42 and the reinforcing ring 41 are connected to the substrate 1 as a whole, which also improves the assembly effect, reduces the probability of skew caused by the support structure 42 being installed alone, and thus improves the protection of the corners of the first chip 2.

[0029] The reinforcing ring 41 can be made of metal (such as copper, aluminum, stainless steel, etc.), composite materials (such as Cu-Mo (copper-molybdenum), Cu-W (copper-tungsten) alloys), ceramic materials, etc., possessing high rigidity to improve anti-warping performance. The support structure 42 can be made of metal (such as copper, aluminum, stainless steel, etc.), or materials such as silicon, glass, ceramics, resin, etc. In this embodiment, the materials of the support structure 42 and the reinforcing ring 41 can be the same or different. When the materials of the support structure 42 and the reinforcing ring 41 are the same, they can be integrally formed. When the stepped structure is difficult to process or costly, it can also be first processed into two thin ring structures with constant thicknesses, and then fixed together by bonding, sintering, etc. When the materials of the support structure 42 and the reinforcing ring 41 are different, they can be fixed together by bonding, sintering, etc.

[0030] In one embodiment, the upper surface of the support structure 42 is flush with the upper surface of the thermally conductive filling layer 3. Therefore, regardless of how much the upper surface of the support structure 42 is higher than the upper surface of the first chip 2, it is sufficient to provide a sufficiently thick thermally conductive filling layer 3 on the upper surface of the first chip 2 so that its surface is flush with the upper surface of the support structure 42. When the heat sink 9 is pressed vertically downwards, it can simultaneously press on the upper surface of the support structure 42 and the upper surface of the thermally conductive filling layer 3. At this time, the entire upper surface of the first chip 2 is uniformly pressed, and the pressure at the corners of the first chip 2 will not be significantly higher than other positions, so the probability of being crushed or cracked is small. It should be noted that the bottom surface of the heat sink 9 is in direct contact with the upper surface of the support structure 42. It should be further noted that the thermally conductive filling layer 3 is preferably the adhesive layer thickness under normal working conditions. Under the premise of ensuring a flat surface and good contact, the thinner the thermally conductive filling layer 3, the lower the thermal resistance, and the higher the efficiency of heat transfer from the first chip 2 to the heat sink 9.

[0031] In another embodiment, the upper surface of the support structure 42 is lower than the upper surface of the thermally conductive filling layer 3. When the tilt angle of the heat sink 9 is relatively small, due to the slight local deformation of the heat sink 9 and the buffering effect of the thermally conductive filling layer 3, the pressure at the corners of the first chip 2, although slightly higher than other locations, is still insufficient to cause damage. However, when the tilt angle of the heat sink 9 reaches a certain value, the slight local deformation of the heat sink 9 and the buffering effect of the thermally conductive filling layer 3 become negligible, and the pressure at the corners of the first chip 2 increases significantly, increasing the risk of crushing or cracking. Therefore, when the upper surface of the support structure 42 is lower than the upper surface of the thermally conductive filling layer 3, the tilt angle of the heat sink 9 needs to be controlled to be less than a certain value to achieve the protective effect on the corners of the first chip 2. Figure 10 As shown, the tilt angle of the heat sink 9 can be determined by the difference xy between the upper surface of the thermally conductive filling layer 3 and the upper surface of the support structure 42, and the distance z between the contact points of the heat sink 9 and the upper surfaces of the thermally conductive filling layer 3 and the support structure 42. Therefore, during the design process, it is necessary to first determine the control target of the tilt angle of the heat sink 9 through methods such as experiments, that is, the specific predetermined value that the tilt angle of the heat sink 9 should be less than, for example, less than 0.5 degrees. Then, based on the relative positions of the first chip 2 and the package structure 4, the distance x from the upper surface of the thermally conductive filling layer 3 to the upper surface of the substrate 1 and the distance y from the upper surface of the support structure 42 to the upper surface of the substrate 1 are designed in a coordinated manner, so that the tilt angle of the heat sink 9 is less than the predetermined value.

[0032] In other words, the distance y from the upper surface of the support structure 42 to the upper surface of the substrate 1 and the distance x from the upper surface of the thermally conductive filling layer 3 to the upper surface of the substrate 1 need to satisfy the following formula: Where x is the distance from the upper surface of the thermally conductive filling layer 3 to the upper surface of the substrate 1, y is the distance from the upper surface of the support structure 42 to the upper surface of the substrate 1, z is the distance between the bottom surface of the heat sink 9 and the contact point between the upper surface of the thermally conductive filling layer 3 and the upper surface of the support structure 42, and n is the target value for controlling the tilt angle of the heat sink 9. The specific value of n can be determined by experimentation or computer modeling analysis based on different actual chip packaging structures. Different chip packaging structures have different values ​​of n, that is, different degrees of tilting are permissible.

[0033] When the upper surface of the support structure 42 is lower than the upper surface of the thermally conductive filling layer 3, it ensures that the downward pressure of the heat sink 9 is entirely applied to the thermally conductive filling layer 3, making it easier to ensure that the thermally conductive filling layer 3 is properly pressed together, thereby guaranteeing the heat dissipation effect. Simultaneously, since the upper surface of the support structure 42 being lower than the upper surface of the thermally conductive filling layer 3 satisfies the aforementioned target for controlling the tilt angle of the heat sink 9, it also provides protection for the corners of the first chip 2. That is, the degree to which the upper surface of the support structure 42 is lower than the upper surface of the thermally conductive filling layer 3 (specific data) must satisfy the above formula, achieving a balance between protecting the corners of the first chip 2 and ensuring proper pressing of the thermally conductive filling layer 3, thus satisfying both heat dissipation and protecting the corners of the first chip 2. Furthermore, during the coordinated design process, the height of the support structure 42 also needs to be designed more precisely, taking into account manufacturing tolerances, warpage deformation, and the characteristics of the thermally conductive filling layer 3.

[0034] Since the stiffness of the reinforcing ring 41 increases significantly with height, and the greater the stiffness, the stronger the control effect on warpage, the height (i.e., thickness) of the reinforcing ring 41 needs to be set according to the warpage control target of the chip package structure. Therefore, the upper surface of the reinforcing ring 41 is higher than, equal to, or lower than the upper surface of the support structure 42 (or support block 421) under different conditions. This application embodiment only applies to… Figure 1 The reinforcing ring 41 is shown to form a stepped structure above the supporting structure 42.

[0035] In one embodiment, such as Figure 1 As shown, the lower surface of the reinforcing ring 41 and the lower surface of the support structure 42 are both fixed to the upper surface of the substrate 1 by the fixing layer 6. This type of encapsulation structure 4 is easy to process and simple to install.

[0036] In another embodiment, the lower surface of the reinforcing ring 41 is higher than the lower surface of the supporting structure 42 (i.e., a stepped structure). The lower surface of the reinforcing ring 41 is fixed to the upper surface of the substrate 1 by the fixing layer 6, and the lower surface of the supporting structure 42 is in direct contact with the upper surface of the substrate 1. Figure 6 As shown. The advantage of this method of connecting the packaging structure 4 to the substrate 1 is that the height of the support structure 42 does not include the thickness of the fixing layer 6. In other words, after the actual packaging process of the packaging structure 4, the unevenness of the thickness of the fixing layer 6 will not affect the final height of the support structure 42. This will make the height of the support structure 42 closer to the design value, which is conducive to ensuring that the support structure 42 achieves the expected protection effect on the corners of the first chip 2.

[0037] The fixing layer 6 refers to the intermediate layer located between the encapsulation structure 4 and the substrate 1, used to achieve a stable connection between the two. This fixing layer 6 can be formed through various processes, including but not limited to: an adhesive layer formed by bonding with adhesives such as epoxy resin, acrylic adhesive, and silicone; or a welded layer formed by reflow soldering, laser welding, resistance welding, brazing, and ultrasonic welding. In specific implementations, a suitable connection method can be selected based on the material type (e.g., metal, plastic, composite material), working environment (temperature, humidity, load), and process requirements.

[0038] In one embodiment, the support structure 42 is a ring structure, and the support structure 42 is disposed around the outside of the first chip 2, such as... Figure 2 As shown. The annular support structure 42 can provide 360-degree protection for the first chip 2, making it easy to ensure that the height of different positions on the upper surface of the support structure 42 is consistent, thus improving the protection effect. At the same time, the annular support structure 42 can improve the overall rigidity of the package structure 4, further improving the ability to suppress structural warping and reducing the impact of warping on the height difference between the support structure 42 and the thermally conductive filling layer 3, so as to ensure the protection effect of the support structure 42 on the corners of the first chip 2. Preferably, the outer surface shape of the reinforcing ring 41 is adapted to the edge shape of the substrate 1, which can suppress structural warping to the greatest extent; the outer surface shape of the support structure 42 is adapted to the inner surface shape of the reinforcing ring 41 to achieve a seamless connection and improve the overall strength of the structure; the annular inner surface of the support structure 42 is the same as the shape of the first chip 2 to protect the edges and corners of the first chip 2. For example, when the substrate 1 is square and the first chip 2 is square, both the reinforcing ring 41 and the support structure 42 are set as square annular structures, such as Figure 2 As shown.

[0039] In other embodiments, the support structure 42 includes a plurality of spaced-apart support blocks 421. One side of each support block 421 is connected to a different position on the inner side of the reinforcing ring 41, and the other side of each support block 421 extends toward different corners (i.e., edges) of the first chip 2 to be close to the corners of the first chip 2, such as... Figures 3-5As shown, multiple support blocks 421 can respectively protect different corners of the first chip 2. The support blocks 421 occupy a small space on the substrate 1, thus supporting the placement of more electronic devices on the substrate 1 and ensuring the electrical performance of the first chip 2. Simultaneously, the small structure of the support blocks 421 can alleviate stress on the solder joints between the bottom filler layer 11 and the first chip 2, reducing the probability of damage and failure of the bottom filler layer 11 and solder joints. The shape and number of support blocks 421 are not limited; multiple support blocks 421 can have the same or different shapes. Support blocks 421 can start at any position on the inner side of the reinforcing ring 41 and terminate near a corner of the first chip 2, ensuring protection for each corner of the first chip 2. It should be noted that the support blocks 421 need to avoid the positions of electronic devices on the substrate 1 (such as capacitors; the placement of capacitors depends on electrical requirements and may have asymmetrical or irregular distributions) to comprehensively consider both electrical performance and chip protection.

[0040] Figure 3 This illustrates one arrangement of multiple support blocks 421. For example... Figure 3 As shown, the first chip 2 has a square structure and four sides. The position near the connection between two adjacent sides is considered the corner of the first chip 2. The reinforcing ring 41 has a square ring structure, and the four support blocks 421 are all square or rectangular in shape, extending from the four inner corners of the reinforcing ring 41 to the four corners near the first chip 2, which can effectively prevent the corners of the first chip 2 from being crushed.

[0041] Figure 4 Another arrangement of multiple support blocks 421 is shown. For example... Figure 4 As shown, the first chip 2 has a square structure and four sides. The position near the connection between two adjacent sides is considered the corner of the first chip 2. The reinforcing ring 41 has a square ring structure, and the four support blocks 421 are all L-shaped, extending from the four inner corners of the reinforcing ring 41 to the four corners near the first chip 2, which can effectively prevent the corners of the first chip 2 from being crushed. The two sides of the L-shaped support blocks 421 extend to the two sides corresponding to the corners, increasing the contact area of ​​the heat sink 9 and effectively preventing the corners of the first chip 2 from being crushed.

[0042] Figure 5 Another arrangement of multiple support blocks 421 is shown. For example... Figure 5As shown, the first chip 2 has a square structure and four sides. The position near the connection between two adjacent sides is considered the corner of the first chip 2. The reinforcing ring 41 has a square ring structure, and four support blocks 421 extend from different positions of the reinforcing ring 41, extending to the four corners of the first chip 2, which can effectively prevent the corners of the first chip 2 from being crushed. One support block 421 is rectangular, one support block 421 is a strip structure with arc-shaped ends, one support block 421 is a strip structure with square ends, and one support block 421 is trapezoidal. In other possible implementations, the support blocks 421 can also be circular, elliptical, or irregular in shape. The specific formation of the support blocks 421 is not specifically limited in this embodiment.

[0043] In another embodiment, the chip packaging structure further includes a buffer structure 5 disposed on the upper surface of the support structure 42, such as... Figure 7 As shown. The thickness and compression characteristics of the buffer structure 5 offer a wide range of choices. The appropriate buffer structure 5 can be selected based on the actual experience of heat sink assembly, vibration, and impact conditions, considering the protective effect of the support structure 42 on the corners of the first chip 2 and the pressing effect of the thermally conductive filling layer 3. For example, when the actual height of the support structure 42 is low, and the corners of the first chip 2 still experience breakage, a thicker or less compressible buffer structure 5 can be selected. When the actual height of the first chip 2 is high, and there is no breakage at the corners, but the thermally conductive filling layer 3 is too thick or the pressing effect is poor, a thinner or more compressible buffer structure 5 can be selected. Furthermore, when the chip packaging structure has significant warpage, and due to the high mold cost of the packaging structure 4 and limited ability to control structural height tolerance, the thickness and pressing effect of the thermally conductive filling layer 3 are crucial, adjustments can be made by setting buffer structures 5 with different thicknesses or compression characteristics. It should be noted that the various shapes of support structures 42 or support blocks 421 mentioned above can all be paired with the buffer structure 5.

[0044] Preferably, the shape of the buffer structure 5 is adapted to the shape of the support structure 42. When the support structure 42 is a ring structure, the buffer structure 5 is set to a matching ring structure. When the support structure 42 consists of multiple spaced support blocks 421, the buffer structure 5 may include multiple buffer pads 51, with one buffer pad 51 provided on each support block 421, and the shape of each buffer pad 51 is adapted to the shape of the corresponding connected support block 421.

[0045] In one embodiment, the buffer structure 5 and the thermally conductive filling layer 3 can be integrated. That is, the buffer structure 5 is disposed on the upper surface of the support structure 42, and the inner side of the buffer structure 5 extends toward the thermally conductive filling layer 3 and is integrated with it. The materials of the buffer structure 5 and the thermally conductive filling layer 3 can be the same or different. When the materials are different, the buffer structure 5 and the thermally conductive filling layer 3 can be integrated by adhesive bonding or a high-temperature curing process.

[0046] In an optional embodiment, the chip packaging structure further includes at least one second chip 7, with the first chip 2 and all the second chips 7 integrated within a first region A on the upper surface of the substrate 1. A reinforcing ring 41 is disposed around the outer side of the first region A, and a support structure 42 extends to the edge of the first region A. Figure 8 As shown, the support structure 42 can provide corner protection for all chips within the first region A.

[0047] It should be noted that the first chip 2 and the second chip 7 involved in the embodiments of this application are bare dies or multiple bare dies stacked together.

[0048] This application provides an electronic device. This electronic device may include a mobile phone, tablet computer, smart wearable products (e.g., smartwatches, smart bracelets), virtual reality (VR) devices, augmented reality (AR) devices, and may also be home appliances, etc. This application does not impose any special limitations on the specific form of the above-mentioned electronic device.

[0049] like Figure 9 As shown, the aforementioned electronic device may include a chip package structure and a printed circuit board (PCB) 8. The chip package structure is electrically connected to the PCB 8 via an electrical connection structure 10, thereby enabling the chip package structure to interconnect with other chips or modules on the PCB 8. The electrical connection structure 10 may be a ball grid array (BGA) or a land grid array (LGA) package. In an alternative embodiment, if the chip package structure is relatively large, to ensure the reliability of the electrical connection between the chip package structure and the PCB 8, the electrical connection structure 10 may also employ a connection terminal with a slot-type connection structure, which may also be referred to as a connector, plug, etc.

[0050] like Figure 9As shown, the electronic device also includes a heat sink 9, which covers the chip package structure and is fixedly connected to the printed circuit board 8. In this way, the heat dissipated from the chip package structure is promptly conducted to the heat sink 9 through the thermally conductive filling layer 3. The heat sink 9, with its large thermal conductivity area, dissipates the heat, cooling the first chip 2 and ensuring its normal operation. When the heat sink 9 covers the chip package structure, it can simultaneously press against the support structure 42 and the thermally conductive filling layer 3. At this time, the entire upper surface of the first chip 2 is uniformly pressurized, and the pressure at the corners of the first chip 2 is not significantly higher than at other locations, thus reducing the probability of it being crushed or cracked.

[0051] In an alternative implementation, the heat sink 9 is fixed relative to the printed circuit board 8 by fasteners (e.g., bolts, rivets). Figure 9 The heat sink 9 shown is a flat plate heat sink. It should be noted that the heat sink 9 can also exist in other structures, such as a finned heat sink 9 as an air-cooled heat sink or a liquid-cooled heat sink.

[0052] like Figure 10 As shown, when the radiator 9 is tilted under conditions such as assembly, impact, and vibration, the bottom of the radiator 9 will first come into contact with the support structure 42 due to the presence of the support structure 42. Next, depending on factors such as the tilt angle of the heat sink 9 and the stiffness of its bottom, two scenarios will occur: 1) If the tilt angle of the heat sink 9 is small or the bottom stiffness of the heat sink 9 is small, the bottom of the heat sink 9 will undergo a certain degree of bending deformation. The tilted bottom of the heat sink 9 will eventually press on both the thermally conductive filling layer 3 and the support structure 42. At this time, most of the pressure will be applied to the support structure 42, while the pressure on the corners of the first chip 2 will be relatively small. Therefore, the corners of the first chip 2 are less likely to be damaged. 2) If the tilt angle of the heat sink 9 is large or the bottom stiffness of the heat sink 9 is large, the bottom of the heat sink 9 will remain in a flat state, and the support structure 42 will play a limiting role. The heat sink 9 will not be able to continue to press down, and most of the pressure will be applied to the support structure 42. Thus, there will be virtually no pressure transmitted through the thermally conductive filling layer 3 to the corners of the first chip 2. Therefore, the corners of the first chip 2 are also less likely to be damaged.

[0053] The chip packaging structure of this application embodiment includes a substrate, a first chip disposed on the upper surface of the substrate, and a packaging structure. The upper surface of the first chip is provided with a thermally conductive filling layer. The packaging structure includes a reinforcing ring and a support structure integrally connected. The reinforcing ring surrounds the outer side of the first chip, and the support structure is fixed to the inner side of the reinforcing ring and extends towards the first chip. The upper surfaces of the support structure and the thermally conductive filling layer are used to abut against a heat sink. This reduces the risk of chip cracking while controlling warpage. Furthermore, the integration of the reinforcing ring and the support structure improves production efficiency and packaging reliability. Additionally, the integration of the reinforcing ring and the support structure, with the support structure positioned as close as possible to the chip corners, reduces the impact of warpage on the height difference between the support structure and the thermally conductive filling layer, ensuring the support structure effectively protects the chip corners. The heat sink of the electronic device abuts against the support structure and the thermally conductive filling layer of the chip packaging structure, improving heat dissipation efficiency and protecting the chip corners.

[0054] This application also provides a method for manufacturing an electronic device, used to prepare the electronic device forming the above-described embodiments. Figure 11 As shown, the preparation method includes the following steps: Step S10: Fix the first chip onto the substrate.

[0055] Select the specified size of the first chip 2 and substrate 1 according to requirements, and then fix the first chip 2 to the corresponding position on the substrate 1 by soldering. Optionally, an underfill material can be applied to the solder joints at the bottom of the first chip 2 and cured to form an underfill layer 11. The underfill layer 11 is used to protect the solder joints between the first chip 2 and the substrate 1, improving the reliability of the connection between the first chip 2 and the substrate 1. In other embodiments, there may only be solder joints between the first chip 2 and the substrate 1 without an underfill layer 11.

[0056] Step S20: Prepare the packaging structure.

[0057] To control warpage and protect the corners of the first chip, a packaging structure 4 is fabricated. The packaging structure 4 includes a reinforcing ring 41 and a supporting structure 42, with the supporting structure 42 fixed inside the reinforcing ring 41. The reinforcing ring 41 and the supporting structure 42 can be integrally formed or integrated through sintering, bonding, or other methods. The supporting structure 42 can be a ring structure or multiple spaced support blocks 421. The materials of the multiple support blocks 421 can be the same or different, and their materials can be the same or different from those of the reinforcing ring 41.

[0058] Step S30: Fix the packaging structure onto the substrate to form a chip packaging structure.

[0059] Since the packaging structure 4 is a single unit, when fixing it to the substrate 1, it is only necessary to use a conventional machine tool for assembling ring-shaped structures to clamp the reinforcing ring 41 and move the packaging structure 4 to the designated position on the substrate 1 for installation. No additional clamps are needed for the support structure 42 during installation, which reduces costs, improves production efficiency, and increases product yield.

[0060] In this design, after the encapsulation structure 4 is fixed to the substrate 1, the reinforcing ring 41 surrounds the outside of the first chip 2 and is located near the edge of the substrate 1, while the support structure 42 extends toward the first chip 2. Specifically, when the support structure 42 consists of multiple support blocks 421, the multiple support blocks 421 extend toward different corners of the first chip 2. Thus, the encapsulation structure 4 can control the warping of the substrate 1 while also protecting the corners of the first chip 2.

[0061] Step S40: Fix the chip package structure onto the printed circuit board.

[0062] The chip package structure can be electrically connected to the printed circuit board 8 via the electrical connection structure 10, thereby enabling the chip package structure to interconnect with other chips or modules on the printed circuit board 8. The electrical connection structure 10 can be a ball grid array (BGA) or a land grid array (LGA). In an alternative embodiment, if the chip package structure is relatively large, to ensure the reliability of the electrical connection between the chip package structure and the printed circuit board 8, the electrical connection structure 10 can also employ a connection terminal with a slot-type connection structure, which can also be called a connector, plug, etc.

[0063] Step S50: Form a thermally conductive fill layer on top of the first chip or arrange a thermally conductive fill layer at the bottom of the heat sink.

[0064] In terms of assembly sequence, the thermally conductive filling layer 3 can be disposed on the upper surface of the first chip 2, or it can be disposed on the bottom of the heat sink 9 first. The thermally conductive filling layer 3 can be formed by coating a thermal interface material (TIM).

[0065] Step S60: Press the heat sink onto the thermally conductive filling layer and the support structure, and fix it to the printed circuit board.

[0066] By pressing the heat sink 9 onto the thermally conductive filling layer 3 and the supporting structure 42, both good heat dissipation for the first chip 2 and protection of its corners can be achieved. The heat sink 9 and the printed circuit board 8 can be fixedly connected by bolts or other means. The height relationship between the upper surface of the thermally conductive filling layer 3 and the upper surface of the supporting structure 42 is known from the above embodiments and will not be repeated here.

[0067] like Figure 11 As shown, the preparation method further includes: Step S55: Place a buffer structure on top of the support structure.

[0068] In other embodiments, a buffer structure 5 can be placed on the upper surface of the support structure, and then the heat sink 9 is pressed on top of the buffer structure 5 and the thermally conductive filling layer 3. Since the thickness and compression characteristics of the buffer structure 5 are widely available, a suitable buffer structure 5 can be selected based on the actual experience of heat sink 9 assembly, vibration, and impact conditions, considering the protective effect of the support structure 42 on the corners of the first chip 2 and the pressing effect of the thermally conductive filling layer 3. For example, when the actual height of the support structure 42 is low, and the corners of the first chip 2 still experience breakage, a thicker or less compressible buffer structure 5 can be selected; when the actual height of the first chip 2 is high, and the corners of the first chip 2 do not break, but the thermally conductive filling layer 3 is too thick or the pressing effect is poor, a thinner or more compressible buffer structure 5 can be selected. Furthermore, when the chip packaging structure has significant warpage, and due to the high mold cost of the packaging structure 4, limited structural height tolerance control capability, and the criticality of the thickness and pressing effect of the thermally conductive filling layer 3, adjustments can be made by setting buffer structures 5 with different thicknesses or compression characteristics. It should be noted that the various shapes of support structures 42 or support blocks 421 mentioned above can all be paired with buffer structures 5.

[0069] Preferably, the shape of the buffer structure 5 is adapted to the shape of the support structure 42. When the support structure 42 is a ring structure, the buffer structure 5 is set to a matching ring structure. When the support structure 42 consists of multiple spaced support blocks 421, the buffer structure 5 may include multiple buffer pads 51, with one buffer pad 51 provided on each support block 421, and the shape of each buffer pad 51 is adapted to the shape of the corresponding connected support block 421.

[0070] The electronic device prepared by the above-described method in this application reduces the risk of chip cracking while controlling warpage. Furthermore, the integration of the reinforcing ring and support structure improves production efficiency and packaging reliability. The integration of the reinforcing ring and support structure, with the support structure positioned as close as possible to the chip corners, reduces the impact of warpage on the height difference between the support structure and the thermally conductive filling layer, ensuring effective protection of the chip corners. The heat sink of the electronic device abuts against the support structure and thermally conductive filling layer of the chip packaging structure, improving heat dissipation efficiency and protecting the chip corners.

[0071] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A chip packaging structure, characterized in that, The chip packaging structure includes: substrate(1); The first chip (2) is disposed on the upper surface of the substrate (1); A thermally conductive filling layer (3) is disposed on the upper surface of the first chip (2); The encapsulation structure (4) is disposed on the upper surface of the substrate (1). The encapsulation structure (4) includes a reinforcing ring (41) and a support structure (42) fixed on the inner side of the reinforcing ring (41). The reinforcing ring (41) is disposed around the outer side of the first chip (2). The support structure (42) extends toward the first chip (2). The upper surface of the support structure (42) and the upper surface of the thermally conductive filling layer (3) are used to abut against the heat sink (9).

2. The chip packaging structure according to claim 1, characterized in that, The support structure (42) is a ring structure, and the support structure (42) is arranged around the outside of the first chip (2).

3. The chip packaging structure according to claim 1, characterized in that, The support structure (42) includes a plurality of spaced support blocks (421), one side of each of the support blocks (421) is connected to a different position on the inner side of the reinforcing ring (41), and the other side of each of the support blocks (421) extends toward a different corner of the first chip (2).

4. The chip packaging structure according to claim 3, characterized in that, The support block (421) is square, L-shaped, or has square or rounded strips at its ends.

5. The chip packaging structure according to any one of claims 1-4, characterized in that, The upper surface of the support structure (42) is flush with the upper surface of the thermally conductive filling layer (3).

6. The chip packaging structure according to any one of claims 1-4, characterized in that, The upper surface of the support structure (42) is lower than the upper surface of the thermally conductive filling layer (3), and the distance from the upper surface of the support structure (42) to the upper surface of the substrate (1) satisfies the following condition: Where x is the distance from the upper surface of the thermally conductive filling layer (3) to the upper surface of the substrate (1), y is the distance from the upper surface of the support structure (42) to the upper surface of the substrate (1), z is the distance between the bottom surface of the heat sink (9) and the contact point between the upper surface of the thermally conductive filling layer (3) and the upper surface of the support structure (42), and n is the control target of the tilt angle of the heat sink (9).

7. The chip packaging structure according to any one of claims 1-4, characterized in that, The upper surface of the reinforcing ring (41) is higher than, equal to or lower than the upper surface of the supporting structure (42).

8. The chip packaging structure according to claim 3, characterized in that, The chip packaging structure also includes a buffer structure (5) disposed on the upper surface of the support structure (42).

9. The chip packaging structure according to claim 8, characterized in that, The buffer structure (5) includes multiple buffer pads (51), which are respectively disposed on the upper surface of multiple support blocks (421).

10. The chip packaging structure according to claim 1, characterized in that, The lower surface of the reinforcing ring (41) is fixed to the upper surface of the substrate (1) by the fixing layer (6); The lower surface of the support structure (42) is fixed to the upper surface of the substrate (1) by a fixing layer (6), or the lower surface of the support structure (42) is in direct contact with the upper surface of the substrate (1).

11. The chip packaging structure according to claim 1, characterized in that, The chip packaging structure further includes at least one second chip (7), the first chip (2) and all the second chips (7) are integrated in a first region (A) on the upper surface of the substrate (1), the reinforcing ring (41) is disposed around the outside of the first region (A), and the support structure (42) extends to the edge of the first region (A).

12. An electronic device, characterized in that, The electronic device includes: Printed circuit board (8); The chip packaging structure as described in any one of claims 1-11 is electrically connected to the printed circuit board (8); The heat sink (9) is press-fitted to the upper surface of the thermally conductive filling layer (3) and the upper surface of the support structure (42), and the heat sink (9) is fixedly connected to the printed circuit board (8).

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