A system-in-package chip, receiver, and receiver for global satellite navigation

Abstract

This invention provides a system-in-package (SIBP) chip, receiver, and receiver for global satellite navigation. The chip encapsulates at least an RF front-end module, a GNSS receiver module, a power supply module, a clock module, and a storage module. The RF front-end module includes a signal input port and a duplexer. The signal input port connects to an active antenna and transmits the RF signal received by the active antenna to the input of the duplexer. The two outputs of the duplexer are connected to two signal processing channels of the GNSS receiver module, respectively. The duplexer converts the received RF signal into signals in two frequency bands to achieve single-antenna dual-frequency positioning.

Description

Technical Field

[0001] This utility model relates to the field of satellite navigation, and in particular to a system-in-package chip, receiving device and receiver for global satellite navigation. Background Technology

[0002] GNSS receivers are used to achieve self-positioning and navigation by receiving radio frequency signals transmitted by satellites in the GNSS (Global Navigation Satellite System). Since many different types of electronic devices on the market now require positioning and navigation, GNSS receivers are widely used in various types of electronic devices.

[0003] With the development of electronic technology, various electronic devices have generated a demand for miniaturization, and correspondingly, GNSS receivers also need to be miniaturized. Furthermore, to ensure the positioning and navigation capabilities of GNSS receivers, they also need to support multiple signal frequency bands. Therefore, how to achieve miniaturization of GNSS receivers while supporting at least two frequency bands is a problem that urgently needs to be solved in the industry.

[0004] Traditional GNSS receiver solutions typically include an RF front-end module, a baseband chip, and a processor chip. The RF front-end module receives GNSS analog signals, which are then acquired, tracked, and demodulated by the baseband chip, converting them into digital signals that the processor chip can process. Finally, the processor chip performs positioning calculations. Since the RF signals of various global navigation satellite systems are distributed across numerous different frequency bands, traditional multi-band solutions require power dividers and multiple sets of surface acoustic wave (SAW) filters in the RF front-end module to achieve multi-band RF signal reception through bandpass filtering. However, this approach requires a large design area, severely limiting the development of smaller product sizes. Utility Model Content

[0005] Based on the above situation, the main purpose of this utility model is to provide a system-level packaged chip for global satellite navigation, which can realize dual-frequency positioning with a single antenna while integrating a radio frequency front-end module.

[0006] To achieve the above objectives, the technical solution adopted by this utility model is as follows:

[0007] The first aspect of this utility model provides a system-in-package (SIP) chip for global satellite navigation, used in single-antenna dual-frequency positioning scenarios. The chip encapsulates at least an RF front-end module, a GNSS receiver module, a power supply module, a clock module, and a storage module. The power supply module converts the input voltage into operating voltages for the clock module, GNSS receiver module, and storage module. The clock module provides reference clock signals to both the RF front-end module and the GNSS receiver module. The RF front-end module converts the received RF signals into baseband signals and inputs them to the GNSS receiver module. The GNSS receiver module reads / writes data to the storage module.

[0008] The RF front-end module includes a signal input port and a duplexer. The signal input port is used to connect to an active antenna and transmit the RF signal received by the active antenna to the input of the duplexer. The two outputs of the duplexer are respectively connected to the two signal processing channels of the GNSS receiver module. The duplexer converts the received RF signal into signals of two frequency bands.

[0009] Optionally, the system-in-package chip may also include: a substrate;

[0010] The power module, clock module, RF front-end module, and storage module are packaged on the first side of the substrate by a first package; the GNSS receiver module is packaged on the second side of the substrate by a second package.

[0011] A conductive line is provided between the first and second surfaces. The power module is connected to the clock module, storage module and GNSS receiver module through the conductive line respectively. The GNSS receiver module is connected to the storage module through the conductive line. The clock module is connected to the GNSS receiver module through the conductive line. The RF front-end module is connected to the GNSS receiver module through the conductive line.

[0012] Each external interface of the system-in-package chip is connected to multiple conductive parts located on the second side via conductive lines, and parts of the conductive parts are exposed outside the second package.

[0013] Optionally, the storage module is located in a first area of ​​the first surface, where the first area is the projection area of ​​the GNSS receiver module on the first surface in the vertical direction.

[0014] Optionally, the storage module includes: a dynamic random access memory unit and a non-volatile memory unit;

[0015] The non-volatile memory cell is located on the first side and is connected to the GNSS receiver module by wire bonding or conductive lines.

[0016] The dynamic random access memory (DRAM) unit is positioned above the non-volatile memory unit and is connected to the GNSS receiver module via wire bonding.

[0017] Optionally, the GNSS receiver module includes: a radio frequency signal processing module, a baseband signal processing module, and a central processing unit;

[0018] The radio frequency signal processing module is connected to the two outputs of the duplexer, the output of the radio frequency signal processing module is connected to the input of the baseband signal processing module, and the output of the baseband signal processing module is connected to the central processing unit.

[0019] Optionally, the external interface of the central processing unit includes at least one of the following:

[0020] CAN interface, Ethernet interface, UART interface, SPI, I2C interface and PPS / GPIO interface.

[0021] Optionally, the clock module includes: a crystal oscillator and internal clock logic;

[0022] The crystal oscillator is connected to the RF front-end module, including a temperature-compensated crystal oscillator (TCXO) or a temperature-controlled crystal oscillator (OCXO); the internal clock logic is connected to the GNSS receiver module, including a ring oscillator or a phase-locked loop (PLL) unit.

[0023] The second aspect of this utility model provides a system-in-package (SIP) chip for global satellite navigation, used in single-antenna dual-frequency positioning scenarios. The chip encapsulates at least a GNSS receiver module, a power module, a clock module, an RF front-end module, and a storage module. The power module converts the input voltage into operating voltages for the clock module, GNSS receiver module, and storage module. The clock module provides reference clock signals to the RF front-end module and GNSS receiver module. The RF front-end module converts received RF signals into baseband signals and inputs them to the GNSS receiver module. The GNSS receiver module reads / writes data to the storage module.

[0024] The RF front-end module has one signal input port and one duplexer. The duplexer has one RF input terminal and two RF output terminals. The GNSS receiver module has two signal processing channels. The signal input port is used to connect to the active antenna and transmit the RF signal received by the active antenna to the RF input terminal. The two RF output terminals are respectively connected to the two signal processing channels. The duplexer converts the received RF signal into signals of two frequency bands to achieve single-antenna dual-frequency positioning.

[0025] The receiving device provided in the third aspect of this utility model includes a system-in-package chip for global satellite navigation as described in the second or third aspect.

[0026] The receiver for the satellite navigation system provided in the fourth aspect of this utility model includes a single antenna and a receiving device in the third aspect. The single antenna is connected to the signal input port of the system-in-package chip for global satellite navigation in the receiving device. The single antenna is a multi-band active antenna.

[0027] In this invention, on the one hand, the RF front-end module, GNSS receiver module, power supply module, clock module, and storage module are all packaged within a single chip, reducing the layout of external components and facilitating miniaturization and thinner design of the product. On the other hand, the RF front-end module packaged within the chip includes a duplexer with one input and two outputs. The input receives the RF signal transmitted from the active antenna, and the duplexer filters the received RF signal to obtain signals located in two different frequency bands. These signals are then transmitted in parallel through the two outputs of the duplexer to the GNSS receiver module for processing, achieving dual-frequency positioning with a single antenna and improving the positioning accuracy of the receiver.

[0028] Other beneficial effects of this utility model will be explained in detail through the introduction of specific technical features and technical solutions in the specific embodiments. Those skilled in the art should be able to understand the beneficial technical effects brought about by the technical features and technical solutions through the introduction of these technical features and technical solutions. Attached Figure Description

[0029] The preferred embodiments of the present invention will now be described with reference to the accompanying drawings.

[0030] Figure 1 This diagram illustrates an architecture of a system-in-package chip in an embodiment of the present invention.

[0031] Figure 2 This diagram illustrates a packaging structure of a system-in-package chip in an embodiment of the present invention.

[0032] Figure 3 A partial schematic diagram of a conductive circuit according to an embodiment of the present invention is shown;

[0033] Figure 4 This diagram shows a structural schematic of the substrate in an embodiment of the present invention from a second-side view.

[0034] Figure 5 This diagram illustrates a specific architecture of a system-in-package chip in an embodiment of the present invention.

[0035] Reference numerals: 10, GNSS receiver module; 101, RF signal processing module; 102, baseband signal processing module; 103, central processing unit; 20, RF front-end module; 201, signal input port; 202, duplexer; 30, storage module; 301, dynamic random access memory unit; 302, non-volatile memory unit; 40, clock module; 401, crystal oscillator; 402, internal clock logic; 50, power supply module; 60, active antenna; 70, substrate; 701, first package; 702, second package; 703, conductive line; 7034, conductive via; 80, conductive part. Detailed Implementation

[0036] The present invention will now be described based on embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail, but well-known methods, processes, procedures, and elements are not described in detail in order to avoid obscuring the essence of the present invention.

[0037] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0038] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0039] In the description of this utility model, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this utility model, unless otherwise stated, "a plurality of" means two or more.

[0040] Functionally, a GNSS receiver mainly includes an antenna module, an RF front-end module, an RF signal processing module, and a central processing unit (CPU). The antenna module contains an active antenna for receiving RF signals transmitted by navigation satellites. The RF front-end module, connected to the antenna module, amplifies and filters the RF signals. The RF signal processing module, connected to the RF front-end module, down-converts the RF signals to generate low-IF or zero-IF analog signals, which are then output to subsequent modules for processing. The RF signal processing module may also include an ADC (Analog-to-Digital Converter) sampling module, which converts the generated low-IF or zero-IF analog signals into baseband digital sampled signals before outputting them to subsequent modules. The baseband signal processing module, connected to the RF signal processing module, performs signal acquisition, tracking, and message demodulation on the received signals. If the signal received from the RF signal processing module is an analog signal, the baseband signal processing module also needs to include an ADC sampling module to perform analog-to-digital conversion and sampling of the analog signal. The central processing unit (CPU) is connected to the baseband signal processing module. The CPU is the control core of the GNSS receiver, used to schedule and configure the radio frequency signal processing module, and also to perform positioning, speed measurement, and time synchronization based on the observations reported by the baseband signal processing module.

[0041] In practical applications, depending on different requirements, a baseband chip may consist of an RF signal processing module and a baseband signal processing module, or a GNSS receiver chip may consist of a baseband signal processing module and a central processing unit, while the antenna module and RF front-end module are generally located outside the chip. However, external RF front-end modules occupy a large design area, which is not conducive to product miniaturization. In view of this, this utility model proposes a system-in-package chip for global satellite navigation, which can achieve dual-frequency positioning with a single antenna while integrating an RF front-end module.

[0042] Figure 1 This diagram illustrates an architecture of a system-in-package (SiP) chip according to an embodiment of the present invention. Please refer to [link / reference]. Figure 1 This invention discloses a system-in-package (SIP) chip for global satellite navigation, which includes at least: a GNSS receiver module 10, an RF front-end module 20, a storage module 30, a clock module 40, and a power supply module 50. These modules can each be individual dies, or at least some of them can be individual dies while several other modules are integrated into a single die, facilitating the integration of existing functional modules to achieve the chip functionality of this invention.

[0043] The power supply module 50 converts the input voltage into operating voltages for the clock module 40, GNSS receiver module 10, and storage module 30. The clock module 40 provides reference clock signals to the RF front-end module 20 and GNSS receiver module 10, respectively. The RF front-end module 20 converts the received RF signal into a baseband signal and inputs it to the GNSS receiver module 10. The GNSS receiver module 10 reads / writes data to the storage module 30.

[0044] See Figure 5 The radio frequency front-end module 20 includes a signal input port 201 and a duplexer 202. The signal input port 201 is used to connect to the active antenna 60 and transmit the radio frequency signal received through the active antenna 60 to the input of the duplexer 202. The two outputs of the duplexer 202 are respectively connected to the two signal processing channels of the GNSS receiver module 10. The duplexer 202 converts the received radio frequency signal into signals of two frequency bands to achieve single-antenna dual-frequency positioning.

[0045] In this embodiment of the invention, on the one hand, the RF front-end module 20, GNSS receiver module 10, power supply module 50, clock module 40, and storage module 30 are all packaged within the same chip, reducing the layout of external components and facilitating miniaturization and thinner design of the product. On the other hand, the RF front-end module 20 packaged within the chip is equipped with a duplexer 202, which has one input terminal and two output terminals. The input terminal is used to receive the RF signal transmitted by the active antenna 60. The duplexer 202 filters the received RF signal to obtain signals located in two different frequency bands, and then transmits them in parallel to the GNSS receiver module 10 through the two output terminals of the duplexer 202 for processing, thereby achieving dual-frequency positioning with a single antenna and improving the positioning accuracy of the receiver.

[0046] In one embodiment, the duplexer 202 described above can be a Dual Saw filter. A Dual Saw filter is a high-performance radio frequency filter based on dual-mode SAW (Surface Acoustic Wave) technology. It can simultaneously excite two acoustic wave modes, horizontal shear wave and longitudinal leakage wave, in different in-plane directions of a heterogeneous substrate. It can obtain two different frequency band filter responses in different in-plane directions, thereby enabling filtering of two different frequency bands in a small device. This is beneficial for packaging the radio frequency front-end module 20 and the GNSS receiver module 10 into the same chip.

[0047] In another implementation, the duplexer 202 can also employ a "one diplexer filter + two Saw filters" scheme. Specifically, the diplexer filter integrates a high-pass filter and a low-pass filter, and has three ports. One port receives the RF signal transmitted by the active antenna 60, and the other two ports are connected to the two Saw filters respectively, outputting high-frequency and low-frequency RF signals (it should be noted that "high-frequency" and "low-frequency" here are relative to the two output signals, not absolute frequency ranges). Compared to the dual-saw filter scheme, this scheme has relatively lower insertion loss for RF information, but due to the increased number of components, it requires a relatively larger design area, resulting in a larger packaged chip size.

[0048] Existing satellite navigation systems mainly include Global Navigation Satellite Systems (GNSS), regional satellite navigation systems, and Satellite Based Augmentation Systems (SBAS). Among them, the Global Navigation Satellite Systems include: BeiDou Navigation Satellite System, GPS (Global Positioning System), GLONASS (Global Navigation Satellite System), and Galileo, collectively known as the four major global navigation satellite systems. Regional satellite navigation systems mainly include Japan's Quasi-Zenith Satellite System (QZSS) and India's Indian Regional Navigation Satellite System (IRNSS, NAVIC).

[0049] The BeiDou Navigation Satellite System includes the following signals: B2a, B2b, B2I, B3I, B1I, B1C, S1, and S2C. GPS includes L5, L2C, L1CA, and L1C. GLONASS includes G1 and G2. Galileo includes E5a, E5b, E6, and E1. QZSS includes L5, L6, L1CA, L1C, and L1S. NAVIC includes L5(I), L1, and S(I). SBAS uses the L1 signal (1575.42MHz), and Inmarsat uses the LBAND signal. To distinguish it from BeiDou's S-band signal and GPS / QZSS's L5, NAVIC's S-band signal is denoted as S(I), and its L5 signal as L5(I).

[0050] For example, as shown in Table 1 below, the signal types supported by the various navigation systems mentioned above are mainly distributed in three frequency bands: the low frequency (LF) band, the mid frequency (MF) band, and the high frequency (HF) band. The LF band can be further divided into the LFL band and the LFH band, and the MF band can be further divided into the LBAND band and the MFH band.

[0051] Table 1

[0052]

[0053]

[0054]

[0055] The frequency range of the LF band is from 1166.220MHz to 1283.865MHz, that is: f LF,min =1166.220MHz, f LF,max =1283.865MHz. The LF band can be further subdivided into the low-frequency region of the LF band (marked as LFL, with a frequency range of 1166.220MHz to 1237.830MHz) and the high-frequency region of the LF band (marked as LFH, with a frequency range of 1237.830MHz to 1283.865MHz).

[0056] The frequency range of the MF band is 1530.000MHz to 1605.886MHz, that is: f MF,min =1530.000MHz, f MF,max= 1605.886MHz. The MF band includes the LBAND band and the MFH band. The LBAND band's frequency range is 1530.000MHz to 1545.000MHz; the MFH band's frequency range is 1559.052MHz to 1605.886MHz, i.e.: f MFH,min =1559.052MHz, f MFH,max =1605.886MHz.

[0057] The HF band has a frequency range of 2483.590MHz to 2499.910MHz, i.e.: f HF,min =2483.590MHz, f HF,max =2499.910MHz.

[0058] As shown in Table 1, the LF and MFH bands cover a wide range of signal types. Therefore, the frequency range of the two signals output by the duplexer 202 can be set to the LF and MFH bands. Furthermore, since the LF band is relatively wide (approximately 1166MHz to 1284MHz), the minimum sampling rate of the ADC is approximately 120MHz, resulting in a large computational load on the signal baseband processing module. Therefore, to reasonably reduce the ADC sampling rate and considering coverage of commonly used frequency bands, one of the signals output by the duplexer 202 can be set to the LFL band; that is, the frequency range of the two signals output by the duplexer 202 can be set to the LFL and MFH bands.

[0059] In one implementation, Figure 2 This diagram illustrates a package structure of a system-in-package (SiP) chip according to an embodiment of the present invention. Please refer to [link / reference]. Figure 2 The aforementioned system-in-package (SoC) chip needs to be packaged based on substrate 70, specifically:

[0060] The power module 50, clock module 40, RF front-end module 20, and storage module 30 in the packaged chip are encapsulated on the first side of the substrate 70 by a first package 701, and the GNSS receiver module 10 is encapsulated on the second side of the substrate 70 by a second package 702. Exemplarily, the first package 701 and the second package 702 can be plastic encapsulants, with the first package 701 and the second package 702 being plastic encapsulants located on the first side and the second side, respectively. Exemplarily, the substrate 70 can be an organic IC carrier board. Organic IC carrier boards have advantages such as low dielectric constant, low mass density, simple processing technology, high production efficiency, and low cost, and can better meet the needs of miniaturization and micro-miniaturization of electronic devices.

[0061] It should be noted that, in the embodiments of this utility model, [the following text is incomplete and requires further context to be translated accurately] Figure 2From a viewing angle, the direction in which the first surface of the substrate 70 faces is upward, and the direction in which the second surface of the substrate 70 faces is downward.

[0062] Specifically, a conductive line 703 is provided between the first and second surfaces of the substrate 70. The power module 50 is connected to the clock module 40, the storage module 30, and the GNSS receiver module 10 via the conductive line 703. The GNSS receiver module 10 is connected to the storage module 30 via the conductive line 703. The clock module 40 is connected to the GNSS receiver module 10 via the conductive line 703, and the RF front-end module 20 is connected to the GNSS receiver module 10 via the conductive line 703. For example, the conductive line 703 can be found in [reference needed]. Figure 3 , Figure 3 This diagram shows a partial schematic of a conductive line 703 according to an embodiment of the present invention. Part of the conductive line 703 may be located on the first surface of the substrate 70, part may be located on the second surface of the substrate 70, and part may be located in the interlayer between the substrate 70 and the substrate 70. To achieve electrical connection between the various components located on both surfaces of the chip, such as... Figure 3 As shown, the conductive line 703 also includes a conductive via 7034 and / or a conductive blind via (not shown in the figure). Specifically, the conductive via 7034 is a conductive dielectric via that penetrates the first and second surfaces of the substrate 70 in the conductive line 703. The conductive line 703 may specifically include a multilayer circuit. The conductive blind via connects to the target circuit layer through a conductive dielectric to achieve electrical connection between target components.

[0063] See Figure 5In one embodiment, the GNSS receiver module 10 specifically includes a radio frequency signal processing module 101, a baseband signal processing module 102, and a central processing unit 103. That is, the three functional modules are integrated into the same die, and higher integration facilitates product miniaturization. Furthermore, since the central processing unit 103 is integrated into the packaged chip, the packaged chip needs to have more external interfaces. These external interfaces include, but are not limited to, a Controller Area Network (CAN) interface, an Ethernet interface, a Universal Asynchronous Receiver Transmitter (UART) interface, a Serial Peripheral Interface (SPI), an Inter-Integrated Circuit (I2C) interface, and a Pulse Per Second (PPS) / General Purpose Input / Output (GPIO) interface. Specifically, each external interface of the packaged chip is connected to a plurality of conductive portions 80 located on the second side of the substrate via conductive lines 703, with portions of the conductive portions 80 exposed outside the second package body 702. For example, the conductive portion 80 can be a solder ball, and the arrangement of the conductive portion 80 in the packaged chip can be referred to 4. Figure 4 This diagram illustrates a structural schematic of the substrate 70 in a second-side view according to an embodiment of the present invention. In this embodiment, the GNSS receiver module 10 is disposed, for example, in the central region of the second surface of the substrate 70, and a plurality of conductive portions 80 are disposed around the peripheral region of the second surface of the substrate 70.

[0064] To shorten the transmission distance between the GNSS receiver module 10 and the storage module 30, the storage module 30 can be disposed in a first region on the first surface of the substrate. This first region is the projection area of ​​the GNSS receiver module 10 onto the first surface of the substrate in the vertical direction. This results in a shorter physical distance between the GNSS receiver module 10 and the storage module 30, which helps improve the efficiency and stability of data transmission. Furthermore, the storage module 30 in this embodiment includes a dynamic random access memory unit 301 (e.g., HyperRAM) and a non-volatile memory unit 302 (e.g., FLASH). Figure 2As shown, a non-volatile memory cell 302 is disposed on the first surface of the substrate 70. The non-volatile memory cell 302 is connected to the GNSS receiver module 10 via wire bonding and / or conductive lines 703. A dynamic random access memory (DRAM) cell 301 is disposed above the non-volatile memory cell 302. The DRAM cell 301 is connected to the conductive lines 703 via wire bonding, and thus connected to the GNSS receiver module 10. In practical applications, since the non-volatile memory cell 302 needs to store more data, its cross-sectional area is larger than that of the DRAM cell 301. Therefore, the DRAM cell 301 can be disposed above the non-volatile memory cell 302 via wire bonding, which saves the physical space occupied by the storage module 30 and allows it to be placed close to the GNSS receiver module 10.

[0065] In this embodiment of the invention, on the one hand, by packaging components on the first and second sides of the substrate 70 respectively, product area can be saved, and product miniaturization can be better achieved; moreover, the double-sided packaging structure has higher structural strength and reliability. On the other hand, by placing the storage module 30 in the first region of the first side of the substrate, the physical distance between the storage module 30 and the GNSS receiver module 10 can be shortened, which helps to improve the efficiency and stability of data transmission.

[0066] For example, Figure 5 This diagram illustrates a specific architecture of a system-in-package (SiP) chip according to an embodiment of the present invention. Please refer to [link / reference]. Figure 5 The power supply module 50 provides different operating voltages for different functional modules. For example, the power supply module 50 provides 1.8V for the clock module 40, 1.8V for the dynamic random access memory unit 301, and 1.8V for the non-volatile memory unit 302. For the GNSS receiver module 10, which does not require computation, the power supply module 50 provides operating voltages of 0.9V / 1.2V / 1.8V / 3.3V.

[0067] In one implementation, such as Figure 5As shown, based on the above embodiments, the clock module 40 in this embodiment further includes a crystal oscillator 401 and internal clock logic 402. The crystal oscillator 401 is connected to the RF front-end module 20, and the internal clock logic 402 is connected to the GNSS receiver module 10. Specifically, in practical applications, the RF front-end module 20 has high requirements for clock accuracy; therefore, a crystal oscillator 401 is needed to provide a clock reference signal. For example, the crystal oscillator 401 can be a temperature-compensated crystal oscillator (TCXO) or an oven-controlled crystal oscillator (OCXO). For computational modules with relatively low clock accuracy requirements (e.g., the central processing unit 103 in the GNSS receiver module 10), the internal clock logic 402 can employ a ring oscillator or a phase-locked loop unit.

[0068] In another embodiment, the system-in-package chip of this utility model may not integrate the crystal oscillator 401. However, the package chip needs to be provided with a crystal oscillator interface. The crystal oscillator interface is connected to the radio frequency front-end module 20 through the above-mentioned conductive line 703, and the clock signal of OCXO or TCXO is provided by the outside of the chip.

[0069] This invention also provides a receiving device comprising a system-in-package (SiP) chip for global satellite navigation as described above. The SiP chip highly integrates a radio frequency front-end, a GNSS receiver module, etc., significantly reducing the chip's size and weight. For example, the receiving device in this invention can be a receiver in a smart home system. By equipping it with the aforementioned SiP chip, it can simultaneously receive different satellite signals and rapidly process and analyze these signals to achieve intelligent control of home devices. The receiving device in this invention can also be a receiver in a vehicle communication system. By equipping it with the aforementioned SiP chip, it can stably receive and process wireless signals in complex electromagnetic environments, ensuring that the vehicle can achieve accurate and stable positioning and navigation functions.

[0070] This utility model embodiment also provides a receiver for a satellite navigation system, which includes a single antenna and a receiving device as described above. The single antenna is connected to the signal input port of a system-in-package (SiP) chip in the receiving device. The single antenna is a multi-band active antenna. For the structure and function of the SiP chip described above, please refer to the embodiments of the SiP chip, which will not be repeated here.

[0071] This utility model embodiment also provides an electronic device, which includes a receiver for a satellite navigation system as described above. The electronic device can be a wearable device, smart home device, smartphone, smartwatch, tablet computer, navigator, dashcam, logistics tracker, and drone, etc.

[0072] Those skilled in the art will understand that, without conflict, the above-mentioned preferred solutions can be freely combined and superimposed.

[0073] It should be understood that the above-described embodiments are merely exemplary and not restrictive. Without departing from the basic principles of this utility model, any obvious or equivalent modifications or substitutions made by those skilled in the art regarding the above details will be included within the scope of the claims of this utility model.

Claims

1. A system-in-package chip for global satellite navigation, characterized in that, For single-antenna dual-frequency positioning scenarios, the chip encapsulates at least an RF front-end module, a GNSS receiver module, a power supply module, a clock module, and a storage module. The power supply module converts the input voltage into operating voltages for the clock module, the GNSS receiver module, and the storage module. The clock module provides reference clock signals to both the RF front-end module and the GNSS receiver module. The RF front-end module converts the received RF signal into a baseband signal and inputs it to the GNSS receiver module. The GNSS receiver module reads / writes data to the storage module. The radio frequency front-end module includes a signal input port and a duplexer; wherein, the signal input port is used to connect to an active antenna and transmit the radio frequency signal received through the active antenna to the input of the duplexer; the two outputs of the duplexer are respectively connected to the two signal processing channels of the GNSS receiver module, and the duplexer converts the received radio frequency signal into signals of two frequency bands.

2. The system-in-package chip for global satellite navigation according to claim 1, characterized in that, The system-in-package chip also includes: a substrate; The power module, the clock module, the RF front-end module, and the storage module are packaged on the first side of the substrate by a first package. The GNSS receiver module is encapsulated on the second side of the substrate by a second package; A conductive line is provided between the first surface and the second surface. The power module is connected to the clock module, the storage module and the GNSS receiver module through the conductive line respectively. The GNSS receiver module is connected to the storage module through the conductive line. The clock module is connected to the GNSS receiver module through the conductive line. The radio frequency front-end module is connected to the GNSS receiver module through the conductive line. Each external interface of the system-in-package chip is connected to a plurality of conductive parts located on the second surface through the conductive lines, and a portion of the conductive parts is exposed outside the second package.

3. The system-in-package chip for global satellite navigation according to claim 2, characterized in that, The storage module is disposed in a first area of ​​the first surface, and the first area is the projection area of ​​the GNSS receiver module on the first surface in the vertical direction.

4. The system-in-package chip for global satellite navigation according to claim 3, characterized in that, The storage module includes: a dynamic random access memory unit and a non-volatile memory unit; The non-volatile memory cell is disposed on the first surface, and the non-volatile memory cell is connected to the GNSS receiver module by wire bonding or the conductive line. The dynamic random access memory unit is disposed above the non-volatile memory unit, and the dynamic random access memory unit is connected to the GNSS receiver module by wire bonding.

5. The system-in-package chip for global satellite navigation according to claim 2, characterized in that, The GNSS receiver module includes: a radio frequency signal processing module, a baseband signal processing module, and a central processing unit; The radio frequency signal processing module is connected to the two output terminals of the duplexer, the output terminal of the radio frequency signal processing module is connected to the input terminal of the baseband signal processing module, and the output terminal of the baseband signal processing module is connected to the central processing unit.

6. The system-in-package chip for global satellite navigation according to claim 5, characterized in that, The external interface of the central processing unit includes at least one of the following: CAN interface, Ethernet interface, UART interface, SPI, I2C interface and PPS / GPIO interface.

7. The system-in-package chip for global satellite navigation according to claim 1, characterized in that, The clock module includes: a crystal oscillator and internal clock logic; The crystal oscillator is connected to the radio frequency front-end module and includes: a temperature-compensated crystal oscillator (TCXO) or a temperature-controlled crystal oscillator (OCXO). The internal clock logic is connected to the GNSS receiver module and includes a ring oscillator or a phase-locked loop unit.

8. A system-in-a-package chip for global satellite navigation, characterized by For single-antenna dual-frequency positioning scenarios, the chip encapsulates at least a GNSS receiver module, a power supply module, a clock module, an RF front-end module, and a storage module. The power supply module converts the input voltage into operating voltages for the clock module, the GNSS receiver module, and the storage module. The clock module provides reference clock signals to the RF front-end module and the GNSS receiver module. The RF front-end module converts the received RF signal into a baseband signal and inputs it to the GNSS receiver module. The GNSS receiver module reads / writes data to the storage module. The radio frequency front-end module is equipped with a signal input port and a duplexer. The duplexer has one radio frequency input terminal and two radio frequency output terminals. The GNSS receiver module is equipped with two signal processing channels. The signal input port is used to connect to an active antenna and transmit the radio frequency signal received by the active antenna to the radio frequency input terminal. The two radio frequency output terminals are respectively connected to the two signal processing channels. The duplexer converts the received radio frequency signal into signals of two frequency bands to achieve single-antenna dual-frequency positioning.

9. A receiving device, characterized by Includes the system-in-package chip for global satellite navigation as described in any one of claims 1-8.

10. A receiver of a satellite navigation system, characterized in that It includes a single antenna and a receiving device as described in claim 9, wherein the single antenna is connected to the signal input port of the system-in-package chip for global satellite navigation in the receiving device, and the single antenna is a multi-band active antenna.

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