A backflow prevention circuit and power supply system

Abstract

This application discloses an anti-backflow circuit and power supply system. The anti-backflow circuit is disposed between the power input terminal and the power output terminal. The anti-backflow circuit includes: a first field-effect transistor (FET), a second field-effect transistor (FET), a first resistor, a second resistor, and a switching module. The drain of the first FET is connected to the power input terminal; the drain of the second FET is connected to the power output terminal; the sources of the first and second FETs are connected to one end of the first resistor; the gates of the first and second FETs, and one end of the second resistor are connected to the other end of the first resistor; the other end of the second resistor is connected to the switching module. This application can be widely applied in the field of electronic circuit technology.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to an anti-backflow circuit and power supply system. Background Technology

[0002] Currently, most electronic devices are equipped with backup batteries to provide temporary power during power outages. In the circuit that charges the battery, when switching between different voltages, there is a possibility of high voltage flowing back into the low voltage system, causing the battery to overcharge or supply power in reverse, which can damage the device. Therefore, the circuit needs to be designed to prevent backflow.

[0003] A common anti-backflow circuit adds a diode to the power supply output and increases the output capacitance. When the power supply restarts, the added diode prevents current backflow, and the increased capacitance prevents the voltage from dropping below the operating voltage of the subsequent circuits during the next restart. However, the added diode has a forward voltage drop in the circuit. Under heavy loads, the diode will overheat, potentially causing damage and affecting the stability of the power supply. Therefore, there are still technical problems to be solved in this field. Utility Model Content

[0004] The purpose of this application is to at least partially solve one of the technical problems existing in the prior art.

[0005] Therefore, one objective of this application is to provide an anti-backflow circuit and power supply system that has relatively high stability.

[0006] To achieve the above-mentioned technical objectives, the technical solution adopted in the embodiments of this application includes: an anti-backflow circuit, wherein the anti-backflow circuit is disposed between the power input terminal and the power output terminal, and the anti-backflow circuit includes:

[0007] The components include a first field-effect transistor, a second field-effect transistor, a first resistor, a second resistor, and a switching module.

[0008] The drain of the first field-effect transistor is connected to the power input terminal; the drain of the second field-effect transistor is connected to the power output terminal; the source of the first field-effect transistor and the source of the second field-effect transistor are connected to one end of the first resistor; the gate of the first field-effect transistor, the gate of the second field-effect transistor, and one end of the second resistor are connected to the other end of the first resistor; the other end of the second resistor is connected to the switching module.

[0009] In addition, the anti-backflow circuit according to the above embodiments of this utility model may also have the following additional technical features:

[0010] Furthermore, in this embodiment of the application, the anti-backflow circuit further includes a third resistor and a light-emitting device; one end of the third resistor is connected to the power input terminal; the other end of the third resistor is connected to the positive terminal of the light-emitting device; and the negative terminal of the light-emitting device is connected to the other end of the second resistor.

[0011] Furthermore, in this embodiment, the switching module includes a control unit, a first transistor, a fourth resistor, a fifth resistor, and a first capacitor; one end of the fourth resistor is connected to the control unit; the other end of the fourth resistor, one end of the first capacitor, and one end of the fifth resistor are connected to the base of the first transistor; the other end of the fifth resistor, the other end of the first capacitor, and the emitter of the first transistor are all grounded; the collector of the first transistor is connected to the other end of the second resistor.

[0012] Further, in this embodiment, the control unit includes a control chip and a power supply unit; the control chip is connected to the power supply unit; the power supply unit includes a power chip, a second capacitor, a third capacitor, and a sixth resistor; one end of the second capacitor and the power input terminal are connected to the input terminal of the power chip; one end of the second capacitor and the power input terminal are connected to the enable terminal of the power chip; one end of the third capacitor and one end of the sixth resistor are connected to the output terminal of the power chip; the other end of the sixth resistor is connected to the first pin of the control chip; the other end of the second capacitor, the ground terminal of the power chip, the other end of the third capacitor, and the second pin of the control chip are all grounded.

[0013] Furthermore, in this embodiment, the control unit further includes a wireless communication subunit; the wireless communication subunit includes a seventh resistor, an eighth resistor, a fourth capacitor, and a fifth capacitor; one end of the seventh resistor, one end of the eighth resistor, one end of the fourth capacitor, and one end of the fifth capacitor are connected to an external Bluetooth module; the other end of the seventh resistor is connected to the third pin of the control chip, and the other end of the eighth resistor is connected to the fourth pin of the control chip; the other ends of the fourth capacitor and the other ends of the fifth capacitor are both grounded.

[0014] Furthermore, in this embodiment, the first field-effect transistor is a PMOS transistor.

[0015] Furthermore, in this embodiment, the first transistor is an NPN transistor.

[0016] Furthermore, in this embodiment, the second field-effect transistor is a PMOS transistor.

[0017] Furthermore, in this embodiment of the application, the light-emitting device is a light-emitting diode.

[0018] On the other hand, this application also provides a power supply system including an anti-backflow circuit as described in any of the preceding claims.

[0019] The advantages and beneficial effects of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application:

[0020] This application provides an anti-backflow circuit by placing a first field-effect transistor, a second field-effect transistor, a first resistor, a second resistor, and a switching module between the power input and power output terminals. By replacing the diode with two field-effect transistors that have higher voltage withstand performance than the diode, and by using the current-limiting effect of the loop formed by the first and second resistors, the current flowing through the two field-effect transistors will not damage them, thereby making the anti-backflow circuit of this application more stable. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the anti-backflow circuit in a specific embodiment of the present invention. Detailed Implementation

[0022] The following detailed description, in conjunction with the accompanying drawings, explains the principle and process of the anti-backflow circuit in the embodiments of the present invention.

[0023] Reference Figure 1 This application provides an anti-backflow circuit. The anti-backflow circuit may include a first field-effect transistor Q1, a second field-effect transistor Q2, a first transistor Q3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first diode D1, and a first capacitor C1. The first field-effect transistors Q1 and Q2 are both PMOS transistors, and the first transistor Q3 is an NPN transistor.

[0024] The drain of the first field-effect transistor Q1 is connected to the power input terminal VIN. The source of the first field-effect transistor Q1 is connected to the source of the second field-effect transistor Q2. The gate of the first field-effect transistor Q1, the gate of the second field-effect transistor Q2, and one end of the second resistor R2 are connected. The drain of the second field-effect transistor Q2 is connected to the power output terminal VOUT. The other end of the second resistor R2 is connected to the collector of the first transistor Q3. The base of the first transistor Q3 is connected to the control terminal control, and the emitter of the first transistor Q3 is grounded; the control terminal control is connected to the PA3 pin of the control chip U2. One end of the first resistor R1 is connected to the source of the first field-effect transistor Q1, and the other end of the first resistor R1 is connected to the gate of the first field-effect transistor Q1. One end of the third resistor R3 is connected to the power input terminal VIN, and the other end is connected to the anode of the first diode D1. The cathode of the first diode D1 is connected to the collector of the first transistor. The fourth resistor R4 is connected between the control terminal (control) and the base of the first transistor Q3. One end of the fifth resistor R5 is connected to the base of the first transistor Q3, and the other end is connected to the emitter of the first transistor Q3. One end of the first capacitor C1 is connected to the base of the first transistor Q3, and the other end is connected to the emitter of the first transistor Q3. The IN and EN terminals of the power chip U1 are connected to the power input terminal VIN, and the OUT terminal is connected to the other end of the sixth resistor R6. One end of the second capacitor C2 is connected to the IN terminal and the power input terminal VIN of the power chip U1, and the other end of the second capacitor C2 is grounded. One end of the capacitor C3 is connected to the OUT terminal of the power chip U1, and the other end of the second capacitor C2 is grounded.

[0025] The VDD terminal of control chip U2 is connected to one end of the sixth resistor R6. The VSS terminal of control chip U2 is grounded. The PA1 terminal of control chip U2 is connected to one end of the seventh resistor R7. The other end of the seventh resistor R7 is connected to one end of the fourth capacitor C4 and the TX port. The other end of the fourth capacitor C4 is grounded. The PA2 terminal of control chip U2 is connected to one end of the eighth resistor R8 and one end of the fifth capacitor C5. The other end of the eighth resistor R8 is connected to the RX port. The other end of the fifth capacitor C5 is grounded. The TX and RX terminals are connected to an external Bluetooth module. PA4, PA5, and PA6 of control chip U2 are left floating and not connected.

[0026] The working principle of the circuit in this embodiment will be explained next.

[0027] The power chip U1 outputs the operating voltage VDD of the control chip U2 through the power input voltage VIN, so that the control chip U2 can work normally.

[0028] The PA1 and PA2 pins of the control chip U2 are connected to the external Bluetooth module to complete the sending and receiving of commands between the chip and the external controller;

[0029] The conduction state of the first transistor Q3 is controlled by the control terminal of the control chip U2. When the external controller sends a conduction command, the control chip U2 receives the command and outputs a high level at its PA3 pin. This, in turn, causes the base voltage of the first transistor Q3 to rise above the conduction threshold voltage, turning Q3 on. The voltage level between the collector and emitter of the first transistor Q3 then approaches zero. Similarly, when the external controller sends a deactivation command, the control chip U2 outputs a low level at its PA3 pin, causing the base voltage of the first transistor Q3 to fall below the conduction threshold voltage. This turns Q3 off, and the voltage level between the collector and emitter of the first transistor Q3 becomes high.

[0030] Therefore, when the first transistor Q3 is in the on state, the collector-to-ground voltage of the first transistor Q3 approaches zero. At this time, the input voltage at the power input terminal VIN can reach the source of the first field-effect transistor Q1 and the second field-effect transistor Q2 through the body diode inside the first field-effect transistor Q1. The source voltage of the first field-effect transistor Q1 and the second field-effect transistor Q2 is equal to the input voltage minus the forward voltage drop of the body diode. The gate of the first field-effect transistor Q1 and the second field-effect transistor Q2 are connected to the collector of the first transistor Q3 through the second resistor R2. The gate voltage of the first field-effect transistor Q1 and the second field-effect transistor Q2 is pulled low to a low level through the second resistor R2; the gate-source voltage VIN... GS =V G -V S As long as the gate-source voltage is greater than the on-threshold voltage V of the field-effect transistor. GS When (th) occurs, the first field-effect transistor Q1 and the second field-effect transistor Q2 will conduct simultaneously. Furthermore, when the input terminal VIN passes through the circuit containing the third resistor R3 and the LED D1, the input voltage at the input terminal VIN will also cause the LED D1 to light up. The designer can determine whether Q3 is working properly by observing whether the LED D1 lights up.

[0031] When the first transistor Q3 is in the off state, the collector-to-ground voltage of the first transistor Q3 is high. At this time, the gate-source voltage V of the first field-effect transistor Q1 and the second field-effect transistor Q2 is... GS =V G -V S When VGS is approximately 0, it is less than the turn-on threshold voltage of the field-effect transistors (FETs). Therefore, the first FET Q1 and the second FET Q2 are in the off state, thus preventing reverse current flow. At the same time, the LED D1 will also not light up.

[0032] Furthermore, when the first transistor Q3 is turned off, due to the unidirectional conduction of the internal body diodes of the first field-effect transistor Q1 and the second field-effect transistor Q2, the leakage voltage of VOUT cannot reach the power input terminal VIN, and the leakage voltage of VIN cannot reach the power output terminal VOUT, thereby preventing current backflow.

[0033] In addition, the first resistor R1 provides a path between the gate and source of the field-effect transistors (FETs). It controls the gate current of both FETs Q1 and Q2, stabilizing the gate voltage and thus controlling the FET's state. The second resistor R2 acts as a pull-up resistor for the first transistor Q3, providing the collector voltage to control its collector current. The third resistor R3 controls the current of the light-emitting diode D1, ensuring its normal operation. The fourth resistor R4 reduces interference from the control signal and limits the base current of the first transistor Q3. The fifth resistor R5 controls the base voltage and current of Q3, preventing interference from the control signal from causing mis-conduction and improving circuit stability. The sixth resistor R6 controls the output voltage of the power supply chip U1 and provides the operating voltage for the control chip U2. The seventh and eighth resistors R7 and R8 limit the current flowing into the TX and RX terminals.

[0034] The function of the first capacitor C1 is to filter out high-frequency noise from the control signal and prevent the parasitic capacitance of the first transistor Q3 from causing it to mis-conduct, thereby improving circuit stability. The function of the second capacitor C2 is to filter out noise interference and improve circuit stability. The function of the third capacitor C3 is to suppress ripple noise interference and stabilize the output voltage. The function of the fourth capacitor C4 and the fifth capacitor C5 is to filter out noise interference from the TX and RX terminals.

[0035] As can be seen from this embodiment, by outputting a control signal through the control chip U2, the operating state of the first transistor Q3 can be controlled, thereby controlling the operating states of the first field-effect transistor Q1 and the second field-effect transistor Q2, achieving the effect of preventing reverse current flow in the input and output. Furthermore, this embodiment uses LED D1 to easily determine whether the control circuit is working properly, thus improving the efficiency of later maintenance.

[0036] Furthermore, an embodiment of this application also provides a power supply system. This power supply system may include one or more backflow prevention circuits as described in any of the preceding embodiments.

[0037] It should be noted that the contents of the above-described anti-backflow circuit embodiments are all applicable to this power system embodiment. The specific functions implemented by this power system embodiment are the same as those of the above-described anti-backflow circuit embodiments, and the beneficial effects achieved are also the same as those achieved by the above-described anti-backflow circuit embodiments.

[0038] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the term "switching" should be interpreted broadly, for example, it can mean transformation or conversion; for those skilled in the art, the specific meaning of the above term in this utility model can be understood according to the specific circumstances.

[0039] In this specification, the description of referenced terms refers to a specific structure or feature described in connection with an embodiment or example that is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0040] Although embodiments of the present invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the claims and their equivalents.

[0041] The above is a detailed description of the preferred embodiments of this application, but this application is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A backflow prevention circuit, characterized in that, The backflow prevention circuit is disposed between the power input terminal and the power output terminal, and the backflow prevention circuit includes: The components include a first field-effect transistor, a second field-effect transistor, a first resistor, a second resistor, and a switching module. The drain of the first field-effect transistor is connected to the power input terminal; the drain of the second field-effect transistor is connected to the power output terminal; the source of the first field-effect transistor and the source of the second field-effect transistor are connected to one end of the first resistor; the gate of the first field-effect transistor, the gate of the second field-effect transistor, and one end of the second resistor are connected to the other end of the first resistor; the other end of the second resistor is connected to the switching module.

2. The anti-backflow circuit according to claim 1, characterized in that, The backflow prevention circuit also includes a third resistor and a light-emitting device; one end of the third resistor is connected to the power input terminal; the other end of the third resistor is connected to the positive terminal of the light-emitting device; and the negative terminal of the light-emitting device is connected to the other end of the second resistor.

3. The anti-backflow circuit according to claim 1, characterized in that, The switching module includes a control unit, a first transistor, a fourth resistor, a fifth resistor, and a first capacitor; one end of the fourth resistor is connected to the control unit; the other end of the fourth resistor, one end of the first capacitor, and one end of the fifth resistor are connected to the base of the first transistor; the other end of the fifth resistor, the other end of the first capacitor, and the emitter of the first transistor are all grounded; the collector of the first transistor is connected to the other end of the second resistor.

4. The anti-backflow circuit according to claim 3, characterized in that, The control unit includes a control chip and a power supply unit; the control chip is connected to the power supply unit; the power supply unit includes a power chip, a second capacitor, a third capacitor, and a sixth resistor; one end of the second capacitor and the power input terminal are connected to the input terminal of the power chip; one end of the second capacitor and the power input terminal are connected to the enable terminal of the power chip; one end of the third capacitor and one end of the sixth resistor are connected to the output terminal of the power chip; the other end of the sixth resistor is connected to the first pin of the control chip; the other end of the second capacitor, the ground terminal of the power chip, the other end of the third capacitor, and the second pin of the control chip are all grounded.

5. The anti-backflow circuit according to claim 4, characterized in that, The control unit further includes a wireless communication subunit; the wireless communication subunit includes a seventh resistor, an eighth resistor, a fourth capacitor, and a fifth capacitor; one end of the seventh resistor, one end of the eighth resistor, one end of the fourth capacitor, and one end of the fifth capacitor are connected to an external Bluetooth module; the other end of the seventh resistor is connected to the third pin of the control chip, and the other end of the eighth resistor is connected to the fourth pin of the control chip; the other ends of the fourth capacitor and the other ends of the fifth capacitor are both grounded.

6. The anti-backflow circuit according to claim 1, characterized in that, The first field-effect transistor is a PMOS transistor.

7. The anti-backflow circuit according to claim 1, characterized in that, The second field-effect transistor is a PMOS transistor.

8. The anti-backflow circuit according to claim 3, characterized in that, The first transistor is an NPN transistor.

9. The anti-backflow circuit according to claim 2, characterized in that, The light-emitting device is a light-emitting diode.

10. A power supply system, characterized in that, Includes the backflow prevention circuit as described in any one of claims 1-9.

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