Power devices, electronic equipment and vehicles

Abstract

This disclosure relates to a power module, electronic device, and vehicle. The power device includes: a plurality of switching chips arranged in parallel, wherein the power sources of the plurality of switching chips are respectively connected to a common source node, the gates of the plurality of switching chips are respectively connected to corresponding gate drive nodes, and the drains of the plurality of switching chips are respectively connected to a common drain node; at least two of the plurality of switching chips have different conductive path lengths, and the threshold voltages of at least two switching chips are negatively correlated with the conductive path lengths of their respective switching chips; the conductive path length is the length of the conductive path between the power source and the common source node. This disclosure selects switching chips with matching threshold voltages based on the conductive path lengths of different switching chips, so that the switching times of switching chips in different positions are less different when the power device is switching, avoiding the problem of overload of switching chips due to uneven current distribution, and improving the switching performance of the power device.

Description

Technical Field

[0001] This disclosure relates to the field of power device technology, and more particularly to a power device, electronic device, and vehicle. Background Technology

[0002] Due to inherent variations in semiconductor manufacturing processes, differences in threshold voltages between different switching chips are unavoidable. If these switching chips are directly connected in parallel, the different threshold voltages will lead to significant differences in switching times during the switching process. This can cause uneven current distribution, resulting in some switching chips experiencing performance degradation due to overload, or even irreversible damage. Utility Model Content

[0003] This disclosure provides a power device, an electronic device, and a vehicle. The power device selects a switching chip with a matching threshold voltage based on the conductive path length of different switching chips. This ensures that the switching times of switching chips in different locations are relatively similar during switching operations, effectively avoiding overload problems caused by uneven current distribution and improving the switching performance of the power device. The technical solution of this disclosure is as follows:

[0004] The first aspect of this disclosure provides a power device, comprising:

[0005] Multiple switching chips are connected in parallel, wherein the power sources of the multiple switching chips are respectively connected to a common source node, the gates of the multiple switching chips are respectively connected to corresponding gate drive nodes, and the drains of the multiple switching chips are respectively connected to a common drain node.

[0006] Among the plurality of switching chips, at least two switching chips have different conductive path lengths, and the threshold voltages of the at least two switching chips are negatively correlated with the conductive path lengths of their respective switching chips; wherein, the conductive path length is the length of the conductive path between the power source and the common source node.

[0007] A second aspect of this disclosure provides an electronic device comprising: a power module as described in the first aspect.

[0008] A third aspect of this disclosure provides a vehicle comprising: a power module as described in the first aspect.

[0009] The technical solutions provided by the embodiments of this disclosure have at least the following beneficial effects:

[0010] This disclosure discloses a power module, electronic device, and vehicle. The power device includes a plurality of switching chips connected in parallel. The power sources of the multiple switching chips are respectively connected to a common source node, the gates of the multiple switching chips are respectively connected to corresponding gate drive nodes, and the drains of the multiple switching chips are respectively connected to a common drain node. At least two of the multiple switching chips have different conductive path lengths, and the threshold voltages of at least two switching chips are negatively correlated with the conductive path lengths of their respective chips. The conductive path length is the length of the conductive path between the power source and the common source node. This disclosure's power device selects a switching chip with a matching threshold voltage based on the conductive path length of each chip. This ensures that the switching times of the switching chips at different locations are similar during switching operations, effectively avoiding uneven current distribution and improving the switching performance of the power device.

[0011] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0012] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0013] Figure 1 This is a schematic diagram of a power device according to an embodiment of the present disclosure;

[0014] Figure 2 This is a schematic diagram of the power device according to Example 1 of this disclosure;

[0015] Figure 3 This is a schematic diagram of the power device according to Example 2 of this disclosure;

[0016] Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure;

[0017] Figure 5 This is a schematic diagram of the structure of a vehicle according to an embodiment of the present disclosure. Detailed Implementation

[0018] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings.

[0019] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0020] The power module, electronic device, and vehicle according to embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0021] Figure 1 This is a schematic diagram of a power device according to an embodiment of the present disclosure.

[0022] like Figure 1 As shown, the power device 100 of this embodiment includes:

[0023] Multiple switch chips 110 are connected in parallel, wherein the power source Si (i is the number of the switch chip) of the multiple switch chips 100 is connected to the common source node s1, the gate Gi of the multiple switch chips 110 is connected to the corresponding gate drive node gi, and the drain Di of the multiple switch chips 110 is connected to the common drain node d1.

[0024] Among the multiple switching chips 110, at least two switching chips have different conductive path lengths, and the threshold voltage Vth of at least two switching chips is negatively correlated with the conductive path length of the corresponding switching chip; wherein, the conductive path length is the length of the conductive path between the power source Si and the common source node s1.

[0025] It should be noted that the source of a switching chip includes a power source and a Kelvin source. However, the source used in this disclosure is a power source, not a Kelvin source.

[0026] Figure 1This example demonstrates multiple switching chips 110, using four switching chips (chip11, chip12, chip13, and chip14) as an example. Chip11 includes a power source stage S11, a gate G11, and a drain D11, with the gate G11 connected to the corresponding gate driver node g11. Chip12 includes a power source stage S12, a gate G12, and a drain D12, with the gate G12 connected to the corresponding gate driver node g12. Chip13 includes a power source stage S13, a gate G13, and a drain D13, with the gate G13 connected to the corresponding gate driver node g13. Chip14 includes a power source stage S14, a gate G14, and a drain D14, with the gate G14 connected to the corresponding gate driver node g14. Power source stages S11, S12, S13, and S14 are all connected to a common source node s1, and drain stages D11, D12, D13, and D14 are all connected to a common drain node d1.

[0027] For example, the conductive path lengths between the power source S11 and the common source node S1 of switch chip 11, the power source S12 and the common source node S1 of switch chip 12, the power source S13 and the common source node S1 of switch chip 13, and the power source S14 and the common source node S1 of switch chip 14 increase sequentially. Correspondingly, the parasitic inductance L11 of switch chip 11, the parasitic inductance L12 of switch chip 12, the parasitic inductance L13 of switch chip 13, and the parasitic inductance L14 of switch chip 14 also increase sequentially.

[0028] Because the conductive path length is closely related to parasitic inductance, an increase in conductive path length leads to an increase in the parasitic inductance of the corresponding switching chip. During the operation of the switching chip, this parasitic inductance impedes current changes, thus affecting the switching speed and causing it to slow down. To compensate for this decrease in switching speed due to increased parasitic inductance, it is necessary to select a switching chip with a lower threshold voltage to ensure that the power device maintains stable and efficient switching performance under different operating conditions. In other words, there is a negative correlation between conductive path length and threshold voltage.

[0029] Based on this, the threshold voltage Vth11 of switch chip 11, the threshold voltage Vth12 of switch chip 12, the threshold voltage Vth13 of switch chip 13, and the threshold voltage Vth14 of switch chip 14 should decrease sequentially.

[0030] Therefore, the power device of this disclosure selects a switching chip with a matching threshold voltage according to the conductive path length of different switching chips. This ensures that the switching time of switching chips in different positions is small when the power device performs a switching operation, effectively avoiding the problem of uneven current distribution and improving the switching performance of the power device.

[0031] In one embodiment of this disclosure, the plurality of switch chips includes at least two first switch chips;

[0032] At least two first switch chips are spaced apart along a first direction;

[0033] The common source node is connected to the power source of at least two first switching chips respectively;

[0034] The threshold voltage of at least two first switch chips is negatively correlated with the conductive path length of the corresponding first switch chip.

[0035] In another embodiment of this disclosure, the plurality of switch chips includes at least two first switch chips and at least one second switch chip;

[0036] At least one second switch chip is distributed at intervals along a second direction; wherein adjacent second switch chips and first switch chips are spaced apart by a predetermined distance; the angular difference between the second direction and the first direction is less than a predetermined angular difference value.

[0037] The common source node is also connected to the power source of at least one second switching chip;

[0038] The threshold voltages of at least two first switching chips and the threshold voltage of at least one second switching chip are negatively correlated with the conduction path length of the corresponding switching chip.

[0039] The following is combined with Figure 2 and Figure 3 The two different connection methods given above will be explained in detail.

[0040] For example, such as Figure 2 As shown, at least two first switch chips include a third switch chip (chip 3) and a fourth switch chip (chip 4), and at least one second switch chip includes a fifth switch chip (chip 5) and a sixth switch chip (chip 6); wherein,

[0041] The third switch chip (chip3) and the fourth switch chip (chip4) are spaced apart along the first direction.

[0042] The fifth switch chip (chip 5) and the sixth switch chip (chip 6) are spaced apart along the second direction; wherein, the adjacent third switch chip (chip 3) and fifth switch chip (chip 5) are spaced apart by a first predetermined distance, and the fourth switch chip (chip 4) and sixth switch chip (chip 6) are spaced apart by a second predetermined distance; the angle difference between the second direction and the first direction is less than a predetermined angle difference, and the distance difference between the first predetermined distance and the second predetermined distance is less than a predetermined distance difference.

[0043] The third switch chip (chip3) and the fifth switch chip (chip5) are distributed at intervals along a third direction; wherein the first direction and the third direction form a first preset angle, such as 90°.

[0044] The fourth switch chip (chip4) and the sixth switch chip (chip6) are distributed at intervals along the fourth direction; wherein the second direction and the fourth direction form a second preset angle, such as 90°.

[0045] The common source node s2 is located in the third switch chip 3, away from the fourth switch chip 4;

[0046] The common source node s2 is connected to the power sources of the third switch chip chip3, the fourth switch chip chip4, the fifth switch chip chip5, and the sixth switch chip chip6, respectively.

[0047] The threshold voltages of the third switch chip (chip3), the fourth switch chip (chip4), the fifth switch chip (chip5), and the sixth switch chip (chip6) decrease sequentially.

[0048] like Figure 2 As shown, the power device in this embodiment further includes: a first conductor connector clip1; wherein,

[0049] The first end of the first conductor connector clip1 is connected to the common source node s1, and the second end of the first conductor connector clip1 is located between the first end and the third end of the first conductor connector clip1.

[0050] The second end of the first conductor connector clip1 is connected to the power source of the third switch chip chip3 and the power source of the fourth switch chip chip4, respectively.

[0051] The third end of the first conductor connector clip1 is connected to the power source of the fifth switch chip chip5 and the power source of the sixth switch chip chip6, respectively.

[0052] Among them, the first conductor connector clip1 is located on the side of the third switch chip 3 away from the fourth switch chip 4 and the fifth switch chip 5 away from the sixth switch chip 6.

[0053] like Figure 2 As shown, the power device in this embodiment further includes: a second conductor connector clip2; wherein,

[0054] The first end of the second conductor connector clip2 is connected to the second end of the first conductor connector clip1;

[0055] The second end of the second conductor connector clip2 is connected to the power source of the third switch chip chip3;

[0056] The third terminal of the second conductor connector clip2 is connected to the power source of the fourth switch chip chip4;

[0057] The second end of the second conductor connector clip2 is located between the first end of the second conductor connector clip2 and the third end of the second conductor connector clip2.

[0058] like Figure 2 As shown, the power device in this embodiment further includes: a third conductor connector clip3; wherein,

[0059] The first end of the third conductor connector clip3 is connected to the third end of the first conductor connector clip1;

[0060] The second end of the third conductor connector clip3 is connected to the power source of the fifth switch chip chip5;

[0061] The third terminal of the third conductor connector clip3 is connected to the power source of the sixth switch chip chip6;

[0062] The second end of the third conductor connector clip3 is located between the first end and the third end of the third conductor connector clip3.

[0063] For example, such as Figure 3 As shown, at least two first switch chips include a seventh switch chip (chip 7), an eighth switch chip (chip 8), a ninth switch chip (chip 9), and a tenth switch chip (chip 10); wherein,

[0064] The common source node is located in the tenth switch chip (chip10) at a position far away from the ninth switch chip (chip9);

[0065] The common source node is connected to the power sources of the seventh switch chip (chip7), the eighth switch chip (chip8), the ninth switch chip (chip9), and the tenth switch chip (chip10), respectively.

[0066] The threshold voltages of the seventh switch chip (chip7), the eighth switch chip (chip8), the ninth switch chip (chip9), and the tenth switch chip (chip10) increase sequentially.

[0067] like Figure 3 As shown, the power device in this embodiment further includes: a fourth conductor connector clip4; wherein,

[0068] The first end of the fourth conductor connector clip4 is connected to the power source of the seventh switch chip chip7;

[0069] The second end of the fourth conductor connector clip4 is connected to the power source of the eighth switch chip chip8;

[0070] The third terminal of the fourth conductor connector clip4 is connected to the power source of the ninth switch chip chip9;

[0071] The fourth terminal of the fourth conductor connector clip4 is connected to the power source of the tenth switch chip chip10;

[0072] The fifth terminal of the fourth conductor connector clip4 is connected to the common source node s3;

[0073] The first end, the second end, the third end, the fourth end, and the fifth end of the fourth conductor connector clip4 are distributed sequentially.

[0074] The power device disclosed herein also includes: multiple bonding lines, wherein the gates of multiple switching chips are respectively connected to corresponding gate drive nodes through the multiple bonding lines.

[0075] It should be noted that when using the same drive signal to drive multiple switching chips, the gates of the multiple switching chips can be connected to the same gate drive node through multiple bonding lines, such as... Figure 2 and Figure 3 As shown. Specific settings need to be configured according to actual requirements.

[0076] In one embodiment of this disclosure, the conductor connectors clip1, clip2, clip3, and clip4 can be metal strips, and the materials of the metal strips can be selected from various sources. For example, pure copper or copper alloys; pure aluminum or aluminum alloys; nickel-plated copper or silver-plated copper; or copper or aluminum metal-based composite materials.

[0077] It should be noted that the material of the conductor connector can be selected according to actual needs. In addition to the types listed here, other materials can also be used, which will not be listed here.

[0078] In one embodiment of this disclosure, the binding wire can be a metal wire, and the material of the metal wire can be selected from various sources. For example, pure copper or copper alloy; pure aluminum or aluminum alloy; nickel-plated copper or silver-plated copper; or copper or aluminum metal-based composite materials.

[0079] It should be noted that the material of the binding wire can be selected according to actual needs. In addition to the types listed here, other materials can also be used, which will not be listed here.

[0080] It should be noted that the switching chip in this embodiment of the disclosure can be a silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET). The threshold voltages of multiple chips are in a range, for example, 0.3V-0.5V.

[0081] In summary, the power device of this disclosure includes: a plurality of switching chips connected in parallel, wherein the power sources of the plurality of switching chips are respectively connected to a common source node, the gates of the plurality of switching chips are respectively connected to corresponding gate drive nodes, and the drains of the plurality of switching chips are respectively connected to a common drain node; wherein at least two of the plurality of switching chips have different conductive path lengths, and the threshold voltages of at least two switching chips are negatively correlated with the conductive path lengths of their respective switching chips; wherein the conductive path length is the length of the conductive path between the power source and the common source node. The power device of this disclosure selects a switching chip with a matching threshold voltage based on the conductive path lengths of different switching chips. This ensures that the switching times of switching chips at different positions are relatively similar when the power device performs switching operations, effectively avoiding uneven current distribution and improving the switching performance of the power device. Furthermore, the improved current sharing effect promotes a more uniform junction temperature among different chips, effectively reducing the junction temperature difference between different chips in the entire bridge arm, thereby lowering the maximum junction temperature and ultimately improving the current output capability of the power device.

[0082] Based on the above embodiments, this disclosure also proposes an electronic device including the above power module.

[0083] Figure 4This is a schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure. In the embodiments of the present disclosure, the electronic device 300 may be a smartphone, tablet device, smart wearable device, vehicle, computer, digital broadcasting terminal, messaging device, game console, medical device, fitness equipment, personal digital assistant, etc.

[0084] Reference Figure 4 The electronic device 400 may include one or more of the following components: processing component 402, memory 404, power component 406, multimedia component 408, audio component 410, input / output (I / O) interface 412, sensor component 414, and communication component 416.

[0085] Processing component 402 typically controls the overall operation of electronic device 400, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 402 may include one or more processors 420 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 402 may include one or more modules to facilitate interaction between processing component 402 and other components. For example, processing component 402 may include a multimedia module to facilitate interaction between multimedia component 408 and processing component 402.

[0086] Memory 404 is configured to store various types of data to support the operation of electronic device 400. Examples of such data include instructions for any application or method operating on electronic device 400, contact data, phonebook data, messages, pictures, videos, etc. Memory 404 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0087] Power component 406 may include the power devices described above to provide power to the various components of electronic device 400. Power component 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 400.

[0088] Multimedia component 408 includes a screen that provides an output interface between the electronic device 400 and the user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a Touch Panel, the screen may be implemented as a touchscreen to receive input signals from the user. The Touch Panel includes one or more touch sensors to sense touches, swipes, and gestures on the Touch Panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 408 includes a front-facing camera and / or a rear-facing camera. When the electronic device 400 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0089] Audio component 410 is configured to output and / or input audio signals. For example, audio component 410 includes a microphone (MIC) configured to receive external audio signals when electronic device 400 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 404 or transmitted via communication component 416. In some embodiments, audio component 410 also includes a speaker for outputting audio signals.

[0090] I / O interface 412 provides an interface between processing component 402 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0091] Sensor assembly 414 includes one or more sensors for providing state assessments of various aspects of electronic device 400. For example, sensor assembly 414 may detect the on / off state of electronic device 400, the relative positioning of components such as the display and keypad of electronic device 400, changes in position of electronic device 400 or a component of electronic device 400, the presence or absence of user contact with electronic device 400, orientation or acceleration / deceleration of electronic device 400, and temperature changes of electronic device 400. Sensor assembly 414 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 414 may also include an optical sensor, such as a complementary metal-oxide-semiconductor (CMOS) or charge-coupled device (CCD) image sensor, for use in imaging applications. In some embodiments, sensor assembly 414 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0092] Communication component 416 is configured to facilitate wired or wireless communication between electronic device 400 and other devices. Electronic device 400 can access wireless networks based on communication standards, such as WiFi (Wireless Fidelity), 4G (Fourth Generation), or 5G (Fifth Generation), or combinations thereof. In one exemplary embodiment, communication component 416 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 416 also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be based on Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra-Wideband (UWB), Bluetooth, and other technologies.

[0093] In an exemplary embodiment, the electronic device 400 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0094] Based on the above embodiments, this disclosure also proposes a vehicle including power devices.

[0095] Figure 5 This is a schematic diagram of the structure of a vehicle provided in an embodiment of this disclosure. For example, vehicle 500 can be a hybrid vehicle, a non-hybrid vehicle, an electric vehicle, a fuel cell vehicle, or other types of vehicles. Vehicle 500 can be an autonomous vehicle, a semi-autonomous vehicle, or a non-autonomous vehicle.

[0096] Reference Figure 5 The vehicle 500 may include various subsystems, such as an infotainment system 510, a perception system 520, a decision control system 530, a drive system 540, and a computing platform 550. The vehicle 500 may also include more or fewer subsystems, and each subsystem may include multiple components. Furthermore, each subsystem and each component of the vehicle 500 can be interconnected via wired or wireless means.

[0097] In some embodiments, the infotainment system 510 may include a communication system, an entertainment system, etc.

[0098] The perception system 520 may include several sensors for sensing information about the environment surrounding the vehicle 500. For example, the perception system 520 may include a global positioning system (which may be GPS, BeiDou, or other positioning systems), an inertial measurement unit (IMU), lidar, millimeter-wave radar, ultrasonic radar, and a camera device.

[0099] The decision control system 530 may include a computing system, a vehicle controller, a steering system, a throttle, and a braking system; wherein the vehicle controller and the braking system include at least power devices.

[0100] The drive system 540 may include components that provide powered motion to the vehicle 500. In one embodiment, the drive system 540 may include an engine, an energy source, a transmission system, and wheels. The engine may be one or a combination of internal combustion engines, electric motors, and compressed air engines. The engine is capable of converting energy provided by the energy source into mechanical energy.

[0101] Some or all of the functions of vehicle 500 are controlled by computing platform 550. Computing platform 550 may include at least one processor 551 and memory 552, and processor 551 may execute instructions 553 stored in memory 552.

[0102] Processor 551 can be any conventional processor, such as a central processing unit (CPU). Processor 551 may also include a graphics processing unit (GPU), a field-programmable gate array (FPGA), a system on chip (SOC), an application-specific integrated circuit (ASIC), or a combination thereof.

[0103] The memory 552 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory, electrically erasable programmable read-only memory, erasable programmable read-only memory, programmable read-only memory, read-only memory, magnetic memory, flash memory, magnetic disk or optical disk.

[0104] In addition to instruction 553, memory 552 can also store data, such as road maps, route information, vehicle position, direction, speed, and other data. The data stored in memory 552 can be used by computing platform 550.

[0105] In this embodiment of the disclosure, processor 551 may execute instructions 553 to complete all or part of the steps of the relevant control method embodiment in the vehicle.

[0106] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0107] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0108] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the utility models disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

[0109] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A power device, characterized by, include: Multiple switching chips are connected in parallel, wherein the power sources of the multiple switching chips are respectively connected to a common source node, the gates of the multiple switching chips are respectively connected to corresponding gate drive nodes, and the drains of the multiple switching chips are respectively connected to a common drain node. Among the plurality of switching chips, at least two switching chips have different conductive path lengths, and the threshold voltage of the at least two switching chips is negatively correlated with the conductive path length of the corresponding switching chip; wherein, the conductive path length is the length of the conductive path between the power source and the common source node.

2. The power device of claim 1, wherein, The plurality of switch chips includes at least two first switch chips; The at least two first switch chips are distributed at intervals along a first direction; The common source node is connected to the power source of each of the at least two first switching chips; The threshold voltage of the at least two first switch chips is negatively correlated with the conductive path length of the corresponding first switch chip.

3. The power device of claim 2, wherein, The plurality of switching chips also includes at least one second switching chip; The at least one second switch chip is distributed at intervals along a second direction; wherein, adjacent second switch chips and first switch chips are spaced apart by a set distance; the angle difference between the second direction and the first direction is less than a set angle difference value; The common source node is also connected to the power source of the at least one second switching chip; The threshold voltages of the at least two first switching chips and the threshold voltage of the at least one second switching chip are negatively correlated with the conductive path length of the corresponding switching chip.

4. The power device of claim 3, wherein, The at least two first switch chips include a third switch chip and a fourth switch chip, and the at least one second switch chip includes a fifth switch chip and a sixth switch chip; wherein... The third switch chip and the fifth switch chip are distributed at intervals along a third direction; wherein the first direction and the third direction form a first preset angle. The fourth switch chip and the sixth switch chip are spaced apart along the fourth direction; wherein the second direction and the fourth direction form a second preset angle; The common source node is located at a position away from the fourth switch chip in the third switch chip; The common source node is connected to the power source of the third switch chip, the fourth switch chip, the fifth switch chip, and the sixth switch chip, respectively. The threshold voltages of the third, fourth, fifth, and sixth switch chips decrease sequentially.

5. The power device of claim 4, wherein, Also includes: First conductor connector; wherein, The first end of the first conductor connector is connected to the common source node, and the second end of the first conductor connector is located between the first end of the first conductor connector and the third end of the first conductor connector. The second end of the first conductor connector is connected to the power source of the third switch chip and the power source of the fourth switch chip, respectively. The third end of the first conductor connector is connected to the power source of the fifth switch chip and the power source of the sixth switch chip, respectively. The first conductor connector is located on the side of the third switch chip away from the fourth switch chip and on the side of the fifth switch chip away from the sixth switch chip.

6. The power device of claim 5, wherein, Also includes: Second conductor connector; wherein, The first end of the second conductor connector is connected to the second end of the first conductor connector; The second end of the second conductor connector is connected to the power source of the third switch chip; The third end of the second conductor connector is connected to the power source of the fourth switch chip; The second end of the second conductor connector is located between the first end and the third end of the second conductor connector.

7. The power device of claim 5, wherein, Also includes: Third conductor connector; wherein, The first end of the third conductor connector is connected to the third end of the first conductor connector; The second end of the third conductor connector is connected to the power source of the fifth switch chip; The third end of the third conductor connector is connected to the power source of the sixth switch chip; The second end of the third conductor connector is located between the first end and the third end of the third conductor connector.

8. The power device of claim 2, wherein, The at least two first switch chips include a seventh switch chip, an eighth switch chip, a ninth switch chip, and a tenth switch chip; wherein, The common source node is located in the tenth switch chip at a position away from the ninth switch chip; The common source node is connected to the power source of the seventh switch chip, the eighth switch chip, the ninth switch chip, and the tenth switch chip, respectively. The threshold voltages of the seventh, eighth, ninth, and tenth switch chips increase sequentially.

9. The power device according to claim 8, characterized in that, Also includes: Fourth conductor connector; wherein, The first end of the fourth conductor connector is connected to the power source of the seventh switch chip; The second end of the fourth conductor connector is connected to the power source of the eighth switch chip; The third end of the fourth conductor connector is connected to the power source of the ninth switch chip; The fourth terminal of the fourth conductor connector is connected to the power source of the tenth switch chip; The fifth end of the fourth conductor connector is connected to the common source node; The first end, the second end, the third end, the fourth end, and the fifth end of the fourth conductor connector are distributed sequentially.

10. The power device of claim 1, wherein, The power device further includes: Multiple bonding lines are provided, and the gates of the multiple switching chips are respectively connected to the corresponding gate drive nodes through the multiple bonding lines.

11. An electronic device, comprising: include: The power device as described in any one of claims 1-10.

12. A vehicle characterized by comprising: include: The power device as described in any one of claims 1-10.

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