Synchronous rectification control device and flyback power charging system

Abstract

This utility model relates to a synchronous rectification control device and a flyback power supply charging system, including a drive circuit, a turn-off control circuit and a turn-on control circuit connected to the drive circuit, and an adaptive minimum on-time module connected to the turn-off control circuit and the turn-on control circuit. The adaptive minimum on-time module is used to determine whether the current minimum on-time has ended; if so, it generates and outputs a cut-off signal; if not, it generates and outputs a hold signal. This utility model adjusts the minimum on-time by judging the length of the synchronous rectification turn-off time, thereby ensuring a longer minimum on-time under medium or heavy load conditions, avoiding premature turn-off caused by oscillating voltage. Under light load conditions, it provides a shorter minimum on-time, avoiding excessively high voltage stress spikes caused by untimely turn-off of the secondary-side MOSFET, which could damage the circuit or cause system failure.

Description

Technical Field

[0001] This utility model relates to the field of flyback power supply technology, and in particular to a synchronous rectification control device and a flyback power supply charging system. Background Technology

[0002] Flyback power supply topology, as a common AC-DC power supply solution, is widely used in charging solutions for various electronic products. For example... Figure 1 The diagram shows the circuit structure of a prior art flyback power supply charging system. During system operation, the primary-side field-effect transistor FET1 and the secondary-side field-effect transistor FET2 of the transformer transfer energy by alternating conduction. FET2 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), which has a lower on-state voltage drop compared to the traditional Schottky diode solution, significantly reducing conduction losses and improving efficiency. The flyback power supply system controls the on / off state of FET2 through a synchronous rectification controller chip.

[0003] like Figure 2 As shown, this is under ideal conditions. Figure 1 This diagram illustrates the key waveforms of a flyback system under a specific load condition for synchronous rectification. The synchronous rectification controller primarily turns the secondary-side FET2 on and off by detecting the waveform of its drain voltage VD_SR. Generally, when VD_SR drops (e.g., below -0.7V), the synchronous rectification controller turns on FET2 to allow freewheeling. As VD_SR gradually rises and reaches the turn-off threshold voltage, the synchronous rectification controller turns off FET2. In a typical design, the turn-off threshold voltage is set near 0mV. When VD_SR rises to this threshold voltage, the freewheeling process ends, and therefore the secondary-side FET2 is turned off.

[0004] However, in practical systems, transformers inevitably have leakage inductance, and MOSFETs also have drain-source parasitic capacitance. For example... Figure 3The diagram shows the circuit structure of a flyback power supply charging system including the transformer's equivalent leakage inductance Lk and the MOSFET's equivalent parasitic capacitance Coss. During synchronous rectification, the presence of Lk and Coss causes high-frequency oscillations in the actual VD_SR waveform when the secondary-side MOSFET2 is turned on. Based on the energy storage characteristics of parasitic inductance and capacitance, the oscillation amplitude of VD_SR increases with a heavier load on the flyback system, while decreasing with a lighter load. The voltage amplitude of this high-frequency oscillation waveform decreases continuously with energy loss until it approaches the ideal conduction waveform. A schematic diagram of the VD_SR waveform considering transformer leakage inductance and MOSFET parasitic capacitance is shown below. Figure 4 As shown.

[0005] Because VD_SR exhibits significant oscillations during the early stages of synchronous rectification MOSFET conduction (e.g. Figure 4 As shown in the diagram, if the VD_SR voltage during the oscillation process is higher than the turn-off threshold voltage, then the synchronous rectification will turn off FET2 prematurely, and the body diode of FET2 will continue to conduct current. Since the voltage drop across the body diode (typically around -0.7V) is much greater than the on-state voltage drop of FET2 (typically less than 100mV), the conduction loss increases significantly, and the efficiency decreases. To avoid premature turn-off of FET2, a minimum on-time module is typically introduced into the synchronous rectification controller chip. When the synchronous rectification is on, if the on-time is less than the minimum on-time, the synchronous rectification will remain on even if the VD_SR voltage is higher than the turn-off threshold voltage. Only when the on-time exceeds the minimum on-time is it determined whether the VD_SR voltage is higher than the turn-off threshold voltage, thus deciding whether FET2 will turn off.

[0006] A typical circuit diagram of a synchronous rectifier controller with a minimum on-time module is shown below. Figure 5 As shown. Figure 6 for Figure 5 Corresponding waveform diagram: When the VD_SR voltage changes from high to low (e.g., less than -0.7V), the turn-on judgment module generates a SRON pulse voltage based on the VD_SR voltage waveform. This pulse, driven by the circuit, causes VG_SR to go high, turning on synchronous rectification. Simultaneously, the SRON signal serves as the input signal for the minimum on-time module, and the MinOnTime signal remains low for a preset time. When MinOnTime is low, the turn-off comparator will not operate, and the corresponding SROFF will also remain low.

[0007] When the on-time exceeds the preset time, MinOnTime goes high, and the turn-off comparator CMP1 starts working. When VD_SR is higher than the turn-off threshold voltage, SROFF goes high, and VG_SR is pulled low through the logic AND driver module to turn off the MOSFET.

[0008] The synchronous rectification controller chip ensures that the VD_SR oscillation waveform remains on throughout its duration by setting a minimum on-time, thus preventing premature turn-off.

[0009] like Figure 7 As shown, in order to achieve Figure 5 A common circuit structure for the minimum on-time module function is shown below. When the SRON pulse arrives, switch S turns on, and the voltage Vcap on capacitor C is set to zero. Then, the bias current Ib charges the capacitor, and the Vcap voltage gradually rises. When Vcap rises to the reference voltage Vref, comparator CMP2 will output MinOnTime = 1. Therefore, the minimum on-time of this circuit design is T = Vref × C / Ib. Figure 8 As shown, Figure 7 The internal waveform diagram of the minimum conduction time module.

[0010] In practical system design, due to differences in transformer design and MOSFET specifications, the leakage inductance and parasitic capacitance of the transformer vary. To shield against the influence of oscillation waveforms, a relatively large minimum on-time (MinOnTime) is typically set to prevent premature turn-off. However, this mechanism has a significant drawback and challenge.

[0011] In flyback systems, actual load conditions include light loads (e.g., 0A, 0.1A), medium loads (e.g., 1A, 3A), and heavy loads (4A, 5A or even higher). Under medium and heavy loads, due to the larger current, the synchronous rectification requires a longer freewheeling time, and the voltage oscillation amplitude of VD_SR is also significant. The system needs to be designed with an appropriate MinOnTime to prevent premature MOSFET turn-off. Under light load conditions, due to the smaller current, the synchronous rectification requires a shorter freewheeling time, even shorter than the set MinOnTime. However, during the MinOnTime, the synchronous rectification remains on, and the MOSFET cannot be turned off in time, ultimately leading to very high MOSFET peak voltages, potentially damaging the MOSFET and causing the system to fail. A waveform diagram is shown below. Figure 9 As shown.

[0012] In flyback systems, due to the leakage inductance of the transformer and the parasitic capacitance of the MOSFET, VD_SR exhibits significant voltage oscillations when the synchronous rectification MOSFET is turned on. Typically, synchronous rectification controller chips add a minimum on-time module to ensure the MOSFET remains on during the oscillation period, preventing premature turn-off. However, under light load conditions, the actual required on-time of the MOSFET may be shorter than the minimum on-time. If the MOSFET remains on during this time, it will not turn off in time, ultimately causing large voltage spikes that damage the MOSFET or even cause system failure.

[0013] Therefore, there is an urgent need to design a synchronous rectification control device and flyback power charging system that can automatically generate a matching minimum conduction time based on the load conditions to avoid system damage caused by untimely or premature shutdown. Utility Model Content

[0014] The technical problem to be solved by this utility model is to provide a synchronous rectification control device and a flyback power charging system, which can control the minimum conduction time according to the load conditions, thereby improving the system reliability and stability.

[0015] To solve the above-mentioned technical problems, this utility model provides a synchronous rectification control device, including a drive circuit, a turn-off control circuit and a turn-on control circuit connected to the drive circuit, and an adaptive minimum conduction time module connected to the turn-off control circuit and the turn-on control circuit. The driving circuit receives the shutdown signal output by the shutdown control circuit and generates a shutdown driving signal that can control the shutdown of the secondary-side field-effect transistor of the flyback power charging system; and receives the turn-on signal output by the turn-on control circuit and generates a turn-on driving signal that can control the turn-on of the secondary-side field-effect transistor of the flyback power charging system. The shutdown control circuit, upon receiving the cutoff signal output by the adaptive minimum on-time module, outputs a shutdown signal if the drain voltage of the secondary-side field-effect transistor reaches or exceeds the shutdown threshold voltage; otherwise, it outputs an inverse shutdown signal opposite to the shutdown signal. It also outputs an inverse shutdown signal opposite to the shutdown signal when the cutoff signal is not received or a hold signal is received. Under heavy load conditions, the time for outputting the shutdown signal is relatively short, and the time for outputting the inverse shutdown signal is relatively long. Under light load conditions, the time for outputting the shutdown signal is relatively long, and the time for outputting the inverse shutdown signal is relatively short. The conduction control circuit determines whether the drain voltage of the secondary-side field-effect transistor reaches or exceeds the conduction threshold voltage. If so, it outputs the conduction signal. The adaptive minimum on-time module generates an off-state comparison voltage based on the off signal or the reverse off signal, receives the on-state signal to generate an on-state comparison voltage, and compares the on-state comparison voltage with the lower of the off-state comparison voltage and a preset end reference voltage, or compares the on-state comparison voltage with the preset end reference voltage, to determine whether the current minimum on-time has ended. If so, it generates and outputs a cutoff signal; if not, it generates and outputs a hold signal. Under heavy load conditions, the time for outputting the cutoff signal is relatively short, and the time for outputting the valid signal is relatively long; under light load conditions, the time for outputting the cutoff signal is relatively long, and the time for outputting the valid signal is relatively short.

[0016] Furthermore, the shutdown state comparison voltage generated based on the shutdown signal includes a first shutdown state comparison voltage whose voltage value gradually decreases. The first shutdown state comparison voltage stops decreasing after receiving the anti-shutdown signal or reaching a preset clamping voltage. The conduction state comparison voltage includes a first conduction state comparison voltage with a gradually increasing voltage value. The preset end reference voltage includes a first end reference voltage with a fixed voltage value; The determination of whether the current minimum conduction time has ended includes determining whether the first conduction state comparison voltage has risen to the lower of the first turn-off state comparison voltage and the first end reference voltage. If so, the current minimum conduction time has ended; otherwise, the current minimum conduction time has not ended.

[0017] Furthermore, the adaptive minimum conduction time module includes a first triggering unit, a first off-state comparison voltage generation unit connected to the first triggering unit, a first conduction state comparison voltage generation unit, and a first judgment unit connected to the first off-state comparison voltage generation unit and the first conduction state comparison voltage generation unit. The first trigger unit receives the shutdown signal output by the shutdown control circuit, and then outputs a first trigger signal for triggering the first shutdown state comparison voltage to work. The first shutdown state comparison voltage generation unit generates a first shutdown state comparison voltage with a gradually decreasing voltage value according to the first trigger signal. The first conduction state comparison voltage generation unit generates a first conduction state comparison voltage whose voltage value gradually increases when triggered by the conduction signal. The first judgment unit determines whether the first on-state comparison voltage rises to the lower of the first off-state comparison voltage and the first end reference voltage. If so, it generates and outputs the cutoff signal; if not, it generates and outputs the hold signal.

[0018] Furthermore, the first off-state comparison voltage generation unit includes a first switch S1 connected to the power supply VDD, which is triggered and controlled by the first trigger unit, and a first voltage clamping unit and a second voltage clamping unit connected to the first switch S1. The first voltage clamping unit includes a switching MOSFET M1 with its drain connected to the power supply VDD and a two-phase comparator CMP3 connected to the gate of the switching MOSFET M1; the source of the switching MOSFET M1 is connected to the first switch S1; the non-inverting input of the two-phase comparator CMP3 is connected to the first clamping voltage Vref0, the inverting input is connected to the source of the switching MOSFET M1, and the output is connected to the gate of the switching MOSFET M1. The second voltage clamping unit includes a capacitor C1 connected in parallel with one end of the first switch S1 and the other end grounded, and a current source Ib1. The first conduction state comparison voltage generation unit includes a current source Ib2 connected in series with one end of the power supply VDD and the other end grounded, and a capacitor C2, and a second switch S2 connected in parallel with the capacitor C2 and controlled by the conduction signal. The first judgment unit includes a three-phase comparator CMP4. The non-inverting input terminal of the three-phase comparator CMP4 is connected to the current source Ib2 and the capacitor C2. The first inverting input terminal is connected to the current source Ib1, the capacitor C1 and the source of the switching MOSFET M1. The second inverting input terminal is connected to the first end reference voltage.

[0019] Furthermore, the first triggering unit includes NOT1 and NOT2 connected in series, and AND1 connecting the NOT2 and the turn-off signal.

[0020] Furthermore, the shutdown state comparison voltage generated based on the anti-shutdown signal includes a second shutdown state comparison voltage whose voltage value gradually increases, and the second shutdown state comparison voltage stops increasing after receiving the shutdown signal; The conduction state comparison voltage includes a second conduction state comparison voltage with a gradually increasing voltage value; The preset end reference voltage includes a second end reference voltage with a fixed voltage value; The adaptive minimum conduction time module further includes comparing the second turn-off state comparison voltage with a plurality of preset turn-off reference voltages of different voltage values ​​to locate the corresponding current source; and generating the second conduction state comparison voltage through the current source. The determination of whether the current minimum conduction time has ended includes determining whether the second conduction state comparison voltage has risen to be greater than or equal to the second end reference voltage. If so, the current minimum conduction time has ended; otherwise, the current minimum conduction time has not ended.

[0021] Furthermore, the adaptive minimum conduction time module includes a second triggering unit, a second off-state comparison voltage generation unit connected to the second triggering unit, a comparison positioning unit connected to the second off-state comparison voltage generation unit, a second conduction state comparison voltage generation unit connected to the comparison positioning unit, and a second judgment unit connected to the second conduction state comparison voltage generation unit. The second triggering unit receives the reverse shutdown signal output by the shutdown control circuit and then triggers the second shutdown state comparison voltage generation unit to work. The second off-state comparison voltage generation unit generates a second off-state comparison voltage whose voltage value gradually increases under the triggering of the second triggering unit. The comparison and positioning unit determines which voltage range the second turn-off state comparison voltage is currently in based on multiple voltage ranges formed by multiple preset turn-off reference voltages with different voltage values, and then generates a positioning signal to indicate the current source corresponding to the voltage range. The second conduction state comparison voltage generation unit, triggered by the conduction signal, generates a second conduction state comparison voltage with a gradually increasing voltage value through the current source indicated by the positioning signal. The second judgment unit determines whether the second conduction state comparison voltage is greater than or equal to the second end reference voltage. If yes, it generates and outputs the cutoff signal; if no, it generates and outputs the hold signal.

[0022] Furthermore, the second off-state comparison voltage generation unit includes a current source Ib3 connected in series with one end of the power supply VDD and the other end grounded, and a capacitor C3, and a third switch S3 connected in parallel with the capacitor C3 and controlled by the second triggering unit. The comparison and positioning unit includes multiple positioning comparators and a state latch connected to the positioning comparators; the non-inverting input of the positioning comparator is connected to the current source Ib3 and the capacitor C3, and the inverting input is connected to the turn-off reference voltage; the output of the state latch is connected to the second conduction state comparison voltage generation unit. The second conduction state comparison voltage generation unit includes multiple parallel bias currents with different current values ​​connected to the power supply VDD, multiple parallel current switches connected in series with the bias currents, a capacitor C4 connected in series with the multiple current switches, and a fourth switch S4 connected in parallel with the capacitor C4 and triggered and controlled by the conduction signal. The second judgment unit includes a two-phase comparator CMP8, wherein the non-inverting input terminal of the two-phase comparator CMP8 is connected to the capacitor C4, and the inverting input terminal is connected to the second end reference voltage.

[0023] Furthermore, the positioning comparator comprises three, with its inverting input terminals respectively connected to three different voltage values ​​of turn-off reference voltages; The bias current includes three components, and the current switch includes three components, each controlled by one of the three positioning signals output by the state latch.

[0024] To solve the above-mentioned technical problems, this utility model also provides a flyback power charging system, including: a transformer that receives input voltage and generates output voltage, wherein the primary winding of the transformer is connected to a primary field-effect transistor, and the secondary winding of the transformer is connected to a secondary field-effect transistor and a load module; the secondary field-effect transistor is connected to the aforementioned synchronous rectification control device; The synchronous rectification control device controls the minimum conduction time of the secondary-side field-effect transistor according to the load condition of the load module. If the load module is under medium or heavy load, the minimum conduction time of the secondary-side field-effect transistor is extended accordingly. If the load module is under light load, the minimum conduction time of the secondary-side field-effect transistor is shortened accordingly.

[0025] Compared with existing technologies, this invention has the following advantages: This invention adjusts the minimum on-time by judging the length of the synchronous rectification turn-off time, thereby ensuring a longer minimum on-time under medium or heavy load conditions, avoiding premature turn-off caused by oscillating voltage. Under light load conditions, it has a shorter minimum on-time, avoiding excessively high voltage stress spikes caused by untimely turn-off of the secondary-side MOSFET, which could damage the circuit or cause system failure. Attached Figure Description

[0026] To further reveal the specific technical content of this case, please first refer to the accompanying drawings, in which: Figure 1 This is a circuit diagram of a flyback power supply charging system in the prior art; Figure 2 Under ideal circumstances Figure 1 A schematic diagram of the key waveforms of synchronous rectification in a flyback system under a certain load condition; Figure 3It is a circuit diagram of a prior art flyback power charging system that includes the transformer equivalent leakage inductance and the MOSFET equivalent parasitic capacitance. Figure 4 This is a schematic diagram of the VD_SR waveform considering transformer leakage inductance and MOSFET equivalent parasitic capacitance. Figure 5 This is a typical circuit structure diagram of a synchronous rectifier controller with a minimum conduction time module; Figure 6 yes Figure 5 Corresponding waveform diagram; Figure 7 It is to achieve Figure 5 A common circuit structure diagram for the minimum on-time module function; Figure 8 yes Figure 7 A schematic diagram of the internal waveforms of the minimum conduction time module; Figure 9 This is a schematic diagram showing a voltage spike caused by the synchronous rectification not being turned off in time under light load. Figure 10 This is a circuit diagram of the synchronous rectification control device according to an embodiment of the present invention; Figure 11 This is a circuit block diagram of the first adaptive minimum conduction time module according to an embodiment of the present utility model; Figure 12 This is a graph showing the relationship between the first adaptive minimum conduction time and the duration of the synchronous rectification off state in this utility model embodiment; Figure 13 is a circuit implementation diagram of the first adaptive minimum on-time module according to an embodiment of the present invention. Figure 14 This is a waveform diagram of the first synchronous rectification control device according to an embodiment of the present utility model under heavy load conditions. Figure 15 This is a waveform diagram of the first synchronous rectification control device according to an embodiment of the present utility model under light load conditions. Figure 16 This is a circuit block diagram of the second type of adaptive minimum conduction time module according to an embodiment of the present invention; Figure 17 This is a graph showing the relationship between the second type of adaptive minimum conduction time and the duration of synchronous rectification off state in this utility model embodiment; Figure 18 This is a circuit implementation diagram of a second type of adaptive minimum conduction time module according to an embodiment of this utility model. Detailed Implementation

[0027] The technical solutions in the embodiments of this utility model will now be described with reference to the accompanying drawings.

[0028] Please refer to Figure 10 This is a circuit diagram of the synchronous rectification control device according to an embodiment of the present invention. The synchronous rectification control device of this embodiment includes a drive circuit, a turn-off control circuit and a turn-on control circuit connected to the drive circuit, and an adaptive minimum conduction time module connected to the turn-off control circuit and the turn-on control circuit.

[0029] In this embodiment, the driving circuit receives the shutdown signal output by the shutdown control circuit and generates a shutdown drive signal that can control the shutdown of the secondary-side MOSFET of the flyback power charging system; and receives the turn-on signal output by the turn-on control circuit and generates a turn-on drive signal that can control the turn-on of the secondary-side MOSFET of the flyback power charging system.

[0030] The shutdown control circuit, upon receiving the cutoff signal from the adaptive minimum on-time module, outputs a shutdown signal if the drain voltage of the secondary-side MOSFET reaches or exceeds the shutdown threshold voltage; otherwise, it outputs an inverse shutdown signal opposite to the shutdown signal. It also outputs an inverse shutdown signal opposite to the shutdown signal when no cutoff signal is received or a hold signal is received. Under heavy load conditions, the output time of the shutdown signal is relatively short, and the output time of the inverse shutdown signal is relatively long; under light load conditions, the output time of the shutdown signal is relatively long, and the output time of the inverse shutdown signal is relatively short.

[0031] Specifically, in this embodiment, a high-level SROFF signal is used as the shutdown signal, and a low-level SROFF signal is used as the inverse shutdown signal. Those skilled in the art can also reverse the levels of the shutdown signal and the inverse shutdown signal without affecting the implementation of this invention.

[0032] The conduction control circuit determines whether the drain voltage of the secondary-side MOSFET reaches or exceeds the conduction threshold voltage. If so, it outputs a conduction signal. Specifically, in this embodiment, the conduction signal is a high-level pulse signal SRON. Those skilled in the art can also reverse the level of the conduction signal without affecting the implementation of this invention.

[0033] The adaptive minimum on-time module generates an off-state comparison voltage based on an off signal or an inverse off signal, and generates an on-state comparison voltage upon receiving an on signal. It compares the on-state comparison voltage with the lower of the off-state comparison voltage and a preset end reference voltage, or compares the on-state comparison voltage with the preset end reference voltage, to determine whether the current minimum on-time has ended. If so, it generates and outputs a cutoff signal; otherwise, it generates and outputs a hold signal. Under heavy load conditions, the time for outputting the cutoff signal is relatively short, and the time for outputting the valid signal is relatively long; under light load conditions, the time for outputting the cutoff signal is relatively long, and the time for outputting the valid signal is relatively short.

[0034] Specifically, in this embodiment, a high-level MinOnTime signal is used as a cutoff signal, and a low-level MinOnTime signal is used as a hold signal. Those skilled in the art can also invert the signal levels without affecting the implementation of this invention.

[0035] The synchronous rectification control device of this utility model embodiment is applied to a flyback power supply charging system. It can control the minimum conduction time of the secondary-side field-effect transistor according to the load condition of the load module of the charging system by detecting the duration of the current synchronous rectification off state or conduction state. If the load module is under medium or heavy load, and the detected duration of the current synchronous rectification off state is short or the duration of the conduction state is long, the minimum conduction time of the secondary-side field-effect transistor is extended accordingly. If the load module is under light load, and the detected duration of the current synchronous rectification off state is long or the duration of the conduction state is short, the minimum conduction time of the secondary-side field-effect transistor is shortened accordingly.

[0036] This utility model provides two adaptive conduction control methods. The first method determines the load condition by detecting the duration of the synchronous rectifier being in the off state and adjusts the minimum conduction time accordingly. The second method determines the load condition by segmenting the range in which the duration of the synchronous rectifier being in the off state falls, and adjusts the minimum conduction time accordingly.

[0037] Specifically, in the first adaptive turn-on control method of this utility model embodiment, the adaptive minimum turn-on time module generates a turn-off state comparison voltage based on the turn-off signal, including a first turn-off state comparison voltage whose voltage value gradually decreases. The first turn-off state comparison voltage stops decreasing after receiving an anti-turn-off signal or reaching a preset clamping voltage. The turn-on state comparison voltage generated by the adaptive minimum turn-on time module is a first turn-on state comparison voltage whose voltage value gradually increases.

[0038] The adaptive minimum conduction time module determines whether the first conduction state comparison voltage rises to the lower of the first turn-off state comparison voltage and the preset fixed first end reference voltage. If so, the current minimum conduction time ends, and a cut-off signal is generated and output. Otherwise, the current minimum conduction time has not ended, and a hold signal is generated and output.

[0039] In the second adaptive turn-on control method, the adaptive minimum turn-on time module generates a turn-off state comparison voltage based on the anti-turn-off signal, including a second turn-off state comparison voltage whose voltage value gradually increases. The second turn-off state comparison voltage stops increasing after receiving the turn-off signal.

[0040] The conduction state comparison voltage generated by the adaptive minimum conduction time module is the second conduction state comparison voltage with a gradually increasing voltage value.

[0041] In addition, the adaptive minimum conduction time module also compares the second turn-off state comparison voltage with multiple preset turn-off reference voltages of different voltage values ​​to locate the corresponding current source; and generates the aforementioned second conduction state comparison voltage through the current source.

[0042] The adaptive minimum conduction time module determines whether the second conduction state comparison voltage has risen to a second end reference voltage that is greater than or equal to a preset fixed voltage value. If so, the current minimum conduction time ends, and a cutoff signal is generated and output. Otherwise, the current minimum conduction time has not ended, and a hold signal is generated and output.

[0043] like Figure 11 The diagram shown is a circuit block diagram of the first adaptive minimum on-time module in this embodiment of the present invention. Specifically, the adaptive minimum on-time module includes a first trigger unit, a first off-state comparison voltage generation unit connected to the first trigger unit, a first on-state comparison voltage generation unit, and a first judgment unit connected to the first off-state comparison voltage generation unit and the first on-state comparison voltage generation unit.

[0044] The first trigger unit receives the shutdown signal output by the shutdown control circuit and then outputs a first trigger signal to trigger the first shutdown state comparison voltage to operate.

[0045] The first shutdown state comparison voltage generation unit generates a first shutdown state comparison voltage with a gradually decreasing voltage value according to the first trigger signal.

[0046] The first conduction state comparison voltage generation unit generates a first conduction state comparison voltage whose voltage value gradually increases when triggered by a conduction signal.

[0047] The first judgment unit determines whether the first on-state comparison voltage rises to the lower of the first off-state comparison voltage and the first end reference voltage. If so, it generates and outputs a cutoff signal; otherwise, it generates and outputs a hold signal.

[0048] Under light load conditions, the first shutdown state comparison voltage will drop for a relatively long time, eventually falling below the first termination reference voltage. Under medium or heavy load conditions, the first shutdown state comparison voltage will drop for a shorter time, but will still remain above the first termination reference voltage.

[0049] For example Figure 12 The figure shown is a graph showing the relationship between the first adaptive minimum conduction time and the duration of the synchronous rectification off state in this embodiment of the present invention.

[0050] When the system operates under light load conditions, the synchronous rectifier remains off for a longer period due to the smaller amount of energy to be transmitted, thus reducing the minimum on-time. Conversely, as the system load increases, the synchronous rectifier remains off for a shorter period, resulting in a corresponding increase in the minimum on-time; the two relationships are linear.

[0051] like Figure 13 The diagram shows a circuit implementation of the first adaptive minimum on-time module according to an embodiment of the present invention. Specifically, the first off-state comparison voltage generation unit includes a first switch S1 connected to the power supply VDD, which is triggered and controlled by a first trigger unit, and a first voltage clamping unit and a second voltage clamping unit connected to the first switch S1.

[0052] The first voltage clamping unit includes a switching MOSFET M1 with its drain connected to the power supply VDD and a two-phase comparator CMP3 connected to the gate of the switching MOSFET. The source of the switching MOSFET M1 is connected to a first switch S1. The non-inverting input of the two-phase comparator CMP3 is connected to the first clamping voltage Vref0, the inverting input is connected to the source of the switching MOSFET M1, and the output is connected to the gate of the switching MOSFET M1. The first voltage clamping unit can clamp the first off-state comparison voltage at the first clamping voltage Vref0 after a relatively long period of time.

[0053] The second voltage clamping unit includes a capacitor C1 connected in parallel with one end of the first switch S1 and the other end grounded, and a current source Ib1. The second voltage clamping unit can clamp the voltage at the second clamping voltage formed by the current source Ib1 and the capacitor C1 after the first off-state comparison voltage drops in a short time.

[0054] The first triggering unit includes NOT1 and NOT2 connected in series, and AND1 connecting NOT2 and the signal SROFF. When the signal SROFF is a high-level off signal, AND1 outputs a high-level pulse signal OFF_Pluse, controlling the first switch S1 to turn on, thus enabling the first voltage clamping unit and the second voltage clamping unit to start working.

[0055] The first conduction state comparison voltage generation unit includes a current source Ib2 connected in series with one end of the power supply VDD and the other end grounded, and a capacitor C2, and a second switch S2 connected in parallel with the capacitor C2 and controlled by a conduction signal. When a high-level pulse signal SRON is received, the second switch S2 turns on, causing the first conduction state comparison voltage Vcap1 to gradually increase from zero. Alternatively, in this embodiment, the first conduction state comparison voltage Vcap1 gradually increases from zero; it can also be set to gradually increase from other preset voltage values ​​without affecting the implementation of this invention.

[0056] The first judgment unit includes a three-phase comparator CMP4. The non-inverting input terminal of the three-phase comparator CMP4 is connected to the current source Ib2 and the capacitor C2. The first inverting input terminal is connected to the current source Ib1, the capacitor C1 and the source of the switching MOSFET M1. The second inverting input terminal is connected to the first end reference voltage Vref1.

[0057] Specifically, such as Figure 14-15 The figures shown are waveform diagrams of the first synchronous rectification control device in this embodiment under heavy load and light load conditions.

[0058] Under medium or heavy load conditions, the drain voltage VD_SR of the secondary-side field-effect transistor FET2 is higher than the turn-on threshold voltage for a longer period of time, and correspondingly higher than the turn-off threshold voltage for a shorter period of time. Consequently, the gate voltage VG_SR of FET2 is high for a longer period of time and low for a shorter period of time.

[0059] When VG_SR transitions from low to high, SRON transitions from low to high, outputting a conduction signal. This causes the first conduction state comparison voltage Vcap1 to drop from high to 0, and then gradually rise until it reaches the level of the power supply VDD and stops rising.

[0060] When VG_SR transitions from high to low, SROFF transitions from low to high, outputting a shutdown signal, causing the OFF_Pluse signal to output a high-level pulse. The control voltage Vslop1, which controls the first shutdown state, gradually decreases from the level of the power supply VDD. Once VG_SR transitions from low to high again, it stops decreasing.

[0061] When the first off-state comparison voltage Vslop1 decreases, the first on-state comparison voltage Vcap1 gradually increases. When it rises to a level greater than or equal to the first end reference voltage Vref1, the MinOnTime signal jumps from low to high, indicating the end of the minimum on-time. Since the first on-state comparison voltage Vcap1 takes a relatively long time to rise to the first end reference voltage Vref1, the minimum on-time also increases accordingly. Specifically, under medium or heavy load conditions, the value of the first end reference voltage Vref1 is between the first clamping voltage Vref0 and the second clamping voltage. Furthermore, according to the formula: minimum on-time Tmin = Vref1 × C2 / Ib2, we can derive Vref1 = Tmin × Ib2 / C2. Then, based on the minimum on-time Tmin obtained from multiple tests under actual medium or heavy load conditions (approximately 1µs), the value of the first end reference voltage Vref1 can be obtained.

[0062] Under light load conditions, the drain voltage VD_SR of the secondary-side field-effect transistor FET2 is higher than the turn-on threshold voltage for a shorter period of time, and correspondingly higher than the turn-off threshold voltage for a longer period of time. Consequently, the gate voltage VG_SR of FET2 is high for a shorter period of time and low for a longer period of time.

[0063] The first off-state comparison voltage Vslop1 has a longer drop time and rises much earlier than the first on-state comparison voltage Vcap1, ultimately being clamped at the first clamping voltage Vref0. Since the first clamping voltage Vref0 is lower than the first end reference voltage Vref1, the first on-state comparison voltage Vcap1 will rise above the first clamping voltage Vref0 shortly afterward, resulting in a faster high-level cutoff signal output and a shorter minimum on-time.

[0064] Specifically, under light load conditions, the minimum on-time Tmin = Vslop1 × C2 / Ib2 = Vref0 × C2 / Ib2, from which we can derive Vref0 = Tmin × Ib2 / C2. Based on the minimum on-time Tmin obtained from multiple tests under actual light load conditions (approximately 400 ns), the value of the first clamping voltage Vref0 can be obtained. Furthermore, since the first termination reference voltage Vref1 is higher than the first clamping voltage Vref0 but lower than the second clamping voltage, the value of the second clamping voltage can be obtained accordingly.

[0065] In this embodiment, under heavy load conditions, the output shutdown signal (SROFF is high) duration is relatively short, the output reverse shutdown signal (SROFF is low) duration is relatively long, the output cutoff signal (MinOnTime is high) duration is relatively short, and the output active signal (MinOnTime is low) duration is relatively long. Under light load conditions, the output shutdown signal duration (SROFF is high) is relatively long, the output reverse shutdown signal (SROFF is low) duration is relatively short, the output cutoff signal (MinOnTime is high) duration is relatively long, and the output active signal (MinOnTime is low) duration is relatively short. Figure 16 The diagram shown is a circuit block diagram of the second type of adaptive minimum on-time module according to an embodiment of this utility model.

[0066] The adaptive minimum conduction time module includes a second trigger unit, a second off-state comparison voltage generation unit connected to the second trigger unit, a comparison positioning unit connected to the second off-state comparison voltage generation unit, a second conduction state comparison voltage generation unit connected to the comparison positioning unit, and a second judgment unit connected to the second conduction state comparison voltage generation unit.

[0067] The second trigger unit receives the reverse shutdown signal output by the shutdown control circuit and then triggers the second shutdown state comparison voltage generation unit to work.

[0068] The second shutdown state comparison voltage generation unit generates a second shutdown state comparison voltage with a gradually increasing voltage value under the triggering of the second trigger unit.

[0069] The comparison and positioning unit determines which voltage range the second turn-off state comparison voltage is currently in based on multiple voltage ranges formed by multiple preset turn-off reference voltages with different voltage values, and then generates a positioning signal to indicate the current source corresponding to that voltage range.

[0070] The second conduction state comparison voltage generation unit, triggered by the conduction signal, generates a second conduction state comparison voltage with a gradually increasing voltage value through the current source indicated by the positioning signal.

[0071] The second judgment unit determines whether the second conduction state comparison voltage is greater than or equal to the second end reference voltage. If yes, it generates and outputs a cutoff signal; otherwise, it generates and outputs a hold signal.

[0072] like Figure 17 The figure shows the relationship between the second adaptive minimum conduction time and the duration of the synchronous rectification off state in this embodiment of the present invention.

[0073] Different synchronous rectification off-state duration ranges correspond to different minimum conduction times, ranging from small to large. The longer the synchronous rectification off-state duration, the shorter the minimum conduction time.

[0074] For example Figure 18 The diagram shows a circuit implementation of the second adaptive minimum on-time module according to an embodiment of this utility model. Specifically, the second off-state comparison voltage generation unit includes a current source Ib3 connected in series with one end to the power supply VDD and the other end grounded, and a capacitor C3, and a third switch S3 connected in parallel with the capacitor C3 and controlled by the second triggering unit.

[0075] The second triggering unit is NOT3, which is connected to the SROFF signal. In this embodiment, receiving a high-level SROFF signal indicates a shutdown signal, and the third switch S3 is opened. Receiving a low-level SROFF signal indicates an inverse shutdown signal, and the third switch S3 is opened, controlling the second shutdown state comparison voltage generation unit to operate, generating a second shutdown state comparison voltage Vslop2 whose voltage value gradually increases from zero. In this embodiment, the longer the inverse shutdown signal time or the shorter the shutdown signal time, the shorter the rise time of the second shutdown state comparison voltage Vslop2. Furthermore, while the second shutdown state comparison voltage Vslop2 gradually increases from zero in this embodiment, it can also be set to gradually increase from other preset voltage values ​​without affecting the implementation of this invention.

[0076] The comparison positioning unit includes multiple positioning comparators and a state latch connected to the positioning comparators. The non-inverting input of the positioning comparator is connected to a current source Ib3 and a capacitor C3, and the inverting input is connected to a turn-off reference voltage. The output of the state latch is connected to a second conduction state comparison voltage generation unit. In this embodiment, there are three positioning comparators: CMP5, CMP6, and CMP7. The three positioning comparators CMP5-CMP7 are respectively connected to three different turn-off reference voltages Vr1, Vr2, and Vr3, and determine which turn-off reference voltage the current second turn-off state comparison voltage Vslop2 is greater than, and then output a high-level signal (OUT1-OUT3) accordingly. Based on the received OUT1, OUT2, and OUT3 signals, the state latch determines which voltage range the second turn-off state comparison voltage Vslop2 is currently in, and then generates positioning signals Q1-Q3 to indicate different magnitudes of bias current corresponding to that voltage range.

[0077] The second conduction state comparison voltage generation unit includes multiple parallel bias currents Ib4-Ib6 with different current values ​​connected to the power supply VDD, multiple parallel current switches S5-S7 of the series bias currents Ib4-Ib6, a capacitor C4 connected in series with the multiple current switches, and a fourth switch S4 connected in parallel with the capacitor C4 and triggered and controlled by a conduction signal. The current switches S5-S7 are controlled by positioning signals Q1-Q3 respectively, triggering the corresponding bias currents Ib4-Ib6 to operate.

[0078] Specifically, in this embodiment, when SRON outputs a high-level pulse signal (i.e., a conduction signal), the fourth switch S4 is turned on. If the current position is in the minimum voltage range, the state latch outputs a positioning signal Q3, positioning to the minimum bias current Ib6, causing the current switch S7 to open. Then, the second conduction state comparison voltage Vcap2 is generated by the bias current Ib6 and the capacitor C4. Since the bias current Ib6 has the minimum current value, the second conduction state comparison voltage Vcap2 rises at the slowest rate.

[0079] The second judgment unit includes a two-phase comparator CMP8. The non-inverting input of the two-phase comparator CMP8 is connected to a capacitor C4, and the inverting input is connected to a preset second end reference voltage Vref2. When the second on-state comparison voltage Vcap2 at the capacitor C4 rises to be greater than or equal to the second end reference voltage Vref2, a high-level MinOnTime signal is output, indicating the end of the minimum on-time. Under heavy load conditions, since the inverse turn-off signal time is the longest (the turn-off signal time is the shortest), the rise time of the second turn-off comparison voltage Vslop2 is the shortest, correspondingly positioning it within the minimum voltage range and correspondingly the minimum current source. This results in the slowest rise rate of the second on-state comparison voltage Vcap2, consequently maximizing the output cut-off signal (MinOnTime is a low-level signal), thus adjusting the minimum on-time to the maximum.

[0080] Under light load conditions, since the reverse turn-off signal time is the shortest (the turn-off signal time is the longest), the rise time of the second turn-off state comparison voltage Vslop2 is the longest, which corresponds to the largest voltage range and the largest current source. This makes the rise speed of the second turn-on state comparison voltage Vcap2 the fastest, and correspondingly makes the time of the output cut-off signal (MinOnTime is a low-level signal) the shortest, thus adjusting the minimum turn-on time to the minimum.

[0081] In summary, this embodiment of the invention adjusts the minimum on-time by judging the length of the synchronous rectification turn-off time, thereby ensuring a longer minimum on-time under medium or heavy load conditions, avoiding premature turn-off caused by oscillating voltage. Under light load conditions, it ensures a shorter minimum on-time, preventing excessively high voltage stress spikes caused by untimely turn-off of the secondary-side MOSFET, which could damage the circuit or cause the system to fail.

[0082] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A synchronous rectification control device, characterized by comprising: It includes a drive circuit, a turn-off control circuit and a turn-on control circuit connected to the drive circuit, and an adaptive minimum on-time module connected to the turn-off control circuit and the turn-on control circuit. The driving circuit receives the shutdown signal output by the shutdown control circuit and generates a shutdown driving signal that can control the shutdown of the secondary-side field-effect transistor of the flyback power charging system; and receives the turn-on signal output by the turn-on control circuit and generates a turn-on driving signal that can control the turn-on of the secondary-side field-effect transistor of the flyback power charging system. The shutdown control circuit, upon receiving the cutoff signal output by the adaptive minimum on-time module, detects that the drain voltage of the secondary-side field-effect transistor has reached or exceeded the shutdown threshold voltage, and then outputs a shutdown signal; otherwise, it outputs an inverse shutdown signal opposite to the shutdown signal. Furthermore, when the cutoff signal is not received or a hold signal is received, it continuously outputs an inverse shutdown signal opposite to the shutdown signal. Under heavy load conditions, the output time of the shutdown signal is relatively short, and the output time of the inverse shutdown signal is relatively long; under light load conditions, the output time of the shutdown signal is relatively long, and the output time of the inverse shutdown signal is relatively short. The conduction control circuit outputs the conduction signal when it detects that the drain voltage of the secondary-side field-effect transistor reaches or exceeds the conduction threshold voltage. The adaptive minimum on-time module generates an off-state comparison voltage based on the off signal or the inverse off signal, and generates an on-state comparison voltage upon receiving the on signal. It compares the on-state comparison voltage with the lower of the off-state comparison voltage and a preset end reference voltage, or compares the on-state comparison voltage with the preset end reference voltage, to determine whether the current minimum on-time has ended. If so, it generates and outputs a cutoff signal; otherwise, it generates and outputs a hold signal. Under heavy load conditions, the time for outputting the cutoff signal is relatively short, and the time for outputting the valid signal is relatively long. Under light load conditions, the time for outputting the cutoff signal is relatively long, and the time for outputting the valid signal is relatively short.

2. The synchronous rectification control device of claim 1, wherein, The shutdown state comparison voltage generated based on the shutdown signal includes a first shutdown state comparison voltage whose voltage value gradually decreases. The first shutdown state comparison voltage stops decreasing after receiving the anti-shutdown signal or reaching a preset clamping voltage. The conduction state comparison voltage includes a first conduction state comparison voltage with a gradually increasing voltage value. The preset end reference voltage includes a first end reference voltage with a fixed voltage value; The determination of whether the current minimum conduction time has ended includes determining whether the first conduction state comparison voltage has risen to the lower of the first turn-off state comparison voltage and the first end reference voltage. If so, the current minimum conduction time has ended; otherwise, the current minimum conduction time has not ended.

3. The synchronous rectification control device of claim 2, wherein, The adaptive minimum on-time module includes a first triggering unit, a first off-state comparison voltage generation unit connected to the first triggering unit, a first on-state comparison voltage generation unit, and a first judgment unit connected to the first off-state comparison voltage generation unit and the first on-state comparison voltage generation unit. The first trigger unit receives the shutdown signal output by the shutdown control circuit, and then outputs a first trigger signal for triggering the first shutdown state comparison voltage to work. The first shutdown state comparison voltage generation unit generates a first shutdown state comparison voltage with a gradually decreasing voltage value according to the first trigger signal. The first conduction state comparison voltage generation unit generates a first conduction state comparison voltage whose voltage value gradually increases when triggered by the conduction signal. The first judgment unit determines whether the first on-state comparison voltage rises to the lower of the first off-state comparison voltage and the first end reference voltage. If so, it generates and outputs the cutoff signal; if not, it generates and outputs the hold signal.

4. The synchronous rectification control device of claim 3, wherein, The first off-state comparison voltage generation unit includes a first switch S1 connected to the power supply VDD, which is triggered and controlled by the first trigger unit, and a first voltage clamping unit and a second voltage clamping unit connected to the first switch S1. The first voltage clamping unit includes a switching MOSFET M1 with its drain connected to the power supply VDD and a two-phase comparator CMP3 connected to the gate of the switching MOSFET M1; the source of the switching MOSFET M1 is connected to the first switch S1; the non-inverting input of the two-phase comparator CMP3 is connected to the first clamping voltage Vref0, and the inverting input is connected to the source of the switching MOSFET M1. The second voltage clamping unit includes a capacitor C1 connected in parallel with one end of the first switch S1 and the other end grounded, and a current source Ib1. The first conduction state comparison voltage generation unit includes a current source Ib2 connected in series with one end of the power supply VDD and the other end grounded, and a capacitor C2, and a second switch S2 connected in parallel with the capacitor C2 and controlled by the conduction signal. The first judgment unit includes a three-phase comparator CMP4. The non-inverting input terminal of the three-phase comparator CMP4 is connected to the current source Ib2 and the capacitor C2. The first inverting input terminal is connected to the current source Ib1, the capacitor C1 and the source of the switching MOSFET M1. The second inverting input terminal is connected to the first end reference voltage.

5. The synchronous rectification control apparatus of claim 4, wherein The first triggering unit includes NOT1 and NOT2 connected in series, and AND1 connecting the NOT2 and the turn-off signal.

6. The synchronous rectification control apparatus of claim 1, wherein The shutdown state comparison voltage generated according to the anti-shutdown signal includes a second shutdown state comparison voltage whose voltage value gradually increases, and the second shutdown state comparison voltage stops increasing after receiving the shutdown signal; The conduction state comparison voltage includes a second conduction state comparison voltage with a gradually increasing voltage value; The preset end reference voltage includes a second end reference voltage with a fixed voltage value; The adaptive minimum conduction time module further includes comparing the second turn-off state comparison voltage with a plurality of preset turn-off reference voltages of different voltage values ​​to locate the corresponding current source; and generating the second conduction state comparison voltage through the current source. The determination of whether the current minimum conduction time has ended includes determining whether the second conduction state comparison voltage has risen to be greater than or equal to the second end reference voltage. If so, the current minimum conduction time has ended; otherwise, the current minimum conduction time has not ended.

7. The synchronous rectification control apparatus of claim 6, wherein The adaptive minimum on-time module includes a second triggering unit, a second off-state comparison voltage generation unit connected to the second triggering unit, a comparison positioning unit connected to the second off-state comparison voltage generation unit, a second on-state comparison voltage generation unit connected to the comparison positioning unit, and a second judgment unit connected to the second on-state comparison voltage generation unit. The second triggering unit receives the reverse shutdown signal output by the shutdown control circuit and then triggers the second shutdown state comparison voltage generation unit to work. The second off-state comparison voltage generation unit generates a second off-state comparison voltage whose voltage value gradually increases under the triggering of the second triggering unit. The comparison and positioning unit determines which voltage range the second turn-off state comparison voltage is currently in based on multiple voltage ranges formed by multiple preset turn-off reference voltages with different voltage values, and then generates a positioning signal to indicate the current source corresponding to the voltage range. The second conduction state comparison voltage generation unit, triggered by the conduction signal, generates a second conduction state comparison voltage with a gradually increasing voltage value through the current source indicated by the positioning signal. The second judgment unit determines whether the second conduction state comparison voltage is greater than or equal to the second end reference voltage. If yes, it generates and outputs the cutoff signal; if no, it generates and outputs the hold signal.

8. The synchronous rectification control apparatus of claim 7, wherein The second off-state comparison voltage generation unit includes a current source Ib3 connected in series with one end of the power supply VDD and the other end grounded, and a capacitor C3, and a third switch S3 connected in parallel with the capacitor C3 and controlled by the second triggering unit. The comparison and positioning unit includes multiple positioning comparators and a state latch connected to the positioning comparators; the non-inverting input of the positioning comparator is connected to the current source Ib3 and the capacitor C3, and the inverting input is connected to the turn-off reference voltage; the output of the state latch is connected to the second conduction state comparison voltage generation unit. The second conduction state comparison voltage generation unit includes multiple parallel bias currents with different current values ​​connected to the power supply VDD, multiple parallel current switches connected in series with the bias currents, a capacitor C4 connected in series with the multiple current switches, and a fourth switch S4 connected in parallel with the capacitor C4 and triggered and controlled by the conduction signal. The second judgment unit includes a two-phase comparator CMP8, wherein the non-inverting input terminal of the two-phase comparator CMP8 is connected to the capacitor C4, and the inverting input terminal is connected to the second end reference voltage.

9. The synchronous rectification control apparatus of claim 8, wherein The positioning comparator includes three, and its inverting input terminal is respectively connected to three turn-off reference voltages with different voltage values. The bias current includes three components, and the current switch includes three components, each controlled by one of the three positioning signals output by the state latch.

10. A flyback power supply charging system characterized by, The transformer includes a transformer that receives an input voltage and generates an output voltage, wherein the primary winding of the transformer is connected to a primary field-effect transistor (FET), and the secondary winding of the transformer is connected to a secondary FET and a load module; the secondary FET is connected to a synchronous rectification control device as described in any one of claims 1-9. The synchronous rectification control device, based on the load condition of the load module, detects the duration of the current synchronous rectification off-state or on-state, and accordingly controls the minimum on-time of the secondary-side MOSFET. If the load module is under medium or heavy load, and the detected duration of the current synchronous rectification off-state is short or the detected duration of the on-state is long, the minimum on-time of the secondary-side MOSFET is extended accordingly. Conversely, if the load module is under light load, and the detected duration of the current synchronous rectification off-state is long or the detected duration of the on-state is short, the minimum on-time of the secondary-side MOSFET is shortened accordingly.

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