Electromagnetic compatibility and anti-interference circuits

Abstract

This utility model discloses an electromagnetic compatibility (EMC) and anti-interference circuit, relating to the field of EMC technology. The EMC and anti-interference circuit includes: a network port; a first anti-static module, the input terminal of which is electrically connected to the network port; an isolation transformer, the input terminal of which is electrically connected to the output terminal of the first anti-static module; a second anti-static module, the input terminal of which is electrically connected to the output terminal of the isolation transformer; a network chip, electrically connected to the output terminal of the second anti-static module; and an indicator light EMC protection module, one end of which is electrically connected to the network port, and the other end of which is electrically connected to the indicator light line. The EMC and anti-interference circuit of this utility model embodiment can effectively avoid electrostatic interference, providing protection for power distribution automation terminal products.

Description

Technical Field

[0001] This utility model relates to the field of electromagnetic compatibility technology, and in particular to an electromagnetic compatibility and anti-interference circuit. Background Technology

[0002] For the design of power distribution automation terminal products, electromagnetic compatibility (EMC) and anti-interference design are of paramount importance. The quality of EMC design directly impacts the stability of power products, especially for operating systems like Linux. Poor EMC design makes devices susceptible to external interference, potentially causing data loss or even damaging operating system files and paralyzing the system. Therefore, EMC design should be considered from the outset of power distribution automation product design, allowing the operating system time to complete file system operations, release peripherals, and power off, thus minimizing the damage caused by electromagnetic interference. Utility Model Content

[0003] This invention aims to solve at least one of the technical problems existing in the prior art. To this end, this invention proposes an electromagnetic compatibility and anti-interference circuit that can effectively avoid electrostatic interference and provide protection for power distribution automation terminal products.

[0004] The electromagnetic compatibility and anti-interference circuit according to an embodiment of the present invention includes: Network port; The first antistatic module, wherein the input terminal of the first antistatic module is electrically connected to the network port; An isolation transformer, wherein the input terminal of the isolation transformer is electrically connected to the output terminal of the first antistatic module; The second antistatic module has its input terminal electrically connected to the output terminal of the isolation transformer. The network chip is electrically connected to the output terminal of the second anti-static module; An indicator light electrostatic discharge (ESD) protection module is provided, with one end of the module electrically connected to the network port and the other end electrically connected to the indicator light line.

[0005] According to some embodiments of the present invention, the first antistatic module includes a first TVS diode array and a second TVS diode array. The input terminal of the first TVS diode array is electrically connected to a portion of the pins of the network port. The output terminal of the first TVS diode array is electrically connected to a portion of the pins of the input terminal of the isolation transformer. The input terminal of the second TVS diode array is electrically connected to another portion of the pins of the network port. The output terminal of the second TVS diode array is electrically connected to another portion of the pins of the input terminal of the isolation transformer.

[0006] According to some embodiments of the present invention, the second antistatic module includes a third TVS diode array and a fourth TVS diode array. The input terminal of the third TVS diode array is electrically connected to a portion of the output pins of the isolation transformer, and the output terminal of the third TVS diode array is electrically connected to a portion of the pins of the network chip. The input terminal of the fourth TVS diode array is electrically connected to another portion of the output pins of the isolation transformer, and the output terminal of the fourth TVS diode array is electrically connected to another portion of the pins of the network chip.

[0007] According to some embodiments of this utility model, the indicator light electrostatic protection module includes a digital isolator. The input terminal of the digital isolator is electrically connected to the indicator light line, and the output terminal of the digital isolator is electrically connected to the network port. The input terminal of the digital isolator is also connected to a digital voltage and a digital ground, and the output terminal of the digital isolator is also connected to an analog voltage and an analog ground.

[0008] According to some embodiments of the present invention, the indicator light electrostatic protection module further includes a fifth TVS diode array, which is located between the digital isolator and the network port. The output terminal of the digital isolator is electrically connected to the input terminal of the fifth TVS diode array, and the output terminal of the fifth TVS diode array is electrically connected to the network port.

[0009] According to some embodiments of the present invention, the electromagnetic compatibility and anti-interference circuit further includes a power isolation module, which is used to convert the input voltage into the analog voltage.

[0010] According to some embodiments of this utility model, the electromagnetic compatibility and anti-interference circuit further includes a USB interface electrostatic protection module.

[0011] According to some embodiments of this utility model, the electromagnetic compatibility and anti-interference circuit also includes an SD card electrostatic protection module.

[0012] According to some embodiments of this utility model, the electromagnetic compatibility and anti-interference circuit is disposed on a multilayer circuit board, two of which are ground layers, the two ground layers constitute a shielding capacitor, and the remaining layers of the multilayer circuit board are wiring layers.

[0013] According to some embodiments of this utility model, the network signal lines of the network chip are designed with equal lengths.

[0014] The electromagnetic compatibility and anti-interference circuit according to the embodiments of this utility model has at least the following beneficial effects: By using a first anti-static module, an isolation transformer, and a second anti-static module to provide two-stage electrostatic protection for the network port, electrostatic interference signals can be effectively absorbed, preventing the system from being affected by electrostatic interference and preventing static electricity from entering the system through the network cable. The indicator light electrostatic protection module can provide electrostatic protection for the indicator lights.

[0015] Additional aspects and advantages of this invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0016] The above and / or additional aspects and advantages of this utility model will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a circuit diagram of the electromagnetic compatibility and anti-interference circuit of an embodiment of the present utility model; Figure 2 This is a circuit diagram of the power isolation module according to an embodiment of the present invention; Figure 3 This is a circuit diagram of the USB interface electrostatic protection module according to an embodiment of the present invention; Figure 4 This is a circuit diagram of the SD card electrostatic protection module according to an embodiment of the present invention. Detailed Implementation

[0017] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. The step numbers in the following embodiments are set only for ease of explanation, and there is no limitation on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0018] In the description of this utility model, it should be understood that the directional descriptions, such as up, down, front, back, left, right, etc., indicate the directional or positional relationship based on the directional or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0019] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this utility model are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0020] In this invention, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0021] For the design of power distribution automation terminal products, electromagnetic compatibility (EMC) and anti-interference design are of paramount importance. The quality of EMC design directly impacts the stability of power products, especially for operating systems like Linux. Poor EMC design makes devices susceptible to external interference, potentially causing data loss or even damaging operating system files and paralyzing the system. Therefore, EMC design should be considered from the outset of power distribution automation product design, allowing the operating system time to complete file system operations, release peripherals, and power off, thus minimizing the damage caused by electromagnetic interference.

[0022] Therefore, this utility model embodiment proposes an electromagnetic compatibility and anti-interference circuit. Through a first anti-static module, an isolation transformer, and a second anti-static module, it provides two-stage electrostatic protection for the network port, effectively absorbing electrostatic interference signals, preventing the system from being affected by electrostatic interference, and preventing static electricity from entering the system through the network cable. An indicator light electrostatic protection module can also be used to protect the indicator lights from electrostatic discharge.

[0023] The electromagnetic compatibility and anti-interference circuits of this utility model embodiment are described in detail below with reference to the accompanying drawings.

[0024] like Figure 1As shown, the electromagnetic compatibility and anti-interference circuit according to an embodiment of the present invention includes a network port P1B, a first anti-static module 100, an isolation transformer U1, a second anti-static module 200, a network chip (not shown), and an indicator light electrostatic protection module 300. The input terminal of the first anti-static module 100 is electrically connected to the network port P1B, the output terminal of the first anti-static module 100 is electrically connected to the input terminal of the isolation transformer U1, the output terminal of the isolation transformer U1 is electrically connected to the input terminal of the second anti-static module 200, the output terminal of the second anti-static module 200 is electrically connected to the network chip, one end of the indicator light electrostatic protection module 300 is electrically connected to the network port P1B, and the other end of the indicator light electrostatic protection module 300 is electrically connected to the indicator light line.

[0025] Specifically, since the P1B network port is directly connected to the outside world, it is easily affected by external interference. Problems can easily occur during electrostatic discharge (ESD) and over-the-air (OTL) interference tests, leading to system crashes or restarts. Therefore, the anti-interference design of the P1B network port is particularly important. In this example, the P1B network port is an RJ45 interface, but it could also be other common network interfaces. Figure 1 As shown, eight network signal lines are connected to network port P1B: ETH1_MX1+, ETH1_MX1-, ETH1_MX2+, ETH1_MX2-, ETH1_MX3+, ETH1_MX3-, ETH1_MX4+, and ETH1_MX4-. These are the data input and output channels for the network port, and this connection is for a gigabit network. The first anti-static module 100 forms the first barrier, absorbing most of the electrostatic interference signals. Then, the signal passes to the right end of isolation transformer U1, and after passing through isolation transformer U1, it reaches the left end of isolation transformer U1. At the left end, it connects again to the second anti-static module 200, further reducing any remaining static electricity. After two levels of electrostatic protection, the static electricity reaching the network chip is reduced to a minimum. Actual circuit testing shows that circuits using this method generally do not experience system interference, restarts, or crashes during electrostatic contact and airborne tests, as static electricity will no longer enter the system through the network cable. Regarding the indicator lights... Figure 1 The WAN_LED0 and WLAN_LED1 signals are indicator lights representing the network's operating status. In general designs, no effective anti-static measures are taken. In this application, the indicator light lines are isolated by the indicator light electrostatic protection module 300. After this treatment, the indicator lights WAN_LED0A, WAN_LED1A and WAN_LED0, WAN_LED1 are completely isolated, thereby preventing electrostatic interference to the network chip and achieving a good protective effect.

[0026] Furthermore, such as Figure 1As shown, in some embodiments of this application, the first anti-static module 100 includes a first TVS diode array TVS3 and a second TVS diode array TVS4. The input terminal of the first TVS diode array TVS3 is electrically connected to a portion of the pins of the network port P1B, and the output terminal of the first TVS diode array TVS3 is electrically connected to a portion of the pins of the input terminal of the isolation transformer U1. The input terminal of the second TVS diode array TVS4 is electrically connected to another portion of the pins of the network port P1B, and the output terminal of the second TVS diode array TVS4 is electrically connected to another portion of the pins of the input terminal of the isolation transformer U1. Specifically, the first TVS diode array TVS3 is used to electrostatically isolate the four signals ETH1_MX1+, ETH1_MX1-, ETH1_MX2+, and ETH1_MX2-, and the second TVS diode array TVS4 is used to electrostatically isolate the four signals ETH1_MX3+, ETH1_MX3-, ETH1_MX4+, and ETH1_MX4-. The first TVS diode array TVS3 and the second TVS diode array TVS4 form the first barrier, absorbing most of the electrostatic interference signals. The protection level is ±30kV contact discharge and ±30kV air discharge according to the IEC 61000-4-2 standard.

[0027] Furthermore, such as Figure 1As shown, in some embodiments of this application, the second anti-static module 200 includes a third TVS diode array TVS1 and a fourth TVS diode array TVS2. The input terminal of the third TVS diode array TVS1 is electrically connected to a portion of the output pins of the isolation transformer U1, and the output terminal of the third TVS diode array TVS1 is electrically connected to a portion of the pins of the network chip. The input terminal of the fourth TVS diode array TVS2 is electrically connected to another portion of the output pins of the isolation transformer U1, and the output terminal of the fourth TVS diode array TVS2 is electrically connected to another portion of the pins of the network chip. Specifically, the third TVS diode array TVS1 is used to electrostatically isolate the four signals ETH1_TPXP0, ETH1_TPXN0, ETH1_TPXP1, and ETH1_TPXN1, and the fourth TVS diode array TVS2 is used to electrostatically isolate the four signals ETH1_TPXP2, ETH1_TPXN2, ETH1_TPXP3, and ETH1_TPXN3. The third TVS diode array (TVS1) and the fourth TVS diode array (TVS2) form a second barrier, achieving ESD protection at IEC 61000-4-2 Level 4. This further reduces residual ESD. Through these two levels of ESD protection, the ESD reaching the network chip is minimized. Actual circuit testing shows that circuits using this method generally do not experience system interference, restarts, or crashes during ESD contact and airborne testing, and ESD will no longer enter the system through the network cable.

[0028] Furthermore, such as Figure 1 As shown, in some embodiments of this application, the indicator light electrostatic discharge (ESD) protection module 300 includes a digital isolator U298. The input terminal of the digital isolator U298 is electrically connected to the indicator light lines (WAN_LED0, WLAN_LED1), and the output terminal of the digital isolator U298 is electrically connected to the network port P1B. The input terminal of the digital isolator U298 is also connected to a digital voltage +3.3V and a digital ground GNDA, and the output terminal of the digital isolator U298 is also connected to an analog voltage +5VB and an analog ground GNDB. In this example, the indicator light lines are isolated by power supply isolation. Through the digital isolator U298, the digital voltage +3.3V and the analog voltage +5VB are isolated, and the digital ground GNDA and the analog ground GNDB are isolated. After this treatment, the indicator lights WAN_LED0A, WAN_LED1A and WAN_LED0, WAN_LED1 are completely isolated, thereby preventing ESD interference to the network chip.

[0029] Furthermore, the indicator light electrostatic discharge (ESD) protection module 300 can employ even more effective protection measures. A fifth TVS diode array (TVS42) is installed between the digital isolator U298 and the network port P1B. The output terminal of the digital isolator U298 is electrically connected to the input terminal of the fifth TVS diode array (TVS42), and the output terminal of the fifth TVS diode array (TVS42) is electrically connected to the network port P1B. Through the fifth TVS diode array (TVS42), the impact of ESD on the system is further reduced. Tests conducted on the actual circuit of the indicator light with the ESD protection tube demonstrated that it indeed achieved a very good protective effect.

[0030] Furthermore, in some embodiments of this application, the electromagnetic compatibility and anti-interference circuit further includes a power isolation module, which is used to convert the input voltage into an analog voltage, specifically, such as... Figure 2 As shown, the power isolation module uses the isolation power chip U2 to convert the input voltage +5V to the analog voltage +5VB, thereby providing a stable power supply.

[0031] Furthermore, such as Figure 3 As shown, in some embodiments of this application, the electromagnetic compatibility and anti-interference circuit further includes a USB interface electrostatic protection module. For example... Figure 3 As shown, the USB interface electrostatic discharge (ESD) protection module includes a USB interface U134 and an ESD protection transistor TVS39. The ESD protection transistor TVS39 provides ESD protection for the USB interface U134, preventing the circuit from being affected by ESD interference when connecting external devices through the USB interface U134. The USB interface U134 is generally used as a program download port.

[0032] Furthermore, such as Figure 4 As shown, in some embodiments of this application, the electromagnetic compatibility and anti-interference circuit further includes an SD card electrostatic discharge (ESD) protection module. The SD card ESD protection module includes an SD card U21 and ESD protection tubes U22 and U23. The ESD protection tubes U22 and U23 provide ESD protection for the SD card U21, preventing the SD card U21 from being subjected to ESD interference.

[0033] Furthermore, in some embodiments of this application, the electromagnetic compatibility and anti-interference circuitry is disposed on a multilayer circuit board. Two layers of the multilayer circuit board are ground layers, forming a shielding capacitor, while the remaining layers are wiring layers. For example, assuming the multilayer circuit board is a six-layer board, layers 2 and 5 are used as a complete ground plane, without any other signal lines. This serves as a complete reference plane for impedance design, facilitating the allocation of impedance for the designed traces. Layers 1, 3, 4, and 6 are all good wiring layers. Additionally, since layers 2 and 5 are overlapping ground layers, they act as a large capacitor, effectively shielding and suppressing various electromagnetic interferences, ensuring the motherboard's anti-interference performance. Actual testing shows significant results; circuit boards using this design exhibit significantly improved or enhanced anti-static capabilities. It should be noted that the specific number of layers in the multilayer circuit board can be adjusted according to actual needs, as can the specific two layers used as ground planes.

[0034] Furthermore, in some embodiments of this application, the network signal lines of the network chip employ an equal-length design. This includes equal-length design before and after the network PHY chip. Before the PHY chip, the network signal lines (typically 6 for transmitting and 6 for receiving) must consider the length of the CPU chip's internal pin depth, the wiring length of the core board, and the wiring length of the motherboard. Equal-length design must also be considered after the PHY chip, both before and after the network transformer. By using equal-length wiring, noise, interference, and reflection risks during signal transmission are reduced, maintaining waveform stability and integrity, especially in high-speed interfaces where it effectively prevents signal distortion. The signal lines of the SD card electrostatic protection module can also employ an equal-length design.

[0035] According to the electromagnetic compatibility and anti-interference circuit of this application embodiment, the network port P1B is provided with two-stage electrostatic discharge (ESD) protection through the first anti-static module 100, the isolation transformer U1, and the second anti-static module 200. This effectively absorbs ESD interference signals, prevents the system from being affected by ESD interference, and prevents ESD from entering the system through the network cable. The indicator light ESD protection module 300 combines power isolation and ESD protection measures, eliminating the need for wire cutting to pass ESD tests. The equal-length design of the network chip's signal lines, including the total length of the wiring within the CPU chip, core board, and motherboard, makes the wiring on the motherboard more precise, reducing transmission delay errors between signal lines and providing a high-quality network transmission channel. The USB interface ESD protection module and the SD card ESD protection module provide ESD protection for the USB interface and SD card.

[0036] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present utility model.

Claims

1. An electromagnetic compatibility and anti-jamming circuit, characterized in that, include: Network port; The first antistatic module, wherein the input terminal of the first antistatic module is electrically connected to the network port; An isolation transformer, wherein the input terminal of the isolation transformer is electrically connected to the output terminal of the first antistatic module; The second antistatic module has its input terminal electrically connected to the output terminal of the isolation transformer. The network chip is electrically connected to the output terminal of the second anti-static module; An indicator light electrostatic discharge (ESD) protection module is provided, with one end of the module electrically connected to the network port and the other end electrically connected to the indicator light line.

2. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The first anti-static module includes a first TVS diode array and a second TVS diode array. The input terminal of the first TVS diode array is electrically connected to a portion of the pins of the network port, and the output terminal of the first TVS diode array is electrically connected to a portion of the pins of the input terminal of the isolation transformer. The input terminal of the second TVS diode array is electrically connected to another portion of the pins of the network port, and the output terminal of the second TVS diode array is electrically connected to another portion of the pins of the input terminal of the isolation transformer.

3. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The second anti-static module includes a third TVS diode array and a fourth TVS diode array. The input terminal of the third TVS diode array is electrically connected to a portion of the output pins of the isolation transformer, and the output terminal of the third TVS diode array is electrically connected to a portion of the pins of the network chip. The input terminal of the fourth TVS diode array is electrically connected to another portion of the output pins of the isolation transformer, and the output terminal of the fourth TVS diode array is electrically connected to another portion of the pins of the network chip.

4. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The indicator light electrostatic protection module includes a digital isolator. The input terminal of the digital isolator is electrically connected to the indicator light line, and the output terminal of the digital isolator is electrically connected to the network port. The input terminal of the digital isolator is also connected to a digital voltage and a digital ground, and the output terminal of the digital isolator is also connected to an analog voltage and an analog ground.

5. The electromagnetic compatibility and counter-disturbance circuit according to claim 4, characterized in that, The indicator light electrostatic protection module also includes a fifth TVS diode array, which is located between the digital isolator and the network port. The output terminal of the digital isolator is electrically connected to the input terminal of the fifth TVS diode array, and the output terminal of the fifth TVS diode array is electrically connected to the network port.

6. The electromagnetic compatibility and counter-disturbance circuit according to claim 4, characterized in that, The electromagnetic compatibility and anti-interference circuit also includes a power isolation module, which is used to convert the input voltage into the analog voltage.

7. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The electromagnetic compatibility and anti-interference circuit also includes a USB interface electrostatic protection module.

8. The electromagnetic compatibility and counter-disturbance circuit of claim 1, wherein, The electromagnetic compatibility and anti-interference circuit also includes an SD card electrostatic protection module.

9. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The electromagnetic compatibility and anti-interference circuit is disposed on a multilayer circuit board, two of which are ground layers, and the two ground layers form a shielding capacitor. The remaining layers of the multilayer circuit board are wiring layers.

10. The electromagnetic compatibility and counter-disturbance circuit according to claim 1, characterized in that, The network signal lines of the network chip are designed with equal length.

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