An IoT gateway circuit device for offline storage

Abstract

This utility model discloses an IoT gateway circuit device for offline data storage, including a power module, a main control module, a Bluetooth module, a storage module, and an antenna circuit. By setting up a main control module, Bluetooth module, storage module, and power module, the main control module coordinates the operation of each module. The Bluetooth module is responsible for stably receiving data broadcast by terminal devices. When encountering network outages or network instability, the main control module can quickly respond and instruct the storage module to temporarily store the data. Simultaneously, the power module continuously supplies power to each module to ensure uninterrupted temporary storage. Through the coordinated operation of each module, data loss during network outages and periods of network instability can be effectively avoided, ensuring the integrity of data transmission.

Description

Technical Field

[0001] This utility model relates to the field of gateway circuit technology, and specifically to an Internet of Things gateway circuit device for offline storage. Background Technology

[0002] As a core relay device connecting terminal devices to the Internet, the Internet of Things (IoT) gateway undertakes key functions such as protocol conversion, data relay, and remote control. Ideally, it needs to forward terminal broadcast data in real time to avoid packet loss. However, in practical applications, the problem of data loss due to network interruption or fluctuation has long existed: traditional gateways lack local caching mechanisms, terminal broadcast data cannot be saved during network outages, resulting in the break of historical data links, and there is no automatic retransmission capability after the network is restored. Utility Model Content

[0003] In view of this, the main objective of this utility model is to provide an Internet of Things gateway circuit device for offline storage.

[0004] To achieve the above objectives, the technical solution of this utility model is implemented as follows:

[0005] This utility model embodiment provides an IoT gateway circuit device for offline storage, comprising:

[0006] Power module, main control module, Bluetooth module, storage module and antenna circuit;

[0007] The voltage output terminal of the power module is connected to the power supply pins of the main control module, Bluetooth module and storage module to provide a 3.3V operating voltage.

[0008] The radio frequency terminal of the Bluetooth module is connected to the antenna circuit, and its data output terminal is connected to the main control module through a USB protocol interface.

[0009] The storage module is connected to the main control module via an SDIO interface, and the storage module is a removable TransFlash memory card;

[0010] The main control module is equipped with a 2.4G WiFi radio frequency circuit and an RJ45 Ethernet interface. When the network is normal, it can directly transmit Bluetooth broadcast data received via USB protocol to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface. When a network interruption is detected, it can switch the data path and write the Bluetooth broadcast data received via USB protocol to the storage module. When the network is restored, it can read historical data from the storage module and retransmit it to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface.

[0011] In the above scheme, the power module includes a DC-DC step-down chip, a 56th capacitor, a 58th capacitor, a 53rd capacitor, a 4th inductor, a 47th capacitor, a 61st capacitor, a 65th capacitor, a 29th test point, an 85th resistor, an 87th resistor, a 60th capacitor, a 75th resistor, and a 78th resistor. The GND terminal of the DC-DC step-down chip is directly grounded. The VIN terminal of the DC-DC step-down chip is connected to the power input terminal, the first terminal of the 56th capacitor, the first terminal of the 58th capacitor, and the first terminal of the 75th resistor. The second terminal of the 56th capacitor is connected to the second terminal of the 58th capacitor and then grounded together. The SW terminal of the DC-DC step-down chip is connected to the first terminal of the 4th inductor. The BOOT terminal of the DC-DC step-down chip is connected to the SW terminal through the 53rd capacitor. The 4th inductor... The second terminal is connected to the positive terminal of the 47th capacitor, the first terminal of the 61st capacitor, and the first terminal of the 65th capacitor to form the output voltage pre-stage node. The negative terminal of the 47th capacitor is grounded, and the second terminals of the 61st and 65th capacitors are both grounded. The first terminal of the 61st capacitor serves as the 3.3V output voltage Vout_3.3V node and is connected to the first terminal of the 85th resistor and the first terminal of the 60th capacitor. The second terminal of the 85th resistor is connected to the second terminal of the 60th capacitor, the first terminal of the 87th resistor, and the FB terminal of the DC step-down chip. The second terminal of the 87th resistor is connected to the first terminal of the 78th resistor, and the second terminal of the 75th resistor is connected to the second terminal of the 78th resistor and the EN terminal of the DC step-down chip. After connection, a 3.3V voltage output terminal is formed.

[0012] In the above scheme, the main control module includes a main control chip, and the 3V3 terminal of the main control chip is connected to the 3.3V voltage output terminal.

[0013] In the above scheme, the Bluetooth module includes a Bluetooth chip, a fifth inductor, and an eighteenth capacitor. The VDD terminal of the Bluetooth chip is connected to the first terminal of the eighteenth capacitor, the first terminal of the fifth inductor, and the 3.3V voltage output terminal, respectively. The second terminal of the eighteenth capacitor is grounded. The second terminal of the fifth inductor is connected to the NC terminal of the Bluetooth chip. The D+ terminal of the Bluetooth chip is connected to the USB_DP terminal of the main control chip, and the D- terminal of the Bluetooth chip is connected to the USB_DM terminal of the main control chip.

[0014] In the above scheme, the antenna circuit includes an RF switch chip, a bandpass filter, a first resistor, a third inductor, a seventh inductor, an eighth inductor, a thirteenth capacitor, a fourteenth capacitor, a twenty-eighth capacitor, a twenty-ninth capacitor, a thirtieth capacitor, a thirty-first capacitor, a thirty-second capacitor, a thirty-third capacitor, a connector, and an antenna. The TXRX terminals of the RF switch chip are connected to the first terminals of the fourteenth capacitor and the third inductor, respectively. The second terminal of the third inductor is connected to the first terminal of the thirteenth capacitor and the ANT terminal of the Bluetooth chip, respectively. The second terminals of the thirteenth capacitor and the fourteenth capacitor are both grounded. The VDD terminal of the RF switch chip is connected to the 3.3V voltage output terminal, the first terminal of the twenty-eighth capacitor, and the first terminal of the twenty-ninth capacitor, respectively. The second terminal of the twenty-eighth capacitor and the twenty-ninth capacitor are connected to the second terminal of the twentieth capacitor and the second terminal of the twenty-ninth capacitor, respectively. The second end of the container is connected and grounded together. The ANT terminal of the RF switch chip is connected to the first end of the 30th capacitor and the first end of the 7th inductor. The second end of the 30th capacitor is connected to the GND terminal of the RF switch chip and grounded. The second end of the 7th inductor is connected to the first end of the 31st capacitor and the first end of the bandpass filter. The second end of the 31st capacitor is grounded. The second end of the bandpass filter serves as a signal transmission node and is connected to the first end of the first resistor and the first end of the connector. The second end of the first resistor is connected to the first end of the 32nd capacitor and the first end of the 8th resistor. The second end of the 8th resistor is connected to the first end of the 33rd capacitor and the first end of the antenna. The second ends of the 32nd capacitor, the 33rd capacitor, and the second end of the antenna are connected and grounded.

[0015] In the above scheme, the storage module includes a memory interface, a third bidirectional ESD diode, a thirteenth bidirectional ESD diode, an eighteenth bidirectional ESD diode, a nineteenth bidirectional ESD diode, a fourteenth bidirectional ESD diode, a fifteenth bidirectional ESD diode, a sixteenth bidirectional ESD diode, and a seventeenth bidirectional ESD diode. The memory interface is connected to the TransFlash memory card. The VDD terminal of the memory interface is connected to the 3.3V voltage output terminal OUT1 and the first terminal of the seventeenth bidirectional ESD diode, respectively. The DAT2 terminal of the memory interface is connected to the SD_DATA2 signal. The first terminal of the third bidirectional ESD diode is connected to the CD / DAT3 terminal of the memory interface, which is connected to the SD_DATA3 signal terminal and the first terminal of the thirteenth bidirectional ESD diode. The first terminal of the CMD terminal of the memory interface is connected to the SD_CMD signal terminal and the first terminal of the eighteenth bidirectional ESD diode. The first terminal of the CLK terminal of the memory interface is connected to the SD_CLK signal terminal and the first terminal of the nineteenth bidirectional ESD diode. The first terminal of the DAT0 terminal of the memory interface is connected to the SD_DATA0 signal terminal and the first terminal of the fourteenth bidirectional ESD diode. The first terminal of the DAT1 terminal of the memory interface is connected to the SD_DATA0 signal terminal and the first terminal of the fourteenth bidirectional ESD diode. The ATA1 signal terminal and the first terminal of the fifteenth bidirectional ESD diode are connected. The CD terminal of the memory interface is connected to the SD_CDN signal terminal and the first terminal of the sixteenth bidirectional ESD diode. The second terminals of the third, thirteenth, eighteenth, nineteenth, fourteenth, fifteenth, and sixteenth bidirectional ESD diodes are all grounded. The TF_D2 terminal of the memory interface is connected to the MDI_TN_P terminal of the main control chip. The memory interface is connected to the SD_CD terminal. The TF_D3 terminal of the memory interface is connected to the MDI_RP_P3 / SD_D1 terminal of the main control chip. The TF_CMD terminal of the memory interface is connected to the MDI_RN_P3 / SD_D0 terminal of the main control chip. The TF_D0 terminal of the memory interface is connected to the MDI_RP_P4 / SD_CLK terminal of the main control chip. The TF_D1 terminal of the memory interface is connected to the MDI_RN_P4 / SD_CMD terminal of the main control chip. The TF_DET terminal of the memory interface is connected to the MDI_TP_P4 / SD_D3 terminal of the main control chip.

[0016] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0017] This invention comprises a main control module, a Bluetooth module, a storage module, and a power module. The main control module coordinates the operation of each module, while the Bluetooth module is responsible for stably receiving data broadcast by the terminal device. In the event of a network outage or network instability, the main control module can quickly respond and instruct the storage module to temporarily store the data. Simultaneously, the power module continuously supplies power to each module to ensure uninterrupted temporary storage. Through the coordinated operation of each module, data loss during network outages or periods of network instability can be effectively avoided, thus ensuring the integrity of data transmission. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of the present invention and form part of this invention, illustrate exemplary embodiments of the present invention and, together with their description, serve to explain the present invention and do not constitute an undue limitation thereof. In the drawings:

[0019] Figure 1 This is a schematic diagram of the structure of an IoT gateway circuit device for offline storage as described in an embodiment of the present invention;

[0020] Figure 2 This is a schematic diagram of the power module in an IoT gateway circuit device for offline storage as described in an embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of the main control module in an IoT gateway circuit device for offline storage as described in an embodiment of the present invention;

[0022] Figure 4 This is a schematic diagram of the Bluetooth module in an IoT gateway circuit device for offline storage as described in an embodiment of the present invention;

[0023] Figure 5 This is a schematic diagram of the storage module in an IoT gateway circuit device for offline storage as described in an embodiment of the present invention;

[0024] Figure 6 This is a schematic diagram of the antenna circuit in an IoT gateway circuit device for offline storage as described in an embodiment of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0026] In the accompanying drawings of this embodiment, the same or similar reference numerals correspond to the same or similar components. In the description of this utility model, it should be understood that the terms "first", "second", "third", etc. are only for the convenience of distinguishing and describing the same components, and do not indicate or imply the number of the components referred to. They should not be construed as limitations on this patent. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0027] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, article, or apparatus that includes that element.

[0028] This utility model embodiment provides an IoT gateway circuit device for offline storage, such as... Figure 1-6 As shown, it includes:

[0029] Power module, main control module, Bluetooth module, storage module and antenna circuit;

[0030] The voltage output terminal of the power module is connected to the power supply pins of the main control module, Bluetooth module and storage module to provide a 3.3V operating voltage.

[0031] The radio frequency terminal of the Bluetooth module is connected to the antenna circuit, and its data output terminal is connected to the main control module through a USB protocol interface.

[0032] The storage module is connected to the main control module via an SDIO interface, and the storage module is a removable TransFlash memory card;

[0033] The main control module is equipped with a 2.4G WiFi radio frequency circuit and an RJ45 Ethernet interface. When the network is normal, it can directly transmit Bluetooth broadcast data received via USB protocol to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface. When a network interruption is detected, it can switch the data path and write the Bluetooth broadcast data received via USB protocol to the storage module. When the network is restored, it can read historical data from the storage module and retransmit it to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface.

[0034] like Figure 1 and Figure 2As shown, the power module includes a DC-DC step-down chip U15, a 56th capacitor C56, a 58th capacitor C58, a 53rd capacitor C53, a 4th inductor L4, a 47th capacitor C47, a 61st capacitor C61, a 65th capacitor C65, a 29th test point T29, an 85th resistor R85, an 87th resistor R87, a 60th capacitor C60, a 75th resistor R75, and a 78th resistor R78. The GND terminal of the DC-DC step-down chip U15 is directly grounded. The VIN terminal of the DC-DC step-down chip U15 is connected to the power input terminal V_DCDC_IN, the first terminal of the 56th capacitor C56, the first terminal of the 58th capacitor C58, and the first terminal of the 75th resistor. The second terminal of the 56th capacitor C56 and the second terminal of the 58th capacitor C58 are connected and grounded together. The SW terminal of the DC-DC step-down chip U15 is connected to the first terminal of the 4th inductor L4. The BOOT terminal of the DC-DC step-down chip U15 is connected to the SW terminal through the 53rd capacitor C53. The second terminal of the fourth inductor L4 is connected to the positive terminal of the forty-seventh capacitor C47, the first terminal of the sixty-first capacitor C61, and the first terminal of the sixty-fifth capacitor C65 to form the output voltage pre-stage node. The negative terminal of the forty-seventh capacitor C47 is grounded. The second terminals of the sixty-first capacitor C61 and the sixty-fifth capacitor C65 are both grounded. The first terminal of the sixty-first capacitor C61 serves as the 3.3V output voltage Vout_3.3V node, and is connected to the first terminal of the eighty-fifth resistor R85 and the first terminal of the sixtieth capacitor C60. The second terminal of the eighty-fifth resistor R85 is connected to the second terminal of the sixtieth capacitor C60, the first terminal of the eighty-seventh resistor R87, and the FB terminal of the DC step-down chip U15. The second terminal of the eighty-seventh resistor R87 is connected to the first terminal of the seventy-eighth resistor R78. The second terminal of the seventy-fifth resistor R75 is connected to the second terminal of the seventy-eighth resistor R78 and the EN terminal of the DC step-down chip U15. After connection, a 3.3V voltage output terminal OUT1 is formed.

[0035] like Figures 1-3 As shown, the main control module includes a main control chip U8, and the 3V3 terminal of the main control chip U8 is connected to the 3.3V voltage output terminal OUT1.

[0036] like Figures 1-4As shown, the Bluetooth module includes a Bluetooth chip U1, a fifth inductor L5, and an eighteenth capacitor C18. The VDD terminal of the Bluetooth chip U1 is connected to the first terminal of the eighteenth capacitor, the first terminal of the fifth inductor, and the 3.3V voltage output terminal OUT1, respectively. The second terminal of the eighteenth capacitor is grounded. The second terminal of the fifth inductor is connected to the NC terminal of the Bluetooth chip. The D+ terminal of the Bluetooth chip U1 is connected to the USB_DP terminal of the main control chip U8, and the D- terminal of the Bluetooth chip U1 is connected to the USB_DM terminal of the main control chip U8.

[0037] like Figure 4 and Figure 6 As shown, the antenna circuit includes an RF switch chip U2, a bandpass filter, a first resistor R1, a third inductor L3, a seventh inductor L7, an eighth inductor L8, a thirteenth capacitor C13, a fourteenth capacitor C14, a twenty-eighth capacitor C28, a twenty-ninth capacitor C29, a thirtieth capacitor C30, a thirty-first capacitor C31, a thirty-second capacitor C32, a thirty-third capacitor C33, a connector AJ1, and an antenna ANT. The TXRX terminals of the RF switch chip U2 are connected to the first terminal of the fourteenth capacitor C14 and the first terminal of the third inductor L3, respectively. The second terminal of the third inductor L3 is connected to the first terminal of the thirteenth capacitor C13 and the ANT terminal of the Bluetooth chip U1, respectively. The second terminals of the thirteenth capacitor C13 and the fourteenth capacitor C14 are both grounded. The VDD terminal of the RF switch chip U2 is connected to the 3.3V voltage output terminal OUT1, the first terminal of the twenty-eighth capacitor C28, and the first terminal of the twenty-ninth capacitor C29, respectively. The second terminal of the twenty-eighth capacitor C28... The second terminal of the 29th capacitor C29 is connected to ground. The ANT terminal of the RF switch chip U2 is connected to the first terminal of the 30th capacitor C30 and the first terminal of the 7th inductor L7. The second terminal of the 30th capacitor C30 is connected to the GND terminal of the RF switch chip U2 and then grounded. The second terminal of the 7th inductor L7 is connected to the first terminal of the 31st capacitor C31 and the first terminal of the bandpass filter SFLT1. The second terminal of the 31st capacitor C31 is grounded. The second terminal of the bandpass filter SFLT1 serves as a signal transmission node and is connected to the first terminal of the first resistor R1 and the first terminal of the connector AJ1. The second terminal of the first resistor R1 is connected to the first terminal of the 32nd capacitor C32 and the first terminal of the 8th inductor L8. The second terminal of the 8th inductor L8 is connected to the first terminal of the 33rd capacitor C33 and the first terminal of the antenna ANT. The second terminals of the 32nd capacitor C32, the 33rd capacitor C33, and the second terminal of the antenna ANT are connected and then grounded.

[0038] like Figures 1-5As shown, the storage module includes a memory interface J1, a third bidirectional ESD diode D3, a thirteenth bidirectional ESD diode D13, an eighteenth bidirectional ESD diode D18, a nineteenth bidirectional ESD diode D19, a fourteenth bidirectional ESD diode D14, a fifteenth bidirectional ESD diode D15, a sixteenth bidirectional ESD diode D16, and a seventeenth bidirectional ESD diode D17. The memory interface J1 is connected to the TransFlash memory card. The VDD terminal of the memory interface J1 is connected to the 3.3V voltage output terminal OUT1 and the first terminal of the seventeenth bidirectional ESD diode. The DAT2 terminal of the memory interface J1 is connected to the SD_DATA2 signal terminal and the first terminal of the third bidirectional ESD diode D3. The CD / DAT3 terminal of the memory interface J1 is connected to the SD_DATA3 signal terminal and the first terminal of the thirteenth bidirectional ESD diode D13. The CMD terminal of the memory interface J1 is connected to the SD_CMD signal terminal and the first terminal of the eighteenth bidirectional ESD diode D18. The CLK terminal of the memory interface J1 is connected to the SD_ The CLK signal terminal and the first terminal of the nineteenth bidirectional ESD diode D19 are connected. The DAT0 terminal of the memory interface J1 is connected to the SD_DATA0 signal terminal and the first terminal of the fourteenth bidirectional ESD diode D14. The DAT1 terminal of the memory interface J1 is connected to the SD_DATA1 signal terminal and the first terminal of the fifteenth bidirectional ESD diode D15. The CD terminal of the memory interface J1 is connected to the SD_CDN signal terminal and the first terminal of the sixteenth bidirectional ESD diode D16. The second terminal of the third bidirectional ESD diode D3 is connected to the SD_DATA0 signal terminal and the first terminal of the fourteenth bidirectional ESD diode D14. The second terminals of the thirteenth bidirectional ESD diode D13, the eighteenth bidirectional ESD diode D18, the nineteenth bidirectional ESD diode D19, the fourteenth bidirectional ESD diode D14, the fifteenth bidirectional ESD diode D15, and the sixteenth bidirectional ESD diode D16 are all grounded. The TF_D2 terminal of the memory interface J1 is connected to the MDI_TN_P3 / SD_CD terminal of the main control chip U8, and the TF_D3 terminal of the memory interface J1 is connected to the MDI_TN_P3 / SD_CD terminal of the main control chip U8. The memory interface J1 is connected to the I_RP_P3 / SD_D1 terminal, the memory interface J1 is connected to the MDI_RN_P3 / SD_D0 terminal of the main control chip U8, the memory interface J1 is connected to the MDI_RP_P4 / SD_CLK terminal of the main control chip U8, the memory interface J1 is connected to the MDI_RN_P4 / SD_CMD terminal of the main control chip U8, and the memory interface J1 is connected to the MDI_TP_P4 / SD_D3 terminal of the main control chip U8.

[0039] The working principle of this utility model is as follows:

[0040] like Figure 1-6 As shown, when the IoT gateway circuit device is working, the DC step-down chip U15 in the power module and the peripheral capacitors C56, C58, C53, L4, C47, C61, C65, R85, R87, C60, R75, and R78 form a circuit that converts the input voltage V_DCDC_IN into a stable 3.3V voltage, which is then transmitted through the OUT1 terminal to the 3V3 terminal of the main control chip U8, the VDD terminal of the Bluetooth chip U1, and the memory interface J1 to power each module. In the Bluetooth module, the Bluetooth chip U1 receives broadcast data from the terminal device through the antenna circuit. The RF switch chip U2 of the antenna circuit, together with the first resistor R1, the third inductor L3, the seventh inductor L7, the eighth inductor L8, the thirteenth capacitor C13, the fourteenth capacitor C14, the twenty-eighth capacitor C28, the twenty-ninth capacitor C29, the thirtieth capacitor C30, the thirty-first capacitor C31, the thirty-second capacitor C32, and the thirty-third capacitor C33, filters and suppresses interference to ensure signal stability. After the received data is processed by the Bluetooth chip U1, it is transmitted via USB protocol through the D+ and D- terminals to the USB_DP and USB_DM terminals of the main control chip U8. The VDD terminal of the Bluetooth chip U1 is also connected to the eighteenth capacitor C18 and the fifth inductor L5. The main control chip U8 serves as the core of the main control module. When the network is normal, it transmits the received Bluetooth data to the cloud server via the 2.4G WiFi RF circuit or the RJ45 Ethernet interface. When a network interruption is detected, it immediately switches the data path and writes the data to the TransFlash memory card of the storage module through the SDIO interface (the TF_D2, TF_D3 terminals of the memory interface J1 are connected to the corresponding pins of the main control chip). The third bidirectional ESD diode D3 and the thirteenth bidirectional ESD diode D13 of the storage module transmit protection signals. After the network is restored, the main control chip U8 reads the historical data from the memory card and re-transmits it to the cloud via the network, so that data is not lost when the network is interrupted.

[0041] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the scope of protection of the present utility model.

Claims

1. An Internet of Things gateway circuit arrangement for off-network storage, characterized by, include: Power module, main control module, Bluetooth module, storage module and antenna circuit; The voltage output terminal of the power module is connected to the power supply pins of the main control module, Bluetooth module and storage module to provide a 3.3V operating voltage. The radio frequency terminal of the Bluetooth module is connected to the antenna circuit, and its data output terminal is connected to the main control module through a USB protocol interface. The storage module is connected to the main control module via an SD IO interface, and the storage module is a removable TransFlash memory card; The main control module is equipped with a 2.4G WiFi radio frequency circuit and an RJ45 Ethernet interface. When the network is normal, it can directly transmit Bluetooth broadcast data received via USB protocol to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface. When a network interruption is detected, it can switch the data path and write the Bluetooth broadcast data received via USB protocol to the storage module. When the network is restored, it can read historical data from the storage module and retransmit it to the cloud server via the 2.4G WiFi or RJ45 Ethernet interface.

2. The IoT gateway circuit arrangement for off-network storage of claim 1, wherein, The power module includes a DC-DC step-down chip, a 56th capacitor, a 58th capacitor, a 53rd capacitor, a 4th inductor, a 47th capacitor, a 61st capacitor, a 65th capacitor, a 29th test point, an 85th resistor, an 87th resistor, a 60th capacitor, a 75th resistor, and a 78th resistor. The GND terminal of the DC-DC step-down chip is directly grounded. The VIN terminal of the DC-DC step-down chip is connected to the power input terminal, the first terminal of the 56th capacitor, the first terminal of the 58th capacitor, and the first terminal of the 75th resistor. The second terminal of the 56th capacitor and the second terminal of the 58th capacitor are connected and grounded together. The SW terminal of the DC-DC step-down chip is connected to the first terminal of the 4th inductor. The BOOT terminal of the DC-DC step-down chip is connected to the SW terminal through the 53rd capacitor. The second terminal of the 4th inductor... The terminals are connected to the positive terminal of the 47th capacitor, the first terminal of the 61st capacitor, and the first terminal of the 65th capacitor to form the output voltage pre-stage node. The negative terminal of the 47th capacitor is grounded, and the second terminals of the 61st and 65th capacitors are both grounded. The first terminal of the 61st capacitor serves as the 3.3V output voltage Vout_3.3V node and is connected to the first terminal of the 85th resistor and the first terminal of the 60th capacitor. The second terminal of the 85th resistor is connected to the second terminal of the 60th capacitor, the first terminal of the 87th resistor, and the FB terminal of the DC step-down chip. The second terminal of the 87th resistor is connected to the first terminal of the 78th resistor, and the second terminal of the 75th resistor is connected to the second terminal of the 78th resistor and the EN terminal of the DC step-down chip. After connection, a 3.3V voltage output terminal is formed.

3. The IoT gateway circuit arrangement for off-network storage of claim 2, wherein, The main control module includes a main control chip, and the 3V3 terminal of the main control chip is connected to the 3.3V voltage output terminal.

4. The IoT gateway circuit device for offline storage according to claim 3, characterized in that, The Bluetooth module includes a Bluetooth chip, a fifth inductor, and an eighteenth capacitor. The VDD terminal of the Bluetooth chip is connected to the first terminal of the eighteenth capacitor, the first terminal of the fifth inductor, and the 3.3V voltage output terminal, respectively. The second terminal of the eighteenth capacitor is grounded. The second terminal of the fifth inductor is connected to the NC terminal of the Bluetooth chip. The D+ terminal of the Bluetooth chip is connected to the USB_DP terminal of the main control chip, and the D- terminal of the Bluetooth chip is connected to the USB_DM terminal of the main control chip.

5. The IoT gateway circuit device for offline storage according to claim 4, characterized in that, The antenna circuit includes an RF switch chip, a bandpass filter, a first resistor, a third inductor, a seventh inductor, an eighth inductor, a thirteenth capacitor, a fourteenth capacitor, a twenty-eighth capacitor, a twenty-ninth capacitor, a thirtieth capacitor, a thirty-first capacitor, a thirty-second capacitor, a thirty-third capacitor, a connector, and an antenna. The TXRX terminals of the RF switch chip are connected to the first terminals of the fourteenth capacitor and the third inductor, respectively. The second terminal of the third inductor is connected to the first terminal of the thirteenth capacitor and the ANT terminal of the Bluetooth chip, respectively. The second terminals of the thirteenth and fourteenth capacitors are both grounded. The VDD terminal of the RF switch chip is connected to the 3.3V voltage output terminal, the first terminal of the twenty-eighth capacitor, and the first terminal of the twenty-ninth capacitor, respectively. The second terminals of the twenty-eighth and twenty-ninth capacitors are connected to... After the second terminal is connected, they are all grounded. The ANT terminal of the RF switch chip is connected to the first terminal of the 30th capacitor and the first terminal of the 7th inductor. The second terminal of the 30th capacitor is connected to the GND terminal of the RF switch chip and then grounded. The second terminal of the 7th inductor is connected to the first terminal of the 31st capacitor and the first terminal of the bandpass filter. The second terminal of the 31st capacitor is grounded. The second terminal of the bandpass filter serves as a signal transmission node and is connected to the first terminal of the first resistor and the first terminal of the connector. The second terminal of the first resistor is connected to the first terminal of the 32nd capacitor and the first terminal of the 8th resistor. The second terminal of the 8th resistor is connected to the first terminal of the 33rd capacitor and the first terminal of the antenna. The second terminals of the 32nd capacitor, the 33rd capacitor, and the second terminal of the antenna are connected and then grounded.

6. The IoT gateway circuit device for offline storage according to claim 5, characterized in that, The storage module includes a memory interface, a third bidirectional ESD diode, a thirteenth bidirectional ESD diode, an eighteenth bidirectional ESD diode, a nineteenth bidirectional ESD diode, a fourteenth bidirectional ESD diode, a fifteenth bidirectional ESD diode, a sixteenth bidirectional ESD diode, and a seventeenth bidirectional ESD diode. The memory interface is connected to a TransFlash memory card. The VDD terminal of the memory interface is connected to the 3.3V voltage output terminal OUT1 and the first terminal of the seventeenth bidirectional ESD diode. The DAT2 terminal of the memory interface is connected to the SD_DATA2 signal terminal and the first terminal of the third bidirectional ESD diode. The CD / DAT3 terminal of the memory interface is connected to the SD_DATA3 signal terminal and the first terminal of the thirteenth bidirectional ESD diode. The CMD terminal of the memory interface is connected to the SD_CMD signal terminal and the first terminal of the eighteenth bidirectional ESD diode. The CLK terminal of the memory interface is connected to the SD_CLK signal terminal and the first terminal of the nineteenth bidirectional ESD diode. The DAT0 terminal of the memory interface is connected to the SD_DATA0 signal terminal and the first terminal of the fourteenth bidirectional ESD diode. The DAT1 terminal of the memory interface is connected to the SD_DATA2 signal terminal. The first terminal of the 15th bidirectional ESD diode is connected to the signal terminal. The CD terminal of the memory interface is connected to the SD_CDN signal terminal and the first terminal of the 16th bidirectional ESD diode. The second terminals of the third, thirteenth, eighteenth, nineteenth, fourteenth, fifteenth, and sixteenth bidirectional ESD diodes are all grounded. The TF_D2 terminal of the memory interface is connected to the MDI_TN_P3 terminal of the main control chip. The memory interface is connected to the SD_CD terminal, the TF_D3 terminal of the memory interface is connected to the MDI_RP_P3 / SD_D1 terminal of the main control chip, the TF_CMD terminal of the memory interface is connected to the MDI_RN_P3 / SD_D0 terminal of the main control chip, the TF_D0 terminal of the memory interface is connected to the MDI_RP_P4 / SD_CLK terminal of the main control chip, the TF_D1 terminal of the memory interface is connected to the MDI_RN_P4 / SD_CMD terminal of the main control chip, and the TF_DET terminal of the memory interface is connected to the MDI_TP_P4 / SD_D3 terminal of the main control chip.

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