A four-channel RGB chip with continuous interruption and resume capability
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-09
- Publication Date
- 2026-08-14
AI Technical Summary
[0003]但原先芯片内设计的电路是依靠多个延时电路进行内部数据的码位时序控制,该方式很依赖内部时钟的准确性和稳定性,由于时钟电路在不同环境下也会产生不同程度的温漂现象,导致时钟频率发生变化,影响延时电路的时序控制;
[0019]通过使用数字逻辑电路进行功能实现和设计,多个分频器的使用能保证使其组成的系统处于统一时序下进行,相比原有延时电路设计,使用数字逻辑电路能显著提高工作时的稳定性和温度特性;并且数字逻辑电路中的分频器和比较器通过高度集成能够有效减少芯片面积,进一步减少芯片生产成本;
Smart Images

Figure CN224638225U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of LED RGB light strip chip technology, specifically to a four-channel RGB chip with continuous interruption and resume transmission. Background Technology
[0002] Currently, RGB chips have been widely used in stage lighting, decorative lighting and other scenarios. Existing RGB chips have the function of continuous breakpoint resume transmission, such as the previously applied adjustable current RGB chip with continuous breakpoint resume transmission, CN221509823U.
[0003] However, the original circuit design within the chip relied on multiple delay circuits to control the timing of the internal data. This method is highly dependent on the accuracy and stability of the internal clock. Since the clock circuit can also experience varying degrees of temperature drift under different environments, the clock frequency changes, affecting the timing control of the delay circuit.
[0004] Meanwhile, the current three-channel output with only RGB primary colors is gradually becoming unsuitable for new scenarios, especially in some high-brightness scenarios that require white light effects. However, when traditional RGB generates white light through color mixing, color deviation is prone to occur.
[0005] Therefore, there is an urgent need for a new solution that combines continuous breakpoint resume with the addition of one to four channels. Utility Model Content
[0006] In view of the deficiencies in the existing technology, the purpose of this utility model is to provide a four-channel holographic chip with continuous interruption resume capability, which aims to solve one of the technical problems in the related technology to at least a certain extent.
[0007] This utility model provides a four-channel RGB chip for continuous interruption and resume transmission, including an input port, a return-to-zero code protocol circuit and an output port, and also includes a digital logic processing circuit connected between the input port and the return-to-zero code protocol circuit, and a four-channel PWM drive circuit connected between the return-to-zero code protocol circuit and the output port; wherein, the return-to-zero code protocol circuit includes a serial interface for the return-to-zero code protocol.
[0008] The input terminal of the digital logic processing circuit is connected to the input port, and the output terminal of the digital logic processing circuit is connected to the return-to-zero code protocol circuit through the serial interface. The return-to-zero code protocol circuit is also connected to the output port through the four-channel PWM drive circuit.
[0009] Furthermore, the output port includes a first output port and a second output port;
[0010] The first output port includes at least the DOUT port;
[0011] The second output port includes at least an OUTR port, an OUTG port, an OUTB port, and an OUTW port. The OUTR port, OUTG port, OUTB port, and OUTW port are respectively connected to the four-channel PWM drive circuit and are also connected to external LED beads of different colors.
[0012] Furthermore, the input ports include at least a DIN port, a DIN1 port, and a DIN2 port, and are respectively connected to the digital logic processing circuit.
[0013] Furthermore, the digital logic processing circuit includes a judgment circuit U1, a judgment circuit U2, and two 32-bit frequency dividers;
[0014] The DIN2 port is connected to one end of one of the 32-bit frequency dividers, the other end of one of the 32-bit frequency dividers is connected to one input of the judgment circuit U1, the other input of the judgment circuit U1 is connected to the DIN1 port, the output of the judgment circuit U1 is connected to one input of the judgment circuit U2 after being connected to another 32-bit frequency divider, the other input of the judgment circuit U2 is connected to the DIN port, and the output of the judgment circuit U1 is connected to the serial interface of the return-to-zero code protocol.
[0015] Furthermore, both the judgment circuit U1 and the judgment circuit U2 employ comparator circuits.
[0016] Furthermore, the zero-return code protocol circuit also includes a 32-bit counter, an adder, an RGBW display memory, and a command decoder. The adder is connected to the counter, the RGBW display memory, and the command decoder respectively. The RGBW display memory is connected to the four-channel PWM drive circuit. The command decoder is also connected to the first output port through an output shaping circuit.
[0017] Furthermore, the four-channel holographic chip is also equipped with a reserved circuit and a PAD bonding window. By using the reserved circuit and the PAD bonding window and changing the bonding and packaging methods, finished products suitable for different scenarios can be produced.
[0018] The four-channel holographic chip with continuous breakpoint resume provided by this utility model has the following beneficial effects:
[0019] By using digital logic circuits for functional implementation and design, the use of multiple frequency dividers can ensure that the system composed of them operates under a unified timing sequence. Compared with the original delay circuit design, the use of digital logic circuits can significantly improve the stability and temperature characteristics during operation. Furthermore, the frequency dividers and comparators in digital logic circuits can effectively reduce chip area through high integration, further reducing chip production costs.
[0020] Meanwhile, through a four-channel PWM drive circuit, four channels are used to control different colored lights, creating a rich variety of color combinations. Each channel can independently adjust its brightness, color, and color change mode, making it easy to personalize the lighting settings and adapt to new scenarios. This achieves the integration of a new continuous breakpoint resume transmission scheme with four channels, while also avoiding the color shift problem that is prone to occur in traditional methods. Attached Figure Description
[0021] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.
[0022] Figure 1 The schematic diagram of a four-channel holographic chip with continuous breakpoint resume provided in an embodiment of the present invention is shown.
[0023] Figure 2 This diagram illustrates the structure of a four-channel holographic chip with continuous interruption resume capability provided in an embodiment of the present invention.
[0024] Figure 3 A schematic diagram of a three-wire transmission structure provided by an embodiment of the present invention is shown. Detailed Implementation
[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.
[0026] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0027] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the invention. Furthermore, it should be understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items, and all possible combinations thereof.
[0028] It should be noted that this solution is based on a continuously interrupted transmission adjustable current color chip [Patent No.: ZL2024 2 0081022.4], with more specific optimization of the circuit. It also has the functions of continuously interrupted transmission and adjustable current. The implementation method is the same as the aforementioned application, and will not be repeated here; this embodiment only describes the improved part in detail.
[0029] Unless otherwise stated, the technical or scientific terms used in this application shall have the ordinary meaning as understood by one of ordinary skill in the art to which this utility model pertains.
[0030] like Figures 1 to 2 As shown in the figure, the four-channel RGB chip with continuous breakpoint resume provided by this utility model includes an input port, a return-to-zero code protocol circuit and an output port, and also includes a digital logic processing circuit connected between the input port and the return-to-zero code protocol circuit, and a four-channel PWM drive circuit connected between the return-to-zero code protocol circuit and the output port; wherein, the return-to-zero code protocol circuit includes a serial interface for the return-to-zero code protocol.
[0031] The input terminal of the digital logic processing circuit is connected to the input port, and the output terminal of the digital logic processing circuit is connected to the return-to-zero code protocol circuit through the serial interface. The return-to-zero code protocol circuit is also connected to the output port through the four-channel PWM drive circuit.
[0032] In this embodiment, the output port includes a first output port and a second output port;
[0033] The first output port includes at least the DOUT port;
[0034] The second output port includes at least an OUTR port, an OUTG port, an OUTB port, and an OUTW port. The OUTR port, OUTG port, OUTB port, and OUTW port are respectively connected to the four-channel PWM drive circuit and are also connected to external LED beads of different colors.
[0035] The input ports include at least a DIN port, a DIN1 port, and a DIN2 port, and are respectively connected to the digital logic processing circuit;
[0036] The digital logic processing circuit includes a judgment circuit U1, a judgment circuit U2, and two 32-bit frequency dividers;
[0037] The DIN2 port is connected to one end of one of the 32-bit frequency dividers, the other end of one of the 32-bit frequency dividers is connected to one input of the judgment circuit U1, the other input of the judgment circuit U1 is connected to the DIN1 port, the output of the judgment circuit U1 is connected to one input of the judgment circuit U2 after being connected to another 32-bit frequency divider, the other input of the judgment circuit U2 is connected to the DIN port, and the output of the judgment circuit U1 is connected to the serial interface of the return-to-zero code protocol.
[0038] Specifically, both the judgment circuit U1 and the judgment circuit U2 use comparator circuits; both frequency dividers use 32-bit frequency dividers; wherein, the judgment circuit U1 is used to determine whether it is DIN1 or DIN2; the judgment circuit U2 is used to determine whether it is DIN or something else.
[0039] Furthermore, the return-to-zero code protocol circuit also includes a 32-bit counter, an adder, an RGBW display memory, and a command decoder. The adder is connected to the counter, the RGBW display memory, and the command decoder respectively. The RGBW display memory is connected to the four-channel PWM drive circuit. The command decoder is also connected to the first output port through an output shaping circuit. The RGBW display memory is... Figure 2 The display memory in the middle, the four-channel PWM drive circuit is the display memory. Figure 2 The PWM constant current output driver in the middle.
[0040] The input port is used to receive external control signals, including but not limited to data signals containing a RESET code;
[0041] The workflow is as follows: When a RESET signal is input at the DIN terminal, all chips synchronously transmit the received data to their respective functional segments. After the signal ends, the chip resumes receiving data. After receiving the initial 32-bit data, it forwards the data to the next external chip via the DO port. Before receiving a RESET code, the original outputs of the OUTR, OUTG, OUTB, and OUTW pins remain unchanged. When a low-level RESET code is received for a certain duration, the chip outputs the previously received 32-bit PWM data pulse width to the OUTR, OUTG, OUTB, and OUTW pins, ultimately achieving precise control of the four LEDs, causing them to illuminate according to the programmed pattern.
[0042] Then refer to Figure 3 Let d1 be the first-level chip lamp group in a light strip that connects the light strip to an external controller. Figure 3In this diagram, QDIN / QDIN1 / QDIN2 represent the signal output terminals of the preceding stage controller. These are connected to the three input segments DIN / DIN1 / DIN2 of the first color chip d1, respectively. Simultaneously, QDIN is also connected to DIN1 of the second color chip d2 as a backup signal and DIN2 of the third color chip d3 as a secondary backup signal; conversely, QDIN1 is connected to DIN2 of the second color chip d2 as a secondary backup signal. The output of the first color chip d1 is connected to DIN of d2 as an input signal, and to DIN1 of d3 as a backup signal, then further down to DIN2 of the fourth color chip as a secondary backup signal, and so on. This enables continuous interruption and resume functionality.
[0043] Furthermore, the four-channel holographic chip is also equipped with a reserved circuit and a PAD bonding window. By using the reserved circuit and the PAD bonding window and changing the bonding and packaging methods, finished products suitable for different scenarios can be produced.
[0044] Specifically, by changing the wire bonding and packaging methods, finished products suitable for different scenarios can be manufactured, such as RGB color-changing effects with breakpoint resumption and continuous breakpoint resumption. This reduces the development costs of multiple product types, eliminating the need to develop separate chips for each scenario, while also improving production efficiency and meeting diverse market demands.
[0045] example:
[0046] Resuming interrupted RGB color transmission;
[0047] Continuous resume of RGB color transmission after interruption;
[0048] Resume interrupted downloads; RGB+W color enhancement.
[0049] Continuous resume upload of RGB+W color effects;
[0050] Single-point, single-control, standard RGB color effects, etc.
[0051] The above solution uses digital logic circuits for functional implementation and design. The use of multiple frequency dividers ensures that the system is operating under a unified timing sequence. Compared with the original delay circuit design, the use of digital logic circuits can significantly improve the stability and temperature characteristics during operation. Furthermore, the frequency dividers and comparators in the digital logic circuits can effectively reduce the chip area through high integration, further reducing chip production costs.
[0052] Meanwhile, through a four-channel PWM drive circuit, four channels are used to control different colored lights, creating a rich variety of color combinations. Each channel can independently adjust its brightness, color, and color change mode, making it easy to personalize the lighting settings and adapt to new scenarios. This achieves the integration of a new continuous breakpoint resume transmission scheme with four channels, while also avoiding the color shift problem that is prone to occur in traditional methods.
[0053] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model, and they should all be covered within the scope of the claims and specification of this utility model.
Claims
1. A continuous break resume four channel color shifting chip comprising an input port, a run length limited protocol circuit and an output port, characterized in that, It also includes a digital logic processing circuit connected between the input port and the return-to-zero code protocol circuit, and a four-channel PWM drive circuit connected between the return-to-zero code protocol circuit and the output port; wherein, the return-to-zero code protocol circuit includes a serial interface for the return-to-zero code protocol. The input terminal of the digital logic processing circuit is connected to the input port, and the output terminal of the digital logic processing circuit is connected to the return-to-zero code protocol circuit through the serial interface. The return-to-zero code protocol circuit is also connected to the output port through the four-channel PWM drive circuit.
2. A continuous break resume four channel chasing color chip as claimed in claim 1, wherein, The output ports include a first output port and a second output port; The first output port includes at least the DOUT port; The second output port includes at least an OUTR port, an OUTG port, an OUTB port, and an OUTW port. The OUTR port, OUTG port, OUTB port, and OUTW port are respectively connected to the four-channel PWM drive circuit and are also connected to external LED beads of different colors.
3. The continuous break resume four channel iridescent chip of claim 2, wherein, The input ports include at least a DIN port, a DIN1 port, and a DIN2 port, and are respectively connected to the digital logic processing circuit.
4. The continuous break resume four-channel iridescent chip of claim 3, wherein, The digital logic processing circuit includes a judgment circuit U1, a judgment circuit U2, and two 32-bit frequency dividers; The DIN2 port is connected to one end of one of the 32-bit frequency dividers, the other end of one of the 32-bit frequency dividers is connected to one input of the judgment circuit U1, the other input of the judgment circuit U1 is connected to the DIN1 port, the output of the judgment circuit U1 is connected to one input of the judgment circuit U2 after being connected to another 32-bit frequency divider, the other input of the judgment circuit U2 is connected to the DIN port, and the output of the judgment circuit U1 is connected to the serial interface of the return-to-zero code protocol.
5. The continuous break resume four channel iridescent chip of claim 4, wherein, Both the judgment circuit U1 and the judgment circuit U2 use comparator circuits.
6. The continuous break resume four-channel iridescent chip of claim 2 or 5, wherein, The zero-return code protocol circuit also includes a 32-bit counter, an adder, an RGBW display memory, and a command decoder. The adder is connected to the counter, the RGBW display memory, and the command decoder respectively. The RGBW display memory is connected to the four-channel PWM drive circuit. The command decoder is also connected to the first output port through an output shaping circuit.
7. A continuous break resume four channel iridescent chip as defined in claim 1 wherein, The four-channel holographic chip is also equipped with a reserved circuit and a PAD bonding window. By using the reserved circuit and the PAD bonding window, finished products suitable for different scenarios can be produced by changing the bonding and packaging methods.
Citation Information
Patent Citations
Current-adjustable colorful chip capable of continuous breakpoint transmission
CN221509823U