Pixel structure, image sensor and shooting equipment

Abstract

This application discloses a pixel structure, an image sensor, and an imaging device. The pixel structure includes multiple photodiodes, multiple spaced-apart transmission gates, and floating diffusion nodes. The multiple photodiodes are arranged in an array, each photodiode having a light-incident side and a back-light side that are opposite to each other; each transmission gate is located on the back-light side of a corresponding photodiode; the floating diffusion nodes connect the multiple transmission gates; wherein, at least one transmission gate has a distance from its edge opposite to the floating diffusion node to the floating diffusion node that is greater than the distance from the center of the corresponding photodiode to the floating diffusion node.

Description

Technical Field

[0001] This utility model relates to the field of image acquisition, and in particular to a pixel structure, an image sensor, and an imaging device. Background Technology

[0002] Complementary metal-oxide-semiconductor (CMOS) image sensors have been practically used in imaging devices employing photoelectric conversion elements. These photoelectric conversion elements detect light and generate electrical charges. They are widely used in portable terminal devices such as digital cameras, camcorders, surveillance cameras, medical endoscopes, personal computers, automotive cameras, and mobile phones.

[0003] The pixel structure is the most important part of an image sensor. Within the pixel structure, the transfer gate controls the charge transfer generated by the photodiode. The floating diffusion node receives the charge transferred from the photodiode and converts it into a voltage signal. How to configure the transfer gate and floating diffusion node to improve the charge transfer performance of the pixel structure is one of the important research directions in the industry. Utility Model Content

[0004] The purpose of this application is to provide a pixel structure image sensor and imaging device that is simple in structure and can realize multiple functions.

[0005] This application discloses a pixel structure, which includes

[0006] Multiple photodiodes are arranged in an array, and the photodiodes have light-incident sides and back-light sides that are opposite to each other.

[0007] Multiple transmission gates are spaced apart, and each transmission gate is located on the backlight side of a corresponding photodiode;

[0008] Floating diffusion nodes connect multiple of the transmission gates;

[0009] In this case, the distance from the edge of at least one transmission gate away from the floating diffusion node to the floating diffusion node is greater than the distance from the center of the corresponding diode to the floating diffusion node.

[0010] In some embodiments, the multiple arrays of photodiodes include a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode, which are arranged in two rows and two columns.

[0011] The floating diffusion node is located in the middle region of the backlight side of the first photodiode, the second photodiode, the third photodiode, and the fourth photodiode.

[0012] In some embodiments, the plurality of transmission gates include a first transmission gate, a second transmission gate, a third transmission gate, and a fourth transmission gate, respectively located on the backlight side of the first photodiode, the second photodiode, the third photodiode, and the fourth photodiode;

[0013] The first transmission gate, the second transmission gate, the third transmission gate, and the fourth transmission gate are arranged in a centrally symmetrical manner.

[0014] In some embodiments, an isolation groove is provided between two adjacent photodiodes.

[0015] In some embodiments, the isolation trench between at least two adjacent photodiodes includes a first isolation portion and a second isolation portion, wherein the first isolation portion is a physical isolation portion and the second isolation portion is an ion-implanted isolation portion that allows electrons to pass through, and the first isolation portion is closer to the light-incident side of the photodiode.

[0016] In some embodiments, the projected area of ​​each transmission gate on the backlight side of a corresponding photodiode is greater than 50% of the area of ​​the backlight side of the corresponding photodiode.

[0017] In some embodiments, the pixel structure includes a microlens located on the light-incident side of the plurality of photodiodes and a color filter layer located between the microlens and the plurality of photodiodes.

[0018] In some embodiments, the pixel structure further includes a source follower, a row selection module, and a reset module located on one side of a plurality of photodiodes.

[0019] This application also provides an image sensor, which includes a plurality of pixel structures arranged in an array, wherein the pixel structures are as described above.

[0020] This application also provides a shooting device, which includes the image sensor described above.

[0021] Compared with related technologies, this application achieves a significant improvement in charge transfer performance by ensuring that the distance from at least one transmission gate's edge away from the floating diffusion node is greater than the distance from the center of the corresponding photodiode to the floating diffusion node. This allows the transmission gate to cover the maximum voltage area at the center of the photodiode, which helps to change the charge transfer direction of the photodiode and improve its charge transfer performance. Furthermore, the floating diffusion node connects multiple transmission gates simultaneously, enabling the merging of adjacent photodiodes and improving the quality of photoelectric signal processing in the pixel structure.

[0022] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0023] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this specification and, together with the description, serve to explain the principles of this specification.

[0024] Figure 1 This is a cross-sectional view of a portion of the pixel structure in one embodiment of this application.

[0025] Figure 2 This is a schematic diagram of the pixel structure from the backlight side view in one embodiment of this application.

[0026] Figure 3 This is a cross-sectional view of a portion of the pixel structure in one embodiment of this application.

[0027] Figure 4 This is a schematic diagram illustrating the charge transport principle of a pixel structure in one embodiment of this application. Detailed Implementation

[0028] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the invention as detailed in the appended claims.

[0029] If the embodiments of this application contain terms relating to directional indications or positional relationships (e.g., up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationships and movement of the components in a specific posture; if the specific posture changes, the directional indications or positional relationships will also change accordingly. Furthermore, the terms "first" and "second" used in the embodiments of this application are only for descriptive convenience and should not be construed as indicating or implying relative importance. Connections in this application can refer to mechanical connections, electrical connections, or signal connections, etc.

[0030] This application discloses a pixel structure. The pixel structure includes multiple photodiodes, multiple spaced-apart transmission gates, and floating diffusion nodes. The multiple photodiodes are arranged in an array, each photodiode having an incident light side and a backlight side that are opposite to each other; each transmission gate is located on the backlight side of a corresponding photodiode; the floating diffusion nodes connect the multiple transmission gates; wherein, at least one transmission gate has a distance from its edge away from the floating diffusion node to the floating diffusion node greater than the distance from the center of the corresponding photodiode to the floating diffusion node. By making the distance from at least one transmission gate's edge away from the floating diffusion node greater than the distance from the center of the corresponding photodiode to the floating diffusion node, the pixel structure allows the transmission gate to cover the maximum voltage area at the center of the photodiode, which is beneficial for changing the charge transfer direction of the photodiode and improving charge transfer performance. Furthermore, the floating diffusion nodes simultaneously connect multiple transmission gates, enabling the merging of adjacent photodiodes, which is beneficial for improving the quality of photoelectric signal processing in the pixel structure.

[0031] The following is in conjunction with the appendix Figures 1 to 4 The pixel structure described above is described in detail. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0032] Please refer to Figure 1 and combine when necessary Figures 2 to 4 As shown, the pixel structure 100 includes a plurality of photodiodes 20, a plurality of spaced-apart transmission gates 40, and a floating diffusion node 30. The plurality of photodiodes 20 are arranged in an array, each photodiode 20 having an incident light side and a backlight side that are opposite to each other. Each transmission gate 40 is located on the backlight side of a corresponding photodiode 20. The floating diffusion node 30 connects to the plurality of transmission gates 40.

[0033] In this case, the distance D2 from the side edge of at least one transmission gate 40 away from the floating diffusion node 30 to the floating diffusion node 30 is greater than the distance D1 from the center of the corresponding diode to the floating diffusion node 30.

[0034] It is understandable that the multiple photodiodes 20 mentioned here can be multiple sub-pixels of the pixel structure 100.

[0035] When the photodiode 20 receives light, it can perform photoelectric conversion to generate corresponding electrons, i.e., charge carriers e. - The floating diffusion node 30 can be used to store electrons generated by the photoelectric conversion of the photodiode. The transfer gate 40 can act as a switch to control the transfer of electrons generated by the corresponding photodiodes to the floating diffusion node 30.

[0036] Multiple photodiodes 20 of the pixel structure 100 are formed in a semiconductor substrate 10. The semiconductor substrate 10 has a first surface S1 and a second surface S2 that are opposite to each other. The light-incident side of the photodiode 20 may also be the side where the first surface S1 of the semiconductor substrate 10 is located. The backlight side of the photodiode 20 may be the side where the second surface S2 of the semiconductor substrate 10 is located.

[0037] The floating diffusion node 30 can also be formed in the semiconductor substrate 10. For example... Figure 1 and Figure 3 As shown, the floating diffusion node 30 can also be formed in the region of the semiconductor substrate 10 near the second surface S2, and the floating diffusion node 30 is exposed from the second surface S2 of the semiconductor substrate 10.

[0038] The semiconductor substrate 10 may have a first doping type. The floating diffusion node 30 may have a second doping type. The semiconductor substrate 10 may be a lightly doped region, and the floating diffusion node 30 may be a heavily doped region. One of the first and second doping types is P-type, and the other is N-type. For example, in some embodiments, the semiconductor substrate 10 is a lightly doped P-type region, and the floating diffusion node 30 is a heavily doped N-type region.

[0039] A plurality of transmission gates 40 are disposed on the second surface S2 of the semiconductor substrate 10 and are in contact with the plurality of transmission gates 40, thereby achieving electrical connection with the plurality of transmission gates 40.

[0040] Combination Figure 2 As shown, the multiple arrayed photodiodes 20 included in the pixel structure 100 may include a first photodiode PDD1, a second photodiode PDD2, a third photodiode PDD3, and a fourth photodiode PDD4, which are arranged in two rows and two columns.

[0041] The floating diffusion node 30 is located in the central region of the backlight side of the first photodiode PDD1, the second photodiode PDD2, the third photodiode PDD3, and the fourth photodiode PDD4. That is, the floating diffusion node 30 is located in the central region of the backlight side of the first photodiode PDD1, the second photodiode PDD2, the third photodiode PDD3, and the fourth photodiode PDD4.

[0042] The floating diffusion node 30 can be a regular shape, for example, it can be like... Figure 2 The octagon shown.

[0043] The size and shape of the floating diffusion node 30 can be set as needed.

[0044] The semiconductor substrate 10 may have a first substrate region 101, a second substrate region 102, a third substrate region 103, and a fourth substrate region 104. The first photodiode PDD1 may be formed in the first substrate region 101, the second photodiode PDD2 may be formed in the second substrate region 102, the third photodiode PDD3 may be formed in the third substrate region 103, and the fourth photodiode PDD4 may be formed in the fourth substrate region 104.

[0045] Combination Figure 2 and Figure 3 As shown, the plurality of transmission gates 40 may include a first transmission gate 41 (also known as a first transmission gate TG1), a second transmission gate 42 (also known as a second transmission gate TG2), a third transmission gate 43 (also known as a third transmission gate TG3), and a fourth transmission gate 44 (also known as a fourth transmission gate TG4) located on the backlight side of the first photodiode PDD1, the second photodiode PDD2, the third photodiode PDD3, and the fourth photodiode PDD4, respectively.

[0046] The first transmission gate TG1, the second transmission gate TG2, the third transmission gate TG3, and the fourth transmission gate TG4 are arranged in a centrally symmetrical manner.

[0047] Accordingly, the floating diffusion node 30 can cover the centroids of the first transmission gate TG1, the second transmission gate TG2, the third transmission gate TG3, and the fourth transmission gate TG4. The centroid of the projection of the floating diffusion node 30 onto the second surface S2 of the semiconductor substrate 10 can overlap with the centroids of the projections of the first transmission gate TG1, the second transmission gate TG2, the third transmission gate TG3, and the fourth transmission gate TG4 onto the second surface S2 of the semiconductor substrate 10, so as to better contact and connect with the first transmission gate TG1, the second transmission gate TG2, the third transmission gate TG3, and the fourth transmission gate TG4.

[0048] In some embodiments, the projected area of ​​each transmission gate 40 on the backlight side of a corresponding photodiode 20 is greater than 50% of the area of ​​the backlight side of the corresponding photodiode 20. That is, the projected area of ​​each transmission gate 40 on the second surface S2 of the semiconductor substrate 10 is greater than 50% of the projected area of ​​the corresponding photodiode 20 on the second surface S2 of the semiconductor substrate 10.

[0049] For example, the projected area of ​​each transmission gate 40 on the backlight side of a corresponding photodiode 20 can be 60%, 70%, 80%, 90%, 95%, etc. of the area of ​​the backlight side of the corresponding photodiode 20.

[0050] It is understandable that the larger the area of ​​the transmission gate 40, the better the transmission effect. For example, the orthographic projection of each transmission gate 40 onto the second surface S2 of the semiconductor substrate 10 can cover the orthographic projection of the corresponding photodiode 20 onto the second surface S2 of the semiconductor substrate 10.

[0051] It is understood that the pixel structure 100 includes a pixel isolation portion 91 on its periphery. This pixel isolation portion 91 may be a deep trench isolation (DTI). This pixel isolation portion 91 may be a physical isolation trench to prevent carrier loss within the pixel structure 100 region and to avoid interference between the pixel structure 100 and the devices or structures in the peripheral region of the pixel isolation portion 91.

[0052] In some embodiments, an isolation groove 92 is provided between two adjacent photodiodes 20.

[0053] Combination Figure 2 As shown, in the pixel structure 100, isolation trenches 92 divide the substrate 10 into a first substrate region 101, a second substrate region 102, a third substrate region 103, and a fourth substrate region 104. Specifically, the first substrate region 101 and the second substrate region 102 are isolated by isolation trench 922, and the first substrate region 101 and the third substrate region 103 are isolated by isolation trench 921. The second substrate region 102 and the fourth substrate region 104 are isolated by isolation trench 923. The third substrate region 101 and the fourth substrate region 104 are isolated by isolation trench 924.

[0054] In some embodiments, each of the isolation trenches 921, 922, 923 and 924 can be a physical isolation section. That is, the photodiodes PDD1, PDD2, PDD3 and PDD4 respectively disposed in the first substrate region 101, the second substrate region 102, the third substrate region 103 and the fourth substrate region 104 are isolated from each other, and there is no carrier flow between them in the substrate 10.

[0055] Typically, in a pixel structure with multiple photodiodes, the light intensity received by each photodiode is not the same during operation. In order to improve the full well capacity (FWC) of the pixel structure 100, at least one of the multiple isolation trenches 921, 922, 923, and 924 can be configured as an isolation structure with an ion implantation isolation trench.

[0056] In some instances, the four isolation slots 921, 922, 923, and 924 of the pixel structure 100 can all be configured to have ion-implanted isolation sections. For example... Figure 1As shown, each isolation trench 921, 922, 923, and 924 may include a first isolation section 9201 and a second isolation section 9202. The first isolation section 9201 is a physical isolation section, and the second isolation section 9202 is an ion implantation isolation section that allows electrons to pass through. The first isolation section 9201 is closer to the light-incident side of the photodiode 20.

[0057] The heights of the first isolation section 9201 and the second isolation section 9202 can be selected according to specific needs.

[0058] It is understood that the isolation trench with ion implantation isolation section (e.g., 921) can be configured to include one or more physical isolation sections and one or more ion implantation isolation sections in the direction from the first surface S1 of the semiconductor substrate 10 toward the second surface S2. Among them, the isolation section close to the first surface S1 of the semiconductor substrate 10 is the physical isolation section.

[0059] It should be noted that the ion isolation portion can be formed by ion implantation in the semiconductor substrate 10. The ion isolation portion may have a first doping type. The implantation material of the ion isolation portion can be selected as needed, as long as it allows charge carriers to pass through the ion isolation portion to improve the full-well capacity of the pixel structure 100.

[0060] In some other embodiments, one, two, or three of the plurality of isolation trenches 921, 922, 923, 924 may be configured as an isolation structure with ion implantation isolation trenches.

[0061] In some embodiments, the pixel structure may include microlenses located on the light-incident side of the plurality of photodiodes 20 and a color filter layer (not shown) located between the microlenses and the plurality of photodiodes 20.

[0062] like Figure 1 As shown, in some embodiments, the pixel structure 100 further includes a plurality of lens structures 1001. The plurality of lens structures 1001 are respectively disposed on the light-incident side of the plurality of photodiodes 20. Each photodiode 20 may have a corresponding lens structure 1001 on its light-incident side. The lens structure 1001 may be disposed on the first surface S1 of the semiconductor substrate 10.

[0063] like Figure 1 As shown, the lens structure 1001 can be a convex lens, and the lens structure 1001 convexes outward on the side opposite to the corresponding photodiode 20.

[0064] Combination Figure 2 As shown, the pixel structure 100 also includes a ground terminal 50. The ground terminal 50 may be configured to correspond to a portion of the substrate region. For example... Figure 2As shown, there are two grounding terminals 50, which are respectively set to correspond to the first substrate region 101 and the third substrate region 103. Of course, there can also be four grounding terminals 50, with each grounding terminal corresponding to one substrate region.

[0065] Combination Figure 3 As shown, in some embodiments, the pixel structure 100 may further include a source follower 60, a row selection module 80, and a reset module 70 located on one side of the plurality of photodiodes 20.

[0066] The source follower 60 can be used to amplify the current collected by the floating diffusion node 30. The row selection module 80 can be turned on when the pixel structure 100 is selected. The reset module 70 can be used to reset the level of the floating diffusion node 30.

[0067] The source follower 60 may include a source follower transistor SF. The row selection module 80 may include a row selection transistor RS. The reset module 70 may include a reset transistor RST. The first terminal of the reset transistor RST and the first terminal of the source follower transistor SF are connected to the voltage terminal VDD. The control terminal of the source follower transistor SF and the second terminal of the reset transistor RST are connected to the floating diffusion node 30. The second terminal of the source follower transistor SF is connected to the first terminal of the row selection transistor RS.

[0068] It should be noted that the pixel structure 100 may include a circuit structure layer located on one side of the second surface S of the semiconductor substrate 10. The source follower 60, the row selection module 80 (i.e., RS), the reset module 70, and the transmission gate 40 are all located in the circuit structure layer.

[0069] Based on the above description, and in combination Figure 4 As shown, during the operation of the pixel structure 100, when light shines on the lens structure 1001, the light is focused through the lens structure 1001 and directed towards each photodiode 20. Each photodiode can convert light energy into charge carriers e. - For photodiodes with stronger light or more incident light, the generated charge carriers e - When there are many charge carriers and the charge is saturated, some of them will be transferred to the adjacent unsaturated photodiode through the ion implantation isolation section 9202.

[0070] It should be noted that in some other embodiments, the plurality of photodiodes may be other plurality of photodiodes, and the arrangement of the plurality of photodiodes may be other arrangement. The number of photodiodes included in the pixel structure, the arrangement, etc., can be set according to specific needs.

[0071] This application also provides an image sensor. The image sensor may include a plurality of pixel structures 100 arranged in an array, wherein the pixel structures 100 are as described above.

[0072] This application also discloses a shooting device, which includes the image sensor described above.

[0073] This shooting device can be used with smartphones, electronic cameras, in-vehicle devices, smart home devices, and other devices that require image acquisition.

[0074] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0075] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A pixel structure, characterized by, include Multiple photodiodes are arranged in an array, and the photodiodes have light-incident sides and back-light sides that are opposite to each other. Multiple transmission gates are spaced apart, and each transmission gate is located on the backlight side of a corresponding photodiode; Floating diffusion nodes connect multiple of the transmission gates; In this case, the distance from the edge of at least one transmission gate away from the floating diffusion node to the floating diffusion node is greater than the distance from the center of the corresponding diode to the floating diffusion node.

2. The pixel structure of claim 1, wherein, The array of photodiodes includes a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode, which are arranged in two rows and two columns. The floating diffusion node is located in the middle region of the backlight side of the first photodiode, the second photodiode, the third photodiode, and the fourth photodiode.

3. The pixel structure of claim 2, wherein, The plurality of transmission gates include a first transmission gate, a second transmission gate, a third transmission gate, and a fourth transmission gate, respectively located on the backlight side of the first photodiode, the second photodiode, the third photodiode, and the fourth photodiode; The first transmission gate, the second transmission gate, the third transmission gate, and the fourth transmission gate are arranged in a centrally symmetrical manner.

4. The pixel structure of claim 2, wherein, There is an isolation groove between two adjacent photodiodes.

5. The pixel structure of claim 4, wherein, The isolation trench between at least two adjacent photodiodes includes a first isolation portion and a second isolation portion. The first isolation portion is a physical isolation portion, and the second isolation portion is an ion-implanted isolation portion that allows electrons to pass through. The first isolation portion is closer to the light-incident side of the photodiode.

6. The pixel structure of claim 1, wherein, The projected area of ​​each transmission gate on the backlight side of a corresponding photodiode is greater than 50% of the area of ​​the backlight side of the corresponding photodiode.

7. The pixel structure of claim 1, wherein, The pixel structure includes microlenses located on the light-incident side of the plurality of photodiodes and a color filter layer located between the microlenses and the plurality of photodiodes.

8. The pixel structure of claim 1, wherein, The pixel structure also includes a source follower, a row selection module, and a reset module located on one side of multiple photodiodes.

9. An image sensor, characterized by The image sensor includes multiple pixel structures arranged in an array, wherein the pixel structure is the pixel structure as described in any one of claims 1 to 8.

10. A photographing apparatus characterized by comprising: The imaging device includes the image sensor as described in claim 9.

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