Display panel
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-12
- Publication Date
- 2026-08-14
AI Technical Summary
[0005]本实用新型提供了一种显示面板,以解决目前串联式有机发光二极管像素间串扰严重的问题
[0019]本实用新型公开了一种显示面板,显示面板包括:像素定义层的隔离部围绕像素定义层的开口区设置;隔离部包括槽口宽度大于槽底宽度的隔离槽;共通层的材料在隔离槽中形成减薄延展的物理结构。本实用新型的显示面板中,隔离槽的设置使相邻像素间的共通层存在高电阻通路,抑制了相邻像素间电子或空穴的横向扩散,实现了在不中断共通层的前提下,改善显示面板的发光器件的像素间串扰的缺陷。同时,隔离槽的槽口宽度大于槽底宽度,也使得当共通层材料沉积总量不变时,隔离槽的斜坡处材料沉积的厚度小于其他区域的厚度,进一步增大了当共通层在隔离槽处的横向电阻。本实用新型所提供的显示面板工艺简单,均一性好,适合大尺寸产品。
Smart Images

Figure CN224638414U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of display technology, and in particular to a display panel. Background Technology
[0002] Tandem OLED technology effectively improves the luminous efficiency and lifespan of devices by connecting multiple light-emitting layers in series, thus effectively compensating for the shortcomings of single-layer organic light-emitting diodes (OLEDs).
[0003] However, in tandem organic light-emitting diodes, due to the continuous deposition of materials between adjacent pixels, charges (electrons / holes) diffuse laterally, resulting in leakage current between adjacent sub-pixels. This leads to severe inter-pixel crosstalk in low-brightness, low-grayscale displays, manifesting as reduced color accuracy in low grayscale and color cast in white images.
[0004] In existing tandem organic light-emitting diodes, inter-pixel crosstalk is severe. Utility Model Content
[0005] This invention provides a display panel to solve the problem of severe crosstalk between pixels in current series-connected organic light-emitting diodes.
[0006] This utility model provides a display panel, including: a pixel definition layer, the pixel definition layer including a plurality of isolation portions and a plurality of opening areas, the isolation portions being disposed around the opening areas along a first direction, and at least two stacked light-emitting layers being disposed in the opening areas; the isolation portions being provided with isolation grooves, the width of the groove opening being greater than the width of the groove bottom;
[0007] A common layer is disposed on one side of the light-emitting layer along the first direction and extends into the isolation groove along the second direction; wherein, the first direction is the thickness direction of the display panel and the second direction intersects with the first direction.
[0008] Optional, also includes:
[0009] A substrate, wherein the pixel definition layer is disposed on one side of the substrate;
[0010] A first electrode layer is disposed on the side of the light-emitting layer away from the substrate, and the first electrode layer covers the opening area and the isolation trench.
[0011] Optionally, the angle between the sidewall and the bottom surface of the isolation groove is greater than or equal to 60° and less than 90°.
[0012] Optionally, the width of the isolation groove is greater than 1.5 μm and less than 5 μm along the direction from the isolation portion to the opening area.
[0013] Optionally, along the first direction, the depth of the isolation groove is greater than 0.6 μm and less than 1 μm.
[0014] Optionally, the isolation groove at least partially surrounds at least one of the opening areas.
[0015] Optionally, the opening area includes a first opening area, a second opening area, and a third opening area. A first color light-emitting layer is disposed in the first opening area, a second color light-emitting layer is disposed in the second opening area, and a third color light-emitting layer is disposed in the third opening area. The isolation groove at least partially surrounds at least one of the first opening area, the second opening area, and the third opening area.
[0016] Optionally, the isolation groove includes a first isolation groove and a second isolation groove, the first isolation groove and the second isolation groove are arranged around the same opening area, and there is a break between the first isolation groove and the second isolation groove.
[0017] Optionally, on both sides of the break, the angle between the extending direction of the first isolation groove and the extending direction of the second isolation groove is greater than or equal to 90°.
[0018] Optionally, a second electrode layer is further included, disposed between the substrate and the light-emitting layer. The second electrode layer includes a plurality of electrodes, which are correspondingly connected to the light-emitting layer.
[0019] This utility model discloses a display panel, comprising: an isolation portion of a pixel definition layer surrounding an opening area of the pixel definition layer; the isolation portion including an isolation groove with an opening width greater than the bottom width; and a common layer material forming a thinned and extended physical structure within the isolation groove. In this utility model's display panel, the isolation groove creates a high-resistance path in the common layer between adjacent pixels, suppressing the lateral diffusion of electrons or holes between adjacent pixels, thus improving the inter-pixel crosstalk defect of the display panel's light-emitting devices without interrupting the common layer. Simultaneously, the wider opening of the isolation groove than the bottom width also results in a smaller material deposition thickness at the slope of the isolation groove compared to other areas, further increasing the lateral resistance of the common layer at the isolation groove, provided the total amount of common layer material remains constant. The display panel provided by this utility model has a simple manufacturing process, good uniformity, and is suitable for large-size products. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of this utility model;
[0022] Figure 2 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0023] Figure 3 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0024] Figure 4 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0025] Figure 5 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0026] Figure 6 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0027] Figure 7 This is a schematic diagram of another display panel provided in an embodiment of the present utility model;
[0028] Figure 8 for Figure 3 , Figure 4 , Figure 5 and Figure 6 The four provided display panel embodiments and related technologies without isolation slots demonstrate the color gamut triangle displayed by the display panel under low brightness and low grayscale conditions. Detailed Implementation
[0029] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.
[0030] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0031] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present utility model, as shown below. Figure 1 As shown, the display panel includes: a pixel definition layer 01, which includes multiple isolation portions 101 and multiple opening areas 102. The isolation portions 101 are disposed around the opening areas 102. At least two stacked light-emitting layers 1021 are disposed in the opening areas 102 along the first direction Y. An isolation groove 1011 is disposed on the isolation portion 101, and the width of the groove opening of the isolation groove 1011 is greater than the width of the groove bottom. A common layer 02 is disposed on one side of the light-emitting layers 1021 along the first direction Y and extends into the isolation groove 1011 along the second direction X. The first direction Y is the thickness direction of the display panel, and the second direction X intersects with the first direction Y.
[0032] Specifically, the display panel includes a pixel definition layer 01 and pixels. Each pixel includes a light-emitting layer 1021 and a common layer 02. The pixel definition layer 01 includes an isolation portion 101 and an opening region 102. The isolation portion 101 surrounds the opening region 102. At least two light-emitting layers 1021 are stacked along the thickness direction within the opening region 102 to realize a series-connected OLED light-emitting unit. Figure 1 As shown, the display panel includes a first light-emitting layer 10211 and a second light-emitting layer 10212. Figure 1 In this embodiment, the common layer 02 is disposed on the side of the second light-emitting layer 10212 closest to the first light-emitting layer 10211. In some embodiments, the common layer 02 may be disposed on the side of the second light-emitting layer 10212 away from the first light-emitting layer 10211. In other embodiments, the common layer 02 may be disposed on the side of the first light-emitting layer 10211 away from the second light-emitting layer 10212.
[0033] The isolation section 101 is provided with an isolation groove 1011. The width of the groove opening is greater than the width of the bottom, that is, the cross-section of the isolation groove 1011 is an inverted trapezoid. For example... Figure 1The red line in the middle represents the common layer 02. The common layer 02 covers the surface of the light-emitting layer 1021 and extends horizontally to fill the interior of the isolation groove 1011, forming a continuous functional film.
[0034] The isolation trench 1011 increases the surface area of the pixel definition layer 01. Therefore, when the common layer 02 is deposited on the pixel definition layer 01, the length of the common layer 02 in the second direction X increases, thereby increasing the resistance of the common layer 02. Furthermore, when the isolation trench 1011 is an inverted trapezoid, if the total amount of material deposited remains constant during the deposition of the common layer 02, the increased length at the slope of the isolation trench 1011 and the angle between the sidewall and the ground result in a thickness of the common layer 02 deposited at the slope of the isolation trench 1011 that is less than the thickness of the common layer 02 deposited between the bottom of the isolation trench 1011 and the light-emitting layer 1021. In other words, the isolation trench 1011 ensures that the common layer 02 forms a thinner shape during deposition within the trench, further increasing the lateral resistance of the common layer 02 at the isolation trench 1011 and reducing the current between adjacent opening regions 102, thereby reducing crosstalk between adjacent pixels.
[0035] Common layer 02 is a collective term for multiple layers in the display panel. Common layer 02 includes, but is not limited to: a hole transport layer, used to transport holes injected from the anode to the light-emitting layer; an electron transport layer, used to transport electrons injected from the cathode to the light-emitting layer; a charge generation layer, used to connect adjacent light-emitting units in a series OLED to generate electron-hole pairs; an electron injection layer, used to enhance the electron injection efficiency from the cathode to the electron transport layer; and a hole injection layer, used to promote hole injection from the anode to the hole transport layer. The specific structure of common layer 02 is not limited here.
[0036] In one embodiment, such as Figure 1 As shown, the angle α between the sidewall and the bottom surface of the isolation trench 1011 is greater than or equal to 60° and less than 90°. When the angle α between the sidewall and the bottom surface of the isolation trench 1011 is less than 60°, the material deposited at the sidewall is not significantly thinned due to the gentle sidewall, resulting in a smaller effect on increasing the resistance at the sidewall and thus a smaller effect on reducing crosstalk between pixels.
[0037] When the angle between the sidewall and bottom surface of the isolation trench 1011 is less than 60°, the material particle flow is approximately perpendicular to the pixel definition layer 01 during the deposition of the common layer 02. If the angle between the sidewall and bottom surface of the isolation trench 1011 is small, the angle between the normal to the sidewall surface of the isolation trench 1011 and the direction of the deposited particle flow is also small, and the material thinning effect deposited on the sidewall of the isolation trench 1011 is not obvious. Therefore, the excessively gentle sidewall of the isolation trench 1011 leads to a significant weakening of the material thinning effect of the common layer 02 deposition on the sidewall of the isolation trench 1011, which cannot effectively increase the lateral resistance and reduces the inter-pixel leakage current suppression rate. However, when the angle between the sidewall and bottom surface of the isolation trench 1011 is greater than or equal to 60° and less than 90°, the steep sidewall causes the common layer 02 to thin as it extends along the trench wall, increasing the lateral resistance of the common layer 02 and solving the inter-pixel crosstalk problem. Meanwhile, the design that the angle between the sidewall and bottom surface of the isolation trench 1011 is less than 90° avoids the risk of breakage of the common layer 02 caused by the vertical trench wall of the isolation trench 1011, ensuring continuous coverage of the common layer 02.
[0038] In another embodiment, reference continues. Figure 1 The direction from the isolation section 101 to the opening area 102 is the third direction X1. Along the third direction X1, the width of the isolation groove 1011 is greater than 1.5μm and less than 5μm.
[0039] If the width of the isolation trench 1011 is less than 1.5μm, the excessively narrow isolation trench 1011 will prevent the common layer 02 material from being effectively thinned on the sidewall of the isolation trench 1011. When the width of the isolation trench 1011 is in the range of 1.5-5μm, it ensures that the common layer 02 can be effectively thinned within the isolation trench 1011. When the width of the isolation trench 1011 is no greater than 5μm, the width occupied by the isolation trench 1011 is controlled within a certain range, thereby controlling the aperture ratio of the pixel definition layer 01 and adapting to the corresponding PPI (Pixels Per Inch) display panel.
[0040] In another embodiment, such as Figure 1 As shown, along the first direction Y, the distance from the bottom of the isolation trench 1011 to the plane of the pixel definition layer 01 is the depth h1 of the isolation trench 1011, and the depth h1 of the isolation trench 1011 is less than the thickness h2 of the pixel definition layer 01. Optionally, the depth of the isolation trench 1011 is greater than 0.6 μm and less than 1 μm.
[0041] When the depth of the isolation trench 1011 is less than 0.6 μm, the common layer 02 material cannot be effectively thinned on the sidewall of the isolation trench 1011. The maximum depth of the isolation trench 1011 is 1 μm, preventing excessive etching of the pixel definition layer 01. The depth h1 of the isolation trench 1011 being less than the thickness h2 of the pixel definition layer 01 also avoids the risk of breakdown of the pixel definition layer 01 due to the opening of the isolation trench 1011, and prevents potential damage to the insulation of the display panel caused by excessive etching of the pixel definition layer 01.
[0042] This invention provides a display panel, comprising: an isolation portion of a pixel definition layer surrounding an opening area of the pixel definition layer; the isolation portion including an isolation groove with a groove width greater than the groove bottom width; in a pixel area where at least two light-emitting layers are stacked along the panel thickness direction, the material of a common layer forms a thinned and extended physical structure within the groove through the isolation groove; the common layer extends and fills the interior of the isolation groove. In the display panel of this invention, the isolation groove creates a high-resistance path for the common layer between adjacent pixels, suppressing the lateral diffusion of electrons or holes between adjacent pixels, thus improving the inter-pixel crosstalk problem in low grayscale display of tandem OLED devices without interrupting the common layer.
[0043] Based on the above embodiments, Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of the present utility model, as shown below. Figure 2 As shown, the display panel also includes: a substrate 03, a pixel definition layer 01 disposed on one side of the substrate 03; a first electrode layer 04 disposed on the side of the light-emitting layer 1021 away from the substrate 03, the first electrode layer 04 covering the opening area 102 and the isolation trench 1011.
[0044] Specifically, substrate 03 serves as the basic carrier layer, and pixel definition layer 01 can be directly disposed on its surface; for example... Figure 2 The orange line in the middle represents the first electrode layer 04. The first electrode layer 04 is located on the side of the light-emitting layer 1021 away from the substrate, i.e. above the light-emitting layer, and continuously covers the surface of the light-emitting layer of the opening region 102 and the sidewalls and bottom of the isolation trench 1011, forming a conductive film across pixels.
[0045] Optionally, the first electrode layer 04 includes a cathode layer.
[0046] The first electrode layer 04 and the common layer 02 extend along the second direction X into the isolation trench 1011. The first electrode layer 04 continuously covers the opening area 102 and the isolation trench 1011. The width of the opening of the isolation trench 1011 is greater than the width of the bottom, i.e., the cross-section of the isolation trench 1011 is an inverted trapezoid. After the first electrode layer 04 is deposited, the first electrode layer 04 is continuous. The first electrode layers 04 between adjacent pixels are not interrupted, allowing longitudinal current to flow across the trench. At the same time, the first electrode layers 04 on the entire surface of the display panel form a grid, ensuring uniform driving voltage for each pixel. The low loss of driving voltage during transmission in the conductive layer improves the uniformity of display brightness and color accuracy. The reduced voltage drop effect brought about by the continuous and uninterrupted first electrode layer 04 also makes the display panel provided by this embodiment suitable for large-size display products.
[0047] Based on the above embodiments, the isolation groove 1011 at least partially surrounds at least one opening region 102.
[0048] In one embodiment, the isolation trench 1011 partially surrounds an opening region 102. The isolation trench 1011 only covers a portion of the boundary of a single opening region 102, blocking charge diffusion in a specific direction to achieve directional isolation. For example, for pixels located in a display panel, the isolation trench 1011 can be set only on the side of the edge pixel closest to the adjacent pixel, while the side of the edge pixel furthest from the adjacent pixel does not need to have the isolation trench 1011. This approach reduces the number of trenching steps, lowers costs, and simplifies the process.
[0049] Furthermore, the isolation groove 1011 completely surrounds an opening area 102. The isolation groove 1011 completely surrounds the single opening area in a closed ring, completely blocking the lateral leakage path between this pixel and all surrounding pixels. This results in better suppression of inter-pixel crosstalk in the display panel and better uniformity of the display panel.
[0050] In another embodiment, the isolation trench 1011 partially surrounds a plurality of opening regions 102. The isolation trench 1011 spans a multi-pixel boundary while providing isolation for adjacent opening regions 102. For example, the isolation trench 1011 is configured to partially surround a plurality of adjacent opening regions 102 containing blue pixels.
[0051] Furthermore, the isolation groove 1011 completely surrounds the multiple opening areas 102, completely blocking the lateral leakage path between this pixel and all surrounding pixels. This further improves the inter-pixel crosstalk suppression effect of the display panel and enhances the uniformity of the display panel.
[0052] Based on the above embodiments, Figure 3 This is a schematic diagram of another display panel provided in an embodiment of the present utility model. Figure 4 This is a schematic diagram of another display panel provided in an embodiment of the present utility model. Figure 5 This is a schematic diagram of another display panel provided in an embodiment of the present utility model. Figure 6 This is a schematic diagram of another display panel structure provided in an embodiment of the present utility model, as shown below. Figure 3 , 4 As shown in Figures 5 and 6, the opening region 102 includes a first opening region 10201, a second opening region 10202, and a third opening region 10203. A first color emitting layer 10211 is disposed in the first opening region 10201, a second color emitting layer 10212 is disposed in the second opening region 10202, and a third color emitting layer 10213 is disposed in the third opening region 10203. An isolation groove 1011 at least partially surrounds at least one of the first opening region 10201, the second opening region 10202, and the third opening region 10203. The isolation groove 1011 includes a first isolation groove 10111 and a second isolation groove 10112, which are disposed around the same opening region 102, and a break is formed between the first isolation groove 10111 and the second isolation groove 10112. The angle between the extending direction of the first isolation groove 10111 and the extending direction of the second isolation groove 10112 is greater than 90°.
[0053] Specifically, the isolation groove 1011 at least partially surrounds one or more opening areas 102 in a segmented manner. For example... Figure 3 As shown, the isolation groove 1011 is located in a segmented form between the first opening area 10201 and the second opening area 10202, that is, the isolation groove 1011 partially surrounds a single opening area 102 in a segmented form.
[0054] like Figure 4 As shown, the first isolation groove 10111 and the second isolation groove 10112 are arranged around the same opening area 102. There is a break between the first isolation groove 10111 and the second isolation groove 10112, that is, the isolation groove 1011 is segmented and completely surrounds the single opening area 102.
[0055] At the same time, such as Figure 3 , 4 As shown, for the third opening region 10203, all third opening regions 10203 are surrounded by the first isolation groove 10111 and the second isolation groove 10112, that is, the isolation groove 1011 is located in a segmented form, at least partially surrounding the multiple opening regions 102. Optionally, the third color emitting layer 10213 in the third opening region 10203 is a blue sub-pixel.
[0056] Furthermore, such as Figure 5As shown, the isolation groove 1011 completely surrounds the first opening area 10201, the second opening area 10202, and the third opening area 10203 in a continuous manner. The isolation groove 1011 has a more limited effect on suppressing inter-pixel crosstalk in all opening areas 102, and can better improve the uniformity of the display panel.
[0057] Continue to refer to Figure 5 The opening region 102 includes a first opening region 10201, a second opening region 10202, and a third opening region 10203. A first color emitting layer 10211, a second color emitting layer 10212, and a third color emitting layer 10213 are respectively disposed in the first opening region 10201, the second opening region 10202, and the third opening region 10203. Optionally, the first color emitting layer 10211, the second color emitting layer 10212, and the third color emitting layer 10213 are R / G / B three-color sub-pixels. Correspondingly, the isolation groove 1011 can selectively surround one, two, or all of the sub-pixels. Meanwhile, in... Figure 5 In the display panel, isolation grooves 1011 are respectively arranged around the first opening area 10201 and the second opening area 10202; for the third opening area 10203, since the display panel includes two adjacent third opening areas 10203, isolation grooves 1011 are arranged around the two adjacent third opening areas 10203 to suppress crosstalk between pixels. For adjacent third opening areas 10203, since each of the third opening areas 10203 is a third color emitting layer 10213, isolation grooves 1011 are not required.
[0058] In one embodiment, such as Figure 6 As shown, the isolation groove 1011 at least partially surrounds the third opening region 10203. However, no isolation groove 1011 is provided between the first opening region 10201 and the second opening region 10202. Figure 6 In the middle, the third opening area 10203 is a blue sub-pixel, and an isolation slot 1011 is set to at least partially surround the blue sub-pixel. Priority isolation is given to the blue sub-pixel that is prone to crosstalk, so as to achieve maximum inter-pixel crosstalk suppression with minimal process cost.
[0059] In another embodiment, reference continues. Figure 6 A first isolation trench 10111 and a second isolation trench 10112 at least partially surround the third opening region 10203. The angle between the extending directions of the first isolation trench 10111 and the second isolation trench 10112 is greater than 90°. The first isolation trench 10111 and the second isolation trench 10112 form a U-shaped bend to avoid the isolation trenches forming acute-angle structures. This avoids uniformity defects in the isolation trench 1011 caused by insufficient etching or material accumulation.
[0060] Based on the above embodiments, Figure 7This is a schematic diagram of another display panel structure provided in an embodiment of the present utility model, as shown below. Figure 7 As shown, the display panel also includes a second electrode layer 05, which is disposed between the substrate 03 and the light-emitting layer 1021. The second electrode layer 05 includes a plurality of electrodes, which are correspondingly connected to the light-emitting layer 1021.
[0061] Optionally, the second electrode layer 05 is an anode layer.
[0062] Based on the above embodiments, Figure 8 for Figure 3 , Figure 4 , Figure 5 and Figure 6 The four provided display panel embodiments and related technologies without isolation slots demonstrate the color gamut triangle displayed by the display panel under low brightness and low grayscale conditions; wherein, under low brightness and low grayscale conditions, the brightness is 2 nits and the grayscale is L128. Table 1 below shows... Figure 3 , Figure 4 , Figure 5 and Figure 6 A table showing the color gamut coverage of the DCI-P3 color gamut for the four provided display panel embodiments and related technologies without isolation slots:
[0063] Table 1
[0064]
[0065] like Figure 8 As shown, Figure 3 and Figure 6 In the provided embodiments, Figure 3 In the middle, the isolation slot 1011 is only set between the green and red pixels and surrounds the blue pixels in a segmented manner; Figure 6 In the middle, the isolation slot 1011 surrounds the blue pixel only in a segmented manner. Therefore, in Figure 3 and Figure 6 In the provided embodiment, the color gamut of the display panel is smaller than... Figure 4 and Figure 5 The color gamut of the display panel in the provided embodiments.
[0066] As shown in Table 1 above, Figure 4 and Figure 5 In the provided embodiments, the isolation groove 1011 surrounds the first opening region 10201, the second opening region 10202, and the third opening region 10203 in a continuous or segmented manner. Because the isolation groove 1011 surrounds the opening region 102 to a large extent, the inter-pixel crosstalk suppression in adjacent opening regions 102 is good. Therefore, corresponding to… Figure 4 and Figure 5 The display panel in the provided embodiment has a large color gamut coverage of the DCI-P3 color gamut and a low color deviation.
[0067] Continue to refer to Table 1 and Figure 8 The display panel of the related technology without isolation slots has a color gamut coverage of 88%. The color gamut coverage and size of the display panel of the related technology without isolation slots are both smaller than those of this invention for DDCI-P3. Figure 3 , 4 The color gamut coverage and color gamut size of any of the display panels provided in 5 and 6 for DDCI-P3.
[0068] It should be understood that the various forms of the process shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this utility model can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this utility model can be achieved, and this is not limited herein.
[0069] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. A display panel, characterized by, include: A pixel definition layer includes multiple isolation sections and multiple opening areas. The isolation sections are arranged around the opening areas. Along a first direction, at least two stacked light-emitting layers are arranged in the opening areas. An isolation groove is provided on the isolation section, and the width of the groove opening is greater than the width of the groove bottom. A common layer is disposed on one side of the light-emitting layer along the first direction and extends into the isolation groove along the second direction; wherein, the first direction is the thickness direction of the display panel and the second direction intersects with the first direction.
2. The display panel of claim 1, wherein, Also includes: A substrate, wherein the pixel definition layer is disposed on one side of the substrate; A first electrode layer is disposed on the side of the light-emitting layer away from the substrate, and the first electrode layer covers the opening area and the isolation trench.
3. The display panel of claim 1, wherein, The angle between the sidewall and the bottom surface of the isolation groove is greater than or equal to 60° and less than 90°.
4. The display panel of claim 1, wherein, Along the direction from the isolation portion to the opening area, the width of the isolation groove is greater than 1.5 μm and less than 5 μm.
5. The display panel of claim 1, wherein, Along the first direction, the depth of the isolation groove is greater than 0.6 μm and less than 1 μm.
6. The display panel of claim 1, wherein, The isolation groove at least partially surrounds at least one of the opening areas.
7. The display panel of claim 6, wherein, The opening area includes a first opening area, a second opening area, and a third opening area. A first color light-emitting layer is disposed in the first opening area, a second color light-emitting layer is disposed in the second opening area, and a third color light-emitting layer is disposed in the third opening area. The isolation groove at least partially surrounds at least one of the first opening area, the second opening area, and the third opening area.
8. The display panel of claim 7, wherein, The isolation groove includes a first isolation groove and a second isolation groove, the first isolation groove and the second isolation groove are arranged around the same opening area, and there is a break between the first isolation groove and the second isolation groove.
9. The display panel of claim 8, wherein, On both sides of the break, the angle between the extending direction of the first isolation groove and the extending direction of the second isolation groove is greater than or equal to 90°.
10. The display panel of claim 2, wherein, It also includes a second electrode layer disposed between the substrate and the light-emitting layer. The second electrode layer includes a plurality of electrodes, which are correspondingly connected to the light-emitting layer.