DFN package structure with high heat dissipation performance

Abstract

This invention discloses a DFN packaging structure with high heat dissipation performance, including a matrix metal frame and a matrix copper jumper frame disposed on the back of the matrix metal frame. The matrix metal frame includes several chip packaging units arranged in a matrix. Two long connecting ribs in the Y direction and two long connecting ribs in the X direction are arranged around the periphery of each chip packaging unit, and the Y-direction long connecting ribs and the two X-direction long connecting ribs are interconnected. A heat sink is disposed on the back of the matrix metal frame. The matrix copper jumper frame includes several copper jumper units arranged in a matrix, and a first copper jumper is disposed on each copper jumper unit. This invention achieves double-sided heat dissipation of the chip by transferring heat generated on the upper surface of the chip to the outside through the top heat sink and heat generated on the lower surface of the chip to the outside through the metal substrate below the chip and the top metal plate above the chip, thereby improving heat dissipation efficiency.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and more specifically to a DFN packaging structure with high heat dissipation performance. Background Technology

[0002] With the rapid development of power electronics technology in high-power applications, such as new energy vehicles (main drive inverters, on-board chargers), industrial motor drives, renewable energy (photovoltaic inverters, wind power converters), server power supplies, and 5G base station power supplies, the performance requirements for semiconductor power devices are constantly increasing. The power of chips within high-power semiconductor packages is also increasing, leading to a rise in heat flux density (the amount of heat passing through a unit area per unit time) within the structure. Prolonged high-load operation may generate excessive heat, causing temperature increases, performance degradation, and even device burnout.

[0003] Therefore, there is an urgent need for a packaging process with high production efficiency and excellent heat dissipation to meet the needs of technological development. Summary of the Invention

[0004] The technical problem this invention aims to solve is to provide a DFN packaging structure with high heat dissipation performance. This structure enhances the heat dissipation effect of the chip, maximizes the wettable area of ​​the bare copper contact points on the side, and solves the problems of low production efficiency and long inspection time in traditional double-sided heat dissipation, thereby significantly improving product competitiveness.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows.

[0006] A DFN packaging structure with high heat dissipation performance includes a matrix metal frame and a matrix copper jumper frame disposed on the back of the matrix metal frame. The matrix metal frame includes several chip packaging units arranged in a matrix for soldering semiconductor chips. Two long connecting ribs in the Y direction and two long connecting ribs in the X direction are disposed on the periphery of the chip packaging unit. The long connecting ribs in the Y direction and the two long connecting ribs in the X direction are interconnected. A heat sink for chip heat dissipation is disposed on the back of the matrix metal frame. The matrix copper jumper frame includes several copper jumper units arranged in a matrix. The copper jumper units are provided with a first copper jumper for heat dissipation of the front side of the chip.

[0007] The technical solution is further optimized. The chip packaging unit includes a chip welding area set in the middle region for positioning semiconductor chips, and left and right metal contact points set on the left and right sides of the chip welding area for connecting external circuits, respectively. The right metal contact point is connected to the chip welding area, and the left metal contact point is away from the chip welding area and connected to the adjacent Y-direction long connecting rib and X-direction long connecting rib.

[0008] To further optimize the technical solution, the left-side metal contact point includes one independent left-side metal contact point and three interconnected left-side connected metal contact points. The independent left-side metal contact point is connected to the corresponding side's X-direction long connecting rib via a first connecting piece, and the left-side connected metal contact point is connected to the corresponding side's X-direction long connecting rib via a second connecting piece.

[0009] The technical solution is further optimized. The first copper jumper connects the left side of the matrix metal frame to the connected metal contact point and the chip source. A second copper jumper connects the independent metal contact point on the left side of the matrix metal frame to the chip gate. The height of the first copper jumper is higher than the height of the second copper jumper. The area of ​​the first copper jumper is 4 / 5 of the top area of ​​the package structure.

[0010] To further optimize the technical solution, the copper jumper unit is provided with two Y-direction connecting ribs and two X-direction connecting ribs on its periphery, and the two Y-direction connecting ribs and the two X-direction connecting ribs are interconnected.

[0011] To further optimize the technical solution, the chip, the first copper jumper, the second copper jumper, the front surface of the matrix metal frame, and the bottom surface of the matrix copper jumper frame are all covered with plastic encapsulation material.

[0012] The technological advancements achieved by this utility model are as follows, due to the adoption of the above technical solutions.

[0013] The DFN packaging structure with high heat dissipation performance provided by this utility model allows the heat generated on the upper surface of the chip to be transferred to the outside through the top heat sink, which accounts for 4 / 5 of the top area. Since the top heat sink area accounts for 4 / 5 of the top area, the heat dissipation efficiency on the front side of the chip is significantly improved. The heat generated on the lower surface of the chip is transferred to the outside through the metal substrate, so that both the upper and lower surfaces of the chip can dissipate heat, thereby achieving double-sided heat dissipation of the chip and improving the heat dissipation efficiency. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the matrix-type metal leg structure of this utility model; Figure 2 This is a partially enlarged structural diagram of the back of the matrix-type metal frame of this utility model; Figure 3 This is a partially enlarged structural diagram of the chip-attached surface of the matrix-type metal frame of this utility model. Figure 4 This is a schematic diagram of the matrix-type copper jumper frame of this utility model; Figure 5 This is a partially enlarged schematic diagram of the matrix-type copper jumper frame of this utility model; Figure 6A front view of the structure of this utility model with the chip assembled and the first copper jumper and the second copper jumper; Figure 7 This is a cross-sectional view of the packaging unit of this utility model after it is covered by the encapsulation material; Figure 8 This is a cross-sectional view of the packaging unit of this utility model after removing the upper and lower adhesive films; Figure 9 This is a front side view of the packaging structure of this utility model; Figure 10 This is a rear side view of the packaging structure of this utility model; Among them: 1. Matrix metal frame, 101. Chip, 102. Gate, 105. Molding material; Chip packaging unit, 201. Y-direction long connecting rib, 202a. First connecting piece, 202b. Second connecting piece, 203. Right side metal contact point, 204. Bottom heat sink, 205a. Left side independent metal contact point, 205b. Left side connected metal contact point, 206. Chip soldering area, 207. X-direction long connecting rib; Matrix-type copper jumper frame, 300. Copper jumper unit, 301. First copper jumper, 302. Second copper jumper, 303. Through hole, 304. Y-direction connecting rib, 305. X-direction connecting rib, 306. Adhesive film, 308. Connecting rib. Detailed Implementation

[0015] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0016] It features a DFN package structure with high heat dissipation performance, combined with Figures 1 to 10 As shown, it includes a matrix metal frame 1 and a matrix copper jumper frame 3 disposed on the back of the matrix metal frame 1.

[0017] The matrix metal frame 1 includes several chip packaging units 2, which are arranged in a matrix. Each chip packaging unit 2 includes a chip bonding area 206 located in the middle region for bonding chips 101.

[0018] The chip packaging unit 2 has two Y-direction long connecting ribs 201 and two X-direction long connecting ribs 207 on its periphery. The Y-direction long connecting ribs 201 and the two X-direction long connecting ribs 207 are interconnected and connected to the matrix metal frame 1 to ensure the connection between each chip packaging unit and the connection between the chip packaging unit and the matrix metal frame.

[0019] The chip packaging unit 2 includes a chip bonding area 206 located in the middle region. The chip bonding area is used to position the semiconductor chip 101. A left metal contact point and a right metal contact point 203 are respectively provided on the left and right sides of the chip bonding area 206. The right metal contact point 203 is connected to the chip bonding area 206, and the left metal contact point is away from the chip bonding area 206 and is connected to the adjacent Y-direction long connecting rib 201 and two X-direction long connecting ribs 207.

[0020] The left-side metal contact points include one independent left-side metal contact point 205a and three interconnected left-side connected metal contact points 205b. The independent left-side metal contact point 205a is connected to the corresponding side's X-direction long connecting rib 207 via the first connecting piece 202a. The interconnected left-side metal contact points 205b are connected to the corresponding side's X-direction long connecting rib 207 via the second etched connecting piece 202b. Since both the first and second connecting pieces are semi-etched, the three metal contact points protrude beyond the semi-etched first and second connecting pieces.

[0021] On the back of the matrix metal frame 1, a heat sink 204 is provided, which is connected to the metal contact point 203 on the right side.

[0022] A high-temperature film is attached to the back of the matrix metal frame 12, which can withstand extreme high-temperature environments during the molding process, while avoiding epoxy molding material covering the film application area.

[0023] The matrix-type copper patch cord frame 3 includes several copper patch cord units 300. Each copper patch cord unit 300 has two Y-direction connecting ribs 304 and two X-direction connecting ribs 305 arranged around its periphery. The two Y-direction connecting ribs and the two X-direction connecting ribs are interconnected and connected to the matrix-type copper patch cord frame 3. The width of the Y-direction connecting ribs on the matrix-type copper patch cord frame 3 is the same as the width of the long Y-direction connecting ribs on the matrix-type metal frame 1, and the width of the X-direction connecting ribs on the matrix-type copper patch cord frame 3 is the same as the width of the long X-direction connecting ribs on the matrix-type metal frame 1.

[0024] The copper jumper unit 300 is the first copper jumper 301, which is used to dissipate heat from the front of the chip. The first copper jumper 301 is connected to the left-side connected metal contact point 205b on the matrix metal frame 1 and the source of the chip 101. A second copper jumper 302 is also connected between the left-side independent metal contact point 205a on the matrix metal frame 1 and the gate of the chip 101, realizing the electrical conduction between the chip 101 and the matrix metal frame 1.

[0025] The first copper jumper 301 is a thickened copper jumper, with a higher height than the second copper jumper 302, ensuring that the second copper jumper does not protrude from the main body after molding. A through-hole 303 is provided on the first copper jumper 301 to lock the molding material, ensuring a stronger bond between the first copper jumper and the molding material after casting. The exposed area of ​​the first copper jumper is 4 / 5 of the top area of ​​the overall package structure, maximizing heat dissipation on the front of the chip, significantly reducing the chip junction temperature, and allowing for the driving of larger currents or handling of higher power within a smaller physical space.

[0026] During the production process, a single welding machine can simultaneously complete the welding of the first copper jumper wire and the chip on an entire welding material, which greatly improves the production efficiency of semiconductor packaging welding process compared with traditional wire bonding.

[0027] A layer of adhesive film 306 is attached to the front of the matrix copper jumper frame 3. The adhesive film covers the top of the first copper jumper 301. Since the height of the second copper jumper 302 is lower than that of the first copper jumper 301, the second copper jumper 302 is not covered by the adhesive film 306.

[0028] Chip 101, first copper jumper 301, second copper jumper 302, the front of matrix metal frame 1, and the bottom of matrix copper jumper frame 3 are all covered with molding compound. Because the bottom of matrix metal frame 1 and the front of matrix copper jumper frame 3 are covered with adhesive film 306, they are not covered by epoxy resin material during molding. The edges of the matrix metal frame and matrix copper jumper frame are not covered by molding compound 105, exposing the metal frame edges.

[0029] After removing the film 306 from the bottom surface of the matrix metal frame 1 and the front surface of the matrix copper jumper frame 3, the bottom heat sink 204 of the bottom surface of the matrix metal frame 1 and the first copper jumper 301 at the top of the matrix copper jumper frame 3 are exposed outside the epoxy resin material, forming the front heat dissipation of the chip.

[0030] After the matrix copper jumper frame 3 covered with molding compound is cut with a cutting tool, the long connecting ribs 201 in the Y direction on the matrix metal frame 1 are completely cut off. However, the two disconnected left-side metal contact points are connected to the two long connecting ribs 207 in the X direction on the matrix metal frame via two connecting ribs 308, respectively, realizing series connection between the units in the Y direction. Then, a thin cutting tool is used to cut the electroplated packaged unit, completely cutting off the molding compound in the Y direction, the connecting ribs 305 and 207 in the X direction of the matrix copper jumper frame, and the bottom molding compound 105. After cutting, a single packaged device product is obtained. The bottom and sides of the product are coated with solderable material, and there is an exposed copper heat dissipation area on the top.

Claims

1. A DFN package structure with high heat dissipation performance, characterized in that: The system includes a matrix metal frame (1) and a matrix copper jumper frame (3) disposed on the back of the matrix metal frame (1). The matrix metal frame (1) includes several chip packaging units (2) arranged in a matrix for soldering semiconductor chips (101). Two Y-direction long connecting ribs (201) and two X-direction long connecting ribs (207) are provided on the periphery of the chip packaging unit (2). The Y-direction long connecting ribs (201) and the two X-direction long connecting ribs (207) are interconnected. A heat sink (204) for chip heat dissipation is provided on the back of the matrix metal frame (1). The matrix copper jumper frame includes several copper jumper units (300) arranged in a matrix. A first copper jumper (301) for heat dissipation of the front side of the chip is provided on the copper jumper unit (300).

2. The DFN packaging structure with high heat dissipation performance according to claim 1, characterized in that: The chip packaging unit (2) includes a chip bonding area (206) in the middle area for positioning a semiconductor chip (101) and a left metal contact point and a right metal contact point (203) on the left and right sides of the chip bonding area (206) for connecting external circuits, respectively. The right metal contact point (203) is connected to the chip bonding area (206), and the left metal contact point (205) is away from the chip bonding area (206) and connected to the adjacent Y-direction long connecting rib (201) and X-direction long connecting rib (207).

3. The DFN packaging structure with high heat dissipation performance according to claim 2, characterized in that: The left-side metal contact point includes one independent left-side metal contact point (205a) and three interconnected left-side connected metal contact points (205b). The independent left-side metal contact point (205a) is connected to the corresponding X-direction long connecting rib (207) through the first connecting piece (202a), and the left-side connected metal contact point (205b) is connected to the corresponding X-direction long connecting rib (207) through the second connecting piece (202b).

4. The DFN packaging structure with high heat dissipation performance according to claim 3, characterized in that: The first copper jumper (301) connects the left side of the matrix metal frame (1) to the source of the chip (101) via the interconnecting metal contact point (205b). A second copper jumper (302) connects the left side of the matrix metal frame (1) to the gate of the chip (101). The height of the first copper jumper (301) is higher than the height of the second copper jumper (302). The area of ​​the first copper jumper is 4 / 5 of the top area of ​​the package structure.

5. The DFN packaging structure with high heat dissipation performance according to claim 3, characterized in that: The copper jumper unit (300) is provided with two Y-direction connecting ribs (304) and two X-direction connecting ribs (305) on its periphery, and the two Y-direction connecting ribs and the two X-direction connecting ribs are interconnected.

6. The DFN packaging structure with high heat dissipation performance according to claim 4, characterized in that: The chip (101), the first copper jumper (301), the second copper jumper (302), the front of the matrix metal frame (1), and the bottom of the matrix copper jumper frame (3) are all covered with plastic encapsulation material (105).

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