A special-shaped interface board for a HAPS prototype verification platform

Abstract

The utility model provides a special-shaped interface board for HAPS prototype verification platform passes through adopting special-shaped board spare, sets up a plurality of first HapsTrak 3 connector on the bottom face of first PCB board to realize and connect with HAPS prototype verification platform, and does not influence HAPS prototype verification platform and other equipment connection, sets up the first MGB2 connector for being used to connect with HAPS prototype verification platform on the top face of second PCB board to provide multiple connection mode, increases the flexibility and reliability of the special-shaped interface board and HAPS prototype verification platform connection, still sets up a plurality of other connector on the top face of second PCB board to provide a plurality of different types of external interface for connecting with a plurality of different types of external equipment, thereby supports the interface debugging demand of developer diversification, and ensures the rate of signal transmission and anti -interference ability.

Description

Technical Field

[0001] This utility model relates to an interface board technology, and in particular to an irregularly shaped interface board for the HAPS prototype verification platform. Background Technology

[0002] The HAPS-100 prototyping platform, developed by Synopsys, is a physical hardware platform based on an FPGA array. It consists of multiple HAPS-100 computing modules interconnected via a high-speed backplane, used for early verification, software development, and system integration in complex SoC and ASIC designs. The HAPS-100 platform boasts high performance, meeting the demands of high-speed software workloads and hardware verification. It also features high debugging efficiency and scalability, covering everything from portable desktop platforms to data center-level enterprise solutions, and supports multi-user, multi-design parallel development. Therefore, the HAPS-100 platform can be widely applied in emerging technology fields such as AI and autonomous driving, and the RISC-V ecosystem.

[0003] In practical applications, the HAPS-100 prototype verification platform often needs to connect to multiple external devices, including user-defined target boards, interface cards, and test instruments. These user-defined target boards, interface cards, and test instruments typically use various types of interfaces, signal protocols, and physical protocols, making direct connection to the multiple HapsTrak 3 connectors on the HAPS-100 prototype verification platform impossible. Therefore, specific interface boards are required to connect the HAPS-100 prototype verification platform to these external devices.

[0004] With the increasing diversification of electronic device interface types, developers often face diverse interface debugging needs when verifying and debugging devices under test. However, existing interface boards cannot meet these needs, requiring custom development of interface boards. This significantly increases the time, material, and manpower costs in the prototype verification and chip design process, extending the project cycle. Utility Model Content

[0005] In view of the shortcomings of the prior art described above, the technical problem to be solved by this utility model is to provide an irregularly shaped interface board for the HAPS prototype verification platform, so as to solve the technical problem that the existing interface boards have poor adaptability and cannot meet the diverse interface debugging requirements of the HAPS-100 prototype verification platform.

[0006] To achieve the above objectives, this utility model provides an irregularly shaped interface board for a HAPS prototype verification platform. The irregularly shaped interface board for the HAPS prototype verification platform includes: a first PCB board, the bottom surface of which is provided with a plurality of first HapsTrak 3 connectors; each first HapsTrak 3 connector is provided with a first HapsTrak 3 interface, and each first HapsTrak 3 interface is connected to a plurality of adjacent second HapsTrak 3 connectors of the HAPS prototype verification platform; the size of the first PCB board is adapted to the total size of the correspondingly connected plurality of second HapsTrak 3 connectors; a second PCB board, the second PCB board being disposed below the first PCB board and arranged in a stepped manner; the top surface of the second PCB board is provided with a first MGB2 connector, the first MGB2 connector being provided with a first MGB2 interface, the first MGB2 interface being connected to the second MGB2 connectors of the HAPS prototype verification platform; the top surface of the second PCB board is also provided with a plurality of connectors, each connector being provided with one or more external interfaces, and each external interface being connected to a plurality of external devices.

[0007] In some embodiments of the first aspect of this utility model, the first MGB2 connector is disposed on the upper right side of the second PCB board, and the first MGB2 interface is connected to the second MGB2 connector of the HAPS prototype verification platform through the MGB2 electronic wire.

[0008] In some embodiments of the first aspect of this utility model, the types of external interfaces include: M.2 interface, eMMC interface, SPI interface, DC interface, RJ45 network port, USB interface, SD interface, GPIO interface, I2C interface, and JTAG interface.

[0009] In some embodiments of the first aspect of this utility model, an NVME unit is further provided on the right side of the second PCB board; the NVME unit includes: an NVME connector and an NVME storage structure for accommodating an external NVME memory card; the NVME connector is provided with an M.2 interface.

[0010] In some embodiments of the first aspect of this utility model, an eMMC unit is further provided on the upper part of the side of the second PCB board connected to the first PCB board; the eMMC unit includes: an eMMC memory chip and an eMMC connector; the eMMC memory chip is connected to each of the first HapsTrak 3 connectors and the eMMC connector respectively, and the eMMC connector is provided with one or more eMMC interfaces.

[0011] In some embodiments of the first aspect of this utility model, a FLASH unit is further provided on the upper part of the second PCB board; the FLASH unit includes: a FLASH memory chip and a FLASH connector; the FLASH memory chip is connected to each of the first HapsTrak 3 connectors and the FLASH connector respectively, and the FLASH connector is provided with one or more SPI interfaces.

[0012] In some embodiments of the first aspect of this utility model, a power supply unit is further provided at the lower corner of the second PCB board; the power supply unit includes a power switch and a power connector; wherein the power connector is provided with a DC interface.

[0013] In some embodiments of the first aspect of this utility model, an RJ45 network card is further provided at the lower edge of the second PCB board; the RJ45 network card is connected to each of the first HapsTrak 3 connectors, and the RJ45 network card is provided with an RJ45 network port.

[0014] In some embodiments of the first aspect of this utility model, a serial-to-USB adapter is further provided at the lower edge of the second PCB board; the serial-to-USB adapter is connected to each of the first HapsTrak 3 connectors, and the serial-to-USB adapter is provided with one or more USB interfaces.

[0015] In some embodiments of the first aspect of this utility model, an SD card connector is further provided on the side of the second PCB board connected to the first PCB board; the SD card connector is connected to each of the first HapsTrak 3 connectors respectively, and is provided with an SD interface.

[0016] As described above, this utility model has the following beneficial effects: This utility model provides an irregularly shaped interface board for the HAPS prototyping platform. By adopting an irregularly shaped board, multiple first HapsTrak3 connectors are set on the bottom side of the first PCB board to achieve connection with the HAPS prototyping platform without affecting the connection of the HAPS prototyping platform with other devices. A first MGB2 connector for connection with the HAPS prototyping platform is set on the top side of the second PCB board, thereby providing multiple connection methods and increasing the flexibility and reliability of the connection between the irregularly shaped interface board and the HAPS prototyping platform. Multiple other connectors are also set on the top side of the second PCB board to provide multiple different types of external interfaces for connection with multiple different types of external devices, thereby supporting the diverse interface debugging needs of developers and ensuring signal transmission rate and anti-interference capability. Attached Figure Description

[0017] Figure 1The diagram shown is a schematic of an irregularly shaped interface board used in a HAPS prototype verification platform according to an embodiment of the present invention.

[0018] Component designation explanation

[0019] 1 First PCB Board

[0020] 2 Second PCB board

[0021] 21 First MGB2 connector

[0022] 22 NVMe units

[0023] 23 eMMC units

[0024] 24 FLASH units

[0025] 241 FLASH memory chip

[0026] 242 FLASH connector

[0027] 25 power supply units

[0028] 251 Power Switch

[0029] 252 Power Connector

[0030] 26 FJ45 network card

[0031] 27 Serial to USB Adapter

[0032] 28 SD Card Connector

[0033] 29 GPIO connectors

[0034] 210 I2C connector

[0035] 211 JTAG connector Detailed Implementation

[0036] The following specific embodiments illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification.

[0037] It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation of this utility model. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this utility model, should still fall within the scope of the technical content disclosed in this utility model. The following detailed description should not be considered restrictive, and the scope of the embodiments of this utility model is defined only by the claims of the published patents. The terminology used herein is for describing specific embodiments only and is not intended to limit the utility model. Spatial terms such as "upper," "lower," "left," "right," "below," "below," "lower part," "above," "upper part," etc., may be used in the text to illustrate the relationship between one element or feature shown in the figures and another element or feature.

[0038] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," "fixing," and "holding" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0039] Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of the stated feature, operation, element, component, item, kind, and / or group, but do not preclude the presence, occurrence, or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition arise only when combinations of elements, functions, or operations are inherently mutually exclusive in some manner.

[0040] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions in the embodiments of this utility model are further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this utility model and are not intended to limit the invention.

[0041] likeFigure 1 The diagram illustrates a non-standard interface board for a HAPS prototype verification platform provided by this invention. In this embodiment, the non-standard interface board for the HAPS prototype verification platform includes a first PCB board 1 and a second PCB board 2. The second PCB board 2 is disposed below the first PCB board, and the two are arranged in a stepped manner. Specifically, the upper edge of the first PCB board and the upper edge of the second PCB board are located at different heights of the steps.

[0042] In one specific embodiment, such as Figure 1 As shown, both the first PCB board 1 and the second PCB board 2 are rectangular and integrally formed. During manufacturing, one corner of a complete rectangular board can be cut off, creating a rectangular notch. The remaining board is then an irregularly shaped board, used to connect various types of external devices to the HAPS prototype verification platform, thus supporting diverse interface debugging needs of developers. Preferably, the first PCB board 1 has dimensions of 50mm*50mm, and the second PCB board 2 has dimensions of 100mm*120mm. Figure 1 As shown, the left side of the second PCB board 2 is integrally connected to the left side of the first PCB board 1, and the notch on the right side of the first PCB board 1 makes the second PCB board and the first PCB board 1 arranged in a stepped manner.

[0043] The bottom surface of the first PCB board 1 is provided with multiple first HapsTrak 3 connectors (not shown). Each first HapsTrak 3 connector is provided with a first HapsTrak 3 interface, and each first HapsTrak 3 interface is connected to multiple adjacent second HapsTrak 3 connectors of the HAPS prototype verification platform. The size of the first PCB board 1 is adapted to the total size of the corresponding connected multiple second HapsTrak 3 connectors.

[0044] In this embodiment, during use, the first PCB board 1 is placed on the HAPS prototype verification platform. Multiple first HapsTrak 3 connectors located on the bottom surface of the first PCB board 1 are connected to multiple adjacent second HapsTrak 3 connectors of the HAPS prototype verification platform through their respective first HapsTrak 3 interfaces. At this time, each external device can be connected to the irregular interface board through the connector located on the top surface of the second PCB board 2, which is convenient for connection.

[0045] Because the size of the first PCB board 1 is compatible with the total size of the corresponding connected second HapsTrak 3 connectors, and because the first PCB board 1 and the second PCB board 2 are arranged in a stepped manner, the connection of the irregularly shaped interface board to the HAPS prototype verification platform does not affect the connection of other second HapsTrak 3 connectors of the HAPS prototype verification platform to other devices.

[0046] In one specific embodiment, the bottom surface of the first PCB board 1 is provided with three first HapsTrak 3 connectors, each of which has a first HapsTrak 3 interface. The three first HapsTrak 3 connectors are respectively connected to any three adjacent second HapsTrak 3 connectors of the HAPS prototype verification platform through their respective first HapsTrak 3 interfaces. The size of the first PCB board 1 is adapted to the total size of the three adjacent second HapsTrak 3 connectors.

[0047] like Figure 1 As shown, a first MGB2 connector 21 is provided on the top surface of the second PCB board 2. The first MGB2 connector 21 is provided with a first MGB2 interface, which is connected to the second MGB2 connector of the HAPS prototype verification platform.

[0048] In one embodiment, such as Figure 1 As shown, the first MGB2 connector 21 is located on the upper right side of the second PCB board 2. The first MGB2 interface is connected to the second MGB2 connector of the HAPS prototype verification platform via an MGB2 signal line. The MGB2 signal line can transmit based on the PCIe signal protocol.

[0049] In this embodiment, the irregularly shaped interface board can be connected to the HAPS prototype verification platform through multiple first HapsTrak 3 connectors and / or the first MGB2 connector. The two connection methods increase the flexibility and reliability of the connection between the irregularly shaped interface board and the HAPS prototype verification platform.

[0050] The top surface of the second PCB board 2 is also provided with multiple connectors, each connector having one or more external interfaces, and each external interface being connected to multiple external devices.

[0051] Specifically, the types of external interfaces include at least: M.2 interface, eMMC interface, SPI interface, DC interface, RJ45 network port, USB interface, SD interface, GPIO interface, I2C interface, and JTAG interface. Thus, various types of external devices can be connected to the HAPS prototyping platform through different types of external interfaces, supporting diverse interface debugging needs of developers.

[0052] In one embodiment, an NVME unit 22 is also provided on the right side of the second PCB board 2.

[0053] like Figure 1 As shown, the NVME unit 22 is adjacent to the first MGB2 connector 21. Preferably, as Figure 1 As shown, the NVME unit 22 is located on the right side of the second PCB board 2, below the first MGB2 connector 21.

[0054] The NVME unit 22 includes an NVME connector and an NVME storage structure. The NVME storage structure is used to accommodate an NVME memory card; the NVME connector is provided with an M.2 interface, which supports the connection of external NVME memory cards. Preferably, the M.2 interface supports both 2240 and 2280 NVMe memory cards.

[0055] In one embodiment, the M.2 interface can be connected to an external NVMe memory card via a PCIe signal cable. Preferably, the NVMe connector's positioning hole faces downwards, and the M.2 interface faces upwards, which helps to reduce the length of the PCIe signal cable connecting it to the external NVMe memory card.

[0056] An external NVME memory card is placed in the NVME storage structure and connected to the NVME connector through the M.2 interface. At the same time, it is connected to the first MGB2 connector through PCB traces. The first MGB2 interface of the first MGB2 connector is connected to the HAPS prototype verification platform through MGB2 electronic wires, thereby realizing the connection between the external NVME memory card and the HAPS prototype verification platform.

[0057] The purpose of this design in this embodiment is that the first MGB2 connector 21 and the NVME unit 22 do not need to be connected to the first HapsTrak 3 connector. This invention places the first MGB2 connector 21 and the NVME unit 22 on the side of the second PCB board 2 away from the first PCB board 1. This reduces interference with the signal lines of the first HapsTrak 3 connector and facilitates the connection of external NVME memory cards to the NVME unit 22 and the first MGB2 connector 21, thus reducing the length of the PCIe signal lines used for connection. Furthermore, it does not affect the connection between other connectors. The first MGB2 connector 21 is positioned above the NVME unit 22, closer to the HAPS prototype verification platform, which further reduces the length of the MGB2 signal lines connecting it to the HAPS prototype verification platform.

[0058] In one embodiment, such as Figure 1 As shown, an eMMC unit 23 is also provided on the upper part of the side of the second PCB board 2 connected to the first PCB board 1. Preferably, the eMMC unit 23 is adjacent to the first PCB board 1.

[0059] The eMMC unit 23 is connected to each of the first HapsTrak 3 connectors. Specifically, the eMMC unit 23 is connected to each of the first HapsTrak 3 connectors via signal lines.

[0060] The eMMC unit 23 includes an eMMC storage chip and an eMMC connector. The eMMC storage chip is connected to each of the first HapsTrak 3 connectors and the eMMC connector. The eMMC connector has one or more eMMC interfaces, each of which can support the connection of one or more corresponding types of external devices.

[0061] It should be noted that the eMMC connector provides a physical interface for connecting the eMMC memory chip to external devices. In order to ensure high-speed data transmission of each provided eMMC interface, the present invention places the eMMC unit 23 near the first PCB board 1. The signal line connecting the eMMC unit 23 to each first HapsTrak 3 connector is the shortest possible, avoiding signal attenuation and distortion, and shortening transmission delay.

[0062] In one embodiment, such as Figure 1 As shown, the upper end of the second PCB board 2 is also provided with a FLASH unit 24. Preferably, the FLASH unit 24 is close to the first PCB board 1.

[0063] The FLASH unit 24 is connected to each of the first HapsTrak 3 connectors. Specifically, the FLASH unit 24 is connected to each of the first HapsTrak 3 connectors via signal lines.

[0064] like Figure 1 As shown, the FLASH unit 24 includes a FLASH storage chip 241 and a FLASH connector 242. The FLASH storage chip 241 is connected to each of the first HapsTrak 3 connectors and the FLASH connector 242. The FLASH connector 242 is provided with one or more SPI interfaces, each SPI interface supporting the connection of one or more corresponding types of external devices.

[0065] It should be noted that the FLASH unit 24 is also located near the first PCB board 1 in this invention. The purpose is to minimize the signal line connecting the FLASH unit 24 to each of the first HapsTrak 3 connectors, avoid signal attenuation and distortion, shorten transmission delay, and ensure the high-speed performance of each SPI interface.

[0066] In one embodiment, a power supply unit 25 is further provided at the lower corner of the second PCB board 2. Preferably, as shown below... Figure 1 As shown, the power supply unit 25 is located at the lower left corner of the second PCB board 2.

[0067] The purpose of this design in this embodiment is to place the power supply unit 25 at a corner position away from the first PCB board 1. On the one hand, this can reduce the interference of the power supply unit 25 on the signal lines connecting each connector and each first HapsTrak3 connector, and reduce the interference of power signals on other signals. On the other hand, it is more convenient for the power supply unit 25 to be connected to an external power source.

[0068] like Figure 1 As shown, the power supply unit 25 includes a power switch 251 and a power connector 252. The power connector 252 is provided with a DC interface, which supports connection to an external power source, supplying power to the irregularly shaped interface board after the power is turned on.

[0069] In one embodiment, such as Figure 1 As shown, an RJ45 network card 26 is also provided at the lower edge of the second PCB board 2. Preferably, as... Figure 1 As shown, the RJ45 network card 26 is located near the power supply unit 25 and is situated on the right side of the power supply unit 25.

[0070] The RJ45 network card 26 is connected to each of the first HapsTrak 3 connectors. Specifically, the RJ45 network card 26 is connected to each of the first HapsTrak 3 connectors via signal lines.

[0071] The RJ45 network card 26 is equipped with an RJ45 network port, which can support the connection of external network devices.

[0072] In one embodiment, such as Figure 1 As shown, a serial-to-USB adapter 27 is also provided at the lower edge of the second PCB board 2. Preferably, the serial-to-USB adapter 27 is close to the RJ45 network card 26.

[0073] The serial-to-USB adapter 27 is connected to each of the first HapsTrak 3 connectors. Specifically, the serial-to-USB adapter 27 is connected to each of the first HapsTrak 3 connectors via signal lines.

[0074] The serial-to-USB adapter 27 is provided with one or more USB ports, each of which can support the connection of one or more external USB devices.

[0075] The purpose of this design is to place the serial-to-USB adapter 27 at the lower edge of the second PCB board 2, so that when connecting or disconnecting various USB devices, they can be plugged in and unplugged along the length of the irregular interface board. This not only facilitates plugging and unplugging but also does not affect the stability of the connection between the irregular interface board and the HAPS prototype verification platform.

[0076] In one embodiment, an SD card connector 28 is further provided on the side of the second PCB board 2 that is connected to the first PCB board 1. Preferably, as shown below... Figure 1 As shown, the SD card connector 28 is located on the left side of the second PCB board 2, and the NVME unit 22 is located on both sides of the second PCB board 2.

[0077] The SD card connector 28 is connected to each of the first HapsTrak 3 connectors. Specifically, the SD card connector 28 is connected to each of the first HapsTrak 3 connectors via signal lines. The SD card connector 28 is provided with an SD interface, which supports the connection of external SD memory cards.

[0078] In one embodiment, such as Figure 1As shown, the second PCB board 2 is also provided with a GPIO connector 29, an I2C connector 210, and a JTAG connector 211, which can provide one or more GPIO interfaces, one or more I2C interfaces, and one or more JTAG interfaces, respectively, for connecting one or more corresponding types of external devices. The GPIO connector 29, the I2C connector 210, and the JTAG connector 211 are respectively connected to each of the first HapsTrak 3 connectors, specifically, they are connected to each of the first HapsTrak 3 connectors through signal lines.

[0079] It should be noted that the GPIO connector 29, the I2C connector 210 and the JTAG connector 211 can be located in the middle of the second PCB board 2. Users can design them as needed, and this application does not limit them.

[0080] Preferred, such as ​ As shown, the GPIO connector 29 and the I2C connector 210 are located in the middle of the top surface of the second PCB board 2, and the JTAG connector 211 is located between the power supply unit 25 and the SD card connector 28.

[0081] This invention provides an irregularly shaped interface board for the HAPS prototyping platform. By employing an irregularly shaped board, multiple first HapsTrak 3 connectors are set on the bottom side of the first PCB board to achieve connection with the HAPS prototyping platform without affecting the connection of the HAPS prototyping platform to other devices. A first MGB2 connector for connection with the HAPS prototyping platform is set on the top side of the second PCB board, thereby providing multiple connection methods and increasing the flexibility and reliability of the connection between the irregularly shaped interface board and the HAPS prototyping platform. Multiple other connectors are also set on the top side of the second PCB board to provide multiple different types of external interfaces for connection with multiple different types of external devices, thereby supporting the diverse interface debugging needs of developers and ensuring signal transmission speed and anti-interference capability.

[0082] In summary, this utility model effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0083] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. An irregularly shaped interface board for a HAPS prototype verification platform, characterized in that, include: A first PCB board has multiple first HapsTrak 3 connectors on its bottom side; each first HapsTrak 3 connector has a first HapsTrak 3 interface, and each first HapsTrak 3 interface is connected to multiple adjacent second HapsTrak 3 connectors of the HAPS prototype verification platform; the size of the first PCB board is adapted to the total size of the corresponding connected multiple second HapsTrak 3 connectors. The second PCB board is located below the first PCB board and is arranged in a stepped manner. The top surface of the second PCB board is provided with a first MGB2 connector, which is provided with a first MGB2 interface. The first MGB2 interface is connected to the second MGB2 connector of the HAPS prototype verification platform. The top surface of the second PCB board is also provided with multiple connectors, each of which is provided with one or more external interfaces, and each external interface is connected to multiple external devices.

2. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 1, characterized in that, The first MGB2 connector is located on the upper right side of the second PCB board, and the first MGB2 interface is connected to the second MGB2 connector of the HAPS prototype verification platform through the MGB2 electronic wire.

3. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 1, characterized in that, The types of external interfaces include: M.2 interface, eMMC interface, SPI interface, DC interface, RJ45 network port, USB interface, SD interface, GPIO interface, I2C interface, and JTAG interface.

4. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 3, characterized in that, The right side of the second PCB board is also provided with an NVME unit; the NVME unit includes: an NVME connector and an NVME storage structure for accommodating an external NVME memory card; the NVME connector is provided with an M.2 interface.

5. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 3, characterized in that, An eMMC unit is also provided on the upper part of the side of the second PCB board connected to the first PCB board; the eMMC unit includes an eMMC memory chip and an eMMC connector; the eMMC memory chip is connected to each of the first HapsTrak 3 connectors and the eMMC connector respectively, and the eMMC connector is provided with one or more eMMC interfaces.

6. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 3, characterized in that, The upper part of the second PCB board is also provided with a FLASH unit; the FLASH unit includes: a FLASH memory chip and a FLASH connector; the FLASH memory chip is connected to each of the first HapsTrak 3 connectors and the FLASH connector respectively, and the FLASH connector is provided with one or more SPI interfaces.

7. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 3, characterized in that, A power supply unit is also provided at the lower corner of the second PCB board; the power supply unit includes a power switch and a power connector; wherein the power connector is provided with a DC interface.

8. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 6, characterized in that, An RJ45 network card is also provided at the lower edge of the second PCB board; the RJ45 network card is connected to each of the first HapsTrak 3 connectors, and the RJ45 network card is provided with an RJ45 network port.

9. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 7, characterized in that, A serial-to-USB adapter is also provided at the lower edge of the second PCB board; the serial-to-USB adapter is connected to each of the first HapsTrak 3 connectors, and the serial-to-USB adapter is provided with one or more USB interfaces.

10. The irregularly shaped interface board for the HAPS prototype verification platform according to claim 3, characterized in that, The second PCB board is also provided with an SD card connector on the side connected to the first PCB board; the SD card connector is connected to each of the first HapsTrak 3 connectors and is provided with an SD interface.

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