A packaged device

Abstract

The utility model discloses a kind of packaging devices, the packaging device includes: substrate, a plurality of light emitting chips arranged on substrate;The top surface of the substrate is based on etching to form sunken area and boss area, and the sunken area is configured as the die bonding area of the light emitting chip;The boss area is based on riverway and is divided into a plurality of pad areas, and the top surface electrode of a plurality of the light emitting chips and a plurality of pad areas are based on wire bonding one-to-one corresponding electrical connection.Through the die bonding area of light emitting chip is set to sunken structure, so that die bonding area and pad area form height difference, thereby shorten the wire bonding wire distance of light emitting chip top surface electrode, improve wire bonding efficiency, and effectively improve the structural stability of packaging device.

Description

Technical Field

[0001] This utility model relates to the field of packaging device technology, and specifically to a packaging device. Background Technology

[0002] Existing Quad Flat No-leads Package (QP) devices are widely favored due to their shock-resistant design, compatibility with quick assembly and disassembly, and ability to address the pain points of frequent transportation and installation damage associated with rental screens. Employing a hidden pin design combined with etching processes improves the stability of the device structure. However, because the light-emitting chip and pads in existing packages are primarily connected via wire bonding, the significant height difference between the top electrode of the light-emitting chip and the substrate pads results in long wire bonding distances, impacting bonding efficiency. Furthermore, excessively long wire structures have weak load-bearing capacity, making them prone to collapse and affecting the structural stability of the packaged device. Utility Model Content

[0003] The purpose of this invention is to overcome the shortcomings of the prior art. This invention provides a packaging device that, by setting the die-bonding area of ​​the light-emitting chip as a recessed structure, creates a height difference between the die-bonding area and the pad area, thereby shortening the wire bonding distance of the top electrode of the light-emitting chip, improving the wire bonding efficiency, and effectively improving the structural stability of the packaging device.

[0004] This utility model provides a packaging device, which includes: a substrate and a plurality of light-emitting chips disposed on the substrate;

[0005] The top surface of the substrate is etched to form a recessed region and a boss region, and the recessed region is configured as the die-bonding region of the light-emitting chip.

[0006] The raised area is divided into several pad areas based on the river channel, and the top electrodes of several light-emitting chips are electrically connected to several pad areas in a one-to-one correspondence based on bonding wires.

[0007] Furthermore, the bottom surface of the substrate is provided with a plurality of electrical pins, and the substrate is provided with a plurality of electrical channels.

[0008] The plurality of electrical pins are electrically connected to the die-bonding region of the substrate and the plurality of pad regions based on the plurality of electrical channels.

[0009] Furthermore, the height difference between the pad region and the die-bonding region is h1, and the value of h1 is in the range of 40μm≤h1≤80μm.

[0010] Furthermore, the width of the river channel is d, and the value of d ranges from 60μm to 70μm.

[0011] Furthermore, the packaging device also includes a cover plate that covers the substrate, and the cover plate has a light-emitting port at the center of the substrate.

[0012] Furthermore, the opening area of ​​the light-emitting port is S1, the top surface area of ​​the encapsulation device is S2, and the constraint relationship between S1 and S2 is: 0.8*S2≤S1≤S2.

[0013] Furthermore, the top surface of the cover plate is covered with an anti-climbing adhesive layer, the thickness of which is h2, and the value of h2 is in the range of 0.008mm≤h2≤0.15mm.

[0014] Furthermore, the anti-creep adhesive layer is made of polyimide film.

[0015] Furthermore, the encapsulation device also includes an epoxy resin layer disposed between the cover plate and the substrate.

[0016] Furthermore, the thickness of the epoxy resin layer is h3, and the value of h3 is in the range of 10μm≤h3≤20μm.

[0017] This invention provides a packaging device that forms a die-bonding region with a sunken structure by etching the substrate, so that the die-bonding region and the pad region of the substrate can form a height difference, reducing the chip bonding wire distance, improving the bonding efficiency of the light-emitting chip, and reducing the stress on the bonding wire, thereby effectively improving the packaging structure stability of the packaging device. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a top view of the packaged device in an embodiment of this utility model;

[0020] Figure 2 This is a side view of the substrate structure of the packaged device in an embodiment of this utility model;

[0021] Figure 3 This is a schematic diagram of the substrate structure of the packaging device in an embodiment of this utility model;

[0022] Figure 4 This is a schematic diagram of the bottom structure of the encapsulated device in an embodiment of this utility model;

[0023] Figure 5 This is a schematic diagram of the light-emitting chip bonding wire structure of the packaged device in this utility model embodiment;

[0024] Figure 6 This is a schematic diagram of the etching structure of the substrate of the packaged device in this embodiment of the present invention;

[0025] Figure 7 This is a schematic diagram of the finished structure of the substrate material of the packaging device in this embodiment of the present invention;

[0026] Figure 8 This is a schematic diagram of the cover plate structure of the packaging device in an embodiment of this utility model;

[0027] Figure 9 This is a schematic diagram of the mating structure between the cover plate and the substrate of the packaging device in an embodiment of this utility model;

[0028] Figure 10 This is a schematic diagram of the bottom surface structure of the substrate of the encapsulated device in this embodiment of the present invention. Detailed Implementation

[0029] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0030] Please refer to Figures 1 to 10 This utility model provides a packaging device, which includes: a substrate 1 and a plurality of light-emitting chips 5 disposed on the substrate 1; the top surface of the substrate 1 is formed by etching to form a recessed region and a boss region, and the recessed region is configured as a die-bonding region 11 of the light-emitting chip 5. The width of the die-bonding region 11 is set between 200μm and 300μm, so that the die-bonding region 11 can meet the die-bonding requirements of the light-emitting chip 5.

[0031] Die-bonding operations are performed on red light chips, green light chips, and blue light chips in the die-bonding region 11 of the substrate 1, so that the device can meet the requirements of light-emitting display.

[0032] Furthermore, the die-bonding region 11 can be formed by laser etching or mechanical etching. The etching equipment performs etching operations on the substrate 1 along a preset path, so that the die-bonding region 11 with a sunken structure can be formed in the corresponding area of ​​the substrate 1.

[0033] Specifically, the raised area is divided into several pad areas 12 based on the channel 13. The top electrodes of several light-emitting chips 5 are electrically connected to several pad areas 12 in a one-to-one correspondence based on bonding wires 6. The channel 13 can be processed by laser etching or mechanical etching, and the horizontal height of the channel 13 can be consistent with the horizontal height of the die-bonding area 11. This allows the etching operation of the channel 13 to be performed simultaneously when the substrate 1 performs the etching operation of the die-bonding area 11, thereby improving the processing convenience of the packaged device and improving the processing efficiency of the substrate 1.

[0034] Specifically, the bottom surface of the substrate 1 is provided with a plurality of electrical pins 15, and the substrate 1 is provided with a plurality of electrical channels 14. Holes are drilled at corresponding positions on the substrate 1 by laser etching equipment to form through holes penetrating the top and bottom surfaces of the substrate 1. By plating a metal coating on the inner wall of the through hole, the through hole can electrically connect the top surface pad and the bottom surface pin of the substrate 1 based on the metal coating, thereby forming the electrical channels 14 inside the substrate 1.

[0035] Furthermore, the plurality of electrical pins 15 are electrically connected to the die-bonding region 11 and the plurality of pad regions 12 of the substrate 1 based on the plurality of electrical channels 14, so that the packaged device can meet the electrical connection requirements with external working circuits based on the electrical pins 15.

[0036] Specifically, in this embodiment, the plurality of pad areas 12 include a first pad 121, a second pad 122 and a third pad 123, the plurality of electrical pins 15 include a first electrical pin 151, a second electrical pin 152, a third electrical pin 153 and a fourth electrical pin 154, and the plurality of light-emitting chips 5 include a red light chip, a green light chip and a blue light chip;

[0037] Furthermore, the red light chip is a vertical chip, with its positive terminal located on the top surface and electrically connected to the third pad 123 via bonding wire 6. The negative terminal is electrically connected to the die-bonding region 11 via direct die bonding. The die-bonding region 11 is electrically connected to the first electrical pin 151 via electrical channel 14, meaning the negative terminal of the red light chip is electrically connected to the first electrical pin 151.

[0038] Furthermore, the green light chip is a top-mounted chip, with its positive and negative terminals located on the top surface. The positive terminal of the green light chip is electrically connected to the third pad 123 via bonding wire 6, and the negative terminal is electrically connected to the first pad 121 via bonding wire 6. The first pad 121 is electrically connected to the second electrical pin 152 via electrical channel 14, meaning the negative terminal of the green light chip is electrically connected to the second electrical pin 152.

[0039] Furthermore, the blue light chip is a front-mounted chip, with its positive and negative terminals located on the top surface. The positive terminal of the blue light chip is electrically connected to the third pad 123 via bonding wire 6, and the negative terminal is electrically connected to the second pad 122 via bonding wire 6. The second pad 122 is electrically connected to the third electrical pin 153 via electrical channel 14, meaning the negative terminal of the blue light chip is electrically connected to the third electrical pin 153.

[0040] Furthermore, the third pad 123 is electrically connected to the fourth electrical pin 154 based on the electrical channel 14, so that the positive terminals of the red light chip, the green light chip, and the blue light chip can be electrically connected to the fourth electrical pin 154. The red light chip, the green light chip, and the blue light chip can form a common anode connection structure, so that the packaged device can meet the lighting installation requirements of the display screen.

[0041] Furthermore, the red light chip, green light chip, and blue light chip can also be configured as a common cathode connection structure to meet the electrical connection requirements of the external working circuit.

[0042] Furthermore, the outline of the fourth electrical pin 154 is different from that of the first electrical pin 151, the second electrical pin 152, and the third electrical pin 153, thereby enabling the marking of the common electrical pin 15 of the device and improving the ease of installation of the packaged device.

[0043] Specifically, the height difference between the pad region 12 and the die-bonding region 11 is h1, and the value of h1 is in the range of 40μm≤h1≤80μm. A sunken structure is formed on the substrate 1 by etching, so that the height difference between the die-bonding region 11 and the pad region 12 can be between 40μm and 80μm, specifically one of 40μm, 50μm, 60μm, 70μm, and 80μm, to meet the wire bonding connection requirements between the top electrode of the light-emitting chip 5 and the pad region 12, which can effectively shorten the wire bonding distance and improve the wire bonding efficiency of the light-emitting chip 5.

[0044] Specifically, the width of the channel 13 is d, and the value of d is in the range of 60μm≤d≤70μm. The value of d can be one of 60μm, 62μm, 64μm, 66μm, 68μm, and 70μm, so that the channel 13 can isolate the die-bonding region 11 and the pad region 12, and avoid short circuit between the die-bonding region 11 and the pad region 12 on the substrate 1.

[0045] Furthermore, the channel 13 is filled with polyamide (PPA) plastic, which is a high-performance resin with good insulation properties. The PPA filling in the channel 13 makes the top surface of the channel 13 flush with the top surface of the metal plating of the die-bonding region 11, which can ensure the flatness of the sinking structure of the substrate 1, so as to fill the encapsulating colloid in the sinking structure of the substrate 1.

[0046] Furthermore, the channel 13 and the die-bonding region 11 can be processed simultaneously using an etching device, effectively improving the fabrication efficiency of the substrate 1.

[0047] Specifically, the encapsulation device further includes a cover plate 3, which covers the substrate 1, and the cover plate 3 is provided with a light-emitting port 31 at the center position of the substrate 1. The cover plate 3 is configured as black plastic. In this embodiment, the material of the cover plate 3 can be FR4 black core material, that is, epoxy resin material with good flame retardant properties, which can be suitable for the encapsulation structure requirements of the encapsulation device. By setting the black material, the light emission contrast of the device can be improved, thereby improving the display effect of the display screen.

[0048] Furthermore, the opening area of ​​the light-emitting port 31 is S1, and the top surface area of ​​the encapsulation device is S2. The constraint relationship between S1 and S2 is: 0.8*S2≤S1≤S2, that is, the size of the light-emitting port 31 occupies at least 4 / 5 of the top surface of the encapsulation device, ensuring that the light-emitting chip 5 of the encapsulation device has a good light-emitting effect, and the die-bonding area 11 of the encapsulation device can be exposed at the position of the light-emitting port 31.

[0049] Specifically, the top surface of the cover plate 3 is covered with an anti-climb adhesive layer, the thickness of which is h2, and the value of h2 is in the range of 0.008mm ≤ h2 ≤ 0.15mm. The anti-climb adhesive layer 4 is made of polyimide film. Because the polyimide coating on the top surface of the cover plate 3 forms a barrier structure, the risk of adhesive overflow during device encapsulation can be reduced.

[0050] Furthermore, polyimide film has good chemical resistance and insulation, which can meet the encapsulation requirements of packaged devices while effectively preventing leakage.

[0051] Specifically, the encapsulation device further includes an epoxy resin layer 2, which is disposed between the cover plate 3 and the substrate 1. The epoxy resin layer 2 is used to enhance the structural connection performance between the cover plate 3 and the substrate 1, so that the cover plate 3 can be pressed and fixed on the substrate 1.

[0052] Furthermore, the thickness of the epoxy resin layer 2 is h3, and the value of h3 is in the range of 10μm≤h3≤20μm. The value of h3 can be one of 10μm, 13μm, 16μm, 18μm, and 20μm, so that the epoxy resin can meet the pressing and installation requirements of the cover plate 3.

[0053] Specifically, the fabrication process of the substrate 1 structure of the device is as follows:

[0054] A substrate 1 material is provided. The substrate 1 material is cut into a substrate plate of the required size according to the actual processing requirements. The substrate plate is divided into several sections. Each section is configured as the substrate 1 size of a single device. The top surface of each section is etched according to a preset pattern by mechanical etching or chemical etching, thereby forming a die-bonding region 11 with a sunken structure. This creates a height difference between the die-bonding region 11 and the pad region 12, achieving the pad lifting effect of the pad region 12.

[0055] Through-hole processing is performed on each section of the substrate using mechanical drilling or laser drilling. A metal layer is plated on the inner wall of the through-hole of the substrate 1 by electroplating. By processing pads at the positions corresponding to the through-hole structures, a die-bonding region 11 and a pad region 12 are formed on the top surface of any section of the substrate, and an electrical pin 15 is formed on the bottom surface of any section.

[0056] Furthermore, the channel 13 is processed by mechanical etching or laser etching, and PPA is used to fill the channel 13 to achieve electrical isolation between the die-bonding region 11 and the pad region 12.

[0057] Specifically, a cover plate is provided, and a polyimide film is coated on the cover plate to form an anti-climb adhesive layer. The cover plate is punched with a punching device to form light-emitting ports 31 at positions corresponding to several intervals. The aperture of the light-emitting ports 31 is set according to the size specifications of the device, and the distance between any two adjacent light-emitting ports 31 on the cover plate is set to be between 300μm and 310μm to meet the requirements of the cover plate to cover and press the substrate 1, and to meet the requirements of dicing and cutting the device.

[0058] Furthermore, an epoxy resin is coated on the substrate, with the coating thickness set between 10μm and 20μm. The punched cover plate is then pressed onto the substrate to form the pressed cup substrate 1.

[0059] In the press cup substrate 1, die bonding and wire bonding 6 are performed. The raised area is configured as the wire bonding 6 area, which can effectively reduce the amount of wire bonding 6 and improve the efficiency of wire bonding 6. At the same time, as the wire bonding 6 area is raised, the tilt angle of the wire bonding 6 between the light-emitting chip 5 and the pad area 12 is reduced, which can reduce the stress on the connection point between the wire bonding 6 and the pad area 12 and improve reliability.

[0060] Specifically, the encapsulation is performed by dispensing adhesive through multiple valve heads. The anti-climb adhesive layer 4 can effectively prevent the adhesive from directly contacting the cover plate, thus reducing the problem of adhesive crawling.

[0061] Furthermore, several packaged devices are formed through dicing, grinding, baking, testing, and sorting.

[0062] This utility model provides a packaging device. By etching a substrate 1 to form a die-bonding region 11 with a recessed structure, a height difference can be formed between the die-bonding region 11 and the pad region 12 of the substrate 1. This reduces the bonding distance of the chip bonding wire 6, improves the bonding efficiency of the light-emitting chip 5 bonding wire 6, and reduces the stress on the bonding wire 6, thereby effectively improving the packaging structure stability of the packaging device.

[0063] Furthermore, the above description provides a detailed overview of the packaging device provided in the embodiments of this utility model. Specific examples have been used to illustrate the principles and implementation methods of this utility model. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this utility model. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this utility model. Therefore, the content of this specification should not be construed as a limitation of this utility model.

Claims

1. A packaged device, characterized in that, The packaging device includes: a substrate and a plurality of light-emitting chips disposed on the substrate; The top surface of the substrate is etched to form a recessed region and a boss region, and the recessed region is configured as the die-bonding region of the light-emitting chip. The protrusion area is divided into several pad areas based on the river channel, and the top electrodes of several light-emitting chips are electrically connected to several pad areas in a one-to-one correspondence based on bonding wires. The bottom surface of the substrate is provided with a plurality of electrical pins, and the substrate is provided with a plurality of electrical channels. The plurality of electrical pins are electrically connected to the die-bonding region of the substrate and the plurality of pad regions based on the plurality of electrical channels; The channel and the die-bonding area are integrally formed by etching, and the channel is filled with PPA plastic. The top surface of the channel is flush with the top surface of the metal plating layer of the die-bonding area.

2. The packaged device as described in claim 1, characterized in that, The height difference between the pad region and the die-bonding region is h1, and the value of h1 is in the range of 40μm≤h1≤80μm.

3. The packaged device as described in claim 1, characterized in that, The width of the river channel is d, and the value of d is in the range of 60μm≤d≤70μm.

4. The packaged device as claimed in claim 1, characterized in that, The packaging device further includes a cover plate that covers the substrate and has a light-emitting port located at the center of the substrate.

5. The packaged device as described in claim 4, characterized in that, The opening area of ​​the light-emitting port is S1, the top surface area of ​​the packaged device is S2, and the constraint relationship between S1 and S2 is: 0.8 S2≤S1≤S2.

6. The packaged device as claimed in claim 4, characterized in that, The top surface of the cover plate is covered with an anti-climbing adhesive layer, the thickness of which is h2, and the value of h2 is in the range of 0.008mm≤h2≤0.15mm.

7. The packaged device as claimed in claim 6, characterized in that, The anti-climb adhesive layer is made of polyimide film.

8. The packaged device as claimed in claim 4, characterized in that, The encapsulation device further includes an epoxy resin layer disposed between the cover plate and the substrate.

9. The packaged device as claimed in claim 8, characterized in that, The thickness of the epoxy resin layer is h3, and the value of h3 is in the range of 10μm≤h3≤20μm.

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