Power module
Patent Information
- Application Number
- CN202521340081.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-27
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2035-06-27
AI Technical Summary
[0003]然而,银与铜所产生的界面金属间化合物(Intermetalli c Compound,I MC)的牢固性较差,银与铜的接合强度约为20至40MPa,因此常有晶片落的现象
[0026] The embodiments of this application increase the adhesion between the wafer and the first copper layer by adding a solder paste layer as an intermediary metal between the silver paste layer and the first copper layer, making the bonding between the wafer and the first copper layer tighter and reducing and avoiding the risk of delamination in the prior art. Furthermore, grooves may be provided on the first copper layer for the solder paste layer to fill, further increasing adhesion.
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Figure CN224654011U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of this utility model relate to a power module. Background Technology
[0002] In the structure of power modules, chips are often placed on copper, which is then combined with ceramic heat sinks to increase heat dissipation. Currently, with the development trend in the field of heat dissipation, sintering is often used instead of solder paste to increase the heat dissipation efficiency between the chip and the copper. Silver paste is currently a common sintering material.
[0003] However, the intermetallic compound (IMC) formed between silver and copper has poor adhesion, with a bonding strength of approximately 20 to 40 MPa, which often results in wafers falling off. Utility Model Content
[0004] In view of the problems existing in the related technologies, the purpose of this utility model is to provide a power module to at least improve the yield of power modules.
[0005] To achieve the above objectives, this utility model provides a power module, comprising: a ceramic substrate including a ceramic core layer and a first copper layer disposed on the ceramic core layer, the first copper layer having a groove; a wafer disposed above the groove; and an adhesive layer accommodating the groove and contacting the wafer, the adhesive layer comprising a silver paste layer and a solder paste layer.
[0006] In some embodiments, the solder paste layer contacts the first copper layer, and the silver paste layer is disposed between the solder paste layer and the wafer.
[0007] In some embodiments, the solder paste layer overflows from the groove.
[0008] In some embodiments, the solder paste layer covers the lateral edges of the silver paste layer.
[0009] In some embodiments, at least a portion of the silver paste layer is recessed into the groove.
[0010] In some embodiments, the horizontal width of the groove is greater than that of the wafer.
[0011] In some embodiments, the horizontal width of the adhesive layer is greater than that of the wafer.
[0012] In some embodiments, the adhesive layer contacts at least a portion of the sidewall of the wafer.
[0013] In some embodiments, the power module further includes: wire bonding to electrically connect the wafer and the first copper layer.
[0014] In some embodiments, the power module further includes a molding layer covering the ceramic substrate, the wafer, and the adhesive layer.
[0015] In some embodiments, the bottom surface of the wafer is provided with a titanium layer, a nickel-vanadium alloy layer disposed on the titanium layer, and a silver layer disposed on the nickel-vanadium alloy layer.
[0016] In some embodiments, the silver layer contacts the adhesive layer.
[0017] In some embodiments, the power module further includes a lead frame, a portion of which is disposed on the wafer and covered by the molding layer, and another portion extending outside the molding layer.
[0018] In some embodiments, the thickness of the silver paste layer is greater than the thickness of the solder paste layer.
[0019] In some embodiments, the ceramic substrate further includes a second copper layer, wherein the first copper layer and the second copper layer are respectively disposed on both sides of the ceramic core layer.
[0020] In some embodiments, the thickness of the second copper layer is uniform.
[0021] An embodiment of this application also provides a power module, comprising: a ceramic substrate, including a ceramic core layer and a first copper layer disposed on the ceramic core layer, the first copper layer having a groove; a solder paste layer accommodated in the groove; a silver paste layer disposed on the solder paste layer; and a wafer disposed on the silver paste layer, the solder paste layer and the silver paste layer fixing the wafer to the ceramic substrate.
[0022] In some embodiments, the wafer is made of silicon carbide.
[0023] In some embodiments, the horizontal width of the solder paste layer is greater than that of the silver paste layer.
[0024] In some embodiments, the horizontal width of the silver paste layer is greater than that of the wafer.
[0025] The beneficial technical effects of this utility model are as follows:
[0026] The embodiments of this application increase the adhesion between the wafer and the first copper layer by adding a solder paste layer as an intermediary metal between the silver paste layer and the first copper layer, making the bonding between the wafer and the first copper layer tighter and reducing and avoiding the risk of delamination in the prior art. Furthermore, grooves may be provided on the first copper layer for the solder paste layer to fill, further increasing adhesion. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It is worth noting that, according to industry standard practice, the components are not drawn to scale and are only used for illustrative purposes. In fact, for clarity of discussion, the dimensions of the components can be arbitrarily increased or decreased.
[0028] Figure 1 A ceramic substrate is shown.
[0029] Figure 2 The formation of the silver paste layer is shown.
[0030] Figure 3 This shows the stacking of wafers on a layer of silver paste.
[0031] Figure 4 This shows a portion of the wafer and the silver paste layer falling off the first copper layer.
[0032] Figure 5 An electron microscope image of the wafer after it fell off is shown.
[0033] Figure 6 An electron microscope image of the bottom surface of the dropped wafer is shown.
[0034] Figure 7 The diagram illustrates the formation of the wire bonding and lead frame.
[0035] Figure 8 The formation of the molding seal layer is shown.
[0036] Figure 9 A ceramic substrate is shown.
[0037] Figure 10 The formation of the solder paste layer is shown.
[0038] Figure 11 The formation is shown.
[0039] Figure 12 The image shows wafers stacked on a layer of silver paste.
[0040] Figure 13 The diagram illustrates the formation of the wire bonding and lead frame.
[0041] Figure 14 The formation of the molding seal layer is shown.
[0042] Figure 15 It shows Figure 12 Enlarged view of the steps shown. Detailed Implementation
[0043] To better understand the spirit of the embodiments of this application, the following description is based on some preferred embodiments of this application.
[0044] Embodiments of this application will be described in detail below. Throughout this specification, identical or similar components and components having identical or similar functions are indicated by similar reference numerals. The embodiments described herein with reference to the accompanying drawings are illustrative and diagrammatic in nature and are intended to provide a basic understanding of this application. The embodiments of this application should not be construed as limiting this application.
[0045] As used herein, the terms “approximately,” “generally,” “substantially,” and “about” are used to describe and indicate minor variations. When used in conjunction with an event or situation, these terms may refer to examples in which the event or situation occurred precisely or in examples in which the event or situation occurred very approximately.
[0046] In this specification, unless otherwise specified or limited, relative terms such as “central,” “longitudinal,” “lateral,” “front,” “rear,” “right,” “left,” “inner,” “outer,” “lower,” “higher,” “horizontal,” “vertical,” “above,” “below,” “above,” “below,” “top,” “bottom,” and their derivatives (e.g., “horizontally,” “downward,” “upward,” etc.) should be interpreted as referring to the directions described in the discussion or depicted in the accompanying drawings. These relative terms are used for descriptive convenience only and do not require that this application be constructed or operated in a particular orientation.
[0047] For ease of description, "first," "second," "third," etc., can be used in this article to distinguish different components of a figure or a series of figures. "First," "second," "third," etc., are not intended to describe the corresponding components.
[0048] Figures 1 to 8 The manufacturing process of a power module in the prior art is shown.
[0049] Figure 1 A ceramic substrate 10 is shown, which is, for example, an active metal brazing (AMB) substrate including a ceramic core layer 14 and a first copper layer 11 and a second copper layer 12.
[0050] Figure 2 The formation of a silver paste layer 24 on the first copper layer 11 is shown.
[0051] Figure 3 The diagram shows the stacking of wafer 60 on silver paste layer 24, followed by a sintering process. Figure 3An enlarged view of region A is also shown. The bottom surface of the wafer 60 is provided with a titanium layer 62, a nickel-vanadium alloy layer 64 disposed on the titanium layer 62, and a silver layer 66 disposed on the nickel-vanadium alloy layer 64. The titanium layer 62, the nickel-vanadium alloy layer 64, and the silver layer 66 are used to improve the adhesion between the silver paste layer 24 and the wafer 60.
[0052] The connection between the wafer 60 and the ceramic substrate 10 no longer uses traditional solder paste or film but adopts powder sintering for the following reasons: optimized thermal conductivity, mechanical reliability, and electrical connection quality. However, after sintering, the bonding strength between the silver paste layer 24 and the first copper layer 11 is low after the high-temperature process (because the intermetallic compound formed between silver and copper is weak), making it prone to wafer 60 falling off during the process, resulting in poor reliability.
[0053] Figure 4 This illustrates a situation that may occur in the prior art manufacturing process, where, due to the low bonding strength of the interface between the silver paste layer 24 and the first copper layer 11, a portion of the wafer 60 and the silver paste layer 24 on the bottom surface of the wafer 60 fall off the first copper layer 11.
[0054] Figure 5 An electron microscope image of wafer 60 after it fell off is shown. Figure 6 An electron microscope image of the bottom surface of the fallen wafer 60 is shown. Figure 5 An enlarged view of region B is also shown, which shows that the wafer 60 and the silver paste layer 24 on the bottom surface of the wafer 60 fell off the first copper layer 11, exposing the first copper layer 11 below the wafer 60.
[0055] Figure 7 and Figure 8 The following steps of the prior art are shown. Figure 7 The diagram shows the bonding wires 30 that form the bonding wafer 60 and the first copper layer 11, bonding the adjacent wafer 60, and forming the lead frame 50 on the wafer 60.
[0056] Figure 8 The formation of the mold is shown. Figure 7 The mold sealing layer 40 of the structure shown.
[0057] Figures 9 to 14 The manufacturing process of a power module 100 according to an embodiment of this application is shown.
[0058] Figure 9 A ceramic substrate 10 is provided, and a groove 16 is formed on a first copper layer 11 of the ceramic substrate 10 by an etching process.
[0059] Figure 10 The diagram shows the formation of a solder paste layer 22 in a groove 16 using a printing process.
[0060] Figure 11 The formation of a silver paste layer 24 on the solder paste layer 22 is shown.
[0061] Figure 12 The diagram shows the stacking of wafer 60 on silver paste layer 24, followed by a sintering process.
[0062] Figure 13 The diagram shows the bonding wires 30 that form the bonding wafer 60 and the first copper layer 11, bonding the adjacent wafer 60, and forming the lead frame 50 on the wafer 60.
[0063] Figure 14 The formation of the mold is shown. Figure 13 The mold sealing layer 40 of the structure shown.
[0064] Figure 15 It shows Figure 12 The enlarged view of the steps shown, and the further enlarged view of region C, show that after the wafer 60 is stacked, due to the weight of the wafer 60 itself, it will be pressed downward, causing the silver paste layer 24 to partially sink into the groove 16. Part of the silver paste layer 24 overflows from the groove 16 and covers the lateral edge of the silver paste layer 24. The adhesive layer 20 includes the silver paste layer 24 and the solder paste layer 22. The adhesive layer 20 covers part of the sidewall of the wafer 60 to further improve the bonding between the wafer 60 and the first copper layer 11.
[0065] Reference Figure 14 and Figure 15 An embodiment of this application provides a power module 100, including: a ceramic substrate 10, comprising a ceramic core layer 14 and a first copper layer 11 disposed on the ceramic core layer 14, the first copper layer 11 having a groove 16; a wafer 60 disposed above the groove 16; and an adhesive layer 20, accommodated in the groove 16 and in contact with the wafer 60, the adhesive layer 20 comprising a silver paste layer 24 and a solder paste layer 22.
[0066] In some embodiments, the solder paste layer 22 contacts the first copper layer 11, and the silver paste layer 24 is disposed between the solder paste layer 22 and the wafer 60.
[0067] In some embodiments, solder paste layer 22 overflows from groove 16.
[0068] In some embodiments, solder paste layer 22 covers the lateral edges of silver paste layer 24.
[0069] In some embodiments, at least a portion of the silver paste layer 24 is recessed into the groove 16.
[0070] In some embodiments, the horizontal width of the groove 16 is greater than that of the wafer 60.
[0071] In some embodiments, the horizontal width of the adhesive layer 20 is greater than that of the wafer 60.
[0072] In some embodiments, the adhesive layer 20 contacts at least a portion of the sidewall of the wafer 60.
[0073] In some embodiments, the power module 100 further includes: wire bonding 30, electrical connection chip 60, and a first copper layer 11.
[0074] In some embodiments, the power module 100 further includes a molding layer 40 that covers the ceramic substrate 10, the wafer 60, and the adhesive layer 20.
[0075] In some embodiments, the bottom surface of the wafer 60 is provided with a titanium layer 62, a nickel-vanadium alloy layer 64 disposed on the titanium layer 62, and a silver layer 66 disposed on the nickel-vanadium alloy layer 64.
[0076] In some embodiments, the silver layer 66 contacts the adhesive layer 20.
[0077] In some embodiments, the power module 100 further includes a lead frame 50, a portion of which is disposed on the wafer 60 and covered by the molding layer 40, and another portion of which extends outside the molding layer 40.
[0078] In some embodiments, the thickness of the silver paste layer 24 is greater than the thickness of the solder paste layer 22.
[0079] In some embodiments, the ceramic substrate 10 further includes a second copper layer 12, with the first copper layer 11 and the second copper layer 12 respectively disposed on both sides of the ceramic core layer 14.
[0080] In some embodiments, the second copper layer 12 has a uniform thickness.
[0081] An embodiment of this application also provides a power module 100, including: a ceramic substrate 10, comprising a ceramic core layer 14 and a first copper layer 11 disposed on the ceramic core layer 14, the first copper layer 11 having a groove 16; a solder paste layer 22, accommodated in the groove 16; a silver paste layer 24, disposed on the solder paste layer 22; and a wafer 60, disposed on the silver paste layer 24, wherein the solder paste layer 22 and the silver paste layer 24 fix the wafer 60 to the ceramic substrate 10.
[0082] In some embodiments, the material of wafer 60 includes silicon carbide.
[0083] In some embodiments, the horizontal width of the solder paste layer 22 is greater than that of the silver paste layer 24.
[0084] In some embodiments, the horizontal width of the silver paste layer 24 is greater than that of the wafer 60.
[0085] The embodiments of this application add a solder paste layer 22 as an intermediary metal between the silver paste layer 24 and the first copper layer 11. The bonding strength between silver and tin is approximately 30 to 50 MPa, and the bonding strength between tin and copper is approximately 40 to 70 MPa. Compared with the prior art, the interface strength is increased by at least approximately 10 MPa, thereby increasing the adhesion between the wafer 60 and the first copper layer 11, making the bonding between the wafer 60 and the first copper layer 11 tighter, and reducing and avoiding the risk of delamination in the prior art. Furthermore, grooves 16 can be provided on the first copper layer 11 for the solder paste layer 22 to fill, further increasing adhesion. Moreover, the structure of this application can be achieved using existing materials and processes, without the need to develop new materials or add new equipment, and the effect can be adjusted according to the structure.
[0086] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.
Claims
1. A power module, characterized in that, include: A ceramic substrate includes a ceramic core layer and a first copper layer disposed on the ceramic core layer, the first copper layer having a groove; A wafer is disposed above the groove; as well as An adhesive layer, housed in the groove and in contact with the wafer, the adhesive layer comprising a silver paste layer and a solder paste layer.
2. The power module according to claim 1, characterized in that, The solder paste layer contacts the first copper layer, and the silver paste layer is disposed between the solder paste layer and the wafer.
3. The power module according to claim 2, characterized in that, The solder paste layer overflows from the groove.
4. The power module according to claim 2, characterized in that, The solder paste layer covers the lateral edge of the silver paste layer.
5. The power module according to claim 1, characterized in that, The horizontal width of the groove is greater than that of the wafer.
6. The power module according to claim 5, characterized in that, The horizontal width of the adhesive layer is greater than that of the wafer.
7. The power module according to claim 6, characterized in that, The adhesive layer contacts at least a portion of the sidewall of the wafer.
8. The power module according to claim 1, characterized in that, Also includes: Wire bonding is used to electrically connect the wafer and the first copper layer.
9. The power module according to claim 1, characterized in that, Also includes: A molding layer that encapsulates the ceramic substrate, the wafer, and the adhesive layer.
10. The power module according to claim 2, characterized in that, The thickness of the silver paste layer is greater than the thickness of the solder paste layer.