Bipolar low-noise quantum computing control drive circuit and superconducting quantum computer
Patent Information
- Application Number
- CN202522010295.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-18
- Publication Date
- 2026-08-21
- Estimated Expiration
- 2035-09-18
AI Technical Summary
[0004]本实用新型的技术方案用于解决如何降低量子计算调控驱动电路的噪声的问题
本实用新型采用负压线性稳压器、数字电位器、数模转换器以及匹配电路构成双极性(正、负电平)调控电路,通过匹配电路的设计,将匹配电路端参考层设置为负压平面层,实现输出调控信号电平具有大的动态范围;本实用新型的NSD噪声水平维持在超低水平,同时实现了输出调控信号具有大的动态范围,电路实现简单,满足量子计算调控信号输出需求。
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Figure CN224668284U_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of quantum computing control technology, and relates to a bipolar low-noise quantum computing control drive circuit and a superconducting quantum computer. Background Technology
[0002] Existing bipolar quantum computing control signal driving circuits based on differential amplifiers, such as Figure 5 As shown, it includes a controller (e.g., FPGA), a digital-to-analog converter (DAC), a bias circuit (RL), a differential amplifier, an analog-to-digital converter (ADC), a low-pass filter, and an attenuator. The controller controls the DAC to output an analog current signal, which is then used by the bias circuit to generate an analog voltage signal. The differential amplifier outputs positive and negative bipolar voltage signals, which are then filtered and shaped by the low-pass filter and attenuator to generate a control signal. This signal supports positive and negative waveform outputs such as DC signals, square wave signals, and sine waves. The ADC acquires the amplitude of the signal output by the differential amplifier and inputs it to the controller for feedback adjustment.
[0003] The aforementioned bipolar modulation drive circuit using a differential amplifier achieves adjustment of the modulation signal within a large dynamic range. However, when the output modulation signal is within a large adjustment range, the noise of the differential amplifier also changes significantly. This noise degradation is directly reflected in the noise performance of the noise spectral density (NSD), thereby reducing the noise performance of the modulation signal. For quantum computing systems, this manifests as an increased error rate in controlling CZ gate operations, thus affecting the fidelity of CZ gate operations. Utility Model Content
[0004] The technical solution of this utility model is used to solve the problem of how to reduce the noise of quantum computing control driving circuit.
[0005] This utility model solves the above-mentioned technical problems through the following technical solution: This invention provides a bipolar low-noise quantum computing control and driving circuit, comprising: a controller, a digital-to-analog converter (DAC), a matching circuit, a digital potentiometer, a negative voltage linear regulator, a filter, and an attenuator. The output terminal of the controller is connected to the input terminal of the DAC and the input terminal of the digital potentiometer. The positive terminal of the DAC output is connected to terminal A of the matching circuit, and the negative terminal of the DAC output is connected to terminal C of the matching circuit. The output terminal of the digital potentiometer is connected to the input terminal of the negative voltage linear regulator, and the output terminal of the negative voltage linear regulator is connected to terminal B of the matching circuit. Terminal A of the matching circuit is also connected to the input terminal of the filter. The output terminal of the filter is connected to the input terminal of the attenuator, and the output terminal of the attenuator serves as the control signal output terminal of the bipolar low-noise quantum computing control and driving circuit.
[0006] Furthermore, the matching circuit includes a matching resistor R.L1 and matching resistor R L2 The positive terminal of the digital-to-analog converter output is connected to the matching resistor R. L1 One end of the circuit is connected to the input terminal of the filter, and the common connection point of the three is denoted as terminal A of the matching circuit; the negative terminal of the digital-to-analog converter's output is connected to the matching resistor R. L2 One end of the circuit is connected to the other end, and the common point of connection between the two is denoted as terminal C of the matching circuit; the matching resistor R L2 The other end is connected to the matching resistor R L1 The other end of each is connected to the output terminal of the negative voltage linear regulator, and the common connection point of the three is denoted as terminal B of the matching circuit.
[0007] Furthermore, the output of the controller is connected to the input of the digital-to-analog converter via a high-speed interface.
[0008] Preferably, the high-speed interface adopts the JESD204B interface.
[0009] Preferably, the controller is an FPGA.
[0010] Preferably, the digital-to-analog converter is a current-mode high-speed DAC.
[0011] Preferably, the digital potentiometer is a low-temperature drift digital potentiometer.
[0012] Preferably, the filter is a low-pass filter; more specifically, the low-pass filter is an LC Gaussian filter.
[0013] This invention also provides a superconducting quantum computer, wherein the control signal input terminal of the superconducting quantum computer is connected to the control signal output terminal of the aforementioned bipolar low-noise quantum computing control drive circuit.
[0014] The beneficial effects of this utility model are as follows: This invention employs a negative voltage linear regulator, a digital potentiometer, a digital-to-analog converter, and a matching circuit to form a bipolar (positive and negative level) control circuit. Through the design of the matching circuit, the reference layer at the matching circuit end is set as a negative voltage plane layer, thereby achieving a large dynamic range of the output control signal level. This invention maintains an ultra-low NSD noise level while achieving a large dynamic range of the output control signal. The circuit implementation is simple and meets the requirements of quantum computing control signal output. Attached Figure Description
[0015] Figure 1 This is a structural diagram of the bipolar low-noise quantum computing control and driving circuit of Embodiment 1 of this utility model; Figure 2 This is a schematic diagram of the output positive polarity control signal of the bipolar low-noise quantum computing control drive circuit according to Embodiment 1 of this utility model; Figure 3 This is a schematic diagram of the output negative polarity control signal of the bipolar low-noise quantum computing control drive circuit according to Embodiment 1 of this utility model; Figure 4 This is a flowchart of the calibration process of the digital-to-analog converter of the bipolar low-noise quantum computing control drive circuit in Embodiment 1 of this utility model; Figure 5 This is a structural diagram of a bipolar quantum computing control signal driving circuit based on a differential amplifier in the prior art. Detailed Implementation
[0016] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below in conjunction with the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0017] The technical solution of this utility model will be further described below with reference to the accompanying drawings and specific embodiments: Example 1 like Figure 1 As shown, this embodiment provides a bipolar low-noise quantum computing control and driving circuit, including: a controller 10, a digital-to-analog converter 11, a matching circuit 12, a digital potentiometer 13, a negative voltage linear regulator 14, a filter 15, and an attenuator 16; the matching circuit 12 includes a matching resistor R. L1 and matching resistor R L2 .
[0018] The output terminal of the controller 10 is connected to the input terminal of the digital-to-analog converter 11 via a high-speed interface. The output terminal of the controller 10 is also connected to the input terminal of the digital potentiometer 13. The positive terminal (P-terminal) of the output terminal of the digital-to-analog converter 11 is connected to the matching resistor R. L1 One end is connected to the input terminal of filter 15, and the negative terminal (N-pole) of the output terminal of digital-to-analog converter 11 is connected to the matching resistor R. L2 One end is connected to the matching resistor R. L2 The other end is connected to the matching resistor R L1 The other end is connected to the output terminal of the negative voltage linear regulator 14; among them, the positive terminal (P terminal) of the digital-to-analog converter 11 and the matching resistor R L1 One end of the filter 15 and the input end of the filter 15 are connected at a common point, which is denoted as terminal A of the matching circuit 12; the negative terminal (N terminal) of the output of the digital-to-analog converter 11 and the matching resistor R are connected at the common point of connection of the three terminals. L2One end of the circuit, the common point of connection between the two is denoted as terminal C of matching circuit 12; matching resistor R L1 The other end, matching resistor R L2 The other end and the output of the negative voltage linear regulator 14 are connected at a common point, which is denoted as the B end of the matching circuit 12. The output of the digital potentiometer 13 is connected to the input of the negative voltage linear regulator 14, the output of the filter 15 is connected to the input of the attenuator 16, and the output of the attenuator 16 serves as the control signal output of the bipolar low-noise quantum computing control drive circuit, outputting the control signal.
[0019] Preferably, the controller 10 is an FPGA; preferably, the digital-to-analog converter 11 is a current-mode high-speed DAC; preferably, the digital potentiometer 13 is a low-temperature drift digital potentiometer; preferably, the filter 15 is a low-pass filter, and further preferably, the low-pass filter is an LC Gaussian filter; preferably, the high-speed interface is a JESD204B interface.
[0020] The working principle of the bipolar low-noise quantum computing control drive circuit in this embodiment is as follows: The controller 10 communicates with the digital-to-analog converter 11 via a high-speed interface. After pre-calibration, it can achieve fine control of the output control signal level, that is, adjust the output control signal level within a small dynamic range (e.g., 0–0.5V). The output current signal of the digital-to-analog converter 11 passes through a matching resistor R. L1 A voltage signal is generated and fed into filter 15. Simultaneously, considering the bipolar requirement of the output control signal level, a matching resistor R is used. L1 and matching resistor R L2 The other end is connected to a negative voltage linear regulator 14 to receive a negative voltage signal, so that the output control signal forms a bipolar voltage signal. Considering the large dynamic range adjustment of the bipolar voltage signal, the adjustment range of the negative voltage level is increased. A digital potentiometer 13 is set between the controller 10 and the negative voltage linear regulator 14. The controller 10 adjusts the resistance value of the digital potentiometer 13 to change the negative voltage value output by the negative voltage linear regulator 14, thereby realizing the adjustment of the negative voltage level. This allows for coarse control of the output control signal level and enables output control signal level adjustment within a large dynamic range (e.g., -1 to 0.5V). The bipolar voltage signal formed at terminal A of the matching circuit 12 is shaped and filtered by the filter 15 and the attenuator 16 before being output to obtain the desired control signal.
[0021] The following uses a DC signal as an example to explain the principle of the positive and negative polarity control signal output of the bipolar low-noise quantum computing control drive circuit in this embodiment.
[0022] (1) Output positive polarity control signal like Figure 2As shown, the matching resistor R in the matching circuit 12 L1 and matching resistor R L2 All values are set to 50Ω. The control signal output terminal of the bipolar low-noise quantum computing control drive circuit is connected to a 50Ω system and then grounded. The output current of the digital-to-analog converter 11 is set to 10mA. The matching resistor R is... L1 and matching resistor R L2 The connection common point B is grounded, and at this time the matching resistor R L1 The system connected to the control signal output terminal is equivalent to a parallel connection. Therefore, the voltage at terminal A of the matching circuit 12 is: 10mA × (50Ω / / 50Ω) = 10mA × 25Ω = 250mV = 0.25V, where / / indicates parallel connection. It can be seen that the voltage at terminal A of the matching circuit 12 is positive at this time, meaning the output control signal is positive.
[0023] (2) Output negative polarity control signal like Figure 3 As shown, the matching resistor R in the matching circuit 12 L1 and matching resistor R L2 All values are set to 50Ω. The control signal output terminal of the bipolar low-noise quantum computing control drive circuit is connected to a 50Ω resistor and then grounded. The output current of the digital-to-analog converter 11 is set to 10mA. Figure 2 Based on this, the matching resistor R L2 The other end is connected to the matching resistor R L1 The other end of each is connected to the output terminal of the negative voltage linear regulator 14, and the negative voltage linear regulator 14 is further adjusted so that the output voltage of the negative voltage linear regulator 14 is a fixed value of -1V. At this time, the matching resistor R L1 The system connected to the control signal output terminal is equivalent to being in series. Therefore, the voltage at terminal A of the matching circuit 12 is: 0.25V + (-1V × 50Ω / (50Ω + 50Ω)) = -0.25V. It can be seen from this that the voltage at terminal A of the matching circuit 12 is negative at this time, that is, the output control signal is negative.
[0024] The coarse control process of the control signal is as follows: the controller 10 controls the digital potentiometer 13 to adjust its resistance value to adjust the voltage range of the output of the negative voltage linear regulator 14. After calibration, the dynamic range of the control signal output can be further increased, for example, the dynamic range of the 0-0.25V control signal level can be increased to the -1-0.25V dynamic range.
[0025] The fine-tuning process of the control signal is as follows: After the controller 10 sets and calibrates the values of the digital gain (Gain), DC bias (Offset), and code value (Code) of the digital-to-analog converter 11, the control signal can output various waveforms, such as positive and negative DC signals, positive and negative pulse signals, and sine signals. If a current-type high-speed DAC is selected for the digital-to-analog converter 11, by adjusting the digital gain (Gain), DC bias (Offset), and code value (Code), a small dynamic range of the control signal level can be achieved (e.g., the output control signal level is 0 to 0.25V).
[0026] like Figure 4 As shown, the calibration process of the digital-to-analog converter 11 is as follows, taking the use of a current-mode high-speed DAC to output a DC voltage signal as an example: 1) Controller 10 sends out the default digital gain Gain and DC bias Offset, setting the digital gain Gain to 0 (range -511 to +511) and the DC bias Offset to 0 (range -32767 to +32767). 2) Controller 10 sends out code value Code and collects the range of code value Code (range is -32767 to +32767). 3) Determine if the Code value sent is the maximum value (32767). If yes, proceed to step 4); otherwise, proceed to step 2. 4) The controller 10 adjusts the value of the digital gain Gain until the amplitude of the output control signal observed on the oscilloscope reaches the required maximum level. This value is the maximum value of the output control signal, and the corresponding digital gain Gain is used as the calibration value. 5) Controller 10 sends out code value Code and collects the range of code value Code (range is -32767 to +32767); 6) Determine if the Code value sent is the minimum value (-32767). If yes, proceed to step 7); otherwise, proceed to step 5. 7) The controller 10 adjusts the value of the DC bias offset until the amplitude of the output control signal observed on the oscilloscope reaches the required minimum level. This value is the minimum value of the output control signal, and the corresponding DC bias offset is used as the calibration value. 8) Send and save the calibration values of digital gain (Gain) and DC bias (Offset). Observe whether the linearity of the output DC voltage meets the requirements by adjusting the linearity code value (range -32767 to +32767). If it does not meet the requirements, repeat steps 2) to 8) until the linearity of the output DC voltage meets the requirements.
[0027] Example 2 This embodiment provides a superconducting quantum computer, wherein the control signal input terminal of the superconducting quantum computer is connected to the control signal output terminal of the bipolar low-noise quantum computing control drive circuit in Embodiment 1.
[0028] The above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.
Claims
1. A bipolar low-noise quantum computing control and driving circuit, characterized in that, include: The system comprises a controller (10), a digital-to-analog converter (11), a matching circuit (12), a digital potentiometer (13), a negative voltage linear regulator (14), a filter (15), and an attenuator (16). The output of the controller (10) is connected to the input of the digital-to-analog converter (11) and the input of the digital potentiometer (13). The positive output of the digital-to-analog converter (11) is connected to the A terminal of the matching circuit (12), and the negative output of the digital-to-analog converter (11) is connected to the C terminal of the matching circuit (12). The output of the digital potentiometer (13) is connected to the input of the negative voltage linear regulator (14), and the output of the negative voltage linear regulator (14) is connected to the B terminal of the matching circuit (12). The A terminal of the matching circuit (12) is also connected to the input of the filter (15). The output of the filter (15) is connected to the input of the attenuator (16). The output of the attenuator (16) serves as the control signal output of the bipolar low-noise quantum computing control drive circuit.
2. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The matching circuit (12) includes a matching resistor R. L1 and matching resistor R L2 The positive terminal of the output of the digital-to-analog converter (11) is connected to the matching resistor R. L1 One end of the circuit is connected to the input terminal of the filter (15), and the common connection point of the three is denoted as terminal A of the matching circuit (12); the negative terminal of the output terminal of the digital-to-analog converter (11) is connected to the matching resistor R. L2 One end of the circuit is connected, and the common point of connection between the two is denoted as terminal C of the matching circuit (12); the matching resistor R L2 The other end is connected to the matching resistor R L1 The other end of each is connected to the output of the negative voltage linear regulator (14), and the common connection point of the three is denoted as the B end of the matching circuit (12).
3. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The output of the controller (10) is connected to the input of the digital-to-analog converter (11) via a high-speed interface.
4. The bipolar low-noise quantum computing control and driving circuit according to claim 3, characterized in that, The high-speed interface uses the JESD204B interface.
5. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The controller (10) is an FPGA.
6. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The digital-to-analog converter (11) is a current-mode high-speed DAC.
7. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The digital potentiometer (13) is a low-temperature drift digital potentiometer.
8. The bipolar low-noise quantum computing control and driving circuit according to claim 1, characterized in that, The filter (15) is a low-pass filter.
9. The bipolar low-noise quantum computing control and driving circuit according to claim 8, characterized in that, The low-pass filter is an LC Gaussian filter.
10. A superconducting quantum computer, characterized in that, The control signal input terminal of the superconducting quantum computer is connected to the control signal output terminal of the bipolar low-noise quantum computing control drive circuit according to any one of claims 1 to 9.