A hardware voltage protection design circuit of a motor controller

Abstract

The utility model relates to electronic circuit design technical field, and disclose a kind of hardware voltage protection design circuit of motor controller, including drive signal input module, voltage detection module, voltage comparison module, logic control module, power supply control module and motor connection module, the drive signal input module includes three-phase independent half-bridge drive chip, its input end HIN1, HIN2, HIN3, LIN1, LIN2, LIN3 are respectively connected with the motor control output signal of MCU, output end HO1, HO2, HO3, LO1, LO2, LO3 signal is respectively corresponding connection three-phase bridge arm N channel MOS pipe's gate. The hardware voltage protection design circuit of motor controller, through the pulse voltage of hardware design sampling low-voltage controller operation high-voltage replacement operation, when the pulse voltage is too high in high-voltage replacement instant, disconnect the three-phase independent half-bridge drive chip power supply of low-voltage controller.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit design technology, specifically to a hardware voltage protection design circuit for a motor controller. Background Technology

[0002] A brushless DC (BLDC) motor is a type of electric motor that uses brushless motor technology. Also known as a brushless DC motor or permanent magnet synchronous motor, compared to traditional DC motors, BLDC motors do not require carbon brushes and commutators to achieve current commutation. Instead, they use an electronic commutator (also called a controller) to control the direction and magnitude of the current. A high- and low-voltage integrated dual-source motor typically refers to a motor capable of operating in both high-voltage and low-voltage modes. This design allows the motor to utilize the high energy density provided by a high-voltage power supply and switch to a low-voltage power supply when needed, adapting to different application scenarios and requirements.

[0003] In existing high- and low-voltage dual-source BLDC or PMSM motors, when low-voltage operation is interrupted by high-voltage intervention, the low-voltage winding terminal acts as a generator, supplying power to the low-voltage controller. If the low-voltage controller is not stopped in time, continuous low-voltage power output will occur in the control loop. This can lead to overload or overvoltage damage to the components in the three-phase power bridge circuit, failing to meet usage requirements. Therefore, a hardware voltage protection design circuit for the motor controller is urgently needed to solve this problem. Utility Model Content

[0004] (a) Technical problems to be solved

[0005] To address the shortcomings of existing technologies, this utility model provides a hardware voltage protection design circuit for a motor controller. It has advantages such as hardware voltage protection function and solves the problem that when a high-voltage dual-source BLDC or PMSM motor is operating at low voltage and high voltage is introduced, if the low-voltage controller is not stopped in time, the low-voltage power will continue to output power to control the closed loop, resulting in overload or overvoltage damage to the components of the three-phase power bridge circuit.

[0006] (II) Technical Solution

[0007] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: a hardware voltage protection design circuit for a motor controller, including a drive signal input module, a voltage detection module, a voltage comparison module, a logic control module, a power supply control module and a motor connection module;

[0008] The drive signal input module includes a three-phase independent half-bridge drive chip. The input terminals HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 of the three-phase independent half-bridge drive chip are respectively connected to the motor control output signal of the MCU. The output terminals HO1, HO2, HO3, LO1, LO2, and LO3 of the three-phase independent half-bridge drive chip are respectively connected to the gate of the N-channel MOS transistor of the three-phase bridge arm.

[0009] The voltage detection module includes a first N-channel MOSFET, a fourth N-channel MOSFET, a fifth resistor, a second N-channel MOSFET, a fifth N-channel MOSFET, a sixth resistor, a third N-channel MOSFET, a sixth N-channel MOSFET, a seventh resistor, a third resistor, a fourth resistor, a first capacitor, and a first comparator. The source of the first N-channel MOSFET is connected to the drain of the fourth N-channel MOSFET. The source of the fourth N-channel MOSFET is connected to the first pin of the fifth resistor. The second pin of the fifth resistor is connected to GND. The source of the second N-channel MOSFET is connected to the drain of the fifth N-channel MOSFET. The source of the fifth N-channel MOSFET is connected to the sixth N-channel MOSFET. The first pin of the resistor and the second pin of the sixth resistor are connected to GND. The source of the third N-channel MOSFET is connected to the drain of the sixth N-channel MOSFET. The source of the sixth N-channel MOSFET is connected to the first pin of the seventh resistor. The second pin of the seventh resistor is connected to GND. The drains of the first, second, and third N-channel MOSFETs are all connected to the first pin of the third resistor. The second pin of the third resistor is connected to the first pin of the fourth resistor, the first pin of the first capacitor, and the negative input terminal of the fourth pin of the first comparator. The second pin of the fourth resistor and the second pin of the first capacitor are respectively connected to GND.

[0010] The voltage comparison module includes a first comparator, whose positive input terminal is connected to a reference voltage VREF, and whose negative input terminal is connected to the second pin of a third resistor, for comparing the detected voltage with the reference voltage.

[0011] The logic control module includes a first AND gate, whose first pin input is connected to the first pin output of the first comparator, the second pin input of the first AND gate is connected to the MCU_CONTROL signal, the power supply pin of the first AND gate is connected to 5V, the negative terminal of the first AND gate is connected to GND, the output pin of the first AND gate is connected to the gate of the seventh N-channel MOSFET and the first pin of the tenth resistor, and the second pin of the tenth resistor is connected to GND.

[0012] The power supply control module includes a seventh N-channel MOSFET, an eighth resistor, a first P-channel MOSFET, and a ninth resistor. The source of the seventh N-channel MOSFET is connected to GND, the drain of the seventh N-channel MOSFET is connected to the first pin of the eighth resistor, the second pin of the eighth resistor is connected to the gate of the first P-channel MOSFET and the first pin of the ninth resistor, the second pin of the ninth resistor is connected to VCC and the source of the first P-channel MOSFET, and the drain of the first P-channel MOSFET is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip.

[0013] The motor connection module includes VS1, VS2, and VS3, which are respectively connected to the motor winding coils.

[0014] The beneficial effects of this utility model are:

[0015] The hardware voltage protection circuit of this motor controller samples the pulse voltage during the high-voltage switching operation of the low-voltage controller. When the pulse voltage is too high at the moment of high-voltage switching, the power supply to the three-phase independent half-bridge drive chip of the low-voltage controller is disconnected, so as to avoid the problem of overload or overvoltage damage to the components of the three-phase power bridge circuit caused by the simultaneous operation of the low-voltage winding and high-voltage winding of the dual-source motor.

[0016] Based on the above technical solution, the present invention can be further improved as follows.

[0017] Furthermore, the reference voltage VREF connected to the positive input terminal of the first comparator is used to set the overvoltage protection threshold. The reference voltage VREF is obtained by voltage division through the first resistor and the second resistor.

[0018] Furthermore, the output of the first AND gate is connected to the gate of the seventh N-channel MOSFET to control the conduction and cutoff of the seventh N-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET and realizing the power supply control of the power supply pin VCC of the three-phase independent half-bridge driver chip.

[0019] Furthermore, the source of the seventh N-channel MOSFET is connected to GND, and the drain is connected to the gate of the first P-channel MOSFET through an eighth resistor, which is used to control the gate voltage of the first P-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET.

[0020] Furthermore, the source of the first P-channel MOSFET is connected to VCC, and the drain is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip, which is used to control the power supply status of the three-phase independent half-bridge driver chip and realize the hardware-level power cut-off. Attached Figure Description

[0021] Figure 1 This is a block diagram of the circuit structure design of this utility model;

[0022] Figure 2 This is a schematic diagram of the circuit signal transmission principle of this utility model;

[0023] Figure 3 This utility model Figure 2 Enlarged view of point A in the middle;

[0024] Figure 4 This utility model Figure 2 Enlarged view at point B in the middle;

[0025] Figure 5 This utility model Figure 2 Enlarged view of point C. Detailed Implementation

[0026] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0027] In the embodiments, by Figure 1-5 This invention provides a hardware voltage protection design circuit for a motor controller, comprising a drive signal input module, a voltage detection module, a voltage comparison module, a logic control module, a power supply control module, and a motor connection module.

[0028] The drive signal input module includes a three-phase independent half-bridge drive chip. The input terminals HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 of the three-phase independent half-bridge drive chip are respectively connected to the motor control output signal of the MCU. The output terminals HO1, HO2, HO3, LO1, LO2, and LO3 of the three-phase independent half-bridge drive chip are respectively connected to the gate of the N-channel MOS transistor of the three-phase bridge arm.

[0029] The voltage detection module includes a first N-channel MOSFET, a fourth N-channel MOSFET, a fifth resistor, a second N-channel MOSFET, a fifth N-channel MOSFET, a sixth resistor, a third N-channel MOSFET, a sixth N-channel MOSFET, a seventh resistor, a third resistor, a fourth resistor, a first capacitor, and a first comparator. The source of the first N-channel MOSFET is connected to the drain of the fourth N-channel MOSFET. The source of the fourth N-channel MOSFET is connected to the first pin of the fifth resistor. The second pin of the fifth resistor is connected to GND. The source of the second N-channel MOSFET is connected to the drain of the fifth N-channel MOSFET. The source of the fifth N-channel MOSFET is connected to the sixth N-channel MOSFET. The first pin of the resistor and the second pin of the sixth resistor are connected to GND. The source of the third N-channel MOSFET is connected to the drain of the sixth N-channel MOSFET. The source of the sixth N-channel MOSFET is connected to the first pin of the seventh resistor. The second pin of the seventh resistor is connected to GND. The drains of the first, second, and third N-channel MOSFETs are all connected to the first pin of the third resistor. The second pin of the third resistor is connected to the first pin of the fourth resistor, the first pin of the first capacitor, and the negative input terminal of the fourth pin of the first comparator. The second pin of the fourth resistor and the second pin of the first capacitor are respectively connected to GND.

[0030] The voltage comparison module includes a first comparator, whose positive input terminal is connected to a reference voltage VREF, and whose negative input terminal is connected to the second pin of a third resistor, for comparing the detected voltage with the reference voltage.

[0031] The logic control module includes a first AND gate, whose first pin input is connected to the first pin output of the first comparator, the second pin input of the first AND gate is connected to the MCU_CONTROL signal, the power supply pin of the first AND gate is connected to 5V, the negative terminal of the first AND gate is connected to GND, the output pin of the first AND gate is connected to the gate of the seventh N-channel MOSFET and the first pin of the tenth resistor, and the second pin of the tenth resistor is connected to GND.

[0032] The power supply control module includes a seventh N-channel MOSFET, an eighth resistor, a first P-channel MOSFET, and a ninth resistor. The source of the seventh N-channel MOSFET is connected to GND, the drain of the seventh N-channel MOSFET is connected to the first pin of the eighth resistor, the second pin of the eighth resistor is connected to the gate of the first P-channel MOSFET and the first pin of the ninth resistor, the second pin of the ninth resistor is connected to VCC and the source of the first P-channel MOSFET, and the drain of the first P-channel MOSFET is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip.

[0033] The motor connection module includes VS1, VS2, and VS3, which are respectively connected to the motor winding coils.

[0034] The reference voltage VREF connected to the positive input terminal of the first comparator is used to set the overvoltage protection threshold. The reference voltage VREF is obtained by voltage division by the first resistor and the second resistor.

[0035] The output of the first AND gate is connected to the gate of the seventh N-channel MOSFET, which is used to control the conduction and cutoff of the seventh N-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET, and realizing the power supply control of the VCC pin of the three-phase independent half-bridge driver chip.

[0036] The source of the seventh N-channel MOSFET is connected to GND, and the drain is connected to the gate of the first P-channel MOSFET through the eighth resistor. This resistor is used to control the gate voltage of the first P-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET.

[0037] The source of the first P-channel MOSFET is connected to VCC, and the drain is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip. This is used to control the power supply status of the three-phase independent half-bridge driver chip and realize the hardware-level power cut-off.

[0038] The first AND gate is model SN74LVC1G08DBVR, the first comparator is model TLV3201AIDBVR, the three-phase independent half-bridge driver chip is model EG2133, the first, second, third, fourth, fifth, and sixth N-channel MOSFETs are model JMSL040SAGQ, the seventh N-channel MOSFET is model CJ2310, and the first P-channel MOSFET is model DMPH6250S-7.

[0039] For details, please refer to Figure 1 When the dual-source motor is running at high voltage, the pulse voltage is compared and output by the first-level comparator signal, and then outputs a logic level through the second-level AND gate chip. The logic level controls the opening or closing of the MOSFET to achieve power supply control of the driver chip. This further enables the high-low voltage integrated dual-source motor to quickly disconnect the control of the low-voltage controller when the high-voltage operation is switched. This utility model achieves overcurrent protection function through hardware circuit, without relying on any software or complex logic control of microcontrollers.

[0040] Working principle:

[0041] 1. When the motor is running, if the back EMF voltage signal VBUS, after being filtered and divided by resistors R3, R4, and capacitor C1, is greater than the 5V power supply to the positive input of the comparator, the comparator outputs a logic low level. Resistor R1 performs voltage division hysteresis, making the positive input voltage of the comparator slightly lower than 5V to reduce fluctuations and trigger the inversion logic level. At this time, the comparator outputs a logic low level to the first input pin of the AND gate IC, and performs an AND operation with the high-level signal MCU_CONTROL at the second input pin of the AND gate IC. The output of the AND gate is then low, continuing until the next logic low level is reached. Because the gate level of the N-channel MOSFET does not reach the threshold for turning on the MOSFET, the drain of the seventh N-channel MOSFET cannot be connected to the source GND. Therefore, the eighth and ninth resistors cannot divide the source signal VCC of the first P-channel MOSFET. As a result, the gate voltage of the first P-channel MOSFET is equal to the source voltage. Due to the characteristics of the P-channel MOSFET, the first P-channel MOSFET is in the off state and cannot supply power to the power supply pins of the three-phase independent half-bridge driver chip. At this time, the hardware power supply is cut off.

[0042] 2. When the motor is running, if the back EMF voltage signal VBUS, after being filtered and divided by resistors R3, R4, and capacitor C1, is less than the 5V power supply to the positive input of the comparator, the comparator output will be at a high level. At this time, the comparator output will be at a low level and connected to the first input pin of the AND gate IC. This low level signal will be ANDed with the high level signal MCU_CONTROL at the second input pin of the AND gate IC. The output of the AND gate will then be at a high level and connected to the gate of the seventh N-channel MOSFET. Since the gate level of the N-channel MOSFET has reached the threshold for turning on the MOSFET, the drain and source GND of the seventh N-channel MOSFET are connected. Therefore, the eighth and ninth resistors will start to divide the source signal VCC of the first P-channel MOSFET. As a result, the gate voltage of the first P-channel MOSFET is less than the source voltage. Due to the characteristics of the P-channel MOSFET, the first P-channel MOSFET is in the start state. At this time, VCC supplies power to the power supply pin of the three-phase independent half-bridge driver chip, and the circuit operates normally.

[0043] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0044] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A hardware voltage protection design circuit for a motor controller, characterized in that: It includes a drive signal input module, a voltage detection module, a voltage comparison module, a logic control module, a power supply control module, and a motor connection module; The drive signal input module includes a three-phase independent half-bridge drive chip. The input terminals HIN1, HIN2, HIN3, LIN1, LIN2, and LIN3 of the three-phase independent half-bridge drive chip are respectively connected to the motor control output signal of the MCU. The output terminals HO1, HO2, HO3, LO1, LO2, and LO3 of the three-phase independent half-bridge drive chip are respectively connected to the gate of the N-channel MOS transistor of the three-phase bridge arm. The voltage detection module includes a first N-channel MOSFET, a fourth N-channel MOSFET, a fifth resistor, a second N-channel MOSFET, a fifth N-channel MOSFET, a sixth resistor, a third N-channel MOSFET, a sixth N-channel MOSFET, a seventh resistor, a third resistor, a fourth resistor, a first capacitor, and a first comparator. The source of the first N-channel MOSFET is connected to the drain of the fourth N-channel MOSFET. The source of the fourth N-channel MOSFET is connected to the first pin of the fifth resistor. The second pin of the fifth resistor is connected to GND. The source of the second N-channel MOSFET is connected to the drain of the fifth N-channel MOSFET. The source of the fifth N-channel MOSFET is connected to the sixth N-channel MOSFET. The first pin of the resistor and the second pin of the sixth resistor are connected to GND. The source of the third N-channel MOSFET is connected to the drain of the sixth N-channel MOSFET. The source of the sixth N-channel MOSFET is connected to the first pin of the seventh resistor. The second pin of the seventh resistor is connected to GND. The drains of the first, second, and third N-channel MOSFETs are all connected to the first pin of the third resistor. The second pin of the third resistor is connected to the first pin of the fourth resistor, the first pin of the first capacitor, and the negative input terminal of the fourth pin of the first comparator. The second pin of the fourth resistor and the second pin of the first capacitor are respectively connected to GND. The voltage comparison module includes a first comparator, whose positive input terminal is connected to a reference voltage VREF, and whose negative input terminal is connected to the second pin of a third resistor, for comparing the detected voltage with the reference voltage. The logic control module includes a first AND gate, whose first pin input is connected to the first pin output of the first comparator, the second pin input of the first AND gate is connected to the MCU_CONTROL signal, the power supply pin of the first AND gate is connected to 5V, the negative terminal of the first AND gate is connected to GND, the output pin of the first AND gate is connected to the gate of the seventh N-channel MOSFET and the first pin of the tenth resistor, and the second pin of the tenth resistor is connected to GND. The power supply control module includes a seventh N-channel MOSFET, an eighth resistor, a first P-channel MOSFET, and a ninth resistor. The source of the seventh N-channel MOSFET is connected to GND, the drain of the seventh N-channel MOSFET is connected to the first pin of the eighth resistor, the second pin of the eighth resistor is connected to the gate of the first P-channel MOSFET and the first pin of the ninth resistor, the second pin of the ninth resistor is connected to VCC and the source of the first P-channel MOSFET, and the drain of the first P-channel MOSFET is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip. The motor connection module includes VS1, VS2, and VS3, which are respectively connected to the motor winding coils.

2. The hardware voltage protection design circuit for a motor controller according to claim 1, characterized in that: The reference voltage VREF connected to the positive input terminal of the first comparator is used to set the overvoltage protection threshold.

3. The hardware voltage protection design circuit for a motor controller according to claim 1, characterized in that: The output of the first AND gate is connected to the gate of the seventh N-channel MOSFET to control the conduction and cutoff of the seventh N-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET and realizing the power supply control of the VCC pin of the three-phase independent half-bridge driver chip.

4. The hardware voltage protection design circuit for a motor controller according to claim 1, characterized in that: The source of the seventh N-channel MOSFET is connected to GND, and the drain is connected to the gate of the first P-channel MOSFET through the eighth resistor. This resistor is used to control the gate voltage of the first P-channel MOSFET, thereby controlling the conduction and cutoff of the first P-channel MOSFET.

5. The hardware voltage protection design circuit for a motor controller according to claim 1, characterized in that: The source of the first P-channel MOSFET is connected to VCC, and the drain is connected to the power supply pin VCC of the three-phase independent half-bridge driver chip. This is used to control the power supply status of the three-phase independent half-bridge driver chip and realize the hardware-level power cut-off.

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