A vertical ultra-thin built-in gallium nitride power adapter circuit

Abstract

The utility model discloses a vertical ultra -thin built -in gallium nitride power adapter circuit, including input protection circuit, EMI filter circuit, rectifier filter circuit, power transformer, secondary MOS rectifier circuit and output filter circuit that connect gradually, the input of EMI filter circuit is connected to the output of input protection circuit, the input of rectifier filter circuit is connected to the output of EMI filter circuit, the primary side of power transformer is connected to the output of rectifier filter circuit, the input of secondary MOS rectifier circuit is connected to the secondary side of power transformer, the input of output filter circuit is connected to the output of secondary MOS rectifier circuit, secondary MOS rectifier circuit is connected with synchronous IC signal control circuit, and output filter circuit is connected with voltage stabilizing control circuit, through adopting gallium nitride switch tube and synchronous rectification technology, promote conversion efficiency, reduce energy consumption, and high -frequency design reduces the volume of component, can realize vertical ultra -thin structure, and adapt miniaturization electronic equipment demand.

Description

Technical Field

[0001] This utility model belongs to the technical field of power adapters, specifically relating to a vertical ultra-thin built-in gallium nitride power adapter circuit. Background Technology

[0002] As electronic devices become increasingly miniaturized and performant, higher demands are being placed on the size, efficiency, and safety of power adapters. Traditional power adapters often suffer from low efficiency due to the use of silicon-based switching devices and insufficient EMI (electromagnetic interference) suppression capabilities, making it difficult to meet the requirements of ultra-thin designs. Gallium nitride (GaN) devices, with their high-frequency and high-efficiency characteristics, can significantly improve the performance of power adapters when applied to them, but require optimized circuit topology and protection mechanisms to ensure stability and safety. Utility Model Content

[0003] The purpose of this invention is to address the above-mentioned problems by providing a vertical ultra-thin built-in gallium nitride power adapter circuit.

[0004] This utility model is achieved through the following technical solution: a vertical ultra-thin built-in gallium nitride power adapter circuit, comprising an input protection circuit, an EMI filter circuit, a rectifier filter circuit, a power transformer, a secondary MOS rectifier circuit, an output filter circuit, a voltage regulation control circuit, and a synchronization IC signal control circuit connected in sequence. The output terminal of the input protection circuit is connected to the input terminal of the EMI filter circuit, the output terminal of the EMI filter circuit is connected to the input terminal of the rectifier filter circuit, the output terminal of the rectifier filter circuit is connected to the primary side of the power transformer, the secondary side of the power transformer is connected to the input terminal of the secondary MOS rectifier circuit, the output terminal of the secondary MOS rectifier circuit is connected to the input terminal of the output filter circuit, the primary side of the power transformer is also connected to an RCD high-voltage absorption circuit and a control circuit, the secondary MOS rectifier circuit is connected to the synchronization IC signal control circuit, and the output filter circuit is connected to the voltage regulation control circuit. The voltage regulation control circuit includes an optocoupler containing a light-emitting diode PC1A and a phototransistor PC1B, a TL431 voltage regulator IC, resistors R24-R29, and capacitors C12 and C13. The anode of the voltage regulator IC is grounded, the cathode is connected to the light-emitting diode PC1A, and the reference terminal is connected to a voltage divider network composed of resistors R27 and R28 connected in parallel. A resistor R25 is connected in parallel across the two ends of the light-emitting diode PC1A, and the phototransistor PC1B is connected to the second pin of chip U1 in the control circuit through a resistor R19.

[0005] Furthermore, the input protection circuit includes a varistor ZR1 and a thermistor RT1 connected to the power input terminal.

[0006] Furthermore, the EMI filter circuit includes a first common-mode choke NF1, a safety capacitor XC1, a parallel resistor network R1-R4, and a common-mode choke NF2; the first common-mode choke NF1 is connected to the rear end of the input protection circuit, the safety capacitor XC1 is connected in parallel between the output terminal of the first common-mode choke NF1 and the parallel resistor network R1-R4, and the common-mode choke NF2 is connected between the parallel resistor network R1-R4 and the rectifier filter circuit.

[0007] Furthermore, the rectifier filter circuit is a bridge rectifier diode BD1, and the power transformer is a dual-winding transformer T1.

[0008] Furthermore, the RCD high-voltage absorption circuit includes a diode D1, an absorption capacitor C3, resistors R7-R10, and a capacitor C6; the anode of the diode D1 is connected to the primary side of the power transformer, the cathode is connected to the positive terminal of the absorption capacitor C3, the resistors R7-R10 are connected between the diode D1 and the capacitor C3, and the capacitor C6 is connected in parallel across the two ends of the diode D1.

[0009] Furthermore, the control circuit includes a gallium nitride switch Q1 and a chip U1; the gate of the gallium nitride switch Q1 is connected to the sixth pin of the chip U1 through a gate drive resistor BC1, a diode D4 and a resistor R12; a resistor R11 is connected in parallel between the anode of the diode D4 and the cathode of the resistor R12; the source of the gallium nitride switch Q1 is grounded and the drain is connected to the primary side of the power transformer.

[0010] Furthermore, the secondary MOS rectifier circuit includes a MOS transistor Q2. The gate of the MOS transistor Q2 is connected to pin 6 of chip U2 in the synchronization IC signal control circuit through resistor R33, the source is grounded, and the drain is connected to the input terminal of the synchronization IC signal control circuit.

[0011] Furthermore, the output filter circuit includes capacitors C15 and C16 connected in parallel between the positive and negative output terminals.

[0012] Furthermore, the synchronous IC signal control circuit includes a chip U3. Pin 1 of the chip U3 is connected to the node between the voltage regulation control circuit and the output filter circuit. Pin 5 is connected to its own pin 3 after being connected in series with resistor R31, capacitor C14, and resistor R32. Pin 4 is connected to the node between resistor R31 and capacitor C14. Pin 2 is connected to the node between capacitor C14 and resistor R32. Pin 6 is connected to the gate of MOSFET Q2 through resistor R33. The drain of MOSFET Q2 is connected to the node between resistor R31 and pin 5 of chip U3 through resistor R30. The branch line extending from the source intersects with the line where pin 2 of chip U3 is located.

[0013] This invention improves conversion efficiency and reduces energy consumption by employing gallium nitride switching transistors and synchronous rectification technology; the combination of multi-stage EMI filtering and RCD high-voltage absorption circuit effectively suppresses electromagnetic interference and voltage spikes, meeting electromagnetic compatibility requirements; the integrated and comprehensive input protection, voltage regulation control and synchronous drive mechanism enhance circuit safety and output stability; the high-frequency design reduces the size of components, enabling a vertical ultra-thin structure that meets the needs of miniaturized electronic devices. Attached Figure Description

[0014] Figure 1 This is a circuit block diagram of this utility model; Figure 2 This is the circuit structure diagram of this utility model.

[0015] The attached figures are labeled as follows: 1. Input protection circuit; 2. EMI filter circuit; 3. Rectifier filter circuit; 4. Power transformer; 5. RCD high voltage absorption circuit; 6. Control circuit; 7. Secondary MOS rectifier circuit; 8. Output filter circuit; 9. Voltage regulation control circuit; 10. Synchronization IC signal control circuit. Detailed Implementation

[0016] The present invention will be further illustrated below with reference to specific examples and accompanying drawings.

[0017] like Figures 1-2 As shown, this utility model describes a vertical ultra-thin built-in gallium nitride power adapter circuit, including an input protection circuit 1, an EMI filter circuit 2, a rectifier filter circuit 3, a power transformer 4, an RCD high-voltage absorption circuit 5, a control circuit 6, a secondary MOS rectifier circuit 7, an output filter circuit 8, a voltage regulation control circuit 9, and a synchronization IC signal control circuit 10. The output terminal of the input protection circuit 1 is connected to the input terminal of the EMI filter circuit 2, the output terminal of the EMI filter circuit 2 is connected to the input terminal of the rectifier filter circuit 3, the output terminal of the rectifier filter circuit 3 is connected to the primary side of the power transformer 4, the secondary side of the power transformer 4 is connected to the input terminal of the secondary MOS rectifier circuit 7, the output terminal of the secondary MOS rectifier circuit 7 is connected to the input terminal of the output filter circuit 8, the primary side of the power transformer 4 is also connected to the RCD high-voltage absorption circuit 5 and the control circuit 6, the secondary MOS rectifier circuit 7 is connected to the synchronization IC signal control circuit 10, and the output filter circuit 8 is connected to the voltage regulation control circuit 9. The voltage regulation control circuit 9 includes a light-emitting diode (LED) PC1A, a phototransistor PC1B, a voltage regulator IC, resistors R24-R29, capacitors C12 and C13. The voltage regulator IC is a TL431, with its anode grounded and its cathode connected to the reference terminal of LED PC1A, which is connected to a resistor divider network composed of resistors R27 and R28 in parallel. A resistor R25 is connected in parallel across LED PC1A. The phototransistor PC1B is connected to pin 2 of chip U1 through resistor R19. The low-voltage side feedback circuit (TL4...) The 31 reference source voltage regulator IC detects changes in the output voltage and generates an electrical signal corresponding to the voltage deviation. This signal drives the light-emitting diode PC1A (primary side) of the optocoupler, causing its light intensity to change with the voltage deviation. The phototransistor PC1B (secondary side) of the optocoupler receives the light signal and converts it into an electrical signal, which is fed back to the control chip on the high-voltage side. The control chip adjusts the duty cycle of the output pulse according to the feedback signal, ultimately stabilizing the output voltage at the set value. The optocoupler ensures accurate transmission of the voltage regulation feedback signal while providing isolation, and is the core component of the voltage regulation control circuit 9. The voltage regulator IC serves as a voltage reference source. Through an external resistor voltage divider network, the output voltage can be precisely adjusted. The reference voltage is 2.5V (accuracy ±1%~±0.5%). It has low dynamic impedance and fast response speed, and offers higher accuracy and flexibility compared to using a general Zener diode.

[0018] In this embodiment of the invention, the power input terminal of the input circuit 1 is connected to a varistor ZR1 to suppress surges and form overvoltage protection, and is also connected to a thermistor RT1 to suppress power-on surge current and form PTC protection.

[0019] In this embodiment of the invention, the EMI filtering electromagnetic interference suppression circuit 2 includes a first common-mode choke NF1, a safety capacitor XC1, a parallel resistor network R1-R4, and a common-mode choke NF2. The first common-mode choke NF1 is connected to the rear end of the input circuit. The safety capacitor XC1 is connected in parallel to the output terminal of the first common-mode choke NF1 and the parallel resistor network R1-R4. The common-mode choke NF2 is connected between the resistor network R1-R4 and the bridge rectifier filter circuit 3. Through the cascaded design of the multi-stage noise filters NF1 / NF2 and the safety capacitor XC1, combined with the impedance matching characteristics of the parallel resistor network R1-R4, the suppression capability of differential-mode / common-mode interference is effectively improved, the electromagnetic compatibility of the circuit is enhanced, and the power safety and stability are ensured.

[0020] In this embodiment of the present invention, the rectifier filter circuit 3 is a bridge rectifier diode BD1, which converts the input AC power into pulsating DC power to provide the basic DC voltage for the subsequent power conversion.

[0021] In this embodiment of the utility model, the power transformer 4 includes a transformer T1, which is a double-winding transformer. One side of the double winding of the transformer T1 is the primary side, which is connected to the RCD high-voltage absorption circuit 5, and the other side is the secondary side, which is connected to the secondary MOS rectifier circuit 7. The primary side receives the rectified DC voltage and transmits it to the secondary side through electromagnetic induction, thereby realizing high and low voltage isolation and energy transmission.

[0022] In this embodiment of the present invention, the RCD high-voltage absorption circuit 5 includes a diode D1, whose anode is connected to the primary side of the power transformer 4 and whose cathode is connected to the positive terminal of the absorption capacitor C3. Resistors R7, R8, R9, and R10 are connected between the diode D1 and the capacitor C3. A capacitor C6 is connected in parallel across the diode D1 to absorb the leakage inductance energy of the primary side of the power transformer 4 and the spike voltage generated during the switching process, thereby preventing the gallium nitride switch Q1 in the control circuit (6) from being damaged due to overvoltage and improving the stability of the circuit.

[0023] In this embodiment of the invention, the control circuit 6 includes a gallium nitride (GaN) switch Q1. The gate of the GaN switch Q1 is connected to pin 6 of the chip U1 via a gate drive resistor BC1, a diode D4, and a resistor R12. A resistor R11 is connected in parallel between the anode of the diode D4 and the cathode of the resistor R12. The source of the GaN switch Q1 is grounded, and its drain is connected to the primary side of the power transformer 4. The PWM signal output by the chip U1 controls the conduction and cutoff of the GaN switch Q1, thereby realizing the energy conversion on the primary side of the power transformer 4. The high-frequency characteristics of the GaN device can reduce the size of the transformer, making it easier to adapt to the ultra-thin design of the adapter.

[0024] In this embodiment of the present invention, the secondary MOS rectifier circuit 7 includes a MOS transistor Q2 connected to the secondary side of transformer 4. The gate of the MOS transistor Q2 is connected to the sixth pin of chip U2 through resistor R33. The source of the MOS transistor Q2 is grounded, and the drain is connected to the input terminal of the synchronous IC signal control circuit.

[0025] In this embodiment of the present invention, the output filter circuit 8 includes capacitors C15 and C16 connected in parallel between the positive and negative terminals of the output. These capacitors are used to filter out the ripple component in the rectified DC voltage and can absorb the peak voltage on the secondary side of the transformer (such as surges during switching) to reduce the impact on the downstream load.

[0026] In this embodiment of the present invention, the synchronous IC signal control circuit 10 includes a chip U3. Pin 1 of the chip U3 is connected to the node between the voltage regulation control circuit and the output filter circuit, serving as the input terminal for the output voltage detection signal. Pin 5 of the chip U3 is connected to its own pin 3 after being connected in series with resistor R31, capacitor C14, and resistor R32. Pin 4 of the chip U3 is connected to the node between resistor R31 and capacitor C14. Pin 2 of the chip U3 is connected to the node between capacitor C14 and resistor R32. Pin 6 of the chip U3 is connected to the gate of MOSFET Q2 through resistor R33. The source of the MOSFET Q2 is grounded, and its drain is connected to the node between resistor R31 and pin 5 of U3 through resistor R30. The branch line extending from the source intersects with the line where pin 2 of the chip U3 is located, which can realize dynamic adjustment and abnormal protection of the output voltage, ensuring that the circuit works stably within a wide load range.

[0027] This invention employs gallium nitride switching transistors and synchronous rectification technology to improve conversion efficiency and reduce energy consumption; multi-stage EMI filtering combined with RCD high-voltage absorption circuit effectively suppresses electromagnetic interference and voltage spikes, meeting electromagnetic compatibility requirements; integrated and comprehensive input protection, voltage regulation control and synchronous drive mechanism enhance circuit safety and output stability; high-frequency design reduces component size, enabling a vertical ultra-thin structure that meets the needs of miniaturized electronic devices.

[0028] The above embodiments are merely preferred embodiments of the present utility model and are only used to explain the present utility model, not to limit the present utility model. Any changes, substitutions, combinations, simplifications, modifications, etc., made by those skilled in the art without departing from the spirit and principle of the present utility model shall be considered equivalent substitutions and shall be included within the protection scope of the present utility model.

Claims

1. A vertical ultra-thin built-in gallium nitride power adapter circuit, characterized in that: The circuit includes an input protection circuit (1), an EMI filter circuit (2), a rectifier filter circuit (3), a power transformer (4), a secondary MOS rectifier circuit (7), an output filter circuit (8), a voltage regulation control circuit (9), and a synchronization IC signal control circuit (10). The output terminal of the input protection circuit (1) is connected to the input terminal of the EMI filter circuit (2). The output terminal of the EMI filter circuit (2) is connected to the input terminal of the rectifier filter circuit (3). The output terminal of the rectifier filter circuit (3) is connected to the primary side of the power transformer (4). The secondary side of the power transformer (4) is connected to the input terminal of the secondary MOS rectifier circuit (7). The output terminal of the secondary MOS rectifier circuit (7) is connected to the input terminal of the output filter circuit (8). The primary side of the power transformer (4) is also connected to an RCD high-voltage absorption circuit (5) and a control circuit (6). The secondary MOS rectifier circuit (7) is connected to the synchronization IC signal control circuit (10). The output filter circuit (8) is connected to the voltage regulation control circuit (9). The voltage regulation control circuit (9) includes an optocoupler containing a light-emitting diode PC1A and a phototransistor PC1B, a voltage regulator IC of model TL431, resistors R24-R29 and capacitors C12 and C13; the anode of the voltage regulator IC is grounded, the cathode is connected to the light-emitting diode PC1A, and the reference terminal is connected to a voltage divider network composed of resistors R27 and R28 connected in parallel; a resistor R25 is connected in parallel across the two ends of the light-emitting diode PC1A, and the phototransistor PC1B is connected to the second pin of chip U1 in the control circuit (6) through a resistor R19.

2. The vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The input protection circuit (1) includes a varistor ZR1 and a thermistor RT1 connected to the power input terminal.

3. The vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The EMI filter circuit (2) includes a first common-mode choke NF1, a safety capacitor XC1, a parallel resistor network R1-R4, and a common-mode choke NF2. The first common-mode choke NF1 is connected to the rear end of the input protection circuit (1). The safety capacitor XC1 is connected in parallel between the output end of the first common-mode choke NF1 and the parallel resistor network R1-R4. The common-mode choke NF2 is connected between the parallel resistor network R1-R4 and the rectifier filter circuit (3).

4. The vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The rectifier filter circuit (3) is a bridge rectifier diode BD1, and the power transformer (4) is a double-winding transformer T1.

5. A vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The RCD high voltage absorption circuit (5) includes a diode D1, an absorption capacitor C3, a resistor R7-R10 and a capacitor C6; the anode of the diode D1 is connected to the primary side of the power transformer (4), the cathode is connected to the positive terminal of the absorption capacitor C3, the resistor R7-R10 is connected between the diode D1 and the capacitor C3, and the capacitor C6 is connected in parallel across the two ends of the diode D1.

6. The vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The control circuit (6) includes a gallium nitride switch Q1 and a chip U1; the gate of the gallium nitride switch Q1 is connected to the sixth pin of the chip U1 through a gate drive resistor BC1, a diode D4 and a resistor R12; a resistor R11 is connected in parallel between the positive terminal of the diode D4 and the negative terminal of the resistor R12; the source of the gallium nitride switch Q1 is grounded and the drain is connected to the primary side of the power transformer (4).

7. A vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The secondary MOS rectifier circuit (7) includes a MOS transistor Q2. The gate of the MOS transistor Q2 is connected to the sixth pin of the chip U2 in the synchronous IC signal control circuit (10) through a resistor R33. The source is grounded and the drain is connected to the input terminal of the synchronous IC signal control circuit (10).

8. A vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The output filter circuit (8) includes capacitors C15 and C16 connected in parallel between the positive and negative output terminals.

9. A vertical ultra-thin built-in gallium nitride power adapter circuit according to claim 1, characterized in that: The synchronous IC signal control circuit (10) includes a chip U3. Pin 1 of the chip U3 is connected to the node between the voltage regulation control circuit (9) and the output filter circuit (8). Pin 5 is connected to its own pin 3 after being connected in series with resistor R31, capacitor C14, and resistor R32. Pin 4 is connected to the node between resistor R31 and capacitor C14. Pin 2 is connected to the node between capacitor C14 and resistor R32. Pin 6 is connected to the gate of MOS transistor Q2 through resistor R33. The drain of MOS transistor Q2 is connected to the node between resistor R31 and pin 5 of chip U3 through resistor R30. The branch line extending from the source intersects with the line where pin 2 of chip U3 is located.

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