Joint grain structure

Abstract

The present disclosure provides bonded die structures and methods of fabricating bonded die structures with improved stress distribution. A bonded die structure can include a second die bonded to a first die. The size, shape, and / or relative position of the first die relative to the second die can be configured to minimize stress concentration in the bonded die structure. A length dimension of a corner region of the second die can be smaller than a length dimension of an adjacent corner region of the first die, which helps to redistribute stress from the corner of the first die. In addition, an offset distance between the corner of the second die and the corner of the first die can also be controlled to minimize stress applied to the corner of the first die in a vertical direction. As a result, crack formation can be reduced, and device performance and yield can be improved.

Description

Technical Field

[0001] This work concerns the bonding of grain structures and their manufacturing methods. Background Technology

[0002] The semiconductor industry has flourished due to the increasing integration density of various electronic components (such as transistors, diodes, resistors, capacitors, etc.).

[0003] In addition to shrinking the size of electronic components, advancements in component packaging technology are constantly emerging, aiming to provide smaller and more space-efficient packages than ever before. Typical examples include quad flat packs (QFP), pin grid arrays (PGA), ball grid arrays (BGA), flip chips (FC), three-dimensional integrated circuits (3DICs), wafer-level packages (WLPs), package-on-package (PoP), and system-on-chip (SoC) or system-on-integrated circuit (SoIC). Some of these three-dimensional devices are fabricated by stacking chips. Due to the shortened interconnect lengths between stacked chips, these three-dimensional devices offer higher integration density and other advantages. However, challenges associated with three-dimensional devices remain. Utility Model Content

[0004] This invention provides a bonded grain structure including a first grain, a second grain, and a gap-filling dielectric material. The first grain includes a first side, a second side, and a corner region. The first side extends along a first direction, the second side extends along a second direction, and the corner region includes a corner side located between the first and second sides. The second grain is bonded to the first grain. The second grain includes a first side, a second side, and a corner region. The first side extends along the first direction, the second side extends along the second direction, and the corner region includes a corner side located between the first and second sides of the second grain. The gap-filling dielectric material laterally surrounds the first and second grains. The second grain does not extend beyond the first or second side of the first grain. A first offset distance between the first side of the second grain and the first side of the first grain is equal to or greater than zero. A second offset distance between the second side of the second grain and the second side of the first grain is equal to or greater than zero. A third offset distance between the corner side of the second grain and the corner side of the first grain is less than or equal to at least one of the first or second offset distances. The length dimension of a corner region of the first grain is greater than the length dimension of a corner region of the second grain.

[0005] In some embodiments, the first offset distance between the first side of the second grain and the first side of the first grain is greater than zero, the second offset distance between the second side of the second grain and the second side of the first grain is greater than zero, and the third offset distance between the corner side of the second grain and the corner side of the first grain is less than the first offset distance and the second offset distance.

[0006] In some embodiments, the first grain includes a truncated quadrilateral including a pair of first sides extending parallel to each other along the first direction, a pair of second sides extending parallel to each other along the second direction, and four corner sides located in the corner regions of the corresponding first grain, wherein each of the corner sides extends between a first side and a second side of the first grain.

[0007] In some embodiments, a plurality of second dies are bonded to the first die, each of the plurality of second dies including a first side extending along the first direction, a second side extending along the second direction, and a corner region including a corner side located between the first side and the second side of the second die, wherein the plurality of second dies do not extend beyond the first side and the second side of the first die, the plurality of second dies including a plurality of corner regions adjacent to the plurality of corner regions of the first die, and a length dimension of the plurality of corner regions of the first die being greater than a length dimension of the plurality of corner regions of the plurality of second dies adjacent to the plurality of corner regions of the first die.

[0008] In some embodiments, the corner side of the first grain includes an arcuate shape located between an endpoint of the first side of the first grain and an endpoint of the second side of the first grain, wherein the length dimension of the corner region of the first grain includes the length of a line segment extending between the endpoint of the first side of the first grain and the endpoint of the second side of the first grain.

[0009] In some embodiments, the first side of the second grain and the second side of the second grain are joined at an edge, the edge defining the length dimension of the corner region of the second grain.

[0010] This invention provides a bonded grain structure including a first layer, a second layer, and a gap-filling dielectric material. The first layer includes one or more first grains. The second layer includes one or more second grains, wherein the one or more second grains in the second layer are bonded to the one or more first grains in the first layer. A gap-filling dielectric material laterally surrounds the one or more second grains in the second layer and the one or more first grains in the first layer. An outer corner region of the first grain in the first layer includes a first length dimension. The second grain in the second layer includes an outer corner region adjacent to the outer corner region of the first grain in the first layer, and the second length dimension of the outer corner region of the second grain in the second layer is smaller than the first length dimension of the outer corner region of the first grain in the first layer.

[0011] In some embodiments, the outer corner region of the first grain includes a corner side extending along a pair of diagonal directions between a first side of the first grain extending along a first horizontal direction and a second side of the first grain extending along a second horizontal direction, and the second side includes a corner side extending along a pair of diagonal directions between the first side of the second grain extending along a first horizontal direction and the second side of the second grain extending along a second horizontal direction, and an offset distance between the corner side of the second grain and the corner side of the first grain is equal to or less than an offset distance between the first side of the second grain and the first side of the first grain and / or an offset distance between the second side of the second grain and the second side of the first grain.

[0012] In some embodiments, the bonded grain structure further includes a third layer comprising one or more third grains, wherein each of the third grains in the third layer is bonded to one or more of the second grains in the second layer, wherein the gap-filling dielectric material laterally surrounds the one or more third grains, and an outer corner region of one of the third grains in the third layer includes a third length dimension, and the third length dimension is smaller than the second length dimension.

[0013] In some embodiments, the bonding grain structure further includes a carrier structure, wherein the third layer is located between the carrier structure and the second layer, and the second layer is located between the third layer and the first layer.

[0014] This invention provides a method for manufacturing a bonded grain structure, including placing a second grain onto a first grain. The first grain includes a first side extending along a first direction, a second side extending along a second direction, and a corner region, the corner region including a corner side located between the first side and the second side. The second grain includes a first side extending along the first direction, a second side extending along the second direction, and a corner region, the corner region including a corner side located between the first side and the second side of the second grain. A length dimension of the corner region of the first grain is greater than a length dimension of the corner region of the second grain. The method involves bonding the second grain to the first grain and forming a dielectric material laterally surrounding the second grain. Attached Figure Description

[0015] The embodiments of this invention will be described in detail below with reference to the accompanying drawings. It should be noted that, in accordance with industry standard practice, many features are not drawn to scale and are only used for illustrative purposes. In fact, the dimensions of the components may be arbitrarily enlarged or reduced to clearly demonstrate the features of this invention.

[0016] Figure 1A This is a vertical cross-sectional view illustrating the first grain disposed on the first carrier structure according to various embodiments of the present invention.

[0017] Figure 1B This is a top view illustrating the shape of the first grain according to various embodiments of this invention.

[0018] Figure 2 This is a vertical cross-sectional view illustrating the first dielectric material laterally surrounding the first grain according to various embodiments of the present invention.

[0019] Figure 3 This is a vertical cross-sectional view illustrating, according to various embodiments of the present invention, the formation of a first bonding layer on a first dielectric material and a first grain.

[0020] Figure 4 This is a vertical cross-sectional view illustrating a bonding structure according to various embodiments of the present invention, comprising a plurality of second grains disposed on and bonded to a first grain.

[0021] Figure 5 This is a vertical cross-sectional view of a bonding structure illustrated according to various embodiments of the invention, in which a second dielectric material laterally surrounds the periphery of each second grain.

[0022] Figure 6This is a vertical cross-sectional view illustrating the joining structure disposed on the second carrier structure according to various embodiments of the present invention.

[0023] Figure 7 This is a vertical cross-sectional view of the bonded grain structure illustrated according to various embodiments of this invention.

[0024] Figure 8 This is a vertical cross-sectional view of a bonding grain structure illustrated according to various embodiments of the present invention, the bonding grain structure including a plurality of solder balls located on the front side of a first grain.

[0025] Figure 9 This is a vertical cross-sectional view illustrating the bonding grain structure mounted on a support structure by a plurality of solder balls according to various embodiments of the present invention.

[0026] Figure 10A This is a top view of a corner region of the first grain illustrated according to various embodiments of this invention.

[0027] Figure 10B This is a top view of a corner region of a second grain illustrated according to various embodiments of this invention.

[0028] Figure 10C This is a top view of a corner region of a bonding structure illustrated according to various embodiments of the present invention, the bonding structure including a first grain and a second grain bonded to the first grain.

[0029] Figure 10D It is along Figure 10C The vertical cross-sectional view of the joint structure is shown by line segment A-A'.

[0030] Figure 10E It is along Figure 10C The vertical cross-sectional view of the joint structure is shown by the B-B' line segment.

[0031] Figure 10F This is a top view illustrating a bonded grain structure according to various embodiments of the present invention, wherein the corner regions of the first grain are surrounded by a gap-filling dielectric material.

[0032] Figure 10G These are illustrations based on various embodiments of this invention. Figure 10F A vertical cross-sectional view of a portion of the mid-grain structure, including the corner region of the first and second grains.

[0033] Figure 11A This is a vertical cross-sectional view of the bonded grain structure illustrated according to various embodiments of this invention.

[0034] Figure 11B It is a drawing Figure 11A A top view of the bonded grain structure in the image.

[0035] Figure 12A This is a vertical cross-sectional view of the bonded grain structure illustrated according to various embodiments of this invention.

[0036] Figure 12B It is a drawing Figure 12A A top view of the bonded grain structure in the image.

[0037] Figure 13A This is a vertical cross-sectional view of the bonded grain structure illustrated according to various embodiments of this invention.

[0038] Figure 13B It is a drawing Figure 13A A top view of the bonded grain structure in the image.

[0039] Figure 14A This is a vertical cross-sectional view of the bonded grain structure illustrated according to various embodiments of this invention.

[0040] Figure 14B It is a drawing Figure 14A A top view of the bonded grain structure in the image.

[0041] Figure 15A This is a top view of a corner region of the first grain, illustrated according to other embodiments of this invention.

[0042] Figure 15B This is a top view of a corner region of a second grain illustrated according to various embodiments of this invention.

[0043] Figure 15C This is a top view of a corner region of a joint structure illustrated according to various embodiments of the present invention. The joint structure includes... Figure 15B The second grain in the bonded to Figure 15A The first grain in the process.

[0044] Figure 16A This is a top view illustrating a corner region of the first grain according to another embodiment of the invention.

[0045] Figure 16B This is a top view illustrating a corner region of a second grain according to another embodiment of the invention.

[0046] Figure 16C This is a top view of a corner region of a joint structure illustrated according to various embodiments of the present invention. The joint structure includes... Figure 16B The second grain in the bonded to Figure 16A The first grain in the process.

[0047] Figure 17 This is a flowchart illustrating a method for manufacturing a bonded grain structure according to various embodiments of the present invention.

[0048] The reference numerals in the attached figures are explained as follows:

[0049] 100: First grain

[0050] 101: First semiconductor substrate

[0051] 102: First side (front side)

[0052] 103: First Device

[0053] 104: Second side (rear side)

[0054] 105: First Intra-connection Structure

[0055] 107: Dielectric Materials

[0056] 109: Characteristics of metal interconnects

[0057] 110: Corner Area

[0058] 111: First substrate through-hole

[0059] 113: First side

[0060] 115: Second side

[0061] 117: Corner side

[0062] 119: Gap-filling dielectric material (first dielectric material)

[0063] 120: First carrier structure

[0064] 121: First bonding layer

[0065] 123: First dielectric layer

[0066] 125: First joint pad

[0067] 128: Continuous planar surface

[0068] 130: Second carrier structure

[0069] 131, 133: Bonding layer

[0070] 135: Dielectric materials

[0071] 137: Welding ball

[0072] 140: Supporting structure

[0073] 141: Alignment Mark

[0074] 143: First sealing ring

[0075] 150: Joint structure

[0076] 151, 153: Endpoints

[0077] 160: Jointed grain structure

[0078] 170: First Floor

[0079] 200: Second grain

[0080] 200a: First and second grains

[0081] 200b: Second grain

[0082] 201: Second semiconductor substrate

[0083] 203: Second device

[0084] 205: Second internal connection structure

[0085] 207: Dielectric materials

[0086] 209: Characteristics of metal interconnects

[0087] 210: Corner Area

[0088] 210a: Inner corner area

[0089] 213: First side

[0090] 215: Second side

[0091] 215a: Second inner side

[0092] 217: Corner side

[0093] 219: Gap-filling dielectric material (second dielectric material)

[0094] 221a: First and second bonding layers

[0095] 221b: Second bonding layer

[0096] 223: Second dielectric material

[0097] 225: Second joint pad

[0098] 229: Edge

[0099] 243: Second sealing ring

[0100] 251, 253: Endpoints

[0101] 270: Second Layer

[0102] 300: Third grain

[0103] 310: Corner Area

[0104] 313: First side

[0105] 315: Second side

[0106] 317: Corner side

[0107] 370: Third Layer

[0108] 400: Method

[0109] 401, 403, 405: Steps D1, D2, D 2’ Length dimension D3, D 3’ D4, D 4’ D5, D 5’ Offset distance hd1: First direction

[0110] hd2: Second direction Detailed Implementation

[0111] The following discloses many different implementations or examples to implement different features of the provided object. Specific embodiments of the elements and their arrangements are described below to illustrate the invention. Of course, these embodiments are merely illustrative and should not be construed as limiting the scope of the invention. For example, the specification mentions that a first feature is formed on a second feature, which includes embodiments where the first and second feature are in direct contact, and also includes embodiments where there are other features between the first and second feature, i.e., the first and second feature are not in direct contact. Furthermore, repeated reference numerals or designations may be used in different embodiments; these repetitions are only for the purpose of clearly describing the invention and do not represent a specific relationship between the different embodiments and / or structures discussed.

[0112] Furthermore, spatially related terms may be used, such as "below," "below," "lower," "above," "higher," and similar terms. These spatially related terms are used to facilitate the description of the relationship between one or more elements or features in the illustrations and other elements or features(s). These spatially related terms include different orientations of the device in use or operation, as well as the orientations described in the illustrations. When the device is turned to a different orientation (rotated 90 degrees or other orientations), the spatially related adjectives used therein will also be interpreted according to the orientation after the turn. Unless otherwise stated, elements using the same reference numerals in this text are generally considered to have the same material composition and similar thickness ranges.

[0113] Various embodiments of this invention primarily relate to semiconductor devices, particularly to bonding structures where multiple semiconductor dies are joined together. These bonded semiconductor dies can be configured as, for example, a system on integrated chip (SoIC), a chip on wafer on substrate (CoWoS), or a chip on wafer (CoW). Such bonded die structures can increase device density within a fixed planar region.

[0114] Semiconductor integrated circuits typically comprise a semiconductor material substrate (e.g., a silicon substrate) on or within which multiple electronic components and elements are formed. These integrated circuits are generally formed by sequentially depositing an insulating or dielectric layer, a conductive layer, and a semiconductor layer material on the semiconductor substrate, and then patterning these material layers using lithography. Subsequently, the semiconductor substrate portion containing the different integrated circuits is separated from the entire substrate through a dicing process to become individual semiconductor dies.

[0115] The bonding structure is formed by placing a second grain on top of a first grain and then performing a bonding process to join the two grains together. In some cases, direct bonding techniques (such as metal-to-metal (MM) or dielectric-to-dielectric (DD) bonding techniques) can be used to achieve grain bonding and form a bonding structure. Other bonding methods can also be used, such as fusion bonding processes between dielectric material layers.

[0116] In some embodiments, a dielectric material, also known as a gap-filling dielectric material, may be formed around each die of the bonding structure. In some embodiments, a dicing process may be used to separate portions of the bonding structure to form individual bonding die structures. Each bonding die structure may include two or more semiconductor dies stacked together. A dicing process may be performed around the periphery of the bonding die to separate the bonding die by the gap-filling dielectric material and a carrier structure (e.g., a wafer or substrate).

[0117] In some cases, the manufacturing process used to form the bonded grain structure can introduce stress into the individual components of the bonded grain structure. This stress may be partly due to differences in material properties between the different materials in the bonded grain structure, such as differences in thermal expansion coefficients (CTE). Excessive stress can lead to cracks or other damage to components such as grains.

[0118] Various embodiments include bonded grain structures with improved stress distribution and methods of manufacturing the same, which can suppress crack formation and other stress-induced defects. In various embodiments, the bonded grain structure may include a second grain bonded to a first grain. The first and second grains can be configured according to their size, shape, and / or relative position to minimize stress concentration in the bonded grain structure. In some embodiments, the length dimension of the corner region of the second grain may be smaller than the length dimension of the corner region of the adjacent first grain. This helps redistribute stress from the surrounding gap-filling dielectric material away from the corner region of the first grain, thereby reducing the occurrence of crack defects in the first grain. In some embodiments, the offset distance between the corners of the second grain and the corners of the first grain can be controlled to minimize the stress applied to the corners of the first grain in the vertical direction. This helps to further reduce cracking in the first grain. Therefore, device performance and yield can be improved.

[0119] Figure 1A This is a vertical cross-sectional view illustrating a first die 100 disposed on a first carrier structure 120 and bonded by an adhesive (not shown) according to various embodiments of the present invention. The first carrier structure 120 may include a substrate (e.g., a semiconductor substrate, organic substrate, glass substrate, ceramic substrate, etc.) suitable for carrying one or more semiconductor dies. In some non-limiting embodiments, the first carrier structure 120 may include a semiconductor (e.g., silicon) wafer. The first carrier structure 120 may include a first side 102 (i.e., a front side) and a second side 104 (i.e., a rear side). In various embodiments, the first carrier structure 120 may optionally include at least one alignment mark 141 disposed on the surface and / or interior of the first carrier structure 120. The alignment mark 141 may include discrete features (e.g., geometry or pattern) that are visible and / or detectable by an optical inspection system. The alignment mark 141 may serve as a reference or guide for precisely placing the first die 100 onto the front side 102 of the first carrier structure 120.

[0120] Re-reference Figure 1AThe first die 100 may include a first semiconductor substrate 101, which may include elemental semiconductors (such as silicon or germanium) and / or compound semiconductors (such as silicon germanium, silicon carbide, gallium arsenide, indium gallium arsenide, gallium nitride, or indium phosphide), or combinations thereof. Other semiconductor substrate materials are also within the scope of this invention. In some embodiments, the first semiconductor substrate 101 may be a semiconductor-on-insulator (SOI) substrate. In some embodiments, a plurality of first devices 103 may be disposed on, above, and / or inside the first semiconductor substrate 101. The first devices 103 may include, for example, active devices, passive devices, or a combination of both. In some embodiments, the first devices 103 disposed on, above, and / or inside the first semiconductor substrate 101 may include integrated circuit devices. These integrated circuit devices may include, for example, transistors (e.g., field-effect transistors (FETs)), capacitors, resistors, diodes, photodiodes, fuse devices, or other similar devices. In some embodiments, the integrated circuit devices may include gate electrodes, source / drain regions, spacers, isolation trenches, etc.

[0121] The first die 100 may further include a first interconnect structure 105 disposed on the first semiconductor substrate 101. The first interconnect structure 105 may include metal interconnect features 109 (e.g., metal wires, vias, and / or bonding pads) within a dielectric material 107 (e.g., one or more inter-layer dielectric (ILD) and / or inter-metal dielectric (IMD)). These interconnect features may connect to various first devices 103 disposed on, above, and / or inside the first semiconductor substrate 101. The first interconnect structure 105 may also optionally include one or more first sealing rings 143 that extend around the periphery of the first die 100. The one or more first sealing rings 143 may protect the device structure of the first die 100 from electrical interference, mechanical damage, and / or contamination. In some embodiments, one or more first sealing rings 143 may include a metallic material (e.g., copper, nickel, aluminum, etc.) embedded in the dielectric material 107 of the first interconnect structure 105. In some embodiments, the first die 100 may also include one or more first substrate through-vias (TSVs) 111 extending through the first semiconductor substrate 101. The first substrate through-vias 111 can electrically connect the first device 103 and / or the metallic interconnect features 109 of the first interconnect structure 105 through the first semiconductor substrate 101 of the first die 100.

[0122] Re-reference Figure 1AThe first die 100 can be placed on the front side 102 of the first carrier structure 120 using a suitable placement device (e.g., a pick-and-place tool). At least one alignment mark 141 can be used as a guide to help place the first die 100 accurately in the correct position on the first carrier structure 120.

[0123] In some embodiments, a plurality of first dies 100 may be placed at predetermined positions on the front side 102 of the first carrier structure 120. Alignment marks 141 may be selectively used to ensure proper alignment and positioning of the individual first dies 100. In some embodiments, the first dies 100 may be secured by a suitable adhesive (in... Figure 1A (Not shown in the image) and adhered to the front side 102 of the first carrier structure 120. In some embodiments, the adhesive may include a material that can be subsequently processed to degrade its adhesive properties so that the first carrier structure 120 can be separated from the first grain 100. In some embodiments, the adhesive may degrade its adhesive properties after being treated with an energy source (e.g., heat, optical (e.g., ultraviolet, infrared, laser, etc.) and / or acoustic (e.g., ultrasound)). Alternatively, the adhesive may include a material that decomposes upon high-temperature treatment, such as an acrylic pressure-sensitive adhesive. Other suitable adhesives are also within the scope of this invention.

[0124] exist Figure 1A In the illustrated embodiment, the first die 100 is placed on the front side 102 of the first carrier structure 120 in a "face-down" configuration, such that the front side of the first die 100 (i.e., the side adjacent to the first interconnect structure 105) faces the first carrier structure 120, while the back side of the first die 100 (i.e., the side adjacent to the first semiconductor substrate 101) faces away from the first carrier structure 120. However, it should be understood that in other embodiments, the first die 100 may also be placed in a "face-up" configuration, in which case the back side of the first die 100 may face the first carrier structure 120, while the front side faces away from the first carrier structure 120.

[0125] Figure 1B This is a top view of the first grain 100, illustrating the shape of the first grain 100 according to various embodiments of the invention. (Reference) Figure 1B The first grain 100 may include a pair of first sides 113 extending parallel to a first horizontal direction hd1, and a pair of second sides 115 extending parallel to a second horizontal direction hd2. Corner sides 117 extend between the first sides 113 and the second sides 115 in each corner region 110 of the first grain 100. Figure 1BIn one embodiment, the periphery of the first grain 100 is truncated quadrilateral. However, it should be understood that other suitable shapes of the first grain 100 are also within the scope of this invention.

[0126] Figure 2 This is a vertical cross-sectional view illustrating, according to various embodiments of the present invention, a first dielectric material 119 laterally surrounding a first grain 100. Reference Figure 2 The first dielectric material 119 may be deposited on the front side 102 of the first carrier structure 120 and on the first grain 100. The first dielectric material 119 may include suitable dielectric materials such as silicon dioxide, silicon nitride, silicon carbide, silicon oxynitride, silicon nitride, low dielectric constant materials and extremely low-K (ELK) materials, undoped silicon glass (USG), fluorosilicate glass (FSG), phosphor-silicate glass (PSG), and combinations thereof. Other suitable dielectric materials are also within the scope of this invention. The first dielectric material 119 can be deposited using suitable deposition processes, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), high-density plasma chemical vapor deposition (HDPCVD), low-pressure chemical vapor deposition, metal-organic chemical vapor deposition (MOCVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, laser ablation, etc. In some embodiments, the first dielectric material 119 can be deposited on the front side 102 of the first carrier structure 120 and above the side and top surfaces of the first grain 100, and a planarization process (e.g., chemical mechanical planarization (CMP)) can be used to remove excess dielectric material above the first grain 100, thereby laterally surrounding the first dielectric material 119 of the first grain 100. The upper surface of the first dielectric material 119 and the back side of the first grain 100 can form a continuous planar surface 128. In an embodiment where a plurality of first grains 100 are distributed on the front side 102 of the first carrier structure 120, the first dielectric material 119 can extend between each first grain 100 and can also be referred to as the first gap-filling dielectric material 119.

[0127] Figure 3 This is a vertical cross-sectional view illustrating, according to various embodiments of the present invention, the formation of a first bonding layer 121 on a first dielectric material 119 and a first grain 100. Reference Figure 3 A first bonding layer 121 may be formed over a continuous planar surface 128 formed by the upper surface of the first dielectric material 119 and the back side of the first grain 100. In various embodiments, the first bonding layer 121 may be formed by depositing a first dielectric layer 123 on the continuous planar surface 128 formed by the upper surface of the first dielectric material 119 and the back side of the first grain 100. The first dielectric layer 123 may include silicon dioxide, silicon nitride, silicon carbide, silicon carbide nitride, silicon oxynitride, dielectric polymer materials, or similar materials, and combinations thereof. Other suitable dielectric materials are also within the scope of this invention. The first dielectric layer 123 may be formed using the suitable deposition process described above. In some embodiments, a planarization process (e.g., CMP process) may be used to provide a planar upper surface of the first dielectric layer 123.

[0128] Re-reference Figure 3 One or more metallic features (e.g., bonding pads, vias, etc.) may be formed in the first dielectric layer 123 of the first bonding layer 121. These metallic features may include suitable conductive materials, such as copper (Cu), tungsten (W), aluminum (Al), etc. These metallic features may be formed in the first dielectric layer 123 by means of a damascene or dual-damascene process. Figure 3 The first bonding pad 125 formed in the first dielectric layer 123 is shown. It should be understood that, as... Figure 3 As shown, a plurality of first bonding pads 125 may be formed in the first dielectric layer 123, wherein at least some of the first bonding pads 125 may be electrically coupled to the first substrate through-holes 111 of the first semiconductor substrate 101 of the underlying first die 100.

[0129] Figure 4 This is a vertical cross-sectional view illustrating a bonding structure 150 according to various embodiments of the present invention, comprising a plurality of second grains 200 disposed on and bonded to a first grain 100. Reference Figure 4 The plurality of second grains 200 may include a first second grain 200a and a second second grain 200b. The first second grain 200a may be similar to the one described above. Figure 2The first die 100 is described. The first and second dies 200a may include a second semiconductor substrate 201. A plurality of second devices 203 may be disposed on, above, and / or inside the second semiconductor substrate 201. The first and second dies 200a may also include a second interconnect structure 205 located on the second semiconductor substrate 201. The second interconnect structure 205 may include metallic interconnect features 209 located in the dielectric material 207, as described above. The second interconnect structure 205 may also optionally include one or more second sealing rings 243.

[0130] Re-reference Figure 4 The first and second bonding layers 221a may be formed on the second interconnect structure 205 of the first and second grains 200a. The first and second bonding layers 221a may be similar to those described above. Figure 3 The first bonding layer 121 is described. The first and second bonding layers 221a may include one or more metallic features (e.g., second bonding pads 225) embedded in the second dielectric material 223. The arrangement of the second bonding pads 225 in the first and second bonding layers 221a may correspond to the arrangement of the corresponding first bonding pads 125 in the first bonding layer 121. At least some of the second bonding pads 225 may be electrically coupled to the metallic interconnect features 209 of the second interconnect structure 205 of the first and second grains 200a.

[0131] A bonding process can be used to bond the first second bonding layer 221a to the first bonding layer 121, thereby bonding the first second die 200a to the first die 100. In some embodiments, the first second bonding layer 221a can be bonded to the first bonding layer 121 by direct metal-to-metal and dielectric-to-dielectric bonding techniques to mechanically and electrically couple the first second die 200a to the first die 100. In some embodiments, prior to bonding the first second die 200a to the first die 100, a pretreatment process (e.g., a plasma treatment process) can be selectively applied to the surfaces of the first bonding layer 121 of the first die 100 and / or the first second bonding layer 221a of the first second die 200a to promote surface activation of the first bonding layer 121 and / or the first second bonding layer 221a before bonding the first second die 200a to the first die 100.

[0132] Re-reference Figure 4The first and second dies 200a can be placed on the first die 100 (e.g., using a pick-and-place tool) so that the first and second bonding layers 221a can contact the first bonding layer 121. The first and second dies 200a can be aligned on the first die 100 so that the first bonding pads 125 in the first bonding layer 121 of the first die 100 are aligned and in contact with the corresponding second bonding pads 225 in the first and second bonding layers 221a of the first and second dies 200a. In some embodiments, one or more of the alignment marks 141 described above can be used to help correctly position and place the first and second dies 200a.

[0133] In direct bonding processes (e.g., metal-to-metal and dielectric-to-dielectric bonding processes), contacting the first bonding layer 121 with the first and second bonding layers 221a can result in a pre-bonding process, wherein chemical bonds (e.g., hydrogen bonds) can be formed at the planar interface between the first dielectric layer 123 of the first bonding layer 121 and the second dielectric layer 223 of the first and second bonding layers 221a. In some embodiments, the pre-bonding process can be performed at room temperature (e.g., about 20°C). In other embodiments, the pre-bonding process can be performed at elevated temperatures. In some embodiments, compressive forces can be applied to the first and second grains 200a and the first grain 100 during the pre-bonding process. In other embodiments, no compressive force may be applied during the pre-bonding process.

[0134] Re-reference Figure 4 In some embodiments, an annealing process may be performed to bond the first bonding pad 125 of the first bonding layer 121 to the second bonding pad 225 of the first second bonding layer 221a, as described in various embodiments of the present invention. The annealing process may be performed at elevated temperatures, such as 100°C or higher, typically between about 150°C and about 350°C, although lower or higher temperatures may also be used. In some embodiments, compressive forces may be applied to the first and second grains 200a and the first grain 100 during the annealing process. In other embodiments, no compressive force may be applied during the annealing process.

[0135] After the bonding process is completed, the first and second dies 200a will be mechanically and electrically coupled to the first die 100. Each of the first and second dies 200a and the first die 100 may include any type of die, including functional dies such as logic dies (e.g., CPU die, GPU die, ASIC die, etc.), memory dies (e.g., SRAM die, HBM die, etc.), analog dies, radio frequency (RF) dies, integrated passive device (IPD) dies, deep trench capacitor (DTC) dies, etc., and combinations thereof. In other embodiments, one or both of the first and second dies 200a and / or the first die 100 may be non-functional or "dummy" dies, which may be used to provide uniformity of the in-line process structure and / or routing of electrical signals.

[0136] exist Figure 4 In some embodiments, the first and second dies 200a can be bonded to the first die 100 in a front-to-back configuration, wherein the front side of the first and second dies 200a (i.e., the side adjacent to the second interconnect structure 205) is bonded to the back side of the first die 100 (i.e., the side adjacent to the first semiconductor substrate 101). However, it should be understood that in other embodiments, the first and second dies 200a can be bonded to the first die 100 in different configurations, such as a back-to-front configuration, a front-to-front configuration, or a back-to-back configuration. Furthermore, although this document describes direct metal-to-metal and dielectric-to-dielectric bonding processes, it should be understood that other bonding processes (e.g., fusion bonding, microbump bonding, etc.) can also be used to bond the first die 100 to the first and second dies 200a.

[0137] Re-reference Figure 4 According to various embodiments of this invention, a second grain 200b can also be disposed on and bonded to the first grain 100. Figure 4 In some embodiments, the second die 200b may be a non-functional "dummy" die. The second die 200b may include a second semiconductor substrate 201. In some embodiments, a dielectric material and optional metal interconnect structures may be disposed on the second semiconductor substrate 201 of the second die 200b. However, the second die 200b may not include the first device 103 and the second device 203 formed on, above, and / or inside the second semiconductor substrate 201 as described above. As described above, Figure 4The non-functional or "dummy" die 200b can be used to provide uniformity of the in-line process structure and / or routing of electrical signals. In other embodiments, the second die 200b can be a functional die as described above.

[0138] A second bonding layer 221b may be formed on the second grain 200b. The second bonding layer 221b may include a second dielectric material 223. In some embodiments, the second bonding layer 221b may not include metallic features (e.g., bonding pads) in the second dielectric material 223. In some embodiments, the region on the first bonding layer 121 where the second grain 200b will be placed may similarly lack the first bonding pad 125.

[0139] The second die 200b can be placed on the first die 100 (e.g., using a pick-and-place tool). In some embodiments, one or more of the alignment marks 141 described above can be used to help correctly position and place the second die 200b onto a predetermined location on the first die 100. A bonding process can then be used to bond the second bonding layer 221b to the first bonding layer 121, thereby bonding the second die 200b to the first die 100. In some embodiments, the second bonding layer 221b can be bonded to the first bonding layer 121 via a welding process. The welding process may include a pre-bonding stage performed at room temperature, wherein hydrogen bonds can form an initial interface bond between the second dielectric material 223 of the second bonding layer 221b and the first dielectric layer 123 of the first bonding layer 121. Furthermore, the welding process may include a high-temperature annealing stage, in which the annealing process promotes the formation of covalent bonds on the surfaces of the first bonding layer 121 and the second bonding layer 221b. Other types of bonding processes (such as direct metal-to-metal and dielectric-to-dielectric bonding processes, microbump bonding processes, etc.) can also be used to bond the second die 200b to the first die 100. After the bonding process is completed, the second die 200b can be mechanically and optionally electrically coupled to the first die 100. The first second die 200a and the second second die 200b bonded to the first die 100 can be laterally separable from each other.

[0140] although Figure 4 The bonding structure 150 includes a pair of second dies 200 bonded to the first die 100. However, it should be understood that in various embodiments, one or more second dies 200 may be bonded to the first die 100. These second dies 200 may include functional dies, non-functional "dummy" dies, or various combinations of both. In embodiments where multiple first dies 100 are distributed on the first carrier structure 120, one or more second dies 200 may be bonded to each first die 100.

[0141] Figure 5This is a vertical cross-sectional view illustrating the bonding structure 150 according to various embodiments of the present invention, in which the second dielectric material 219 laterally surrounds the periphery of each second grain 200. (See reference again) Figure 5 The second dielectric material 219 may be deposited on the first bonding layer 121 and each second grain 200. The second dielectric material 219 may be associated with the aforementioned reference. Figure 2 The first dielectric material 119 described is similar to or identical to that described above. Therefore, for the sake of brevity, repeated descriptions will be omitted. In some embodiments, the second dielectric material 219 may be deposited on the first bonding layer 121, and on the side and top surfaces of each second grain 200, including within the gaps between adjacent second grains 200. A planarization process (e.g., chemical mechanical planarization) may be used to remove excess dielectric material above the second grains 200 to provide a second dielectric material 219 that laterally surrounds the second grains 200. In some embodiments, the top surface of the second grain 200 may be substantially coplanar with the top surface of the second dielectric material 219. The second dielectric material 219 may fill the gaps between adjacent second grains 200 and may also be referred to as a second gap-filling dielectric material 219. The first dielectric material 119 and the second dielectric material 219 may be collectively referred to as gap-filling dielectric materials 119, 219.

[0142] Figure 6 This is a vertical cross-sectional view illustrating the joining structure 150 disposed on the second carrier structure 130 according to various embodiments of the present invention. Reference Figure 6 The second carrier structure 130 may include a substrate (e.g., a semiconductor substrate, an organic substrate, a glass substrate, a ceramic substrate, etc.) suitable for carrying the bonding structure 150. In a non-limiting embodiment, the second carrier structure 130 may include a semiconductor (e.g., silicon) wafer.

[0143] In some embodiments, the second carrier structure 130 can be joined to the bonding structure 150 by welding. A bonding layer 131 comprising dielectric material can be formed on the second dielectric material 219 and the second grain, while another bonding layer 133 comprising dielectric material can be formed on the surface of the second carrier structure 130. The foregoing references can be used. Figure 5 The described welding process is used to join bonding layers 131 and 133, thereby bonding the second carrier structure 130 to the bonding structure 150. Other suitable techniques are also within the scope of this invention, such as bonding the second carrier structure 130 to the bonding structure 150 by means of a suitable adhesive (e.g., glue).

[0144] Re-reference Figure 6The first carrier structure 120 can be removed from the bonding structure 150 using suitable techniques. In some embodiments, the adhesive material bonding the first carrier structure 120 to the bonding structure 150 may be treated (e.g., heat-treated, irradiated, etc.) to render it non-adhesive, and then the first carrier structure 120 may be separated from the bonding structure 150. Other suitable techniques for removing the first carrier structure 120 are also within the scope of this invention. The first carrier structure 120 may be removed from the bonding structure 150 before or after the second carrier structure 130 is attached to the bonding structure 150. In this way, the bonding structure can be effectively transferred from the first carrier structure 120 to the second carrier structure 130. Compared to Figure 5 As shown, the orientation of the bonding structure 150 can be reversed (i.e., flipped) so that the bonding structure 150 can be supported on the second carrier structure 130 and the first grain 100 is located on the second grain 200.

[0145] Figure 7 This is a vertical cross-sectional view of the bonded grain structure 160 illustrated according to various embodiments of the present invention. In various embodiments, such as Figure 6 The structure shown can be subjected to a slitting process. The slitting process may include a mechanical slitting process using a blade (e.g., a diamond or carbide blade) to cut (e.g., saw) the dielectric materials 119, 219 and the second carrier structure 130 through gap filling, thereby providing, as Figure 7 One or more individual bonded grain structures 160 are shown. Other cutting techniques (e.g., plasma cutting, laser grooving, etc.) may also be used. The bonded grain structure 160 may include a plurality of second grains 200 located on the second carrier structure 130, and a first grain 100 located on and bonded to the second grains 200. Gap-filling dielectric materials 119, 219 may laterally surround the first grain 100 and the second grains 200, and may fill the gaps between the second grains 200.

[0146] Figure 8 This is a vertical cross-sectional view illustrating a bonding grain structure 160 according to various embodiments of the present invention. The bonding grain structure 160 includes a plurality of solder balls 137 located on the front side of a first grain 100. Reference Figure 8 Dielectric material 135 may be formed above the front side of the first dielectric material 119 and the first die 100. Dielectric material 135 may include multiple openings, each exposing a metallic feature (e.g., a bonding pad). These metallic features may include, or may be electrically coupled to, metallic features 109 in the first interconnect structure 105 of the underlying first die 100. Multiple solder balls 137 may be provided, each solder ball 137 contacting the metallic feature exposed by the opening in the dielectric material 135.

[0147] Figure 9 This is a vertical cross-sectional view illustrating the bonding grain structure 160 mounted on a support structure 140 by a plurality of solder balls 137 according to various embodiments of the present invention. Reference Figure 9 The bonded grain structure 160 can be relative to Figure 8 The orientation is inverted (i.e., flipped) so that the front side of the first die 100 faces downwards and the back side of the second carrier structure 130 faces upwards. The bonding die structure 160 may be aligned above the support structure 140. The support structure 140 may include, for example, a semiconductor wafer, an interposer, and / or a substrate (e.g., a semiconductor, glass, or organic substrate), which may be configured to support the bonding die structure 160. The bonding die structure 160 may contact the support structure 140 such that solder balls 137 contact corresponding bonding structures (e.g., bonding pads) on the surface of the support structure 140. A reflow process can then be used to bond the bonding die structure 160 to the support structure 140.

[0148] Used to form such Figure 9 The manufacturing process of the shown bonded grain structure 160 may generate stress within the bonded grain structure 160. These internal stresses may be partly due to differences in material properties (e.g., differences in coefficients of thermal expansion) between the different materials in the bonded grain structure 160. In some cases, stress may concentrate on the first grain 100, particularly in the corner region 110 of the first grain 100, which may be subject to thermally induced stress from the interstitial dielectric materials 119, 219, originating from at least four directions (i.e., three lateral directions and one vertical direction). Excessive stress accumulation in the corner region 110 of the first grain 100 may lead to grain cracking or other damage, which can cause defects in the bonded grain structure 160 and reduce yield.

[0149] Various embodiments include a bonded grain structure 160 with improved stress distribution and a method of manufacturing the same, which can suppress the formation of cracks and other stress-induced defects. In various embodiments, the bonded grain structure 160 may include a second grain 200 bonded to the first grain 100, wherein the length dimension of the corner region of the second grain 200 may be smaller than the length dimension of the corner region of the adjacent first grain 100. This helps to redistribute stress from the gap-filling dielectric material around the corner region of the first grain 100, thereby reducing the occurrence of crack defects in the first grain 100.

[0150] In some embodiments, the first and second sides of the second grain 200 adjacent to its corner region may not extend beyond the corresponding first and second sides of the first grain 100 adjacent to its corner region, and in some cases, one or both of the first and second sides of the second grain 200 may be laterally offset relative to the corresponding first and second sides of the first grain 100. In some embodiments, the offset distance between the corner side of the second grain 200 and the corresponding corner side of the first grain 100 may be equal to or less than the offset distance between the first side of the second grain 200 and the first side of the first grain 100 and / or the offset distance between the second side of the second grain 200 and the second side of the first grain 100. In some embodiments, the offset distance between the corner side of the second grain 200 and the corner side of the first grain 100 may be between about 70% and about 90% of the offset distance between the first side of the second grain 200 and the first side of the first grain 100 and / or the offset distance between the second side of the second grain 200 and the second side of the first grain 100. This configuration helps to minimize the stress applied in the corner region of the first grain 100 in the vertical direction, thereby further reducing cracking of the first grain 100. This improves the performance and yield of the device.

[0151] Figure 10A This is a top view of a corner region 110 of the first grain 100, illustrated according to various embodiments of the present invention. Figure 10B This is a top view of a corner region 210 of the second grain 200, illustrated according to various embodiments of the present invention. Reference Figure 10A and Figure 10B In various embodiments, the corner region 210 of the second grain 200 (e.g., the logic grain 200a or dummy grain 200b described above) in the joined grain structure 160 may have a shape similar to the corresponding corner region 110 of the first grain 100 to which the second grain 200 is joined. As described above, the first grain 100 may have a truncated quadrilateral shape, including a first side 113 extending along a first horizontal direction hd1, a second side 115 extending along a second horizontal direction hd2, and a corner side 117 extending diagonally between the first side 113 and the second side 115 in each corner region 110 of the first grain 100. In various embodiments, such as Figure 10B As shown, at least one corner region 210 of each second grain 200 bonded to the first grain 100 may have a similar shape, including a first side 213 extending along a first horizontal direction hd1, a second side 115 extending along a second horizontal direction hd2, and a corner side 217 extending diagonally between the first side 213 and the second side 215. In some embodiments, the corner region 210 of each second grain 200 adjacent to the corner region 110 of the first grain 100 may have, as shown in the figure Figure 10BThe shape shown is indicated. In some embodiments, all corner regions 210 of one or more second grains 200 may have the shape shown. Figure 10B The shape shown.

[0152] In various embodiments, the corner region 110 of the first grain 100 may differ from the corner region 210 of the adjacent second grain 200 because the length dimension D1 of each corner region 110 of the first grain 100 may be greater than the length dimension D2 of the corresponding corner region 210 of the second grain 200. Here, the length dimension D1 of the corner region 110 of the first grain 100 can be defined as the length of a line segment from the endpoint 151 of the first side 113 of the first grain 100 to the endpoint 153 of the second side 115 of the adjacent corner region 110. Figure 10A In the illustrated embodiment, the corner side 117 extends in a straight line between endpoint 151 of the first side 113 and endpoint 153 of the second side 115. Therefore, in this embodiment, the length dimension D1 of the corner region 110 is equal to the length of the corner side 117 of the first grain 100. However, in other embodiments, as described in detail below, the corner side 117 may not extend in a straight line between the corresponding endpoints 151 and 153, and therefore the length dimension D1 of the corner region 110 may not necessarily be equal to the length of the corner side 117 of the first grain 100.

[0153] Similarly, the length dimension D2 of the corner region 210 of the second grain 200 can be defined as the length of the line segment from the endpoint 251 of the first side 213 of the second grain 200 to the endpoint 253 of the second side 215 of the adjacent corner region 210.

[0154] In various embodiments, the length dimension D1 of the corner region 110 of the first grain 100 may be greater than the length dimension D2 of the corner region 210 of the adjacent second grain 200. As discussed in further detail below, making the length dimension D1 of the corner region 110 of the first grain 100 greater than the length dimension D2 of the corresponding corner region 210 of the second grain 200 helps to disperse the stress distribution from the corner region 110 of the first grain 100, thereby reducing stress concentration on the corner region 110 of the first grain 100 and minimizing crack defects in the first grain 100.

[0155] Figure 10C This is a top view of corner regions 110 and 210 of a bonding structure 150 illustrated according to various embodiments of the present invention. The bonding structure 150 includes a first grain 100 and a second grain 200 bonded to the first grain 100. Figure 10D It is along Figure 10C The vertical cross-sectional view of the joint structure 150 is shown by the line segment A-A' in the figure. Figure 10E It is along Figure 10CThe vertical cross-sectional view of the joint structure 150 is shown by the B-B' line segment. Figures 10C to 10E The second grain 200 can be either the first second grain 200a (e.g., a logic grain) or the second second grain 200b (e.g., a dummy grain). (See reference...) Figure 10C In some embodiments, the second grain 200 may not extend beyond the side of the first grain 100, that is, the second grain 200 may not hang outside the first side 113 or the second side 115 of the first grain 100. It has been found that when the second grain 200 extends beyond the first side 113 or the second side 115 of the first grain 100, in the aforementioned dicing process for forming the bonded grain structure 160 (see...), Figure 7 The second grain 200 may interfere with the grain saw, which may cause damage to the joint grain structure 160 and reduce the yield of the device.

[0156] In some cases, the second grain 200 may be placed on the first grain 100 such that one or both of the first side 213 or the second side 215 of the second grain 200 can be aligned vertically with the corresponding first side 113 or the second side 115 of the first grain 100. However, since there is an inaccuracy in precisely placing the second grain 200 on the first grain 100, providing a lateral offset between the first side 213 and the second side 215 of the second grain 200 and the corresponding first side 113 and the second side 115 of the first grain 100 can help avoid the aforementioned grain sawing interference problem.

[0157] exist Figures 10C to 10EIn the illustrated embodiment, the first side 213 of the second grain 200 may be laterally offset by an offset distance D3 relative to the adjacent first side 113 of the first grain 100. The offset distance D3 may be greater than or equal to 0, and in various embodiments may be greater than 0. The second side 215 of the second grain 200 may be laterally offset by an offset distance D4 relative to the adjacent second side 115 of the first grain 100. The offset distance D4 may be greater than or equal to 0, and in various embodiments may be greater than 0. The corner side 217 of the second grain 200 may be laterally offset by an offset distance D5 relative to the adjacent corner side 117 of the first grain 100. In various embodiments, D5 may be less than or equal to D3 and / or D5 may be less than or equal to D4. In some embodiments, D5 may be less than both D3 and D4. In a non-limiting embodiment, the offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 may be about 70% to about 90% of the offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100. Alternatively, or additionally, the offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 may be about 70% to about 90% of the offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100.

[0158] In various embodiments, by making the length dimension D1 of the corner region 110 of the first grain 100 greater than the length dimension D2 of the corresponding corner side 217 of the second grain 200, and by making the offset distance D5 between the corner sides 117 and 217 less than or equal to the offset distances D3 and D4 between the first sides 113 and 213 and the second sides 115 and 215, stress can be more effectively distributed around the corner region 110 of the first grain 100, thereby reducing the occurrence of crack defects in the corner region 110 of the first grain 100. This in Figure 10F and Figure 10G The diagram is shown in Chinese. Figure 10F This is a top view of a bonded grain structure 160 illustrated according to various embodiments of the present invention, wherein a corner region 110 of the first grain 100 is surrounded by a gap-filling dielectric material 119. Figure 10F The positions of the second grain 200 located below, as well as the first side 213, the second side 215, and the corner side 217 of the second grain 200, are shown in dashed lines. Figure 10G These are illustrations based on various embodiments of this invention. Figure 10F A vertical cross-sectional view of a portion of the centrally bonded grain structure 160, including corner regions 110 and 210 of the first grain 100 and the second grain 200. (Reference) Figure 10F and Figure 10GDue to the difference in the coefficients of thermal expansion between the material of the first grain 100 (e.g., silicon) and the surrounding interstitial dielectric materials 119, 219 (e.g., SiO2, SiN, etc.), thermally induced mechanical stress may be generated on the first grain 100. This stress... Figure 10F The diagram, illustrated by arrows, shows the lateral stresses that may be applied to the corner region 110 of the first grain 100. These stresses can be applied to the corner region 110 along three different directions surrounding the first grain 100, such as... Figure 10F As shown. Furthermore, additional stress can be applied in the vertical direction. This is in Figure 10G The cross-sectional view, schematically illustrated with vertically upward arrows, shows the stress applied in the vertically upward direction to the corner region 110 of the first grain 100. These are... Figure 10F and Figure 10G The stress illustrated in the diagram may cause cracking of the first grain 100, particularly within the corner region 110 of the first grain 100. Furthermore, it has been found that the larger the volume of the gap-filling dielectric materials 119, 219 below the corner region 110 of the first grain 100, the greater the stress applied in the vertical direction. Figure 10G As shown, excessive stress accumulation makes this region more prone to crack defects.

[0159] In various embodiments, by providing a relatively small offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100, for example, offset distance D5 being less than or equal to offset distances D3 and D4 between the first sides 113, 213 and the second sides 115, 215 of the first grain 100 and the second grain 200, the volume of the gap-filling dielectric material 119, 219 below the corner region 110 of the first grain 100 can be relatively small. Therefore, the vertical stress applied to the first grain 100 can be more uniformly distributed between the corner region 110 and the sides 113, 115 of the first grain 100, thereby minimizing stress accumulation in the corner region 110 and reducing the risk of cracking in the first grain 100. In some embodiments, the balance of stress distribution can be improved when the value of D5 is about 70% to about 90% of D3 and / or D4.

[0160] Figures 11A to 14B Different configurations of the bonded grain structure 160 according to various embodiments of the present invention are shown. Figure 11A This is a vertical cross-sectional view of the bonded grain structure 160 illustrated according to various embodiments of the present invention. Figure 11AThe illustrated grain bonding structure 160 includes a "double-layer" structure, with a first layer 170 including one or more first grains 100 and a second layer 270 including one or more second grains 200. Each second grain 200 in the second layer 270 is bonded to one or more first grains 100 in the first layer 170. The grain bonding structure 160 also includes gap-filling dielectric materials 119, 219 laterally surrounding the first grains 100 and the second grains 200, and a second carrier structure 130 located above the gap-filling dielectric materials 119, 219 and the first grains 100 and the second grains 200. The second layer 270 is located between the first layer 170 and the second carrier structure 130.

[0161] Figure 11B It is a drawing Figure 11A A top view of the bonded grain structure 160 in the image. For clarity, Figure 11B Not shown Figure 11A The second carrier structure 130 and the gap-filling dielectric materials 119 and 219 are shown in the reference. Figure 11B The first grain 100 and the second grain 200 each exhibit a truncated quadrilateral shape. The first sides 113 and 213 extend along the first horizontal direction hd1, the second sides 115 and 215 extend along the second horizontal direction hd2, and the corner sides 117 and 217 extend between the first sides 113 and 213 and the second sides 115 and 215. Figure 11B In the embodiment, the length dimension D1 of the corner region 110 of the first grain 100 is greater than the length dimension D2 of the corner region 210 of the second grain 200. The offset distance D5 between the corner side 117 of the first grain 100 and the corner side 217 of the second grain 200 is less than the offset distance D3 between the first sides 113 and 213, and less than the offset distance D4 between the second sides 115 and 215. As described above, Figure 11A and Figure 11B The configuration shown can minimize stress accumulation in the corner region 110 of the first grain 100.

[0162] Figure 12A This is a vertical cross-sectional view of the bonded grain structure 160 illustrated according to other embodiments of the present invention. Figure 12AThe illustrated grain bonding structure 160 includes a three-layer structure: a first layer 170 includes one or more first grains 100; a second layer 270 includes one or more second grains 200; and a third layer 370 includes one or more third grains 300. Each third grain 300 in the third layer 370 is bonded to one or more second grains 200 in the second layer 270, and each second grain 200 in the second layer 270 is bonded to one or more first grains 100 in the first layer 170. The grain bonding structure 160 also includes interstitial dielectric materials 119 and 219 laterally surrounding the first grains 100, second grains 200, and third grains 300, and a second carrier structure 130 located above the interstitial dielectric materials 119 and 219 and the first grains 100, second grains 200, and third grains 300. The second layer 270 is located between the first layer 170 and the third layer 370, while the third layer 370 is located between the second layer 270 and the second carrier structure 130.

[0163] Figure 12B It is a drawing Figure 12A A top view of the bonded grain structure 160 in the image. For clarity, Figure 12B Not shown in the middle Figure 12A The second carrier structure 130 and the gap-filling dielectric materials 119 and 219 are shown in the reference. Figure 12B , Figure 12A The configuration of the first layer 170 and the second layer 270 of the bonding grain structure 160 in the aforementioned reference is the same. Figure 11B The first layer 170 and the second layer 270 are configured identically. The third grain 300 in the third layer 370 exhibits a truncated quadrilateral shape, including a first side 313 extending along a first horizontal direction hd1, a second side 315 extending along a second horizontal direction hd2, and a corner side 317 extending between the first side 313 and the second side 315. Figure 12B In the embodiment, the length dimension D of the corner region 310 of the third grain 300 is... 2' The length dimension D2 of the corner region 210 of the second grain 200 is smaller than that of the corner region 210 of the second grain 200. The offset distance D between the corner side 217 of the second grain 200 and the corner side 317 of the third grain 300 is... 5' The offset distance D between the first side 213 of the second grain 200 and the first side 313 of the third grain 300 is smaller than that between the two grains. 3' It is also smaller than the offset distance D between the second side 215 of the second grain 200 and the second side 315 of the third grain 300. 4' .like Figure 12A and Figure 12B The configuration shown can minimize stress accumulation in the corner regions 110, 210 of the first grain 100 and the second grain 200.

[0164] Despite 12A and Figure 12B A three-layer (first layer 170, second layer 270, and third layer 370) bonded grain structure 160 is shown. However, it should be understood that the bonded grain structure 160 may include a structure with more than three layers, wherein each layer includes at least one grain bonded to at least one grain in the lower layer. The corner regions of one or more grains in each adjacent layer may have the features described in the aforementioned reference. Figure 12A and Figure 12B The configuration described.

[0165] Figure 13A This is a vertical cross-sectional view of the bonded grain structure 160 illustrated according to other embodiments of the present invention. Figure 13A The illustrated bonding die structure 160 includes a "two-layer" structure, with a first layer 170 including a first die 100 and a second layer 270 including a first second die 200a and a second second die 200b. In a non-limiting embodiment, the first die 100 may be a logic die, the first second die 200a may be a memory die (e.g., an SRAM die), and the second second die 200b may be a "dummy" die. Other suitable bonding die structure 160 configurations are also within the scope of this invention. Each of the first second die 200a and the second second die 200b in the second layer 270 is bonded to the first die 100 in the first layer 170. The bonding grain structure 160 further includes interstitial dielectric materials 119 and 219 that laterally surround the first grain 100 and each of the first and second grains 200a and 200b, and a second carrier structure 130 located above the interstitial dielectric materials 119 and 219 and the first grain 100, the first and second grains 200a, and the second and second grains 200b. A second layer 270 is located between the first layer 170 and the second carrier structure 130.

[0166] Figure 13B It is a drawing Figure 13A A top view of the bonded grain structure 160 in the image. For clarity, Figure 13B Not shown in the middle Figure 13A The second carrier structure 130 and the gap-filling dielectric materials 119 and 219 are shown in the reference. Figure 13B , Figure 13A The configuration of the first layer 170 of the bonding grain structure 160 in the above reference 11B and Figure 12B The configuration of the first layer 170 described is the same. Figure 13BIn one embodiment, the second layer 270 includes a pair of first second grains 200a and second second grains 200b bonded to the first grain 100. Both the first second grain 200a and the second second grain 200b include a pair of first sides 213 adjacent to the first side 113 of the first grain 100. The first second grain 200a and the second second grain 200b also include a second side 215 (which may be referred to as the “outer” second side 215) extending and adjacent to the first side 113 of the first grain 100, and another second side 215a (which may be referred to as the “inner” second side 215) facing the other of the first second grain 200a and the second second grain 200b. Each of the corner regions 210 of the first and second grains 200a and 200b adjacent to the respective corner regions 110 of the first grain 100 includes a corner side 217 located between the outer second side 215 and the corresponding first side 213 of the first and second grains 200a and 200b. The first and second grains 200a and 200b also include an "inner" corner region 210a located between the inner second side 215 and the corresponding first side 213. Figure 13B In one embodiment, the inner corner region 210a includes the edge where the outer second side 215 of the first second grain 200a and the second second grain 200b meets the corresponding first side 213. However, in other embodiments, the inner corner region 210a may have a different shape and may include a corner side 217 extending diagonally between the inner second side 215 and the first side 213, such as... Figure 13B The outer corner region 210 of the first and second grains 200a and 200b shown.

[0167] exist Figure 13B In the embodiment, the length dimension D1 of the corner region 110 of the first grain 100 is greater than the length dimension D2 of the corner region 210 of the first second grain 200a and the second second grain 200b. The offset distance D5 between the corner side 117 of the first grain 100 and the corner side 217 of the first second grain 200a and the second second grain 200b is less than the offset distance D3 between the first side 113 of the first grain 100 and the first side 213 of the first second grain 200a and the second second grain 200b, and less than the offset distance D4 between the second side 115 of the first grain 100 and the second side 215 of the first second grain 200a and the second second grain 200b. As described above, Figure 11A and Figure 11B The configuration shown can minimize stress accumulation in the corner region 110 of the first grain 100.

[0168] Although Figure 13A and Figure 13BAn embodiment is shown where the second layer 270 includes two first second dies 200a and two second dies 200b. However, it should be understood that in other embodiments, the second layer 270 may include more than two second dies 200 bonded to the first die 100. The configuration of the outer corner region 210 of the second die 200 and its first side 213, second side 215, and corner side 217 can be as follows: Figure 13A and Figure 13B As shown.

[0169] Figure 14A This is a vertical cross-sectional view of the bonded grain structure 160 illustrated according to various embodiments of the present invention. Figure 14A The illustrated die-bonding structure 160 comprises a three-layer structure: a first layer 170 comprising a first die 100; a second layer 270 comprising a first second die 200a and a second second die 200b; and a third layer 370 comprising a third die 300. The third die 300 in the third layer 370 is bonded to the first second die 200a and the second second die 200b in the second layer 270, and each of the first second die 200a and the second second die 200b in the second layer 270 is bonded to the first die 100 in the first layer 170. In a non-limiting embodiment, the first die 100 may be an input / output (IO) die, the first second die 200a may be a memory die (e.g., an SRAM die), the second second die 200b may be a deep trench capacitor (DTC) die, and the third die 300 may be a logic die. Other suitable die-bonding configurations 160 are also within the scope of this invention. The bonding grain structure 160 further includes interstitial dielectric materials 119 and 219 that laterally surround the first grain 100, the first second grain 200a, the second second grain 200b, and the third grain 300, and a second carrier structure 130 located above the interstitial dielectric materials 119 and 219 and the first grain 100, the first second grain 200a, the second second grain 200b, and the third grain 300. A second layer 270 is located between the first layer 170 and the third layer 370, while the third layer 370 is located between the second layer 270 and the second carrier structure 130.

[0170] Figure 14B It is a drawing Figure 14A A top view of the bonded grain structure 160 in the image. For clarity, Figure 14B Not shown in the middle Figure 14A The second carrier structure 130 and the gap-filling dielectric materials 119 and 219 are shown in the reference. Figure 14B , Figure 14A The configuration of the first layer 170 and the second layer 270 of the bonding grain structure 160 in the aforementioned reference is the same. Figure 13BThe first layer 170 and the second layer 270 are configured identically. The third grain 300 in the third layer 370 exhibits a truncated quadrilateral shape, including a first side 313 extending along a first horizontal direction hd1, a second side 315 extending along a second horizontal direction hd2, and a corner side 317 extending between the first side 313 and the second side 315. Figure 14B In the embodiment, the length dimension D of the corner region 310 of the third grain 300 is... 2' The length dimension D2 of the adjacent outer corner region 210 of the first and second grains 200a and 200b is smaller than that of the second and third grains 200b. The offset distance D between the corner sides 217 of the first and second grains 200a and 200b and the corner side 317 of the third grain 300 is also smaller. 5' The offset distance D between the first side 213 of the first and second grains 200a and 200b and the first side 313 of the third grain 300 is less than that between the first side 213 of the first and second grains 200a and 200b and the first side 313 of the third grain 300. 3' It is also less than the offset distance D between the outer second side 215 of the first and second grains 200a and 200b and the second side 315 of the third grain 300. 4' .like Figure 14A and Figure 14B The configuration shown can minimize stress accumulation in the corner regions 110, 210 of the first grain 100 and the second grain 200.

[0171] Figure 15A This is a top view of a corner region 110 of a first grain 100, illustrated according to other embodiments of the present invention. Figure 15B This is a top view of the corner region 210 of the second grain 200, illustrated according to various embodiments of the present invention. Figure 15C This is a top view of the corner regions 110, 210 of the joining structure 150 illustrated according to various embodiments of the present invention. The joining structure 150 includes... Figure 15B The second grain 200 in the middle is bonded to Figure 15A The first grain in the middle is 100. Figure 15A and 15B The first grain 100 and the second grain 200 shown in the figure can be compared with the aforementioned reference. Figure 10A and Figure 10B The first grain 100 and the second grain 200 are described similarly. Therefore, for the sake of brevity, repeated descriptions will be omitted. Figure 15A The first grain 100 shown can be with Figure 10A The first grain 100 shown is different because one or more corner sides 117 of the first grain 100 may have an outwardly curved shape between the endpoint 151 of the first side 113 and the endpoint 153 of the second side 115. Therefore, Figure 15AThe length dimension D1 of the corner region 110 of the first grain 100 shown is equal to the length of the line segment extending from the endpoint 151 of the first side 113 to the endpoint 153 of the second side 115.

[0172] As described in the foregoing embodiments, the length dimension D1 of the corner region 110 of the first grain 100 can be greater than the length dimension D2 of the corresponding corner region 210 of the second grain 200. Figure 15C As shown, the offset distance D5 between the corner side 217 of the second grain 200 and the arc-shaped corner side 117 of the first grain 100 can be less than or equal to the offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100, and can be less than or equal to the offset distance D4 between the second side 213 of the second grain 200 and the second side 115 of the first grain 100.

[0173] Figure 16A This is a top view illustrating a corner region 110 of a first grain 100 according to another embodiment of the present invention. Figure 16B This is a top view illustrating the corner region 210 of the second grain 200 according to another embodiment of the present invention. Figure 16C This is a top view of the corner regions 110, 210 of the joining structure 150 illustrated according to various embodiments of the present invention. The joining structure 150 includes... Figure 16B The second grain 200 in the middle is bonded to Figure 16A The first grain in the [cell] is 100. (Reference) Figure 16A The corner region 110 of the first grain 100 can be with Figure 15A The corner regions 110 of the first grain 100 shown are similar or identical. That is, the corner side 117 of the first grain 100 may have an outwardly arcuate shape between the endpoint 151 of the first side 113 and the endpoint 153 of the second side 115, such that the length D1 of the corner region 110 of the first grain 100 is equal to the length of the line segment extending from the endpoint 151 of the first side 113 to the endpoint 153 of the second side 115. (See reference...) Figure 16B The corner region 210 of the second grain 200 can be with Figure 15B The corner region 210 shown is different because the first side 213 and the second side 215 of the second grain 200 can intersect to form the edge 229 of the second grain 200. Therefore, in this embodiment, since the first side 213 and the second side 215 of the second grain 200 intersect at the edge 229, the length dimension D2 of the corner region 210 of the second grain 200 is actually zero. Figure 16CAs shown, the offset distance D5 between the corner side 217 of the second grain 200 (i.e., the edge 229 in this example) and the arcuate corner side 117 of the first grain 100 can be less than or equal to the offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100, and can be less than or equal to the offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100.

[0174] Figure 17 This is a flowchart illustrating a method 400 for manufacturing a bonded grain structure 160 according to various embodiments of the present invention. (See also:) Figures 4 to 17 In step 401 of method 400, a second die 200 may be placed on a first die 100, wherein the first die 100 includes a corner region 110, the corner region 110 includes a first side 113 extending along a first direction hd1, a second side 115 extending along a second direction hd2, and a corner side 117 located between the first side 113 and the second side 115, and the second die 200 includes a corner region 210, the corner region 210 includes a first side 213 extending along the first direction hd1, a second side 215 extending along the second direction hd2, and a corner side 217 located between the first side 213 and the second side 215 of the second die 200, wherein the length dimension D1 of the corner region 110 of the first die 100 is greater than the length dimension D2 of the corner region 210 of the second die 200.

[0175] refer to Figure 4 and Figure 17 In step 403 of method 400, the second grain 200 may be bonded to the first grain 100. (See reference) Figure 5 and Figure 17 In step 405 of method 400, a dielectric material 219 that laterally surrounds the second grain 200 can be formed.

[0176] Based on all the figures and various embodiments of the present invention, the bonded grain structure 160 includes: a first grain 100 including a first side 113, a second side 115, and a corner region 110, the first side 113 extending along a first direction hd1, the second side 115 extending along a second direction hd2; a second grain 200 bonded to the first grain 100, the second grain 200 including a first side 213, a second side 215, and a corner region 210, the first side 213 extending along the first direction hd1, the second side 215 extending along the second direction hd2; and gap-filling dielectric materials 119, 219 laterally surrounding the first grain 100 and the second grain 200. The first offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100 is equal to or greater than zero; the second offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100 is equal to or greater than zero; the third offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is less than or equal to at least one of the first offset distance D3 or the second offset distance D4; and the length dimension D1 of the corner side 117 of the first grain 100 is greater than the length dimension D2 of the corner side 217 of the second grain 200.

[0177] In some embodiments, the first offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100 is greater than zero, the second offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100 is greater than zero, and the third offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is less than the first offset distance D3 and the second offset distance D4.

[0178] In some embodiments, the third offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is 70% to 90% of the first offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100.

[0179] In some embodiments, the third offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is 70% to 90% of the second offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100.

[0180] In some embodiments, the bonding structure 150 further includes a carrier structure 130 located on the gap-filling dielectric materials 119, 219, wherein the second grain 200 is located between the carrier structure 130 and the first grain 100.

[0181] In some embodiments, the first grain 100 has a truncated quadrilateral shape, including a pair of first sides 113 extending in parallel along a first direction hd1, a pair of second sides 115 extending in parallel along a second direction hd2, and four corner sides 117 located in each corner region 110 of the first grain 100, each corner side 117 extending between the first side 113 and the second side 115 of the first grain 100.

[0182] In some embodiments, the second grain 200 has a truncated quadrilateral shape, including a pair of first sides 213 extending parallel to a first direction hd1, a pair of second sides 215 extending parallel to a second direction hd2, and four corner sides 217 extending between the first sides 213 and the second sides 215 of the second grain 200, wherein the length dimension D2 of the corner side 217 of each second grain 200 is smaller than the length dimension D1 of the corner side 117 of the adjacent first grain 100.

[0183] In some embodiments, a plurality of second grains 200 are bonded to a first grain 100. Each second grain 200 includes a first side 213 extending along a first direction hd1, a second side 215 extending along a second direction hd2, and a corner region 210 located between the first side 213 and the second side 215 of the second grain 200. No second grain 200 extends beyond the first side 113 or the second side 115 of the first grain 100. The corner region 210 of the plurality of second grains 200 is adjacent to the corner region 110 of the first grain 100, and the length dimension D1 of the corner region 110 of the first grain 100 is greater than the length dimension D2 of the corner region 210 of the plurality of second grains 200 adjacent to the corner region 110 of the first grain 100.

[0184] In some embodiments, at least one second grain 200 includes a functional grain, and at least one second grain 200 includes a non-functional dummy grain.

[0185] In some embodiments, the corner side 117 of the first grain 100 is arc-shaped between the endpoint 151 of the first side 113 of the first grain 100 and the endpoint 153 of the second side 115 of the first grain 100, wherein the length dimension D1 of the corner region 110 of the first grain 100 includes the length of a line segment extending from the endpoint 151 of the first side 113 of the first grain 100 to the endpoint 153 of the second side 115 of the first grain 100.

[0186] In some embodiments, the first side 213 and the second side 215 of the second grain 200 intersect at the edge 229 of the second grain 200, and the edge 229 defines the length dimension D2 of the corner region 210 of the second grain 200.

[0187] In some embodiments, a bonded grain structure 160 is provided, comprising: a first layer 170 including one or more first grains 100; a second layer 270 including one or more second grains 200, wherein one or more second grains 200 in the second layer 270 are bonded to one or more first grains 100 in the first layer 170; and gap-filling dielectric materials 119, 219, laterally surrounding one or more second grains 200 in the second layer 270 and one or more first grains 100 in the first layer 170. In the first layer 170, a corner region 110 of the first grain 100 includes a first length dimension D1. In the second layer 270, the second grain 200 includes an outer corner region 210 adjacent to the outer corner region 170 of the first grain 100 in the first layer 170. The second length dimension D2 of the outer corner region 210 of the second grain 200 in the second layer 270 is smaller than the first length dimension D1 of the outer corner region 110 of the first grain 100 in the first layer 170.

[0188] In some embodiments, the outer corner region 110 of the first grain 100 includes a corner side 117 extending in a diagonal direction, the corner side 117 being located between a first side 113 of the first grain 100 extending in a first horizontal direction hd1 and a second side 115 of the first grain 100 extending in a second horizontal direction hd2, and the outer corner region 210 of the second grain 200 includes a corner side 217 extending in a diagonal direction, the corner side 217 being located between a first side 213 of the second grain 200 extending in the first horizontal direction hd1 and a second side 215 of the second grain 200 extending in the second horizontal direction hd2, and the offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is less than or equal to the offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100 and / or the offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100.

[0189] In some embodiments, the bonded grain structure 160 further includes a third layer 370 of one or more third grains 300, wherein each third grain 300 in the third layer 370 is bonded to one or more second grains 200 in the second layer 270, and gap-filling dielectric materials 119, 219 laterally surround one or more third grains 300, and the outer corner region 310 of the third grain 300 in the third layer 370 has a third length dimension D. 2' And the third length dimension D2' It is smaller than the second length dimension D2.

[0190] In some embodiments, the bonding grain structure 160 further includes a carrier structure 130, wherein a third layer 370 is located between the carrier structure 130 and the second layer 270, and the second layer 270 is located between the third layer 370 and the first layer 170.

[0191] In some embodiments, the second layer 270 includes a plurality of second grains 200, at least one of which includes a non-functional dummy grain.

[0192] In some embodiments, a method of manufacturing a bonded grain structure 160 is provided, comprising: placing a second grain 200 onto a first grain 100, wherein the first grain 100 includes a first side 113 extending along a first direction hd1, a second side 115 extending along a second direction hd2, and a corner region 110, the corner region 110 including a corner side 117 located between the first side 113 and the second side 115, and the second grain 200 including a first side 213 extending along the first direction hd1, a second side 215 extending along the second direction hd2, and a corner region 210, the corner region 210 including a corner side 217 located between the first side 213 and the second side 215 of the second grain 200, wherein the length dimension D1 of the corner region 110 of the first grain 100 is greater than the length dimension D2 of the corner region 210 of the second grain 200; bonding the second grain 200 to the first grain 100; and forming a dielectric material 219 laterally surrounding the second grain 200.

[0193] In some embodiments, the second grain 200 is placed on the first grain 100 such that the first side 213 of the second grain 200 does not extend beyond the first side 113 of the first grain 100, the second side 215 of the second grain 200 does not extend beyond the second side 115 of the first grain 100, and the offset distance D5 between the corner side 217 of the second grain 200 and the corner side 117 of the first grain 100 is less than or equal to at least one of the offset distance D3 between the first side 213 of the second grain 200 and the first side 113 of the first grain 100 and / or the offset distance D4 between the second side 215 of the second grain 200 and the second side 115 of the first grain 100.

[0194] In some embodiments, the method further includes placing a first die 100 on a first carrier structure 120, depositing a first dielectric material 119 laterally surrounding the first die 100 before placing a second die 200 on the first die 100 and bonding it, depositing a second dielectric material 219 to form a dielectric material 219 laterally surrounding the second die 200, transferring the first die 100, the second die 200, the first dielectric material 119 and the second dielectric material 219 from the first carrier structure 120 to a second carrier structure 130, and performing a slitting process through the first dielectric material 119, the second dielectric material 219 and the second carrier structure 130 to provide a bonded die structure.

[0195] In some embodiments, the method further includes placing a third grain 300 on the second grain 200, wherein the third grain 300 includes a first side 313 extending along a first direction hd1, a second side 315 extending along a second direction hd2, and a corner region 310 located between the first side 313 and the second side 315 of the third grain 300, wherein the length dimension D2 of the corner region 210 of the second grain 200 is greater than the length dimension D of the corner region 310 of the third grain 300. 2' .

[0196] The foregoing outlines the features of many embodiments, thus enabling those skilled in the art to better understand various aspects of this invention. Those skilled in the art can readily design or modify other processes and structures based on this invention to achieve the same purpose and / or obtain the same advantages as the embodiments of this invention. Those skilled in the art should also understand that various changes, substitutions, and modifications made without departing from the spirit and scope of this invention constitute equivalent creations that do not exceed the spirit and scope of this invention.

Claims

1. A grain-bonding structure, characterized in that, include: A first grain includes a first side, a second side, and a corner region, the first side extending along a first direction, the second side extending along a second direction, and the corner region including a corner side located between the first side and the second side. A second grain, bonded to the first grain, the second grain including a first side, a second side, and a corner region, the first side extending along a first direction, the second side extending along a second direction, and the corner region including a corner side located between the first side and the second side of the second grain; and A gap-filling dielectric material is laterally surrounding the first grain and the second grain, wherein: The second grain does not extend beyond the first side or the second side of the first grain; A first offset distance between the first side of the second grain and the first side of the first grain is equal to or greater than zero; A second offset distance between the second side of the second grain and the second side of the first grain is equal to or greater than zero; A third offset distance between the corner side of the second grain and the corner side of the first grain is less than or equal to at least one of the first offset distance or the second offset distance; The length dimension of the corner region of the first grain is greater than the length dimension of the corner region of the second grain.

2. The grain structure as described in claim 1, characterized in that, The first offset distance between the first side of the second grain and the first side of the first grain is greater than zero, the second offset distance between the second side of the second grain and the second side of the first grain is greater than zero, and the third offset distance between the corner side of the second grain and the corner side of the first grain is less than the first offset distance and the second offset distance.

3. The grain structure as described in claim 1, characterized in that, The first grain includes a truncated oblique quadrilateral, comprising a pair of first sides extending parallel to each other along the first direction, a pair of second sides extending parallel to each other along the second direction, and four corner sides located in the corner regions of the corresponding first grain, wherein each of the corner sides extends between a first side and a second side of the first grain.

4. The grain structure as described in claim 1, characterized in that, A plurality of second grains are bonded to the first grain, each of the plurality of second grains including a first side extending along the first direction, a second side extending along the second direction, and a corner region including a corner side located between the first side and the second side of the second grain, wherein the plurality of second grains do not extend beyond the first side and the second side of the first grain, the plurality of second grains including a plurality of corner regions adjacent to the plurality of corner regions of the first grain, and a length dimension of the plurality of corner regions of the first grain being greater than a length dimension of the plurality of corner regions of the plurality of second grains adjacent to the plurality of corner regions of the first grain.

5. The grain structure as described in claim 1, characterized in that, The corner side of the first grain includes an arc shape located between an end point of the first side of the first grain and an end point of the second side of the first grain, wherein the length dimension of the corner region of the first grain includes the length of a line segment extending between the end point of the first side of the first grain and the end point of the second side of the first grain.

6. The grain structure as described in claim 5, characterized in that, The first side and the second side of the second grain are joined at an edge that defines the length dimension of the corner region of the second grain.

7. A grain-bonding structure, characterized in that, include: A first layer, comprising one or more first grains; A second layer, comprising one or more second grains, wherein the one or more second grains in the second layer are bonded to the one or more first grains in the first layer; and A gap-filling dielectric material laterally surrounds the one or more second grains in the second layer and the one or more first grains in the first layer; Wherein, an outer corner region of a first grain in the first layer includes a first length dimension; A second grain in the second layer includes an outer corner region adjacent to the outer corner region of the first grain in the first layer, and a second length dimension of the outer corner region of the second grain in the second layer is smaller than the first length dimension of the outer corner region of the first grain in the first layer.

8. The grain structure as described in claim 7, characterized in that, The outer corner region of the first grain includes a corner side extending diagonally between a first side of the first grain extending along a first horizontal direction and a second side of the first grain extending along a second horizontal direction. The second side includes a corner side extending diagonally between a first side of the second grain extending along a first horizontal direction and a second side of the second grain extending along a second horizontal direction. An offset distance between the corner side of the second grain and the corner side of the first grain is equal to or less than an offset distance between the first side of the second grain and the first side of the first grain and / or an offset distance between the second side of the second grain and the second side of the first grain.

9. The grain structure as described in claim 7, characterized in that, Including: A third layer comprising one or more third grains, wherein each of the third grains in the third layer is bonded to one or more of the second grains in the second layer, wherein: The gap-filling dielectric material laterally surrounds the one or more third grains, and an outer corner region of one of the third grains in the third layer includes a third length dimension, which is smaller than the second length dimension.

10. The grain structure as described in claim 9, characterized in that, It further includes a carrier structure, wherein the third layer is located between the carrier structure and the second layer, and the second layer is located between the third layer and the first layer.

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