High resolution signal generation circuit
CN224697737UActive Publication Date: 2026-08-28SHENZHEN SHUMA ELECTRONICS TECH
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Patent Information
- Application Number
- CN202521975689.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-15
- Publication Date
- 2026-08-28
- Estimated Expiration
- 2035-09-15
AI Technical Summary
Technical Problem
当需要高于系统时钟频率的高分辨率PWM波形时,系统时钟和计数器的方案无法实现
Benefits of technology
[0008]上述高分辨率信号生成电路,通过第一延迟链模块、第二延迟链模块和信号还原模块的处理,能够生成上升沿和下降沿均可分开延迟的高分辨率信号;延迟链模块中包括多个延迟单元,延迟单元的输入端、第一选择器的第一端和上一个延迟单元的输出端共连接,缓冲器的输出端与第一选择器的第二输入端连接,第一选择器的输出端为延迟单元的输出端,那么布线时只需要每一级延迟单元都相同即可,延迟链可通过复制实现,对级间走线延迟也无额外要求,布局布线容易实现,提高了高分辨率信号生成电路的布线效率。
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Abstract
The application relates to a high-resolution signal generation circuit, which comprises a first delay chain module, a plurality of delay units connected in sequence, a buffer and a first selector, the input end of the delay unit, the first end of the first selector and the output end of the previous delay unit are connected, the output end of the buffer is connected with the second input end of the first selector, and the output end of the first selector is the output end of the delay unit; the first delay chain module is used for delaying the rising edge of a to-be-delayed signal to obtain a rising edge delay signal; a second delay chain module comprises a plurality of delay units connected in sequence; the second delay chain module is used for delaying the falling edge of the to-be-delayed signal to obtain a falling edge delay signal; and a signal restoration module is connected with the first delay chain module and the second delay chain module respectively and is used for generating a target delay signal according to the rising edge delay signal and the falling edge delay signal. The circuit is easy to realize layout and wiring.
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