A detector

Abstract

This disclosure provides an embodiment of a detector, relating to the field of infrared detector technology, which can be used in devices based on through-silicon via (TSV) packaging. It enables physical isolation between testing and packaging while reducing the area occupied by the electrodes. The detector includes: a substrate, a circuit layer, a MEMS structure, and a first electrode; a first connection structure is provided in the substrate, penetrating the substrate along a first direction; the first direction is the thickness direction of the substrate; the circuit layer is disposed on one side of the substrate along the first direction; the circuit layer includes an electrically connected readout circuit and a second connection structure, one end of the second connection structure being connected to the first connection structure; the MEMS structure and the first electrode are disposed on the side of the circuit layer away from the substrate; the MEMS structure is connected to the readout circuit, and the first electrode is connected to the other end of the second connection structure.

Description

Technical Field

[0001] This disclosure relates to the field of infrared detector technology, and more particularly to a detector. Background Technology

[0002] Infrared detectors, as the core component of infrared thermal imaging systems, play an irreplaceable role in fields such as reconnaissance, industrial inspection, medical imaging, and astronomical observation. With the gradual maturation of thermal imaging technology, infrared detector cores are increasingly trending towards smaller size, lighter weight, lower power consumption, lower cost, and higher performance.

[0003] In conventional wire bonding packaging, each pin on both sides of the wafer's front side requires at least one electrode for wafer testing and packaging. However, during manufacturing, multiple tests are necessary to ensure device performance meets standards. During testing, probe contact with the electrode surface inevitably causes damage. Therefore, in related technologies, electrodes used for packaging and wafer testing are arranged in a parallel structure and designed independently. This increases the electrode area occupied, and the testing process can still cause mechanical damage or contamination to the packaging electrodes, affecting packaging reliability. Utility Model Content

[0004] Some embodiments of this disclosure provide a detector that enables physical isolation between testing and packaging, while also reducing the area occupied by the electrodes.

[0005] In a first aspect, a detector is provided. The detector includes: a substrate, a circuit layer, a MEMS structure, and a first electrode; a first connection structure is provided in the substrate, and the first connection structure penetrates the substrate along a first direction; the first direction is the thickness direction of the substrate; the circuit layer is disposed on one side of the substrate along the first direction; the circuit layer includes a readout circuit electrically connected to a second connection structure, one end of the second connection structure being connected to the first connection structure; the MEMS structure and the first electrode are disposed on the side of the circuit layer away from the substrate; the MEMS structure is connected to the readout circuit, and the first electrode is connected to the other end of the second connection structure.

[0006] In this embodiment, the substrate serves as the foundation of the entire detector, providing mechanical support for other structures and ensuring the structural stability of the detector. The first connection structure penetrates the substrate along a first direction, enabling vertical electrical connections between the structures on both sides of the substrate. It is understood that one end of the second connection structure is connected to the first connection structure, and the other end is connected to the first electrode, constructing a complete and stable electrical connection channel. That is, the second connection structure acts as a bridge in the circuit layer, ensuring reliable and stable electrical connections between the first connection structure and the first electrode. Exemplarily, the first electrode is a test electrode. Through probe testing, the continuity and other performance parameters of the electrical connection channel formed by the first connection structure, the second connection structure, and the first electrode can be detected. Compared to related technologies, this achieves physical isolation between testing and packaging, avoiding damage to the packaging structure during testing. Furthermore, by only setting the first electrode, compared to the parallel and independent arrangement of packaging electrodes and wafer test electrodes in related technologies, the electrode's occupied area can be reduced.

[0007] In some embodiments, the end of the first connection structure near the circuit layer is electrically connected to the end of the second connection structure near the substrate, and the end of the second connection structure away from the substrate is electrically connected to the first electrode.

[0008] In some embodiments, the orthographic projection of the first electrode onto the substrate overlaps with the first connection structure.

[0009] In some embodiments, a through hole is formed on the substrate, and a first connection structure is disposed in the through hole. The orthographic projection of the first connection structure on the substrate is located within the orthographic projection range of the first electrode on the substrate.

[0010] In some embodiments, the second connection structure covers the through hole.

[0011] In some embodiments, the orthographic projection of the first electrode onto the substrate is offset from the first connection structure.

[0012] In some embodiments, the circuit layer includes a plurality of conductive layers stacked along a first direction, at least two of the conductive layers having conductive patterns, and at least two conductive patterns being connected in sequence to form a second connection structure; among the at least two conductive patterns, the conductive pattern closest to the substrate is the first conductive pattern, and the conductive pattern furthest from the substrate is the second conductive pattern, the first connection structure is connected to the first conductive pattern, and the first electrode is connected to the second conductive pattern.

[0013] In some embodiments, the orthographic projection of the first conductive pattern onto the substrate at least partially overlaps with the orthographic projection of the first connection structure onto the substrate; and / or, the orthographic projection of the second conductive pattern onto the substrate at least partially overlaps with the orthographic projection of the first connection structure onto the substrate.

[0014] In some embodiments, the circuit layer further includes: a first insulating layer disposed between any two adjacent conductive layers; the first insulating layer has a first via, and two adjacent conductive patterns are connected through the first via.

[0015] In some embodiments, the orthographic projections of the first vias in any two first insulating layers onto the substrate do not overlap.

[0016] In some embodiments, in the second connection structure, the orthographic projections of at least two conductive patterns on the substrate overlap.

[0017] In some embodiments, the first electrode covers the second connection structure.

[0018] In some embodiments, the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the second connection structure on the substrate; and / or, the orthographic projection of the second connection structure on the substrate overlaps with the first connection structure.

[0019] In some embodiments, the detector includes a sensing area and a peripheral area, the peripheral area surrounding the sensing area;

[0020] The detector includes multiple MEMS structures and multiple first electrodes. The multiple MEMS structures are located in the sensing area, and the multiple first electrodes are located in the peripheral area. Each first electrode is connected to at least one MEMS structure.

[0021] In some embodiments, the system further includes: a redistribution layer and a solder joint, wherein the redistribution layer is disposed on the side of the substrate away from the circuit layer and is connected to the first connection structure; and the solder joint is disposed on the side of the redistribution layer away from the substrate and is connected to the redistribution layer. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not a limitation on the actual size of the products involved in the embodiments of this disclosure.

[0023] Figure 1 A structural diagram of a detector provided for some embodiments of this disclosure;

[0024] Figure 2 A wire bonding package structure diagram showing an electrode parallel structure provided for some embodiments in the related art;

[0025] Figure 3 A structural diagram of a detector provided for some embodiments of this disclosure;

[0026] Figure 4A A connection structure diagram of the first electrode of the detector provided for some embodiments of this disclosure;

[0027] Figure 4B Another connection structure diagram of the first electrode of the detector provided for some embodiments of this disclosure;

[0028] Figure 5A A top view of the detector provided for some embodiments of this disclosure;

[0029] Figure 5B Another top view of the detector provided for some embodiments of this disclosure;

[0030] Figure 6 A diagram of the MEMS structure of the detector provided for some embodiments of this disclosure;

[0031] Figure 7 A diagram of the detector under test prior to fabrication of the redistribution layer, provided for some embodiments of this disclosure;

[0032] Figure 8 Another structural diagram of the detector provided for some embodiments of this disclosure. Detailed Implementation

[0033] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0034] In the description of this disclosure, it should be understood that the terms “center,” “upper,” “lower,” “front,” “rear,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.

[0035] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "exemplary," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0036] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0037] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the term "coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0038] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0039] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0040] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0041] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0042] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0043] In this disclosure, the meanings of “on,” “above,” and “above” should be interpreted in the broadest possible sense, such that “on” means not only “directly on” something, but also includes “on” something with intermediate features or layers in between, and that “above” or “above” means not only “above” or “above” something, but also “above” or “above” something without intermediate features or layers in between (i.e., directly on something).

[0044] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0045] An infrared detector is a sensor that converts infrared radiation into electrical or thermal signals. During operation, infrared radiation emitted by an object (such as a human body or device) enters the detector through its optical window and is received by MEMS (Micro-Electro-Mechanical System) devices inside. This signal is then converted into an electrical signal, amplified, filtered, and digitized to generate an image.

[0046] Infrared detectors include various packaging forms such as metal packaging, ceramic packaging, and wafer-level packaging. Among them, wafer-level packaging is a technology that directly packages MEMS devices during the wafer manufacturing process. Wafer-level packaging first integrates MEMS devices and other components onto a wafer or substrate, and then uses bonding processes to connect the wafer or substrate to another wafer to form a complete package structure, achieving large-scale integration and miniaturization. Because wafer-level packaging does not require additional casings and lead frames, it can directly integrate MEMS devices onto the wafer, thereby reducing the package size and enabling miniaturized and lightweight detector designs.

[0047] In related technologies, to reduce the package size of infrared detectors and improve connection reliability, through-silicon via (TSV) technology is introduced to replace wire bonding technology. Since gold wire interconnects are eliminated and TSV holes are blind via structures, wire bonding electrodes are usually not pre-drilled on the front side of the wafer. Testing requires contacting the electrodes led out from the bottom of the substrate with probes after the TSV holes are fabricated.

[0048] When TSV technology is introduced into infrared detectors, temperature compatibility requires the fabrication of MEMS devices before the TSV holes are fabricated. This means that the MEMS devices cannot be tested to ensure they meet product requirements before the TSV holes are fabricated. Any abnormalities in resistance or uniformity could lead to batch scrapping of wafers. To test the MEMS devices before TSV hole fabrication and confirm that performance and process meet requirements, test electrodes need to be fabricated on the front side of the wafer.

[0049] In conventional wire bonding packaging, each pin on both sides of the wafer's front side requires at least one electrode for wafer testing and packaging. However, during manufacturing, multiple tests are necessary to ensure device performance meets standards. During testing, probe contact with the electrode surface inevitably causes damage. Therefore, in related technologies, electrodes used for packaging and wafer testing are arranged in a parallel structure and designed independently. This increases the electrode area occupied, and the testing process can still cause mechanical damage or contamination to the packaging electrodes, affecting packaging reliability.

[0050] Based on this, some embodiments of this disclosure provide a detector to achieve physical isolation between testing and packaging, while reducing the area occupied by the electrodes.

[0051] For ease of description below, an XYZ coordinate system is established. The first direction Z is perpendicular to the substrate, the XY plane is perpendicular to the Z direction, and the XY plane is the plane containing the substrate. The second direction X intersects the third direction Y. For example, the second direction X and the third direction Y are perpendicular to each other.

[0052] It should be noted that, for example, 2011a / 2011 in the accompanying drawings of some embodiments of this disclosure indicates that component 2011a belongs to component 2011, and other similar reference numerals in the drawings also follow the above description.

[0053] The detector provided in this disclosure is an infrared detector.

[0054] Figure 1 This is a schematic diagram of the structure of an infrared detector provided in one embodiment of this application. To solve the above problems, this application provides a detector 100. For example... Figure 1As shown, the detector 100 includes a detection component 10 and a circuit board 20, with the circuit board 20 connected to the detection component 10.

[0055] In some related embodiments, conventional wire bonding packaging is used, and the electrode structure typically reuses the same electrode for wafer testing and packaging. This inevitably causes damage to the electrode during wafer testing and manufacturing. For example... Figure 2 As shown, to avoid this damage problem, the size of the wafer test electrode 402 is reduced and it is designed in parallel on one side of the package electrode 401. That is, the package electrode 401 and the wafer test electrode 402 are arranged in parallel as a pair. The bonding wire 405 connects the package electrode 401 to the frame pad 404 by ultrasonic bonding. This realizes the electrical path connection between the package electrode 401 and the external pins of the package. Damage caused by wafer testing to the wafer test electrode 402 will not be applied to the package electrode 401. However, the parallel arrangement of the package electrode 401 and the wafer test electrode 402 increases the area occupied by the electrode.

[0056] like Figure 3 As shown, Figure 3 This is a structural diagram of a detector 100 provided for some embodiments of this disclosure. To address the above-mentioned problems, this application provides a detector 100. For example... Figure 3 As shown, the detector 100 includes a substrate 1, a circuit layer 2, a MEMS structure 3, and a first electrode 4; a first connection structure 11 is provided in the substrate 1, and the first connection structure 11 penetrates the substrate along a first direction Z; the first direction Z is the thickness direction of the substrate 1; the circuit layer 2 is disposed on one side of the substrate 1 along the first direction Z; the circuit layer 2 includes a readout circuit 21 and a second connection structure 22, one end of the second connection structure 22 is connected to the first connection structure 11; the MEMS structure 3 and the first electrode 4 are disposed on the side of the circuit layer 2 away from the substrate 1; the MEMS structure 3 is connected to the readout circuit 21, and the first electrode 4 is connected to the other end of the second connection structure 22.

[0057] It should be noted that TSV technology, or through-silicon via technology, is a technology that achieves vertical electrical connection by forming a through-hole in the substrate and setting a conductive structure in the through-hole. Here, the first connection structure 11 is the conductive structure.

[0058] In this embodiment, the substrate 1 serves as the foundation of the entire detector 100, providing mechanical support for other structures and ensuring the structural stability of the detector 100. The first connection structure 11 penetrates the substrate 1 along the first direction Z, enabling vertical electrical connection between the structures on both sides of the substrate 1. It is understood that one end of the second connection structure 22 is connected to the first connection structure 11, and the other end is connected to the first electrode 4, constructing a complete and stable electrical connection channel. That is, the second connection structure 22 acts as a bridge in the circuit layer 2, ensuring reliable and stable electrical connection between the first connection structure 11 and the first electrode 4. Exemplarily, the first electrode 4 is a test electrode. Through probe testing, the continuity and other performance parameters of the electrical connection channel formed by the connection of the first connection structure 11, the second connection structure 22, and the first electrode 4 can be detected. Compared with related technologies, this achieves physical isolation between testing and packaging, avoiding damage to the packaging structure during testing. Furthermore, by only setting the first electrode 4, compared to the parallel and independent arrangement of packaging electrodes and wafer test electrodes in related technologies, the electrode area occupied can be reduced.

[0059] It should be noted that the MEMS structure 3 is connected to the readout circuit 21. The readout circuit 21 in the circuit layer 2 is an important component of the detector 10. It is mainly responsible for amplifying, filtering, and analog-to-digital conversion of the weak infrared signal transmitted from the MEMS structure 3, converting the analog signal into a digital signal for subsequent data analysis and processing. This can improve the sensitivity, resolution, and dynamic range of the detector 10, thereby enhancing its ability to detect infrared radiation.

[0060] For example, the MEMS structure 3 and the readout circuit 21 are connected by a bridge pier, the material of which includes, but is not limited to, aluminum (Al) and titanium (Ti).

[0061] In some embodiments, continue to refer to Figure 3 The end of the first connection structure 11 near the circuit layer 2 is electrically connected to the end of the second connection structure 22 near the substrate 1, and the end of the second connection structure 22 away from the substrate 1 is electrically connected to the first electrode 4.

[0062] It should be noted that the above configuration enables the first electrode 4 and the first connection structure 11 to be electrically connected in the first direction Z, that is, to provide a vertical electrical connection channel, which facilitates probe testing.

[0063] In some embodiments, refer to Figure 3 The first electrode 4 overlaps with the first connection structure 11 in the orthogonal projection of the substrate 1.

[0064] For example, the orthographic projection of the first electrode 4 on the substrate 1 overlaps with the first connection structure 11. This overlap can be either a partial overlap between the orthographic projection of the first electrode 4 on the substrate 1 and the first connection structure 11, or the orthographic projection of the first electrode 4 on the substrate 1 covering the orthographic projection of the first connection structure 11 on the substrate 1.

[0065] For example, by using the design of overlapping orthographic projections, the space utilization of detector 100 can be improved, which helps to improve the integration of infrared detector, reduce the volume of detector 100, and meet the requirements of lightweighting.

[0066] In some embodiments, continue to refer to Figure 3 A through hole O is provided on the substrate 1, and the orthographic projection of the first connection structure 11 on the substrate 1 is located within the orthographic projection range of the first electrode 4 on the substrate 1.

[0067] For example, refer to Figure 3 The first connection structure 11 is disposed in the through hole O, and the orthographic projection of the first connection structure 11 on the substrate 1 is located within the orthographic projection range of the first electrode 4 on the substrate 1. This arrangement can make the relative position of the first connection structure 11 and the first electrode 4 more compact, which can reduce the space occupied by the first electrode 4 to a certain extent and improve the space utilization rate.

[0068] In some embodiments, continue to refer to Figure 3 The second connecting structure 22 covers the through hole O.

[0069] For example, refer to Figure 3 The second connection structure 22 covers the through hole O, which enables the second connection structure 22 to be fully connected with the first connection structure 11 disposed in the through hole O, thus ensuring signal transmission efficiency.

[0070] For example, the depth of the via O is twice the diameter of the via O. It should be noted that the depth of the via is the same as the thickness of the substrate 1 in the first direction Z.

[0071] In some embodiments, refer to Figure 4A The orthographic projection of the first electrode 4 onto the substrate 1 is offset from that of the first connection structure 11.

[0072] For example, continue to refer to Figure 4A and combined Figure 3 The orthographic projection of the first electrode 4 on the substrate 1 is offset from the first connection structure 11, which can increase the heat dissipation space between them, promote heat dissipation, and keep the detector 100 at a lower temperature during operation, thereby improving its thermal stability and service life.

[0073] In some embodiments, refer to Figure 4A and Figure 4B , Figure 4A A connection structure diagram of the first electrode of a detector provided for some embodiments of this application. Figure 4B This is another connection structure diagram of the first electrode of the detector provided in some embodiments of this application. The circuit layer 2 includes a plurality of conductive layers 201 stacked along the first direction Z. At least two conductive layers 201 are provided with conductive patterns 2011. The at least two conductive patterns 2011 are connected in sequence to form a second connection structure 22. Among the at least two conductive patterns 2011, the conductive pattern 2011 closest to the substrate 1 is the first conductive pattern 2011a, and the conductive pattern 2011 furthest from the substrate 1 is the second conductive pattern 2011b. The first connection structure 11 is connected to the first conductive pattern 2011a, and the first electrode 4 is connected to the second conductive pattern 22.

[0074] For example, refer to Figure 4A and Figure 4B , combined Figure 3 The aforementioned configuration of multiple conductive layers 201 enables different circuit modules of the readout circuit 21 to transmit signals and increases the metal particle density of the circuit. The conductive layers 201 containing the stacked conductive patterns 2011 reuse the conductive layers of the readout circuit 21, greatly improving the flexibility and compactness of the circuit layout. Complex circuit connections can be achieved within a limited space, meeting the high integration requirements of the detector 100 and helping to reduce the overall size. Secondly, by setting the conductive pattern 2011 closest to the substrate 1 to be connected to the first connection structure 11, and the conductive pattern 2011 furthest from the substrate 1 to be connected to the first electrode, a stable vertical electrical connection path is constructed, ensuring efficient signal transmission of the detector 100.

[0075] For example, the length of the second conductive pattern 2011b can be 70 μm and the width can be 70 μm. The material of the second conductive pattern 2011b includes, but is not limited to, aluminum (Al), gold (Au), and platinum (Pt), and the material of the first conductive pattern 2011a includes, but is not limited to, aluminum (Al) and copper (Cu).

[0076] For example, among the plurality of conductive layers 201, the thickness of the conductive layer 201 closest to the substrate 1 is less than the thickness of the conductive layer 201 furthest from the substrate 1. For example, the minimum thickness of the conductive layer 201 closest to the substrate 1 is 200 nm, and the minimum thickness of the conductive layer 201 furthest from the substrate 1 is 500 nm.

[0077] For example, the minimum distance between the substrate 1 and the first electrode 4 in the first direction Z is 5 μm.

[0078] In some embodiments, refer to Figure 3 and combined Figure 4BThe orthographic projection of the first conductive pattern 2011a onto the substrate 1 at least partially overlaps with the orthographic projection of the first connection structure 11 onto the substrate 1.

[0079] In some embodiments, refer to Figure 3 and combined Figure 4B The orthographic projection of the second conductive pattern 2011b onto the substrate 1 at least partially overlaps with the orthographic projection of the first connection structure 11 onto the substrate 1.

[0080] In some embodiments, refer to Figure 3 and combined Figure 4B The orthographic projection of the first conductive pattern 2011a onto the substrate 1 at least partially overlaps with the orthographic projection of the first connection structure 11 onto the substrate 1, and the orthographic projection of the second conductive pattern 2011b onto the substrate 1 at least partially overlaps with the orthographic projection of the first connection structure 11 onto the substrate 1.

[0081] It should be noted that the above settings can reduce the area occupied by the detector 100, making the connection between the second connection structure 22, the first connection structure 11 and the first electrode 4 more compact, meeting the high integration requirements of the detector 100 and helping to reduce the overall size of the detector 100.

[0082] In some embodiments, continue to refer to Figure 4A and Figure 4B The circuit layer 2 also includes a first insulating layer 202, which is disposed between any two adjacent conductive layers 201; the first insulating layer 202 is provided with a first via K, and two adjacent conductive patterns 2011 are connected through the first via K.

[0083] For example, continue to refer to Figure 4A and Figure 4B The first insulating layer 202 is disposed between any two adjacent conductive layers 201. In other words, a reliable "isolation zone" is set in the electrical connection channel, which can effectively prevent short circuits caused by accidental contact between adjacent conductive layers 201. During the operation of the detector 100, it ensures that the electrical signals transmitted by each conductive layer 201 do not interfere with each other, maintains the purity of the signal, lays the foundation for accurate reading and processing of infrared signals, and greatly improves the reliability and stability of the detector 100.

[0084] It should be noted that the first insulating layer 202 not only provides electrical isolation but also provides additional mechanical support for the entire circuit layer 2. During the manufacturing, transportation, and use of the detector 100, it can enhance the structural strength of the circuit layer 2, reduce deformation or damage to the conductive layer 2 caused by external forces, protect the integrity of the conductive pattern 2022 and the readout circuit 21, and extend its service life.

[0085] For example, the material of the first insulating layer 202 includes, but is not limited to, silicon dioxide (SiO2) and silicon nitride (Si3N4).

[0086] In some embodiments, continue to refer to Figure 4A and Figure 4B The orthographic projections of the first vias K in any two first insulating layers 202 onto the substrate 1 do not overlap.

[0087] For example, refer to Figure 4A and Figure 4B The aforementioned placement of the first via K allows for a more rational and orderly spatial layout of the circuit layer 202 in the first direction Z. Each first via occupies an independent spatial position, improving the flatness of the conductive layer 201, reducing the mutual influence between the first vias K, and lowering the risk of via damage due to stress concentration or environmental factors. During the use of the detector 100, this ensures the structural stability of the circuit layer 201, extends its service life, and improves its reliability and durability in harsh environments.

[0088] In some embodiments, continue to refer to Figure 4A and Figure 4B In the second connection structure 22, at least two conductive patterns 2011 have their orthogonal projections on the substrate 1 overlapping.

[0089] For example, refer to Figure 4A and Figure 4B The aforementioned arrangement of at least two overlapping orthographic projections of conductive patterns 2011 on the substrate 1 improves the space utilization of the second connection structure 22. Furthermore, the overlapping orthographic projections of the conductive patterns 2011 on the substrate 1 result in a tighter bond between different conductive layers 2 in the first direction Z. When the detector 100 is subjected to external forces such as mechanical vibration or impact, the overlapping conductive patterns 2011 can better disperse stress, reducing the risk of conductive layer 201 detachment or damage due to stress concentration, thereby improving the mechanical connection strength and structural stability of the entire circuit layer 2.

[0090] In some embodiments, refer to Figure 4B The first electrode 4 covers the second connection structure 22.

[0091] It is understandable that the arrangement of the first electrode 4 covering the second connection structure 22, for example, the center of the first electrode 4 and the center of the second connection structure 22 being on the same straight line, can make the connection between the first electrode 4 and the second connection structure 22 more stable, while meeting the high integration requirements of the detector 100 and helping to reduce the overall size of the detector 100.

[0092] In some embodiments, continue to refer to Figure 4A and Figure 4B The orthographic projection of the first electrode 4 on the substrate 1 overlaps with the orthographic projection of the second connection structure 22 on the substrate 1.

[0093] For example, refer to Figure 4A and Figure 4B The orthographic projection of the first electrode 4 on the substrate 1 overlaps with the orthographic projection of the second connection structure 22 on the substrate 1, wherein, Figure 4A The orthographic projection of the first electrode 44 on the substrate 1 shown overlaps with the orthographic projection of the second connection structure 22 on the substrate 1. Figure 4B The orthographic projection of the second connection structure 22 on the substrate 1 shown is within the orthographic projection range of the first electrode 44 on the substrate 1. This arrangement allows the first electrode 4 and the second connection structure 22 to be more closely aligned in the second direction X or the third direction Y, improving the space utilization of the detector 100. It should be noted that both the second direction X and the third direction Y are perpendicular to the first direction Z, and the plane formed by the second direction X and the third direction Y is parallel to the plane containing the substrate 1.

[0094] In some embodiments, continue to refer to Figure 4A and Figure 4B , combined Figure 3 The orthographic projection of the second connection structure 22 on the substrate 1 overlaps with the first connection structure 11.

[0095] For example, continue to refer to Figure 4A and Figure 4B , combined Figure 3 The orthographic projection of the second connection structure 22 on the substrate 1 overlaps with the first connection structure 11, which enables the first connection structure 11 and the second connection structure 22 to be arranged more closely in the second direction X or the third direction Y, thereby improving the space utilization of the detector 100.

[0096] In some embodiments, continue to refer to Figure 4A and Figure 4B , combined Figure 3 The orthographic projection of the first electrode 4 on the substrate 1 overlaps with the orthographic projection of the second connection structure 22 on the substrate 1, and the orthographic projection of the second connection structure 22 on the substrate 1 overlaps with the first connection structure 11.

[0097] For example, the above-described orthographic projection overlapping design can achieve more complex circuit connections within a limited area. The first electrode 4, the second connection structure 22, and the first connection structure 1 do not need to occupy a large amount of space for independent layout in the second direction X and the third direction Y. Instead, they are electrically connected through the overlap in the first direction Z, which improves the integration of the detector 100 and is conducive to the lightweighting of the detector 100.

[0098] In some embodiments, refer to Figure 3 The first electrode 4 is connected to the MEMS structure 3 through the circuit layer 2.

[0099] For example, refer to Figure 3 and combined Figure 4A and Figure 4B The MEMS structure 3 is connected to the conductive layer 201 furthest from the substrate 1 via a via penetrating the first insulating layer 202. The first electrode 4 is connected to the MEMS structure 3 via the conductive layer 201 furthest from the substrate. Specifically, the first electrode 4 is connected to the MEMS structure 3 via the second connection structure 22 and the readout circuit 21. Figure 6 It can test the first electrode 4 through a probe, and thus test the performance of the MEMS structure 3.

[0100] In some embodiments, refer to Figure 3 , Figure 5A and Figure 5B The detector 100 includes a sensing area AA and a peripheral area BB, with the peripheral area BB surrounding the sensing area AA; the detector 100 includes a plurality of MEMS structures 3 and a plurality of first electrodes 4, with the plurality of MEMS structures 3 disposed in the sensing area AA and the plurality of first electrodes 4 disposed in the peripheral area BB, and each first electrode 4 being connected to at least one MEMS structure 3.

[0101] For example, multiple MEMS structures 3 are centrally arranged in the sensing area AA. For instance, the multiple MEMS structures 3 are evenly distributed in the sensing area AA, enabling comprehensive and uniform detection of infrared radiation within the sensing area, thus improving the accuracy and reliability of the detection results. The first electrode 4 is connected to at least one MEMS structure 3. This connection method can be flexibly designed according to actual needs, making signal acquisition and transmission more efficient. For example, parallel or series connections can be used, and the number can be adjusted according to different detection scenarios and requirements.

[0102] For example, refer to Figure 5A and Figure 5B MEMS structure 3 is disposed in sensing area AA, and multiple first electrodes 4 are disposed in peripheral area BB. Figure 5A Multiple first electrodes 4 are located on both sides of the MEMS structure 3 along the second direction X, or, as shown in the example. Figure 5B As shown, multiple first electrodes 4 are circumferentially arranged around the periphery of the MEMS structure 3. It should be noted that... Figure 5A and Figure 5B The number of the first electrode 4 and MEMS structure 3 is for illustrative purposes only and is not specifically limited.

[0103] In some embodiments, refer to Figure 3The detector 100 further includes a redistribution layer 5 and a soldering part 6. The redistribution layer 5 is disposed on the side of the substrate 1 away from the circuit layer 2 and is connected to the first connection structure 11. The soldering part 6 is disposed on the side of the redistribution layer 5 away from the substrate 1 and is connected to the redistribution layer 5.

[0104] For example, refer to Figure 3 The redistribution layer 5 is connected to the first connection structure 11, and the soldering part 6 is connected to the redistribution layer 5. Based on the foregoing, it can be seen that the first electrode 4 is connected to the first connection structure 11 via the second connection structure 22. That is, the first electrode 4 can achieve electrical connection with the redistribution layer 5 and the soldering part 6. In other words, combined with… Figure 7 At the position of the first electrode 4, a probe test can be used to detect parameters such as continuity, damage or impedance between the first electrode 4 and the welding part 6.

[0105] It should be noted that the redistribution layer 5 enables the detector 100 to be better compatible with other manufacturing processes. For example, when integrated with other electronic components, the redistribution layer 5 can serve as an intermediate connection layer, facilitating electrical connections between components manufactured using different processes. Furthermore, the redistribution layer 5 can be designed and manufactured according to different packaging requirements, meeting diverse packaging needs and improving product adaptability and market competitiveness.

[0106] For example, the material of the welded part 6 includes, but is not limited to, tin (Sn) and silver (Ag).

[0107] In some embodiments, refer to Figure 3 The first connection structure 11 includes a metal layer 101 and a seed layer (not shown in the figure). The metal layer 101 and the seed layer are connected between the second connection structure 22 and the redistribution layer 5. The seed layer is closer to the second connection structure 22 than the metal layer 101. The surface of the seed layer closer to the second connection structure 22 is in contact with the second connection structure 22.

[0108] For example, refer to Figure 3 A conductive material, such as copper, is filled between the metal layer 101 and the redistribution layer 5.

[0109] For example, the material of the metal layer 101 includes, but is not limited to, copper, silver, and tungsten, and the material of the seed layer is, for example, copper.

[0110] For example, a second insulating layer 102 is provided on the sidewall of the seed layer near the substrate 1, and the thickness of the second insulating layer 102 can be 50nm to 1000nm.

[0111] In some embodiments, refer to Figure 3The detector 100 also includes a third connection structure 33, which is disposed between the redistribution layer 5 and the soldering part 6, and is connected to the redistribution layer 5, and the soldering part 6 encloses the third connection structure 33.

[0112] For example, refer to Figure 3 The third connection structure 33 can be an under-bump metallurgy (UBM), and the material of the third connection structure 33 includes, but is not limited to, copper and titanium.

[0113] It should be noted that the welding part 6 is located on the side of the third connection structure 33 away from the substrate and is connected to the third connection structure 33. The third connection structure 33 can provide a flat and stable welding surface for the welding part, which is beneficial to improving the reliability and quality of welding, reducing the occurrence of welding defects, and ensuring reliable electrical connection between the detector 100 and other circuit boards or devices.

[0114] Some embodiments of this disclosure provide a detector 100, such as Figure 8 As shown, the detector 100 includes a circuit board 20, which is connected to the solder joint 6.

[0115] For example, the circuit board 20 may be provided with a connector for external electrical connection.

[0116] In some examples, detector 100 also includes an imaging system (not shown) disposed on circuit board 20.

[0117] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A detector, characterized in that, include: A substrate having a first connection structure therein, the first connection structure penetrating the substrate along a first direction; The first direction is the thickness direction of the substrate; A circuit layer is disposed on one side of the substrate along the first direction; the circuit layer includes an electrically connected readout circuit and a second connection structure, one end of the second connection structure being connected to the first connection structure; A MEMS structure and a first electrode are disposed on the side of the circuit layer away from the substrate; the MEMS structure is connected to the readout circuit, and the first electrode is connected to the other end of the second connection structure.

2. The detector according to claim 1, characterized in that, The end of the first connection structure near the circuit layer is electrically connected to the end of the second connection structure near the substrate, and the end of the second connection structure away from the substrate is electrically connected to the first electrode.

3. The detector according to claim 1, characterized in that, The orthographic projection of the first electrode onto the substrate overlaps with the first connection structure.

4. The detector according to claim 3, characterized in that, A through hole is formed on the substrate, and the first connection structure is disposed in the through hole. The orthographic projection of the first connection structure on the substrate is located within the orthographic projection range of the first electrode on the substrate.

5. The detector according to claim 4, characterized in that, The second connection structure covers the through hole.

6. The detector according to claim 1, characterized in that, The orthographic projection of the first electrode on the substrate is offset from the first connection structure.

7. The detector according to claim 1, characterized in that, The circuit layer includes a plurality of conductive layers stacked along the first direction, at least two of the conductive layers having conductive patterns, and at least two of the conductive patterns being connected in sequence to form the second connection structure; Of the at least two conductive patterns, the conductive pattern closest to the substrate is the first conductive pattern, and the conductive pattern furthest from the substrate is the second conductive pattern. The first connection structure is connected to the first conductive pattern, and the first electrode is connected to the second conductive pattern.

8. The detector according to claim 7, characterized in that, The orthographic projection of the first conductive pattern onto the substrate at least partially overlaps with the orthographic projection of the first connection structure onto the substrate; And / or, The orthographic projection of the second conductive pattern onto the substrate at least partially overlaps with the orthographic projection of the first connection structure onto the substrate.

9. The detector according to claim 7, characterized in that, The circuit layer also includes: A first insulating layer is disposed between any two adjacent conductive layers; a first via is provided in the first insulating layer, and two adjacent conductive patterns are connected through the first via.

10. The detector according to claim 9, characterized in that, The orthographic projections of any two of the first vias in the first insulating layer onto the substrate do not overlap.

11. The detector according to claim 7, characterized in that, In the second connection structure, at least two of the conductive patterns have their orthographic projections overlapping on the substrate.

12. The detector according to claim 1, characterized in that, The first electrode covers the second connection structure.

13. The detector according to claim 1, characterized in that, The orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the second connection structure on the substrate; and / or, The orthographic projection of the second connection structure onto the substrate overlaps with the first connection structure.

14. The detector according to claim 1, characterized in that, The detector includes a sensing area and a peripheral area, the peripheral area surrounding the sensing area; The detector includes a plurality of MEMS structures and a plurality of first electrodes. The plurality of MEMS structures are disposed in the sensing area, and the plurality of first electrodes are disposed in the peripheral area. Each first electrode is connected to at least one of the MEMS structures.

15. The detector according to any one of claims 1 to 14, characterized in that, Also includes: A redistribution layer is disposed on the side of the substrate away from the circuit layer, and the redistribution layer is connected to the first connection structure; A welding section is disposed on the side of the redistribution layer away from the substrate, and the welding section is connected to the redistribution layer.

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