A low-power voltage sampling circuit and a low-power voltage sampling system

CN224708132UActive Publication Date: 2026-09-01AIR INTERNATIONAL (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202521906800.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-09-04
Publication Date
2026-09-01
Estimated Expiration
2035-09-04

AI Technical Summary

Technical Problem

但是上述超低功耗电池电压采样路存在元器件使用较多,电路相对复杂成本较高的问题

Benefits of technology

[0022]本实用新型实施例的技术方案,通过提供一种原件数量少,可实现同样采样功能的低功耗电压采样电路,通过设置开关电路与信号输入电路连接,使得控制信号输入电路的电平信号控制开关电路的开闭状态,通过设置由第一分压电阻与第二分压电阻组成的分压电路与开关电路配合使用,用于导通电路及分压电压,通过设置采样端子,连接于开关电路与第二分压电阻之间,用于对通过分压电路降压后的电压进行采样。通过开关电路控制采样端子的工作,实现了电压的按需采样,有效降低了系统的持续能耗。同时,简化了电路结构,有利于降低成本,解决了现有超低功耗电池电压采样路存在元器件使用较多,电路相对复杂成本较高的问题,在实现电压采样功能的同时,电路元件使用更少,简化电路结构,有利于降低成本。

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Abstract

This invention discloses a low-power voltage sampling circuit and a low-power voltage sampling system. The low-power voltage sampling circuit includes: a sampling terminal, a first protection circuit, a first voltage divider resistor, a switching circuit, a second voltage divider resistor, a second protection circuit, a signal input circuit, and an output terminal. The first terminal of the signal input circuit is grounded, and the second terminal of the signal input circuit is connected to the third terminal of the switching circuit. The third terminal of the signal input circuit is used to receive high / low level signals and control the switching circuit to turn on and off. The sampling terminal is connected to the first terminal of the first protection circuit, and the second terminal of the second protection circuit is connected to the second terminal of the second voltage divider resistor and then grounded. The output terminal is connected to a microcontroller and is used for voltage sampling. This invention's low-power voltage sampling circuit achieves voltage sampling while using fewer circuit components, simplifying the circuit structure and reducing costs.
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Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, and in particular to a low-power voltage sampling circuit and a low-power voltage sampling system. Background Technology

[0002] In electronic circuits, voltage sampling is frequently used. The sampling method often employs resistor voltage division or two semiconductor devices (such as an NPN transistor and a PNP transistor, or an N-channel MOSFET and a P-channel MOSFET) to cut off the sampling circuit, thereby shutting down the sampling circuit during the system's sleep mode.

[0003] Utility model patent CN208140793U discloses an ultra-low power battery voltage sampling circuit, including an NMOS transistor, a PMOS transistor, resistors R1, R2, R3, R4, R5, and R6, and capacitor C1. The input network signal is connected to both resistors R5 and R6. One pin of resistor R5 is connected to the gate (G) of the NMOS transistor, and another pin of resistor R6 is connected to the source (S) of the NMOS transistor and simultaneously to the negative terminal of the power supply. Resistors R3 and R4 are connected to the gate (G) of the PMOS transistor, and another pin of R3 is connected to the drain (D) of the NMOS transistor. Another pin of R4 is connected to the source (S) of the PMOS transistor and simultaneously to the positive terminal of the power supply. The drain (D) of the PMOS transistor is connected to resistor R1. Capacitor C1 and resistor R2 are connected in parallel between the output network signal and the negative terminal of the power supply. This ultra-low power battery voltage sampling circuit significantly reduces device power consumption, extends battery operating time, and lowers device maintenance costs. However, the aforementioned ultra-low power battery voltage sampling circuit suffers from the problem of using a large number of components, resulting in a relatively complex circuit and higher cost. Utility Model Content

[0004] This invention provides a low-power voltage sampling circuit and a low-power voltage sampling system, which achieves voltage sampling function while using fewer circuit components, simplifying the circuit structure and helping to reduce costs.

[0005] According to one aspect of the present invention, a low-power voltage sampling circuit is provided, the low-power voltage sampling circuit comprising: a sampling terminal, a first protection circuit, a first voltage divider resistor, a switching circuit, a second voltage divider resistor, a second protection circuit, a signal input circuit, and an output terminal;

[0006] The first terminal of the signal input circuit is grounded, and the second terminal of the signal input circuit is connected to the third terminal of the switch circuit. The third terminal of the signal input circuit is used to receive high / low level signals and control the switching circuit to turn on and off.

[0007] The sampling terminal is connected to the first end of the first protection circuit. The second end of the first protection circuit is connected to the first end of the first voltage divider resistor. The second end of the first voltage divider resistor is connected to the first end of the switching circuit. The second end of the switching circuit is connected to the first end of the second voltage divider resistor, the first end of the second protection circuit, and the output terminal. The second end of the second protection circuit is connected to the second end of the second voltage divider resistor and then grounded. The output terminal is connected to the microcontroller and is used for voltage sampling.

[0008] Optionally, the switching circuit is an NMOS transistor;

[0009] The gate of the NMOS transistor is connected to the signal input circuit, the drain of the NMOS transistor is connected to the first voltage divider resistor, and the source of the NMOS transistor is connected to the second voltage divider resistor.

[0010] Optionally, the on-resistance of the NMOS transistor is less than the resistance value calculated from the resistance tolerance of the first voltage divider resistor or the second voltage divider resistor.

[0011] Optionally, the first protection circuit includes: a first protection resistor;

[0012] The first end of the first protection resistor is connected to the sampling terminal, and the second end of the first protection resistor is connected to the first voltage divider resistor.

[0013] Optionally, the second protection circuit includes: a diode;

[0014] The anode of the diode is grounded, and the cathode of the diode is connected to the output terminal.

[0015] Optionally, the voltage sampling range of the sampling terminal is 9V-36V.

[0016] Optionally, the signal input circuit includes: a first driving resistor;

[0017] The first end of the first driving resistor is used to receive high / low level signals, and the second end of the first driving resistor is connected to the third end of the switching circuit.

[0018] Optionally, the signal input circuit further includes: a second driving resistor;

[0019] The first end of the second driving resistor is connected to the third end of the switching circuit, and the second end of the second driving resistor is grounded.

[0020] Optionally, the signal input circuit is connected to the IO pin of the microcontroller, and the output terminal is connected to the ADC pin of the microcontroller.

[0021] According to another aspect of the present invention, a low-power voltage sampling system is provided, which includes the low-power voltage sampling circuit described in any one of the preceding aspects.

[0022] The technical solution of this utility model embodiment provides a low-power voltage sampling circuit that achieves the same sampling function with fewer components. By connecting a switching circuit to a signal input circuit, the level signal of the control signal input circuit controls the opening and closing state of the switching circuit. A voltage divider circuit, composed of a first voltage divider resistor and a second voltage divider resistor, works in conjunction with the switching circuit to conduct the circuit and divide the voltage. A sampling terminal is connected between the switching circuit and the second voltage divider resistor to sample the voltage after it has been stepped down by the voltage divider circuit. By controlling the operation of the sampling terminal through the switching circuit, on-demand voltage sampling is achieved, effectively reducing the continuous power consumption of the system. Simultaneously, the circuit structure is simplified, which helps reduce costs and solves the problem of existing ultra-low power battery voltage sampling circuits using many components and having relatively complex and costly circuits. This solution achieves voltage sampling function while using fewer circuit components, simplifying the circuit structure and reducing costs.

[0023] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of a low-power voltage sampling circuit according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of the working principle of a low-power voltage sampling circuit according to an embodiment of the present invention. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0029] Figure 1 This is a schematic diagram of a low-power voltage sampling circuit according to an embodiment of the present invention, with reference to... Figure 1 The present invention provides a low-power voltage sampling circuit, which includes: a sampling terminal Sample, a first protection circuit 10, a first voltage divider resistor R11, a switching circuit 20, a second voltage divider resistor R12, a second protection circuit 30, a signal input circuit 40, and an output terminal Sample3.

[0030] The first terminal of the signal input circuit 40 is grounded, and the second terminal of the signal input circuit 40 is connected to the third terminal of the switch circuit 20. The third terminal of the signal input circuit 40 is used to receive high / low level signals and control the switching circuit 20 to turn on and off.

[0031] The sampling terminal Sample is connected to the first end of the first protection circuit 10. The second end of the first protection circuit 10 is connected to the first end of the first voltage divider resistor R11. The second end of the first voltage divider resistor R11 is connected to the first end of the switching circuit 20. The second end of the switching circuit 20 is connected to the first end of the second voltage divider resistor R12, the first end of the second protection circuit 30, and the output terminal Sample3. The second end of the second protection circuit 30 is connected to the second end of the second voltage divider resistor R12 and then grounded. The output terminal Sample3 is connected to the microcontroller and is used for voltage sampling.

[0032] Specifically, the sampling terminal Sample can be connected to the sampling point as needed. Optionally, the voltage sampling range of the sampling terminal Sample is 9V-36V. The first voltage divider resistor R11 and the second voltage divider resistor R12 are connected in series, so that they are both connected to the same node, forming a voltage divider network. The resistance values ​​of the first voltage divider resistor R11 and the second voltage divider resistor R12 determine the sampling accuracy and power consumption, but these effects can be minimized through the intelligent control switching circuit 20.

[0033] The signal input circuit 40 is connected to the IO pin of the microcontroller. When the signal at the signal input terminal MCU_IO is a low-level signal or an open-circuit signal, the switch circuit 20 is turned off, the sampling terminal Sample does not perform sampling, and the current consumption of the entire circuit is extremely low, which is the leakage current of the switch circuit 20.

[0034] When the signal at the MCU_IO input terminal is high, the switch circuit 20 is turned on. The first voltage divider resistor R11 and the second voltage divider resistor R12 form a voltage divider circuit. The output terminal Sample3 can perform voltage sampling. The output terminal Sample3 is connected to the ADC pin of the microcontroller. The ADC in the microcontroller converts the collected voltage sample into a signal that can be further processed. The microcontroller calculates the voltage at the position of the output terminal Sample3 through the voltage divider of the first voltage divider resistor R11 and the second voltage divider resistor R12.

[0035] The switching circuit 20 is turned on or off by controlling different levels of the output of the control signal input circuit 40. By using the switching circuit 20 as a switch, low-power operation is achieved during sampling.

[0036] Furthermore, when voltage sampling is required, the control signal input circuit 40 outputs a high level, causing the switching circuit 20 to conduct. When the switching circuit 20 is on, current flows sequentially through the first voltage divider resistor R11, the switching circuit 20, and the second voltage divider resistor R12, forming a voltage divider. The resulting voltage is read by the sampling circuit 20 connected to the switching circuit 20 and the second voltage divider resistor R12. When sampling is not required, the control signal input circuit 40 outputs a low level, causing the switching circuit 20 to turn off. Almost no current flows through the voltage divider circuit, greatly reducing static power consumption.

[0037] The technical solution of this utility model embodiment provides a low-power voltage sampling circuit that achieves the same sampling function with fewer components. By connecting a switching circuit to a signal input circuit, the level signal of the control signal input circuit controls the opening and closing state of the switching circuit. A voltage divider circuit, composed of a first voltage divider resistor and a second voltage divider resistor, works in conjunction with the switching circuit to conduct the circuit and divide the voltage. A sampling terminal is connected between the switching circuit and the second voltage divider resistor to sample the voltage after it has been stepped down by the voltage divider circuit. By controlling the operation of the sampling terminal through the switching circuit, on-demand voltage sampling is achieved, effectively reducing the continuous power consumption of the system. Simultaneously, the circuit structure is simplified, which helps reduce costs and solves the problem of existing ultra-low power battery voltage sampling circuits using many components and having relatively complex and costly circuits. This solution achieves voltage sampling function while using fewer circuit components, simplifying the circuit structure and reducing costs.

[0038] Figure 2 This is a schematic diagram of the working principle of a low-power voltage sampling circuit according to an embodiment of the present invention, with reference to... Figure 2 Optionally, the switching circuit 20 is an NMOS transistor M2;

[0039] The gate of NMOS transistor M2 is connected to the signal input circuit 40, the drain of NMOS transistor M2 is connected to the first voltage divider resistor R11, and the source of NMOS transistor M2 is connected to the second voltage divider resistor R12.

[0040] Specifically, the switching circuit 20 is an NMOS transistor M2. In voltage sampling applications, using an NMOS transistor can effectively reduce power consumption. The NMOS transistor is activated and turned on only when the battery voltage needs to be sampled, and remains in the off state at other times, which greatly reduces static power consumption.

[0041] The gate of NMOS transistor M2 is connected to the signal input circuit 40, which controls the state of the switching circuit 20. The drain of NMOS transistor M2 is connected to the first voltage divider resistor R11. When NMOS transistor M2 is turned on, current can flow directly from the sampling terminal Sample through the first voltage divider resistor R11 to NMOS transistor M2, forming an efficient current path. The source of NMOS transistor M2 is connected to both the second voltage divider resistor R12 and ground, making the source directly grounded and providing a return path for the current. It also participates in forming another part of the voltage divider.

[0042] The signal input terminal MCU_IO serves as the interface for control signals, allowing an external controller or processor to adjust the operating state of NMOS transistor M2 by changing its voltage state. The gate of NMOS transistor M2 directly receives the control signal from the signal input terminal MCU_IO, enabling a fast response. When the signal input terminal MCU_IO outputs a high level, NMOS transistor M2 is turned on, and the voltage divider circuit operates; when the signal input terminal MCU_IO outputs a low level, NMOS transistor M2 is turned off, and the voltage divider circuit stops working.

[0043] The output terminal Sample3 serves as a voltage acquisition point and is directly connected to the source of the NMOS transistor M2. This allows the output terminal Sample3 to acquire the voltage signal after it has been regulated by the NMOS transistor M2 and the voltage divider circuit, thereby reflecting the real-time voltage status.

[0044] Continue to refer to Figure 2 Optionally, the on-resistance of NMOS transistor M2 is less than the resistance value calculated by the resistance tolerance of the first voltage divider resistor R11 or the second voltage divider resistor R12.

[0045] Specifically, the resistor ratio of the first voltage divider resistor R11 and the second voltage divider resistor R12 needs to consider the voltage difference Vgs between the gate and source of the NMOS transistor M2 after voltage division at the maximum sampling voltage. The voltage of MCU_IO needs to be greater than the sum of the turn-on voltage of NMOS transistor M2 and the voltage divided by the second voltage divider resistor R12. The resistor ratio of the first voltage divider resistor R11 and the second voltage divider resistor R12 needs to be less than the voltage difference Vds between the source and drain of NMOS transistor M2 at the maximum voltage. It should be noted that considering Vgs is to ensure that the microcontroller can reliably turn on NMOS transistor M2, and considering Vds is to ensure that Vds is small enough not to affect the voltage division.

[0046] Regarding the selection of NMOS transistor M2: It is necessary to consider that the on-resistance needs to be small. If it is less than the tolerance of the two voltage divider resistors, then the voltage drop caused by NMOS transistor M2 in the voltage divider circuit can be ignored.

[0047] Continue to refer to Figure 2 Optionally, the first protection circuit 10 includes: a first protection resistor R15;

[0048] The first end of the first protection resistor R15 is connected to the sampling terminal Sample, and the second end of the first protection resistor R15 is connected to the first voltage divider resistor R11.

[0049] Specifically, if a short circuit occurs in the first voltage divider resistor R11 between the sampling terminal Sample and the switching circuit 20, then all downstream circuits will experience problems. Setting a first protection resistor R15 can reduce the failure rate; the probability of both the first protection resistor R15 and the first voltage divider resistor R11 failing simultaneously is much lower. Furthermore, the first protection resistor R15 also participates in the voltage division.

[0050] Continue to refer to Figure 2 Optionally, the second protection circuit 30 includes: diode D1;

[0051] The anode of diode D1 is grounded, and the cathode of diode D1 is connected to the output terminal Sample3.

[0052] Specifically, diode D1, through its reverse breakdown characteristic, plays a role in overvoltage protection in the circuit. When the input voltage exceeds the set safe value, the Zener diode will quickly conduct, absorbing the excess voltage and limiting it within a safe range, thereby protecting other components in the circuit from damage.

[0053] Continue to refer to Figure 2 Optionally, the signal input circuit 40 includes: a first driving resistor R14;

[0054] The first terminal of the first driving resistor R14 is used to receive high / low level signals, and the second terminal of the first driving resistor R14 is connected to the third terminal of the switching circuit 20.

[0055] Specifically, the first driving resistor R14 is the driving resistor for the NMOS transistor M2. The switching slope of the NMOS transistor M2 can be controlled by adjusting the value of the resistor.

[0056] Continue to refer to Figure 2 Optionally, the signal input circuit 40 further includes: a second driving resistor R13;

[0057] The first end of the second driving resistor R13 is connected to the third end of the switching circuit 20, and the second end of the second driving resistor R13 is grounded.

[0058] Specifically, the second drive resistor R13 is used to limit the current flowing to the gate of NMOS transistor M2, which can prevent current surges from directly impacting the gate of NMOS transistor M2 and protect NMOS transistor M2 from being damaged by excessive current.

[0059] Continue to refer to Figure 2 Optionally, the signal input circuit 40 is connected to the IO pin of the microcontroller, and the output terminal Sample3 is connected to the ADC pin of the microcontroller.

[0060] Specifically, the microcontroller control signal input circuit 40 receives high / low level signals, enabling the signal input circuit 40 to control the opening and closing state of the switch circuit 20 according to different level signals, and the microcontroller processes the voltage acquisition of the output terminal Sample3.

[0061] The embodiments of this utility model also provide a low-power voltage sampling system, which includes the low-power voltage sampling circuit provided in any embodiment of this utility model.

[0062] Since the low-power voltage sampling system includes the low-power voltage sampling circuit provided in any embodiment of this utility model, the beneficial effects of the low-power voltage sampling system and the low-power voltage sampling circuit are the same, and will not be repeated here.

[0063] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A low-power voltage sampling circuit, characterized in that, include: The circuit includes a sampling terminal, a first protection circuit, a first voltage divider resistor, a switching circuit, a second voltage divider resistor, a second protection circuit, a signal input circuit, and an output terminal. The first terminal of the signal input circuit is grounded, and the second terminal of the signal input circuit is connected to the third terminal of the switch circuit. The third terminal of the signal input circuit is used to receive high / low level signals and control the switching circuit to turn on and off. The sampling terminal is connected to the first end of the first protection circuit. The second end of the first protection circuit is connected to the first end of the first voltage divider resistor. The second end of the first voltage divider resistor is connected to the first end of the switching circuit. The second end of the switching circuit is connected to the first end of the second voltage divider resistor, the first end of the second protection circuit, and the output terminal. The second end of the second protection circuit is connected to the second end of the second voltage divider resistor and then grounded. The output terminal is connected to the microcontroller and is used for voltage sampling.

2. The low-power voltage sampling circuit according to claim 1, characterized in that, The switching circuit is an NMOS transistor; The gate of the NMOS transistor is connected to the signal input circuit, the drain of the NMOS transistor is connected to the first voltage divider resistor, and the source of the NMOS transistor is connected to the second voltage divider resistor.

3. The low-power voltage sampling circuit according to claim 2, characterized in that, The on-resistance of the NMOS transistor is less than the resistance value calculated from the resistance tolerance of the first or second voltage divider resistor.

4. The low-power voltage sampling circuit according to claim 1, characterized in that, The first protection circuit includes: a first protection resistor; The first end of the first protection resistor is connected to the sampling terminal, and the second end of the first protection resistor is connected to the first voltage divider resistor.

5. The low-power voltage sampling circuit according to claim 1, characterized in that, The second protection circuit includes: a diode; The anode of the diode is grounded, and the cathode of the diode is connected to the output terminal.

6. The low-power voltage sampling circuit according to claim 1, characterized in that, The voltage sampling range of the sampling terminal is 9V-36V.

7. The low-power voltage sampling circuit according to claim 1, characterized in that, The signal input circuit includes: a first driving resistor; The first end of the first driving resistor is used to receive high / low level signals, and the second end of the first driving resistor is connected to the third end of the switching circuit.

8. The low-power voltage sampling circuit according to claim 1, characterized in that, The signal input circuit further includes: a second driving resistor; The first end of the second driving resistor is connected to the third end of the switching circuit, and the second end of the second driving resistor is grounded.

9. The low-power voltage sampling circuit according to claim 1, characterized in that, The signal input circuit is connected to the IO pin of the microcontroller, and the output terminal is connected to the ADC pin of the microcontroller.

10. A low-power voltage sampling system, characterized in that, Includes the low-power voltage sampling circuit as described in any one of claims 1-9.

Citation Information

Patent Citations

  • Ultra -low power consumption battery voltage sampling circuit

    CN208140793U