A surge protection circuit and electronic device

Abstract

This utility model discloses a surge protection circuit and electronic device, applicable to the field of integrated circuit design. In the surge protection circuit, the anode of the diode string serves as the power supply terminal of the power sensing circuit, connected to the power supply terminals of the waveform shaping circuit and the discharge circuit, and together they serve as the power supply terminal of the surge protection circuit, connected to the power supply terminals and power circuits of each integrated circuit in the integrated circuit chip; the cathode of the diode string or any connection terminal of the resistor string serves as the output terminal of the power sensing circuit, connected to the input terminal of the waveform shaping circuit; the output terminal of the waveform shaping circuit is connected to the input terminal of the discharge circuit. This application integrates the circuit into the integrated circuit chip, reducing the cost of circuit protection. Furthermore, the forward conduction voltage corresponding to the power sensing circuit in this application is determined based on the specific connection relationship between the power sensing circuit and the waveform shaping circuit, improving the flexibility of the circuit. At the same time, the diode string is suitable for surge scenarios with high energy.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit design, and in particular to a surge protection circuit and electronic device. Background Technology

[0002] With the development of semiconductor technology, the integration level of integrated circuits is becoming increasingly higher. As the size of transistors continues to shrink, hundreds of millions of transistors can be integrated onto a single chip. As the size of transistors becomes smaller, the corresponding operating voltage and current also become lower. The lower operating voltage makes integrated circuits extremely sensitive to changes in external voltage and current. Even a small voltage fluctuation or surge current can cause damage to the performance of transistors, or even permanent damage, thereby affecting the normal operation of the entire integrated circuit.

[0003] Currently, mature surge protection solutions typically involve connecting a transient voltage suppressor (TVS) diode in parallel between the charging port and ground of the electronic device, or connecting a dedicated surge protection circuit at the charging port. However, in a single TVS diode design, the energy absorption capacity of the individual TVS diode is limited. For high-energy surges (such as direct lightning strikes or grid overvoltages), it is prone to overheating and damage, failing to provide continuous or repetitive protection. On the other hand, in a dedicated surge protection circuit design, the complex internal control logic (such as detection, amplification, and driving MOSFET switches) leads to high cost and poor flexibility.

[0004] Given the above-mentioned technologies, finding a surge protection circuit that is highly stable, low-cost, and highly flexible is a problem that urgently needs to be solved by those skilled in the art. Utility Model Content

[0005] The purpose of this invention is to provide a surge protection circuit and electronic device. It can solve the problems in the prior art where a single TVS diode is unsuitable for high-energy surge scenarios, and the high cost and poor flexibility of dedicated surge protection circuits.

[0006] To solve the above-mentioned technical problems, on the one hand, this utility model provides a surge protection circuit for use in integrated circuit chips, including: a power sensing circuit, a waveform shaping circuit and a discharge circuit, wherein the power sensing circuit includes a diode string and a resistor string, and the cathode of the diode string is connected to the first end of the resistor string;

[0007] Among them, the anode of the diode string is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the waveform shaping circuit, and the power supply terminal of the discharge circuit, and together they are connected to the power supply terminal of the surge protection circuit and the power supply terminal and power supply circuit of each integrated circuit in the integrated circuit chip.

[0008] Either the cathode of the diode string or any connection terminal of the resistor string is connected as the output terminal of the power sensing circuit and the input terminal of the waveform shaping circuit.

[0009] The output of the waveform shaping circuit is connected to the input of the bleeder circuit;

[0010] When the power supply voltage provided by the power supply circuit is greater than the forward conduction voltage corresponding to the power sensing circuit, the waveform shaping circuit outputs a pulse signal to control the discharge circuit to discharge the power supply voltage.

[0011] Preferably, the diode string includes: a plurality of diodes;

[0012] In this case, the anode of any diode other than the first diode is connected to the cathode of the diode in the previous stage.

[0013] The anode of the first diode is connected to the power supply terminal of the waveform shaping circuit, the power supply terminal of the discharge circuit, the power supply terminal of each integrated circuit, and the power supply circuit as the anode of the diode string.

[0014] The cathode of the last diode is connected to the first end of the resistor string as the cathode of the diode string.

[0015] Preferably, the resistor string includes: a plurality of resistors;

[0016] In this series, any one of the resistors that is not the first resistor is connected to the second terminal of the resistor in the previous stage, and together they serve as the connection terminals of the resistor string.

[0017] The first end of the first resistor is connected to the cathode of the diode string as the first end of the resistor string;

[0018] The second terminal of the last resistor is grounded.

[0019] Preferably, the waveform shaping circuit includes: a plurality of inverter circuits;

[0020] Among them, the power supply terminals of several inverter circuits are connected together, and together they serve as the power supply terminal of the waveform shaping circuit, the power supply terminal of the power sensing circuit, the power supply terminal of the bleeder circuit, the power supply terminal of each integrated circuit, and the power supply circuit.

[0021] The input terminal of the non-first inverter circuit is connected to the output terminal of the previous stage inverter circuit;

[0022] The input terminal of the first inverter circuit is connected to the output terminal of the power sensing circuit as the input terminal of the waveform shaping circuit.

[0023] The output of the last inverter circuit is connected to the input of the bleeder circuit as the output of the waveform shaping circuit.

[0024] Preferably, the inverter circuit includes: a string of PMOS transistors and a string of NMOS transistors;

[0025] Among them, the source terminal of the PMOS transistor string serves as the power supply terminal of the inverter circuit and is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the bleeder circuit, the power supply terminal of each integrated circuit, and the power supply circuit.

[0026] The drain terminals of the PMOS transistor string and the NMOS transistor string are connected and together serve as the output terminals of the inverter circuit.

[0027] The gate terminals of the PMOS transistor string and the NMOS transistor string are connected and together serve as the input terminals of the inverter circuit.

[0028] The source terminal of the NMOS transistor string is grounded.

[0029] Preferably, the PMOS transistor string includes: a plurality of PMOS transistors;

[0030] In this configuration, the gates of each PMOS transistor are connected together and together form the gate terminal of the PMOS transistor string, which is connected to the gate terminal of the NMOS transistor string.

[0031] The source of any PMOS transistor other than the first one is connected to the drain of the previous PMOS transistor.

[0032] The source of the first PMOS transistor is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the discharge circuit, the power supply terminals of each integrated circuit, and the power supply circuit as the source terminal of the PMOS transistor string.

[0033] The drain of the last PMOS transistor is connected to the drain terminal of the NMOS transistor string, serving as the drain terminal of the PMOS transistor string.

[0034] Preferably, the NMOS transistor string includes: a plurality of NMOS transistors;

[0035] In this configuration, the gates of each NMOS transistor are connected together and together form the gate terminal of the NMOS transistor string, which is connected to the gate terminal of the PMOS transistor string.

[0036] The drain of any NMOS transistor other than the first one is connected to the source of the previous NMOS transistor;

[0037] The drain of the first NMOS transistor is connected to the drain terminal of the NMOS transistor string and then to the drain terminal of the PMOS transistor string.

[0038] The source of the last NMOS transistor is grounded as the source terminal of the NMOS transistor string.

[0039] Preferably, the discharge circuit is a PMOS transistor;

[0040] In this circuit, the gate of the PMOS transistor is connected to the output of the waveform shaping circuit as the input terminal of the discharge circuit, the source of the PMOS transistor is connected to the power supply terminal of the discharge circuit as the power supply terminal of the power sensing circuit, the power supply terminal of the waveform shaping circuit, the power supply terminals of each integrated circuit, and the power supply circuit, and the drain of the PMOS transistor is grounded.

[0041] or;

[0042] The bleeder circuit consists of an NMOS transistor;

[0043] In this circuit, the gate of the NMOS transistor serves as the input terminal of the bleeder circuit and is connected to the output terminal of the waveform shaping circuit. The drain of the NMOS transistor serves as the power supply terminal of the bleeder circuit and is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the waveform shaping circuit, the power supply terminals of each integrated circuit, and the power supply circuit. The source of the NMOS transistor is grounded.

[0044] Preferably, when the number of inverter circuits is odd, the bleeder circuit is a PMOS transistor; when the number of inverter circuits is even, the bleeder circuit is an NMOS transistor.

[0045] On the other hand, this application also provides an electronic device including the surge protection circuit described above.

[0046] Therefore, this application integrates the surge protection circuit into an integrated circuit chip, which reduces the cost of surge protection to a certain extent. Furthermore, the forward conduction voltage of the power sensing circuit in this application is determined based on the specific connection relationship between the power sensing circuit and the waveform shaping circuit. In other words, the specific structure of the diode string and resistor string affects the specific value of the forward conduction voltage, thereby improving the circuit's flexibility. At the same time, the diode string in this application can improve the circuit's stability and is suitable for high-energy surge scenarios. Attached Figure Description

[0047] To more clearly illustrate the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 A structural diagram of a surge protection circuit provided in an embodiment of this application;

[0049] Figure 2A circuit diagram of a surge protection circuit corresponding to the first embodiment provided in this application;

[0050] Figure 3 A circuit diagram of a surge protection circuit corresponding to the second embodiment provided in this application;

[0051] Figure 4 The circuit diagram of a surge protection circuit provided in this application corresponds to the third embodiment. Detailed Implementation

[0052] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0053] The core of this invention is to provide a surge protection circuit and electronic device.

[0054] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0055] Figure 1 A structural diagram of a surge protection circuit provided in an embodiment of this application is shown below. Figure 1 As shown, it includes: a power sensing circuit 1, a waveform shaping circuit 2, and a discharge circuit 3. In addition, Figure 1 It also includes each integrated circuit 4.

[0056] The surge protection circuit is connected as follows: the power sensing circuit 1 includes a diode string and a resistor string. The cathode of the diode string is connected to the first end of the resistor string. The anode of the diode string serves as the power supply terminal of the power sensing circuit 1, connected to the power supply terminals of the waveform shaping circuit 2 and the discharge circuit 3, and together they serve as the power supply terminal of the surge protection circuit, connected to the power supply terminals and power circuits of each integrated circuit 4 in the integrated circuit chip. Either the cathode of the diode string or any connection terminal of the resistor string serves as the output terminal of the power sensing circuit 1, connected to the input terminal of the waveform shaping circuit 2. The output terminal of the waveform shaping circuit 2 is connected to the input terminal of the discharge circuit 4. Furthermore, the power sensing circuit 1, waveform shaping circuit 2, discharge circuit 3, and each integrated circuit 4 are grounded.

[0057] In a specific embodiment, the surge protection circuit provided in this application is specifically disposed in the integrated circuit chip and connected to each integrated circuit 4 in the integrated circuit chip and the power supply circuit. The power supply circuit can be understood as a power line, and the surge protection circuit and each integrated circuit 4 are connected to the power line.

[0058] The anode of the diode string in the power sensing circuit 1 provided in this application serves as the power supply terminal of the power sensing circuit 1, which is connected to the power supply terminals of the waveform shaping circuit 2 and the discharge circuit 3. It can be seen that the diode string is connected in a forward direction, indicating that this application uses a forward-biased diode string and resistor string to achieve power sensing. When the power supply voltage is not greater than the forward conduction voltage of the diode string, the current flowing through the diode string is very small, resulting in a very small voltage across the resistor string, equivalent to a low level. This low level, after passing through the waveform shaping circuit 1, outputs a corresponding pulse signal to drive the connected discharge circuit 3 to turn off. When the power supply voltage provided by the power circuit is greater than the forward conduction voltage of the diode string, the current flowing through the diode string is larger, resulting in a larger voltage across the resistor string, equivalent to a high level. This high level, after passing through the waveform shaping circuit 1, outputs a corresponding pulse signal to drive the connected discharge circuit 3 to discharge the power supply voltage pulse signal.

[0059] This application allows adjustment of the turn-on threshold of the bleeder circuit 3 by adjusting the number of forward diodes in the diode string or by connecting the output at different positions in the resistor string. Furthermore, since this application adjusts the threshold by using the forward conduction voltage of the diode string, it is far more convenient than adjusting it by using the reverse breakdown voltage of the diodes.

[0060] In summary, this application provides a surge protection circuit for use in an integrated circuit chip, comprising: a power sensing circuit, a waveform shaping circuit, and a discharge circuit. The power sensing circuit includes a diode string and a resistor string, with the cathode of the diode string connected to the first end of the resistor string. The anode of the diode string serves as the power supply terminal of the power sensing circuit, connected to the power supply terminals of the waveform shaping circuit and the discharge circuit, and together they serve as the power supply terminal of the surge protection circuit, connected to the power supply terminals of each integrated circuit and the power supply circuit within the integrated circuit chip. Either the cathode of the diode string or any connection point of the resistor string serves as the output terminal of the power sensing circuit, connected to the input terminal of the waveform shaping circuit. The output terminal of the waveform shaping circuit is connected to the input terminal of the discharge circuit. When the power supply voltage provided by the power supply circuit is greater than the forward conduction voltage corresponding to the power sensing circuit, the waveform shaping circuit outputs a pulse signal to control the discharge circuit to discharge the power supply voltage. Therefore, this application integrates the surge protection circuit into an integrated circuit chip, which reduces the cost of surge protection to a certain extent. Furthermore, the forward conduction voltage of the power sensing circuit in this application is determined based on the specific connection relationship between the power sensing circuit and the waveform shaping circuit. In other words, the specific structure of the diode string and resistor string affects the specific value of the forward conduction voltage, thereby improving the circuit's flexibility. At the same time, the diode string in this application can improve the circuit's stability and is suitable for high-energy surge scenarios.

[0061] Based on the above embodiments, as a preferred embodiment, such as... Figure 2 As shown, the diode string in its power sensing circuit 1 includes: a number of diodes (for example, if the number of diodes is N, then the diodes are D1-DN, where N is a positive integer); and a resistor string including: a number of resistors (for example, if the number of resistors is K, then the resistors are R1-RK, where K is a positive integer). It should be noted that... Figure 2 In the circuit shown, the cathode of the diode string and the first end of the resistor string serve as the output terminal of the power sensing circuit 1.

[0062] The specific connection relationship of its power sensing circuit 1 is as follows: the anode of any diode among the non-first diodes D2-DN is connected to the cathode of the previous stage diodes D1-D(N-1); the anode of the first diode D1 is connected as the anode of the diode string to the power supply terminal of the waveform shaping circuit 2, the power supply terminal of the discharge circuit 3, the power supply terminal 4 of each integrated circuit, and the power supply circuit; the cathode of the last diode DN is connected as the cathode of the diode string to the first end of the resistor string; the first end of any resistor among the non-first resistors R2-RK is connected to the second end of the previous stage resistors R1-R(K-1), and together they serve as the connection terminal of the resistor string; the first end of the first resistor R1 is connected as the first end of the resistor string to the cathode of the diode string; the second end of the last resistor RK is grounded.

[0063] In a specific embodiment, the power sensing circuit 1, from the power supply to ground, consists of N series-connected diodes D1-DN and K series-connected resistors R1-RK. The diodes D1-DN are either N-type or P-type diodes. The diodes D1-DN are connected in series with their anodes connected to a high potential and their cathodes connected to a low potential. The highest potential of the series-connected diodes D1-DN is connected to the power supply line, and the lowest potential is connected to ground through 1 to K series-connected resistors R1-RK. The cathode of the diode string or the connection point of any two resistors in the resistor string serves as the output terminal of the power sensing circuit 4, which is connected to the input terminal of the waveform shaping circuit 2.

[0064] The power sensing circuit 1 can adjust the forward conduction voltage of the power sensing circuit 1 by adjusting the position relationship of the specific output terminals, thereby determining whether to drive the discharge circuit 3 to achieve power discharge.

[0065] The waveform shaping circuit 2 includes several inverter circuits. The connection relationships of the waveform shaping circuit are as follows: the power supply terminals of the several inverter circuits are connected, and together they serve as the power supply terminal of the waveform shaping circuit 2, connected to the power supply terminal of the power sensing circuit 1, the power supply terminal of the bleeder circuit 3, the power supply terminals of each integrated circuit 4, and the power supply circuit; the input terminal of any inverter circuit other than the first one is connected to the output terminal of the previous stage inverter circuit; the input terminal of the first inverter circuit serves as the input terminal of the waveform shaping circuit 2 and is connected to the output terminal of the power sensing circuit 1; the output terminal of the last inverter circuit serves as the output terminal of the waveform shaping circuit 2 and is connected to the input terminal of the bleeder circuit 3.

[0066] like Figure 2 As shown, its inverter circuit includes: a PMOS transistor string and an NMOS transistor string; and the PMOS transistor string includes: a number of PMOS transistors (for example: if the number of PMOS transistors is X, then the PMOS transistors are P1-PX, where X is an integer greater than 0); the NMOS transistor string includes: a number of NMOS transistors (for example: if the number of NMOS transistors is Y, then the NMOS transistors are N1-NY, where Y is an integer greater than 0).

[0067] The specific connection relationship of its inverter circuit is as follows: the source terminal of the PMOS transistor string is connected to the power supply terminal of the power sensing circuit 1, the power supply terminal of the discharge circuit 3, the power supply terminal of each integrated circuit 4, and the power supply circuit as the power supply terminal of the inverter circuit; the drain terminal of the PMOS transistor string is connected to the drain terminal of the NMOS transistor string, and together they serve as the output terminal of the inverter circuit; the gate terminal of the PMOS transistor string is connected to the gate terminal of the NMOS transistor string, and together they serve as the input terminal of the inverter circuit; the source terminal of the NMOS transistor string is grounded.

[0068] Furthermore, the specific connection relationship of its inverter circuit is as follows: the gates of each PMOS transistor P1-PX are connected, and together they serve as the gate terminal of the PMOS transistor string, which is connected to the gate terminal of the NMOS transistor string; the source of any PMOS transistor P2-PX that is not the first PMOS transistor is connected to the drain of the previous stage PMOS transistor P1-P(X-1); the source of the first PMOS transistor P1 serves as the source terminal of the PMOS transistor string and is connected to the power supply terminal of the power sensing circuit 1, the power supply terminal of the discharge circuit 3, the power supply terminals of each integrated circuit 4, and the power supply circuit; the last PMOS transistor P... The drain of X is connected to the drain of the PMOS transistor string and the drain of the NMOS transistor string; the gates of each NMOS transistor N1-NY are connected and together serve as the gate of the NMOS transistor string and are connected to the gate of the PMOS transistor string; the drain of any NMOS transistor that is not the first NMOS transistor N2-NY is connected to the source of the previous NMOS transistor N1-N(Y-1); the drain of the first NMOS transistor N1 serves as the drain of the NMOS transistor string and is connected to the drain of the PMOS transistor string; the source of the last NMOS transistor NY serves as the source of the NMOS transistor string and is grounded.

[0069] In this embodiment, the waveform shaping circuit 2 is composed of several inverter circuits connected in series, or it can be understood as several stages of inverter circuits connected in series. Each stage of the inverter circuit consists of X PMOS transistors P1-PX and Y NMOS transistors N1-NY. In each stage of the inverter circuit, all PMOS transistors P1-PX are connected in series to form a PMOS transistor string (series branch), one end of which is connected to the power supply line, and the other end serves as the output of this stage of the inverter circuit. In each stage of the inverter circuit, all NMOS transistors N1-NY are connected in series to form an NMOS transistor string (series branch), one end of which is grounded, and the other end serves as the output of this stage of the inverter circuit. In this circuit, the input terminal of the first stage inverter circuit is connected to the output terminal of the power sensing circuit 1; the output terminal of the first stage inverter circuit is connected to the input terminal of the second stage inverter circuit, and so on, with the output of the last stage inverter circuit serving as the output of the waveform shaping circuit 2, which is connected to the input terminal of the discharge circuit 3.

[0070] Therefore, it can be seen that the waveform shaping circuit 2 constructed by connecting multi-stage inverter circuits in series in this application can directly shape the signal (e.g., voltage signal) sent by the front-end power sensing circuit 1 into the corresponding pulse signal.

[0071] Based on this, such as Figure 2 As shown, its discharge circuit 3 is usually a single MOS transistor Q1, but there are two specific options.

[0072] The first option is: a PMOS transistor QP1; then the gate of the PMOS transistor QP1 is connected to the output of the waveform shaping circuit 2 as the input terminal of the bleeder circuit 3, the source of the PMOS transistor QP1 is connected to the power supply terminal of the bleeder circuit 3 as the power supply terminal of the power sensing circuit 1, the power supply terminal of the waveform shaping circuit 2, the power supply terminals of each integrated circuit 4 and the power supply circuit, and the drain of the PMOS transistor QP1 is grounded.

[0073] The second option is: an NMOS transistor QN1; then the gate of the NMOS transistor QN1 is connected to the output of the waveform shaping circuit as the input terminal of the bleeder circuit 3, the drain of the NMOS transistor QN1 is connected to the power supply terminal of the bleeder circuit 3 as the power supply terminal of the power sensing circuit 1, the power supply terminal of the waveform shaping circuit 2, the power supply terminals of each integrated circuit 4 and the power supply circuit, and the source of the NMOS transistor QN1 is grounded.

[0074] It should be noted that the selection of the bleeder circuit 3 is related to the number of inverter circuits. When the number of inverter circuits is odd, the bleeder circuit 3 is a single PMOS transistor QP1, such as... Figure 3 As shown; when the number of inverter circuits is even, the bleeder circuit 3 is a single NMOS transistor QN1, as follows. Figure 4 As shown.

[0075] It should be noted that, Figure 3 The number of inverters in the circuit is 1, and the number of diodes in the diode string is 10, so the diodes are D1-D10; the number of resistors in the resistor string is 1, so the resistor is R1. At this time, the connection terminal of diode D10 and resistor R1 is used as the output terminal of power sensing circuit 1. Figure 4 The diode string contains 10 diodes, which are D1-D10; the resistor string contains 1 resistor, which is R1. In this case, the connection between diode D10 and resistor R1 serves as the output terminal of power sensing circuit 1. Figure 4 The number of inverters in the circuit is 2, and the number of diodes in the diode string is 10, so the diodes are D1-D10; the number of resistors in the resistor string is 2, so the resistors are R1 and R2. At this time, the connection of resistors R1 and R2 serves as the output terminal of power sensing circuit 1.

[0076] It should also be noted that the embodiments provided in this application are only one possible implementation method, but are not limited to this only implementation method. Users can set their own implementation methods according to their needs.

[0077] Therefore, this application integrates the surge protection circuit into an integrated circuit chip, which reduces the cost of surge protection to a certain extent. Furthermore, the forward conduction voltage of the power sensing circuit in this application is determined based on the specific connection relationship between the power sensing circuit and the waveform shaping circuit. In other words, the specific structure of the diode string and resistor string affects the specific value of the forward conduction voltage, thereby improving the circuit's flexibility. Simultaneously, the diode string in this application can improve circuit stability and is suitable for high-energy surge scenarios. Additionally, the specific structure of the discharge circuit can be flexibly selected, further increasing the circuit's flexibility.

[0078] On the other hand, this application also provides an electronic device that includes the surge protection circuit described above and has the same beneficial effects.

[0079] Since the embodiments provided in this application are the same as the embodiments of the surge protection circuit described above, they will not be described again here.

[0080] The surge protection circuit and electronic device provided by this utility model have been described in detail above. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this utility model without departing from the principle of this utility model, and these improvements and modifications also fall within the protection scope of the claims of this utility model.

[0081] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A surge protection circuit, characterized in that, Applied in integrated circuit chips, it includes: a power sensing circuit, a waveform shaping circuit, and a discharge circuit, wherein the power sensing circuit includes a diode string and a resistor string, and the cathode of the diode string is connected to the first end of the resistor string; The anode of the diode string serves as the power supply terminal of the power sensing circuit, connected to the power supply terminal of the waveform shaping circuit and the power supply terminal of the discharge circuit, and together they serve as the power supply terminal of the surge protection circuit, connected to the power supply terminals and power circuits of each integrated circuit in the integrated circuit chip. The cathode of the diode string or any one of the connection terminals in the resistor string is connected as the output terminal of the power sensing circuit and the input terminal of the waveform shaping circuit. The output terminal of the waveform shaping circuit is connected to the input terminal of the discharge circuit; When the power supply voltage provided by the power supply circuit is greater than the forward conduction voltage corresponding to the power sensing circuit, the waveform shaping circuit outputs a pulse signal to control the discharge circuit to discharge the power supply voltage.

2. The surge protection circuit according to claim 1, characterized in that, The diode string includes: a plurality of diodes; Wherein, the anode of any one of the diodes that is not the first one is connected to the cathode of the diode in the previous stage; The anode of the first diode is connected to the power supply terminal of the waveform shaping circuit, the power supply terminal of the discharge circuit, the power supply terminal of each integrated circuit, and the power supply circuit, as the anode of the diode string. The cathode of the last diode is connected to the first end of the resistor string as the cathode of the diode string.

3. The surge protection circuit according to claim 1, characterized in that, The resistor string includes: a plurality of resistors; Wherein, the first end of any of the resistors that is not the first resistor is connected to the second end of the resistor in the previous stage, and together they serve as the connection end of the resistor string; The first end of the first resistor is connected to the cathode of the diode string as the first end of the resistor string; The second terminal of the last resistor is grounded.

4. The surge protection circuit according to claim 1, characterized in that, The waveform shaping circuit includes: several inverter circuits; Among them, the power supply terminals of several inverter circuits are connected together, and together they serve as the power supply terminal of the waveform shaping circuit, which is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the discharge circuit, the power supply terminal of each integrated circuit, and the power supply circuit. The input terminal of the non-first inverter circuit is connected to the output terminal of the previous inverter circuit; The input terminal of the first inverter circuit is connected to the output terminal of the power sensing circuit as the input terminal of the waveform shaping circuit. The output of the last inverter circuit is connected to the input of the bleed circuit as the output of the waveform shaping circuit.

5. The surge protection circuit according to claim 4, characterized in that, The inverter circuit includes: a string of PMOS transistors and a string of NMOS transistors; The source terminal of the PMOS transistor string serves as the power supply terminal of the inverter circuit and is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the discharge circuit, the power supply terminal of each integrated circuit, and the power supply circuit. The drain terminal of the PMOS transistor string is connected to the drain terminal of the NMOS transistor string, and together they serve as the output terminal of the inverter circuit. The gate terminals of the PMOS transistor string and the NMOS transistor string are connected and together serve as the input terminals of the inverter circuit. The source terminal of the NMOS transistor string is grounded.

6. The surge protection circuit according to claim 5, characterized in that, The PMOS transistor string includes: a plurality of PMOS transistors; The gates of each PMOS transistor are connected and together serve as the gate terminal of the PMOS transistor string, which is connected to the gate terminal of the NMOS transistor string. The source of any PMOS transistor other than the first one is connected to the drain of the PMOS transistor in the previous stage. The source of the first PMOS transistor is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the discharge circuit, the power supply terminal of each integrated circuit, and the power supply circuit as the source terminal of the PMOS transistor string. The drain of the last PMOS transistor is connected to the drain terminal of the NMOS transistor string as the drain terminal of the PMOS transistor string.

7. The surge protection circuit according to claim 5, characterized in that, The NMOS transistor string includes: a plurality of NMOS transistors; The gates of each NMOS transistor are connected and together serve as the gate terminal of the NMOS transistor string, which is connected to the gate terminal of the PMOS transistor string. The drain of any NMOS transistor other than the first one is connected to the source of the previous NMOS transistor; The drain of the first NMOS transistor is connected to the drain terminal of the PMOS transistor string as the drain terminal of the NMOS transistor string; The source of the last NMOS transistor is grounded as the source terminal of the NMOS transistor string.

8. The surge protection circuit according to any one of claims 4-7, characterized in that, The discharge circuit is a PMOS transistor; The gate of the PMOS transistor is connected to the output of the waveform shaping circuit as the input terminal of the discharge circuit. The source of the PMOS transistor is connected to the power supply terminal of the discharge circuit as the power supply terminal of the power sensing circuit, the power supply terminal of the waveform shaping circuit, the power supply terminal of each integrated circuit, and the power supply circuit. The drain of the PMOS transistor is grounded. or; The discharge circuit is an NMOS transistor; The gate of the NMOS transistor serves as the input terminal of the bleeder circuit and is connected to the output terminal of the waveform shaping circuit. The drain of the NMOS transistor serves as the power supply terminal of the bleeder circuit and is connected to the power supply terminal of the power sensing circuit, the power supply terminal of the waveform shaping circuit, the power supply terminals of each integrated circuit, and the power supply circuit. The source of the NMOS transistor is grounded.

9. The surge protection circuit according to claim 8, characterized in that, When the number of inverter circuits is odd, the bleeder circuit is a single PMOS transistor; when the number of inverter circuits is even, the bleeder circuit is a single NMOS transistor.

10. An electronic device, characterized in that, Includes the surge protection circuit described in any one of claims 1-9.

Images