A driving circuit and electronic device

Abstract

This invention provides a driving circuit and an electronic device. The driving circuit includes a pulse shifting unit and a negative voltage sustaining unit. A first terminal of the pulse shifting unit receives a driving signal, and a second terminal of the pulse shifting unit is connected to the driving terminal of the power device. The pulse shifting unit generates a negative voltage signal based on the driving signal. The pulse shifting unit includes a parallel DC blocking capacitor and a Zener diode. The negative voltage sustaining unit connects the second terminal of the pulse shifting unit to the driving terminal of the power device. The negative voltage sustaining unit generates a negative voltage compensation signal to compensate for the negative voltage signal. This invention provides a stable negative voltage turn-off signal for the power device using the pulse sustaining unit and the pulse shifting unit, enabling the power device to stably turn off during the low-level period of the driving signal. The circuit structure is simple, highly reliable, and low-cost.

Description

Technical Field

[0001] This utility model relates to the technical field of power supply, and in particular to a drive circuit and electronic device. Background Technology

[0002] In the fields of switching power supplies and microwave power supplies, negative voltage driving is widely used to ensure the reliable turn-off of power devices such as IGBTs (Insulated Gate Bipolar Transistors) and SiC MOS (Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors). In existing technologies, negative voltage driving typically relies on dedicated driver chips. These chips have complex internal circuit structures, requiring the integration of multi-stage voltage conversion, signal isolation, and dynamic compensation functions, resulting in high costs. Utility Model Content

[0003] This utility model mainly provides a drive circuit and electronic device that can reliably shut down power devices at a low cost.

[0004] To solve the above-mentioned technical problems, the first technical solution adopted by this utility model is: to provide a driving circuit, which is used to drive power devices, and the driving circuit includes:

[0005] A pulse translation unit, wherein a first end of the pulse translation unit receives a drive signal, and a second end of the pulse translation unit is connected to the drive end of the power device; the pulse translation unit is used to generate a negative voltage signal based on the drive signal; wherein the pulse translation unit includes: a DC blocking capacitor and a Zener diode connected in parallel;

[0006] A negative pressure maintenance unit is provided, which is connected to the second terminal of the pulse translation unit and the driving terminal of the power device; the negative pressure maintenance unit is used to generate a negative pressure compensation signal to compensate for the negative pressure signal.

[0007] In one embodiment, the driving circuit further includes a control unit, which is connected to the pulse translation unit and the negative pressure maintenance unit. The control unit is configured to output the driving signal to the pulse translation unit and to output a frequency signal to the negative pressure maintenance unit, so that the negative pressure maintenance unit generates the negative pressure compensation signal based on the frequency signal.

[0008] In one embodiment, the control unit outputs the frequency signal earlier than the time it outputs the drive signal; and / or

[0009] The negative pressure compensation signal arrives at the drive terminal of the power device before the negative pressure signal.

[0010] In one embodiment, the control unit outputs the frequency signal and, after waiting for a preset time, outputs the drive signal;

[0011] The preset time is determined based on the negative pressure signal.

[0012] In one embodiment, the negative pressure maintenance unit includes: a compensation signal providing unit and a first current limiting unit.

[0013] The first end of the compensation signal providing unit is connected to the control unit, the first end of the first current limiting unit is connected to the second end of the compensation signal providing unit, and the second end of the first current limiting unit is connected to the driving end of the power device.

[0014] In one embodiment, the compensation signal providing unit includes: a first capacitor, a first unidirectional conductor, a second capacitor, and a second unidirectional conductor. A first terminal of the first capacitor is connected to the control unit, a second terminal of the first capacitor is connected to the anode of the first unidirectional conductor, and the cathode of the first unidirectional conductor is grounded. The cathode of the second unidirectional conductor is connected to the second terminal of the first capacitor, the anode of the second unidirectional conductor is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is grounded.

[0015] In one embodiment, the compensation signal providing unit includes at least one of a voltage pump, a transformer, or a switching power supply.

[0016] In one embodiment, the driving circuit further includes:

[0017] The totem pole unit is connected between the control unit and the pulse translation unit.

[0018] In one embodiment, the driving circuit further includes:

[0019] The second current limiting unit is connected between the control unit and the negative pressure maintaining unit.

[0020] To solve the above-mentioned technical problems, the second technical solution adopted by this utility model is: to provide an electronic device, including a power device and a driving circuit, wherein the driving circuit is connected to the driving terminal of the power device, and the driving circuit includes any of the above-mentioned driving circuits.

[0021] The beneficial effects of this utility model are as follows: Unlike existing technologies, the driving circuit provided by this utility model includes a pulse shifting unit and a negative voltage sustaining unit. The first end of the pulse shifting unit receives a driving signal, and the second end of the pulse shifting unit is connected to the driving end of the power device. The pulse shifting unit is used to generate a negative voltage signal based on the driving signal. The pulse shifting unit includes a parallel DC blocking capacitor and a Zener diode. The negative voltage sustaining unit connects the second end of the pulse shifting unit and the driving end of the power device. The negative voltage sustaining unit is used to generate a negative voltage compensation signal to compensate for the negative voltage signal. This application provides a stable negative voltage turn-off signal to the power device through the pulse sustaining unit and the pulse shifting unit, enabling the power device to stably turn off during the low-level period of the driving signal. Its circuit structure is simple, highly reliable, and low-cost. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the structure of the first embodiment of the driving circuit of this application;

[0024] Figure 2 This is a schematic diagram of the structure of the second embodiment of the driving circuit of this application;

[0025] Figure 3 This is a timing diagram of the drive signals and frequency signals of this application;

[0026] Figure 4 This is a schematic diagram of the structure of the third embodiment of the driving circuit of this application;

[0027] Figure 5 This is a schematic diagram of the structure of an embodiment of the electronic device of this application. Detailed Implementation

[0028] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0029] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0030] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "more" in this article means two or more objects.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0032] Before providing a further detailed description of the embodiments of this application, the nouns and terms involved in the embodiments of this application will be explained, and the nouns and terms involved in the embodiments of this application shall be interpreted as follows.

[0033] To enable those skilled in the art to better understand the technical solution of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0034] See Figure 1 , Figure 1 This is a schematic diagram of the structure of a first embodiment of the driving circuit of this application. The driving circuit 10 of this application is used to drive the power device 20. The driving circuit 10 specifically includes: a pulse shifting unit 11 and a negative voltage sustaining unit 12. The first terminal of the pulse shifting unit 11 receives a driving signal PWM, and the second terminal of the pulse shifting unit 11 is connected to the driving terminal of the power device 20. The pulse shifting unit 11 is used to generate a negative voltage signal based on the driving signal PWM. The negative voltage sustaining unit 12 is connected to the second terminal of the pulse shifting unit 11 and the driving terminal of the power device 20; the negative voltage sustaining unit 12 is used to generate a negative voltage compensation signal to compensate for the negative voltage signal.

[0035] Specifically, the pulse shifting unit 11 is used to convert the drive signal PWM from a DC signal to an AC pulse signal. The converted AC pulse signal includes a positive voltage signal and a negative voltage signal. When the drive terminal of the power device 20 receives a positive voltage signal, it is in the on state and when it receives a negative voltage signal, it is in the off state.

[0036] It should be noted that under certain conditions, such as when the duty cycle of the PWM signal is very low, the negative voltage signal may not be sufficient to keep the power device in the off state. Therefore, this application sets the negative voltage maintenance unit 12 to generate a negative voltage compensation signal to compensate for the negative voltage signal, so that the negative voltage signal remains stable and thus ensures the off state of the power device 20.

[0037] In this embodiment, the pulse translation unit 11 includes a DC blocking capacitor Cx and a Zener diode Z connected in parallel. Specifically, the cathode of the DC blocking capacitor Cx is connected to the input terminal of the drive signal PWM to receive the drive signal PWM, the anode of the DC blocking capacitor Cx is connected to the drive terminal of the power device 20, the first terminal of the Zener diode Z is connected to the cathode of the DC blocking capacitor Cx, and the second terminal of the Zener diode Z is connected to the drive terminal of the power device 20.

[0038] The drive signal PWM signal is generally a square wave signal. The DC blocking capacitor Cx utilizes the characteristic of capacitors blocking DC and passing AC to convert the DC square wave signal into an AC pulse signal, which is then output to the drive terminal of the power device 20. The voltage clamping unit Z is a Zener diode. The first terminal of the voltage clamping unit Z is the cathode of the Zener diode, and the second terminal is the anode of the Zener diode. The voltage clamping unit Z is used to clamp the negative voltage of the AC pulse signal to the set value of the Zener diode, so that the drive terminal of the power device 20 receives a stable negative voltage signal unaffected by the duty cycle of the PWM signal.

[0039] Furthermore, in combination Figure 2 The driving circuit 10 also includes a control unit 13, which is connected to the pulse shifting unit 11 and the negative pressure maintenance unit 12. The control unit 13 is used to output the driving signal PWM to the pulse shifting unit 11 and to output the frequency signal F to the negative pressure maintenance unit 12, so that the negative pressure maintenance unit 12 generates the negative pressure compensation signal based on the frequency signal F.

[0040] In one embodiment, the control unit 13 includes a drive signal output pin P1 and a frequency signal output pin P2. The drive signal output pin P1 is connected to the pulse shift unit 11 and is used to output a drive signal PWM. The frequency signal output pin P2 is connected to the negative voltage sustaining unit 12 and is used to output a frequency signal F. In this embodiment, the control unit 13 is a single-chip microcomputer (MCU). In another embodiment, the control unit 13 may include two independent single-chip microcomputers, one for outputting the drive signal PWM and the other for outputting the frequency signal F.

[0041] It should be noted that the power device 20 is, for example, an IGBT or a SiC MOS; the driving terminal of the power device 20 refers to the gate of the IGBT or SiC MOS.

[0042] Understandably, the power device 20 is generally an N-type MOSFET, which conducts during the high-level period and is cut off during the low-level period. In the embodiments of this application, the driving signal is a PWM signal, which is generally a square wave of 0-18V. During the high-level (18V) period of the PWM signal, the pulse shifting unit 11 generates a positive voltage signal, at which time the power device 20 is turned on. During the low-level (0V) period of the PWM signal, the pulse shifting unit 11 generates a negative voltage signal, at which time the power device 20 is turned off based on the negative voltage signal.

[0043] Specifically, in some cases, during the low level (0V) of the PWM signal, the negative voltage is insufficient to keep the power device 20 in the off state. Therefore, the negative voltage maintenance unit 12 provides a negative voltage compensation signal to compensate the negative voltage signal so that the negative voltage signal can keep the power device 20 in the off state.

[0044] In one embodiment, the control unit 13 outputs the frequency signal F earlier than the output drive signal PWM. Specifically, the control unit 13 preferentially outputs the frequency signal F to the negative voltage maintenance unit 12, so that the negative voltage maintenance unit 12 preferentially establishes a negative voltage compensation signal at the drive terminal of the power device 20. Further, the control unit 13 outputs the frequency signal F and waits for a preset time before outputting the drive signal PWM; the preset time is determined based on the negative voltage compensation signal. Specifically, a simulation model can be built to determine the time required for the control unit 13 to output the frequency signal F until the negative voltage compensation signal is formed. Based on this time, a delay waiting time, i.e., the preset time, is set in the control unit 13. After the preset time is reached, the control unit 13 outputs the drive signal PWM. Alternatively, the time required for the control unit 13 to output the frequency signal F until the negative voltage compensation signal is formed and stabilized can be determined. Based on this time, a delay waiting time, i.e., the preset time, is set in the control unit 13. After the preset time is reached, the control unit 13 outputs the drive signal PWM.

[0045] In another embodiment, the negative voltage compensation signal arrives at the drive terminal of the power device 20 before the negative voltage signal. Specifically, in this embodiment, the control unit 13 can simultaneously output the frequency signal F and the drive signal PWM. Other signal delay units can be set on the transmission path of the drive signal PWM to ensure that the negative voltage compensation signal arrives at the drive terminal of the power device 20 before the negative voltage signal.

[0046] In another embodiment, the timing of the frequency signal F output by the control unit 13 is earlier than the timing of the output drive signal PWM, and the negative voltage compensation signal arrives at the drive terminal of the power device 20 before the negative voltage signal. Specifically, as shown... Figure 3As shown, the system powers on at time t0. After power-on, the control unit 13 completes initialization. At time t1, it outputs a frequency signal F through the frequency signal output pin P2, and the negative voltage maintenance unit 12 starts working. At time t2, the negative voltage maintenance unit 12 preferentially generates a stable negative voltage compensation signal at the drive terminal of the power device 20. After a delay, at time t3, the control unit 13 outputs a drive signal PWM, which is converted into an AC pulse signal by the pulse shifting unit 11. The power device 20 conducts when the AC pulse signal is a positive voltage signal and turns off based on the negative voltage signal and the negative voltage compensation signal when the AC pulse signal is a negative voltage signal. The times t1, t2, and t3 can be determined through simulation experiments or by setting detection pins on the control unit 13; no specific limitation is imposed.

[0047] See further Figure 2 In this embodiment, the negative pressure maintenance unit 12 includes a compensation signal providing unit 121 and a first current limiting unit Rs. The first end of the compensation signal providing unit 121 is connected to the control unit 13 and receives a frequency signal F. The first end of the first current limiting unit Rs is connected to the second end of the compensation signal providing unit 121 and the driving end of the power device. The second end of the first current limiting unit Rs is connected to the driving end of the power device 20.

[0048] The compensation signal providing unit 121 includes: a first capacitor C1, a first unidirectional conductor D1, a second capacitor C2, and a second unidirectional conductor D2. The first terminal of the first capacitor C1 is connected to the control unit 13, and the second terminal of the first capacitor C1 is connected to the anode of the first unidirectional conductor D1. The cathode of the first unidirectional conductor D1 is grounded to GND. The cathode of the second unidirectional conductor D2 is connected to the second terminal of the first capacitor C1, and the anode of the second unidirectional conductor D2 is connected to the first terminal of the second capacitor C2. The second terminal of the second capacitor C2 is grounded to GND.

[0049] Control unit 13 outputs a frequency signal F of preset amplitude through frequency signal output pin P2. During the high level of frequency signal F, the first unidirectional conductor D1 is turned on, and the frequency signal F charges the first capacitor C1. During this stage, the second unidirectional conductor D2 is turned off, and the second capacitor C2 remains unchanged. During the low level of frequency signal F, the second unidirectional conductor D2 is turned on, and the first voltage signal of the first capacitor C1 discharges through the second unidirectional conductor D2. The discharge current flows to the second capacitor C2, reversibly charging the second capacitor C2, so that the voltage at the driving end of the second capacitor C2 connected to the power device 20 remains stable as a negative voltage compensation signal. The frequency signal F periodically switches between high and low levels. The first capacitor C1 charges and stores energy at the high level and discharges to charge the second capacitor C2 at the low level. As the cycle repeats, the second capacitor C2 is continuously reverse-charged, and the voltage at both ends gradually stabilizes. Finally, the first end of the second capacitor C2 (the end connected to the driving end of the power device 20) stabilizes as a negative voltage compensation signal.

[0050] The first unidirectional conductor D1 and the second unidirectional conductor D2 are diodes.

[0051] In one embodiment, the compensation signal providing unit 121 includes at least one of a voltage pump, a transformer, or a switching power supply. In this embodiment, the voltage pump is used to convert (rectify), boost, or adjust the input voltage into a negative voltage compensation signal. The transformer includes a main winding and an auxiliary winding; the auxiliary winding can be rectified to obtain a negative voltage compensation signal. The switching power supply is a switching power supply capable of generating negative voltage, and the negative voltage compensation signal is generated using the switching power supply.

[0052] In one specific embodiment, the amplitude of the frequency signal F is 0-5V, that is, when the frequency signal F is 5V, it corresponds to the high level period, and when the frequency signal F is 0V, it corresponds to the low level period.

[0053] See Figure 4 , Figure 4 This is a schematic diagram of the third embodiment of the driving circuit of this application. In this embodiment, the driving circuit 10 further includes a totem pole unit 14 connected between the control unit 13 and the pulse translation unit 11, specifically connected to the signal output pin P1 of the control unit 13. The totem pole unit 14 is used to enhance the driving capability of the driving signal.

[0054] In one embodiment, the totem pole unit includes a first switch Q1, a second switch Q2, and a third switch Q3. The control terminal of the first switch Q1 is connected to the drive signal output pin P1, the first path terminal of the first switch Q1 is connected to the second power supply terminal VCC2, and the second path terminal of the first switch Q1 is grounded (GND). The control terminal of the second switch Q2 is connected to the first path terminal of the first switch Q1, the first path terminal of the second switch Q2 is connected to the second power supply terminal VCC2, and the second path terminal of the second switch Q2 is connected to the filter unit Cx. The control terminal of the third switch Q3 is connected to the first path terminal of the first switch Q1, the first path terminal of the third switch Q3 is connected to the second path terminal of the second switch Q2 and the filter unit Cx, and the second path terminal of the third switch Q3 is grounded (GND).

[0055] In this circuit, the first switch Q1, the second switch Q2, and the third switch Q3 can be either transistors or MOSFETs. Understandably, if the first switch Q1, the second switch Q2, and the third switch Q3 are transistors, then the first switch Q1 and the second switch Q2 are NPN transistors, and the third switch Q3 is a PNP transistor. If the first switch Q1, the second switch Q2, and the third switch Q3 are MOSFETs, then the first switch Q1 and the second switch Q2 are NMOS transistors, and the third switch Q3 is a PMOS transistor.

[0056] Specifically, taking NPN transistors Q1 and Q2, and a PNP transistor Q3 as an example, when the drive signal is high, Q1 is turned on. This lowers the collector potential of Q1 and the base potential of Q2, causing Q2 to turn on. With Q2 on, the second power supply voltage from the second power supply terminal VCC2 provides a positive current to the load, such as the power device 20. Simultaneously, because Q2 is on, the base of Q3 is pulled close to the second power supply voltage of VCC2, so Q3 is off and no additional current path is generated. When the drive signal is low, the base current of Q1 is very small or nonexistent, causing Q1 to turn off. After Q1 turns off, the collector potential of Q1 increases, which in turn increases the base potential of Q2, causing Q2 to turn off as well. After the second switch Q2 is turned off, the base potential of the third switch Q3 decreases, the third switch Q3 is turned on, and the current flows through the third switch Q3 to ground GND.

[0057] As the PWM drive signal continuously switches between high and low levels, the second switch Q2 and the third switch Q3 alternately turn on and off, achieving periodic driving of the load. Within one cycle of the PWM signal, the duration of the high level (corresponding to the duty cycle) determines the on-time of the second switch Q2, thus affecting the time it takes for the load to receive forward current; the duration of the low level determines the on-time of the third switch Q3, affecting the time it takes for the load to receive reverse current. By adjusting the duty cycle of the PWM signal, the average voltage across the load can be changed, thereby controlling the load.

[0058] This embodiment sets up a totem pole unit 14, which enhances the driving capability of the driving signal and enables bidirectional current control.

[0059] In one specific embodiment, the totem pole unit 14 further includes resistors R1, R2, R3, R4, R5, R6, and R7. The first end of resistor R1 is connected to the second power supply terminal VCC2, and the second end of resistor R1 is connected to the drive signal output pin P1. The first end of resistor R2 is connected to the second end of resistor R1 and the drive signal output pin P1, and the second end of resistor R2 is connected to the control terminal of the first switch Q1. The first end of resistor R3 is connected to the control terminal of the first switch Q1 and the second end of resistor R2, and the second end of resistor R3 is grounded (GND). Resistors R1, R2, and R3 form a bias circuit for the first switch Q1, providing a suitable bias current to turn on the first switch Q1. Further, the first end of resistor R4 is connected to the second power supply terminal VCC2, and the second end of resistor R4 is connected to the first pass terminal of the first switch Q1. Resistor R4 is a current-limiting resistor, used to limit the current at the collector (first pass terminal) of the first switch Q1. Resistor R5 connects its first terminal to the first pass terminal of the first switch Q1 and the second terminal of resistor R4. The second terminal of resistor R5 connects to the control terminals of the second switch Q2 and the third switch Q3, providing isolation and setting appropriate voltage levels to protect the second and third switches Q2 and Q3. Resistor R6 connects its first terminal to the second power supply terminal VCC2 and its second terminal to the first pass terminal of the second switch Q2, limiting the current at the collector (first pass terminal) of the second switch Q2. Resistor R7 connects its first terminal to the second pass terminal of the third switch Q3 and its second terminal to ground (GND), limiting the current at the collector (second pass terminal) of the third switch Q3.

[0060] Furthermore, the driving circuit 10 of this application also includes a second current limiting unit Rx, which is connected between the control unit 13 and the negative voltage maintenance unit 12. Specifically, it is connected to the frequency signal output pin P2 of the control unit 13 and is used to limit the output current of the control unit 13. The second current limiting unit Rx is a current limiting resistor.

[0061] The control unit 13 of this application is a microcontroller, which is connected between the first power supply terminal VCC1 and ground GND. In one embodiment, the first power supply voltage provided by the first power supply terminal VCC1 is 5V, and the second power supply voltage provided by the second power supply terminal VCC2 is 21V.

[0062] Assuming that turning off power device 20 typically requires applying a -3.3V voltage to ensure the MOS is reliably off, in this embodiment, control unit 13 preferentially outputs a frequency signal F to negative voltage sustaining unit 12 via frequency signal output pin P2 to preferentially establish a -3.3V negative voltage signal at the drive terminal of power device 20. Combined with... Figure 3 The control unit 13 powers on at time t0. After power-on and initialization, it sends a frequency signal F with an amplitude of 0-5V to the negative voltage maintenance unit 12 at time t1. The negative voltage maintenance unit 12 then starts working. At time t2, the negative voltage maintenance unit 12 establishes a stable -3.3V negative voltage compensation signal at the drive terminal of the power device 20, and the voltage at the drive terminal of the power device 20 also drops to -3.3V. At this time, the control unit 13 outputs a drive signal through the drive signal output pin P1. During the high level of the drive signal, the power device 20 is turned on based on the high level of the drive signal; during the low level of the drive signal, the power device 20 is turned off based on the negative voltage signal and the negative voltage compensation signal.

[0063] The driving circuit 10 of this application can use the negative pressure compensation signal provided by the negative pressure maintenance unit 12 to maintain the stability of the negative pressure signal provided by the pulse translation unit 11, thereby enabling the power device 20 to be stably turned off during the low level of the PWM signal. Its circuit structure is simple, highly reliable, and low in cost.

[0064] See Figure 5 , Figure 5 This is a schematic diagram of the structure of an embodiment of the electronic device of this application. The electronic device 100 includes a power device 20 and a drive circuit 10. The drive circuit 10 is connected to the drive terminal of the power device 20. The drive circuit 10 is the drive circuit shown in any of the first to fourth embodiments described above.

[0065] The electronic device 100 of this application can be, for example, a switching power supply, a motor, etc., and is not specifically limited.

[0066] It is understood that the electronic device of this utility model may be, for example, a battery system, an energy storage system (etc., without specific limitation).

[0067] The above are merely embodiments of this utility model and do not limit the scope of patent protection of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this utility model.

Claims

1. A driving circuit, characterized in that, The driving circuit is used to drive power devices, and the driving circuit includes: A pulse translation unit, wherein a first end of the pulse translation unit receives a drive signal, and a second end of the pulse translation unit is connected to the drive end of the power device; the pulse translation unit is used to generate a negative voltage signal based on the drive signal; wherein the pulse translation unit includes: a DC blocking capacitor and a Zener diode connected in parallel; A negative pressure maintenance unit is provided, which is connected to the second terminal of the pulse translation unit and the driving terminal of the power device; the negative pressure maintenance unit is used to generate a negative pressure compensation signal to compensate for the negative pressure signal.

2. The driving circuit according to claim 1, characterized in that, The driving circuit further includes a control unit, which is connected to the pulse translation unit and the negative pressure maintenance unit. The control unit is used to output the driving signal to the pulse translation unit and to output a frequency signal to the negative pressure maintenance unit, so that the negative pressure maintenance unit generates the negative pressure compensation signal based on the frequency signal.

3. The driving circuit according to claim 2, characterized in that, The control unit outputs the frequency signal earlier than the drive signal; and / or The negative pressure compensation signal arrives at the drive terminal of the power device before the negative pressure signal.

4. The driving circuit according to claim 3, characterized in that, The control unit outputs the frequency signal and, after waiting for a preset time, outputs the drive signal. The preset time is determined based on the negative pressure signal.

5. The driving circuit according to claim 2, characterized in that, The negative pressure maintenance unit includes: a compensation signal providing unit and a first current limiting unit. The first end of the compensation signal providing unit is connected to the control unit, the first end of the first current limiting unit is connected to the second end of the compensation signal providing unit, and the second end of the first current limiting unit is connected to the driving end of the power device.

6. The driving circuit according to claim 5, characterized in that, The compensation signal providing unit includes: a first capacitor, a first unidirectional conductor, a second capacitor, and a second unidirectional conductor. The first terminal of the first capacitor is connected to the control unit, the second terminal of the first capacitor is connected to the anode of the first unidirectional conductor, and the cathode of the first unidirectional conductor is grounded. The cathode of the second unidirectional conductor is connected to the second terminal of the first capacitor, the anode of the second unidirectional conductor is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is grounded.

7. The driving circuit according to claim 5, characterized in that, The compensation signal providing unit includes at least one of a voltage pump, a transformer, or a switching power supply.

8. The driving circuit according to claim 2, characterized in that, The driving circuit also includes: The totem pole unit is connected between the control unit and the pulse translation unit.

9. The driving circuit according to claim 2, characterized in that, The driving circuit also includes: The second current limiting unit is connected between the control unit and the negative pressure maintaining unit.

10. An electronic device, characterized in that, It includes a power device and a drive circuit, wherein the drive circuit is connected to the drive terminal of the power device, and the drive circuit includes the drive circuit described in any one of claims 1 to 9.

Images