Ethernet cascaded debugging device and system
Patent Information
- Application Number
- CN202521363718.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2035-06-30
AI Technical Summary
[0003]本实用新型的目的在于至少提供一种以太网级联调试装置和系统，至少可以解决现有的多变频器级联控制及调试方法效率低的技术问题，至少可以达到更高效地进行级联调试
[0016]本申请的实施例提供的以太网级联调试装置和系统，相较于采用传统的级联CAN、RS485进行级联控制及调试的方式，以太网具有更高的数据传输速率。利用以太网进行数据传输，能够加快调试指令的传输速度，从而提升前期级联调试效率。装置设有多个级联接口，既可与调试机连接，也可与其他相同装置的级联接口连接。这种设计提供了灵活的级联架构，方便根据实际需求进行不同规模和拓扑结构的级联，满足工业传动领域中不同应用场景下多变频器级联控制及调试的需。测试接口为非以太网接口，可与待测样品上对应的非以太网接口连接，同时以太网接口芯片能够将测试接口的非以太网协议转换为以太网协议。这一功能使得装置能够兼容不同协议的待测样品，扩大了装置的适用范围，增强了其在工业传动领域多变频器级联控制及调试中的通用性。
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Figure CN224709670U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of industrial debugging, and in particular to an Ethernet cascade debugging device and system. Background Technology
[0002] In the field of industrial drives, multiple frequency converters may exist on a single line, and these frequency converters need to work together, requiring cascaded control and debugging. Existing methods for cascaded control and debugging of multiple frequency converters often use common cascaded CAN and RS485 interfaces. However, due to the limitations of RS485 and CAN bus baud rates, their data transmission rates are not high, which affects the efficiency of the initial cascaded debugging. Utility Model Content
[0003] The purpose of this invention is to provide at least one Ethernet cascade debugging device and system, which can at least solve the technical problem of low efficiency in existing multi-frequency converter cascade control and debugging methods, and at least achieve more efficient cascade debugging.
[0004] To address the aforementioned technical problems, at least one embodiment of this application provides an Ethernet cascading debugging device, including a cascading interface, a switching chip, a test interface, and an Ethernet interface chip, wherein:
[0005] The number of cascading interfaces is multiple, and the cascading interfaces are used to connect to the debugging machine and / or to the cascading interfaces of other Ethernet cascading debugging devices, wherein the debugging machine is used to send debugging commands to the switching chip through the cascading interfaces;
[0006] The first end of the switching chip is connected to the cascading interface, and the second end is connected to the first end of the Ethernet interface chip. It is used to send the debugging command to the Ethernet interface chip, and / or to send the debugging command to the Ethernet interface chip, and / or to forward the debugging command to other connected Ethernet cascading debugging devices via the cascading interface.
[0007] The test interface is a non-Ethernet interface, used to connect to the corresponding non-Ethernet interface on the sample under test;
[0008] The second end of the Ethernet interface chip is connected to the test interface and is used to convert the non-Ethernet protocol of the test interface into the Ethernet protocol, so that the debugging command is encapsulated into an Ethernet protocol data packet and sent to the sample under test via the test interface.
[0009] In some optional embodiments, the Ethernet interface chip is further configured to receive response data of the sample under test to the debugging command and send the response data to the switching chip; the switching chip is further configured to send the response data to the debugging machine and / or other Ethernet cascaded debugging devices in the cascade via the cascade interface.
[0010] In some alternative embodiments, an Ethernet transformer is also included, with a first end connected to the switching chip and a second end connected to the cascading interface.
[0011] In some alternative embodiments, the Ethernet interface chip adapts to 10Mbps, 100Mbps, and 1000Mbps rates.
[0012] In some alternative embodiments, the test interface is connected to the Ethernet interface chip via an SPI bus.
[0013] In some optional embodiments, the test interface is connected to the Ethernet interface chip via a CAN bus.
[0014] In some optional embodiments, the test interface is connected to the Ethernet interface chip via an RS485 bus.
[0015] At least one embodiment of this application also provides an Ethernet cascade debugging system, including multiple described Ethernet cascade debugging devices.
[0016] The Ethernet cascade debugging device and system provided in this application offer a higher data transmission rate compared to traditional cascaded CAN and RS485 methods for cascaded control and debugging. Using Ethernet for data transmission accelerates the transmission of debugging commands, thereby improving the efficiency of early-stage cascaded debugging. The device has multiple cascade interfaces, which can be connected to a debugging machine or to the cascade interfaces of other identical devices. This design provides a flexible cascade architecture, facilitating cascading of different scales and topologies according to actual needs, meeting the requirements of multi-frequency converter cascaded control and debugging in various application scenarios in the industrial drive field. The test interface is a non-Ethernet interface, which can be connected to the corresponding non-Ethernet interface on the sample under test. Simultaneously, the Ethernet interface chip can convert the non-Ethernet protocol of the test interface to the Ethernet protocol. This function enables the device to be compatible with samples under test using different protocols, expanding its applicability and enhancing its versatility in multi-frequency converter cascaded control and debugging in the industrial drive field. Attached Figure Description
[0017] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, and these illustrative descriptions do not constitute a limitation on the embodiments.
[0018] Figure 1 This is a schematic diagram of an Ethernet cascading debugging device provided in one embodiment of this application;
[0019] Figure 2 This is a schematic diagram of an Ethernet cascading debugging device provided in another embodiment of this application;
[0020] Figure 3 This is a schematic diagram of an Ethernet cascading debugging system provided in one embodiment of this application.
[0021] Explanation of reference numerals in the attached diagram: 100, Ethernet cascade debugging device; 110, cascade interface; 120, switching chip; 130, Ethernet interface chip; 140, Ethernet transformer; 200, debugging machine; 300, main control board. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the various embodiments of this application will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the various embodiments of this application to help readers better understand this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various changes and modifications based on the following embodiments. The division of the various embodiments below is for the convenience of description and should not constitute any limitation on the specific implementation of this application. The various embodiments can be combined with and referenced by each other without contradiction.
[0023] In the field of industrial drives, multiple frequency converters may exist on a single line, and these frequency converters need to work together, requiring cascaded control and debugging. Existing methods for cascaded control and debugging of multiple frequency converters often use common cascaded CAN and RS485 interfaces. However, due to the limitations of RS485 and CAN bus baud rates, their data transmission rates are not high, which affects the efficiency of the initial cascaded debugging.
[0024] To address the aforementioned technical problem of low cascading debugging effectiveness, this utility model proposes an Ethernet cascading debugging device. The implementation details of the Ethernet cascading debugging device in this embodiment are described below. The following content is only for ease of understanding and is not necessary for implementing this solution.
[0025] Example 1:
[0026] like Figure 1 As shown, the Ethernet cascading debugging device 100 of this embodiment includes: a cascading interface 110, a switching chip 120, a test interface (not shown in the figure), and an Ethernet interface chip 130, wherein:
[0027] The number of cascading interfaces 110 is multiple. The cascading interfaces 110 are used to connect to the debugging machine and / or to the cascading interfaces 110 of other Ethernet cascading debugging devices 100. The debugging machine is used to send debugging commands to the switching chip 120 through the cascading interfaces 110.
[0028] The first end of the switching chip 120 is connected to the cascade interface 110, and the second end is connected to the first end of the Ethernet interface chip 130. It is used to send the debugging command to the Ethernet interface chip 130, and / or also to forward the debugging command to other connected Ethernet cascade debugging devices 100 via the cascade interface 110.
[0029] The test interface is a non-Ethernet interface, used to connect to the corresponding non-Ethernet interface on the sample under test;
[0030] The second end of the Ethernet interface chip 130 is connected to the test interface and is used to convert the non-Ethernet protocol of the test interface into the Ethernet protocol, so that the debugging command is encapsulated into an Ethernet protocol data packet and sent to the sample under test via the test interface.
[0031] Understandably, traditional multi-inverter cascade commissioning relies on RS485 or CAN buses. These buses are essentially low-speed serial buses. RS485 commonly uses baud rates ranging from tens of kbps to several Mbps, while CAN is typically below 1 Mbps (standard CAN). This becomes a bottleneck when large amounts of data need to be transmitted during commissioning (such as parameter configuration, real-time status, waveform data, fault information, and program downloads). This application introduces the high bandwidth and low latency characteristics of industrial Ethernet into the inverter cascade commissioning process, breaking through the limitations of traditional low-speed buses.
[0032] Specifically, the cascading interface can be a standard RJ45 Ethernet port, receiving debugging command streams from a debugging machine (usually a PC with debugging software installed or a dedicated debugger). Multiple debugging devices can be cascaded together via network cables to form an Ethernet-based debugging network.
[0033] The switching chip enables efficient data exchange between various cascaded ports and test interfaces, facilitating data exchange and routing within the device and the cascaded network. The switching chip manages all cascaded ports and the uplink ports connected to the Ethernet interface chip, accurately forwarding instructions from the debugger to the Ethernet interface chip of the debugger connected to the sample under test, based on the destination MAC address of the Ethernet frame.
[0034] In this embodiment, a single debugger can access and manage the sample under test connected to any debugger in the network through one or more cascaded debuggers, without requiring a physical direct connection between the debugger and each debugger. Multiple debuggers can be connected end-to-end through cascading interfaces to form a chain-like network. For example: Debugger -> Debugger A -> Debugger B -> Debugger C.
[0035] When a debug command packet (Ethernet frame) arrives at the cascade interface of a debug device, the device's switching chip checks the destination MAC address or IP address in the frame header. If the destination address matches the debug device's MAC address or IP address, the switching chip forwards the packet to its Ethernet interface chip for processing. If the destination address does not match the debug device's address, the switching chip uses its internal MAC address table to determine the corresponding output port (i.e., which cascade interface to connect to). If the destination address corresponds to another debug device connected downstream (e.g., the next one in a chained connection), the switching chip copies and forwards the packet to the cascade interface connected to that downstream debug device. The next debug device that receives the forwarded packet repeats the above process: checking the destination address and deciding whether to process it locally or continue forwarding. This process continues cascading until the packet reaches the target debug device.
[0036] When the data packet arrives at the target debugging device, its switching chip identifies the target address as the local machine and hands the data packet over to the Ethernet interface chip. The Ethernet interface chip strips away the network layer and transport layer headers (such as IP / TCP), extracts the application layer data (i.e., the original Modbus / CANopen commands), and then, through protocol conversion, sends it to the final sample under test via the test interface.
[0037] In this embodiment, engineers can access all frequency converters connected to all commissioning devices across the entire cascaded network by operating only one commissioning machine. This efficiently enables coordinated parameter adjustment and synchronous testing between frequency converters in different physical locations (connected by different commissioning devices).
[0038] The test interface is a non-Ethernet interface, directly connected to the corresponding physical interface on the test sample, transmitting raw data streams conforming to the test sample's communication protocol. In some optional embodiments, the test interface is connected to the Ethernet interface chip via an SPI bus. In some optional embodiments, the test interface is connected to the Ethernet interface chip via a CAN bus. In some optional embodiments, the test interface is connected to the Ethernet interface chip via an RS485 bus.
[0039] The Ethernet interface chip acts as a protocol conversion hub. It strips the Ethernet header and trailer from the Ethernet frames (containing debugging instructions) received from the switching chip, extracts the application layer data (i.e., the original Modbus / CANopen protocol data), and sends it to the sample under test via the test interface. It also encapsulates the inverter response data (the original Modbus / CANopen protocol data) received from the test interface into standard Ethernet frames, and then sends them back to the debugging machine via the switching chip.
[0040] In summary, this embodiment utilizes Ethernet for data transmission, which accelerates the transmission speed of debugging commands, thereby improving the efficiency of early-stage cascade debugging. The device has multiple cascade interfaces, which can connect to a debugging machine or to the cascade interfaces of other identical devices. This design provides a flexible cascade architecture, facilitating cascading of different scales and topologies according to actual needs, meeting the requirements of multi-frequency converter cascade control and debugging in various application scenarios in the industrial drive field. The test interface is a non-Ethernet interface, which can connect to the corresponding non-Ethernet interface on the sample under test. Simultaneously, the Ethernet interface chip can convert the non-Ethernet protocol of the test interface to the Ethernet protocol. This function enables the device to be compatible with samples under test using different protocols, expanding its applicability and enhancing its versatility in multi-frequency converter cascade control and debugging in the industrial drive field.
[0041] In some optional embodiments, the Ethernet interface chip is further configured to receive response data of the sample under test to the debugging command and send the response data to the switching chip; the switching chip is further configured to send the response data to the debugging machine and / or other Ethernet cascaded debugging devices in the cascade via the cascade interface.
[0042] In this embodiment, after the sample under test executes the debugging command, it sends response data through its non-Ethernet interface. The test interface of the debugging device receives the response data from the sample under test and inputs it to the Ethernet interface chip. The Ethernet interface chip parses the received raw byte stream and encapsulates the parsed valid response data into a standard Ethernet frame. The encapsulated, complete Ethernet frame is then sent to the switching chip. If the target MAC address corresponds to a debugging machine directly or indirectly connected to a cascaded interface of this device, the switching chip forwards the frame to the cascaded interface connected to that debugging machine.
[0043] In more complex topologies, a response may need to traverse multiple cascaded debugging devices before reaching the debugger. For example, in a chain topology of debugger -> device A -> device B -> device C: the response of the test sample connected to device C is encapsulated by the Ethernet interface chip of device C, with the target address being the debugger. Device C's switching chip detects that the target MAC address is not local and knows that the debugger is "upstream" (in the direction of the cascade interface connecting to device B), so it forwards the frame to the cascade interface connecting to device B. Device B's switching chip receives the frame, similarly determines that the target MAC address (the debugger) is "upstream" (the cascade interface connecting to device A), and continues forwarding. Device A's switching chip receives the frame, finds that the target MAC address (the debugger) is connected to one of its cascade interfaces, and finally forwards it to the debugger.
[0044] In some optional embodiments, in scenarios with high real-time debugging requirements, the switching chip can be configured with a priority strategy:
[0045] When encapsulating response frames, Ethernet interface chips can mark their priorities in the frame header (e.g., fault alarm response > real-time status data > normal parameter read response). The switching chip recognizes these priority markers, prioritizes processing and forwarding high-priority response frames, and ensures that critical information (such as emergency stop confirmation and serious faults) can be delivered to the test machine with low latency.
[0046] like Figure 2 As shown, in some optional embodiments, an Ethernet transformer 140 is also included, with a first end of the Ethernet transformer 140 connected to the switching chip 120 and a second end connected to the cascading interface 110.
[0047] In this embodiment, an Ethernet transformer is located between the switching chip and the cascade interface to achieve electrical isolation. In industrial settings, the grounding potentials of different devices (debugging machines, various cascaded debugging devices, inverter cabinets, and even the factory power grid) may differ significantly (tens of volts or even hundreds of volts). If directly connected, these potential differences would create huge ground loop currents flowing through signal lines, severely interfering with communication and even burning out device ports. The Ethernet transformer blocks the path formed by DC and low-frequency ground potential differences, isolating the delicate PHY circuitry inside the switching chip (typically operating at only 1.8V or 3.3V) from the high-voltage transient interference that may be introduced by long-distance external network cables, directly protecting the switching chip ports from external electrical hazards. This enhances the stability and anti-interference capability of the entire cascaded debugging network.
[0048] In some alternative embodiments, the Ethernet interface chip adapts to 10Mbps, 100Mbps, and 1000Mbps rates.
[0049] In this embodiment, speeds of 10Mbps, 100Mbps, and 1000Mbps are set to ensure compatibility and plug-and-play functionality. In actual use, the debugging machine may be an older industrial control computer (supporting only 10 / 100M) or a new high-performance laptop (supporting 1000M). Adaptive settings ensure compatibility with different models of debugging machines. Different batches or models of debugging devices may have slightly different chip capabilities; adaptive settings ensure seamless cascading. Engineers do not need to manually configure port speeds; simply plugging in the network cable automatically establishes the optimal connection, avoiding connection failures due to speed mismatch.
[0050] Example 2:
[0051] Based on the above embodiments, this embodiment provides an application example in the field of industrial drives, where multiple frequency converters may exist on a single line, and these frequency converters need to work collaboratively, requiring cascaded control and debugging. This embodiment provides a cascaded testing system applicable to frequency converters.
[0052] like Figure 3 As shown, an Ethernet cascade debugging system includes: multiple Ethernet cascade debugging devices 100, a sample under test (SUT), and a debugging machine 200. The SUT is connected to the Ethernet cascade debugging devices one-to-one through the test interface. The multiple Ethernet cascade debugging devices are cascaded through the cascade interface using Ethernet cables. The cascade interface of one of the Ethernet cascade debugging devices located at the beginning or end of the cascade is connected to the debugging machine. The debugging machine is used to send debugging commands and receive response data from the SUT in response to the debugging commands.
[0053] In this embodiment, the Ethernet cascade debugging device is similar to that in Embodiment 1, and will not be described again here to avoid repetition. The sample under test is a frequency converter. Multiple frequency converters can be debugged using a single laptop via the Ethernet cascade debugging tool. The debugging method involves configuring an Ethernet cascade debugging tool on the main control board 300 of each frequency converter to be debugged. The Ethernet cascade debugging tool communicates with the main control board via an SPI interface to transmit the data required for cascade debugging. Then, all Ethernet cascade debugging tools are cascaded together via network cables and connected to the debugging machine, transmitting data via the Ethernet protocol, enabling the debugging machine to debug multiple frequency converters.
[0054] In some alternative embodiments, the Ethernet cascading debugging scheme is not limited to communicating with the main control board via SPI. Different Ethernet interface chips can be selected to convert serial ports, CAN ports, etc., into Ethernet protocols and then achieve cascading.
[0055] The Ethernet cascading commissioning method of this application can easily realize the cascading control and commissioning of frequency converters through a separate Ethernet cascading commissioning tool. It can transmit 100 Mbps data through the network port, achieving higher data transmission efficiency, and does not require an external switch.
[0056] Those skilled in the art will understand that the above embodiments are specific embodiments for implementing this application, and in practical applications, various changes can be made to them in form and detail without departing from the spirit and scope of this application.
Claims
1. An Ethernet cascaded debugging device, characterized in that, This includes cascading interfaces, switching chips, test interfaces, and Ethernet interface chips, among which: The number of cascading interfaces is multiple, and the cascading interfaces are used to connect to the debugging machine and / or to the cascading interfaces of other Ethernet cascading debugging devices, wherein the debugging machine is used to send debugging commands to the switching chip through the cascading interfaces; The first end of the switching chip is connected to the cascading interface, and the second end is connected to the first end of the Ethernet interface chip, for sending the debugging command to the Ethernet interface chip, and / or for forwarding the debugging command to other connected Ethernet cascading debugging devices via the cascading interface; The test interface is a non-Ethernet interface, used to connect to the corresponding non-Ethernet interface on the sample under test; The second end of the Ethernet interface chip is connected to the test interface and is used to convert the non-Ethernet protocol of the test interface into the Ethernet protocol, so that the debugging command is encapsulated into an Ethernet protocol data packet and sent to the sample under test via the test interface.
2. The Ethernet cascading debugging device according to claim 1, characterized in that, The Ethernet interface chip is also used to receive the response data of the sample under test to the debugging command and send the response data to the switching chip; the switching chip is also used to send the response data to the debugging machine and / or other Ethernet cascaded debugging devices in the cascade via the cascade interface.
3. The Ethernet cascading debugging device according to claim 1, characterized in that, It also includes an Ethernet transformer, with one end of the Ethernet transformer connected to the switching chip and the second end connected to the cascading interface.
4. The Ethernet cascading debugging device according to claim 1, characterized in that, The Ethernet interface chip is adaptive to 10Mbps, 100Mbps and 1000Mbps speeds.
5. The Ethernet cascading debugging device according to any one of claims 1-4, characterized in that, The test interface is connected to the Ethernet interface chip via an SPI bus.
6. The Ethernet cascading debugging device according to any one of claims 1-4, characterized in that, The test interface is connected to the Ethernet interface chip via a CAN bus.
7. The Ethernet cascading debugging device according to any one of claims 1-4, characterized in that, The test interface is connected to the Ethernet interface chip via an RS485 bus.
8. An Ethernet cascaded debugging system, characterized in that, It includes multiple Ethernet cascaded debugging devices as described in any one of claims 1-7.
9. The Ethernet cascading debugging system according to claim 8, characterized in that, It also includes a sample under test and a debugging machine. The sample under test is connected to the Ethernet cascaded debugging device in a one-to-one correspondence through the test interface. Multiple Ethernet cascaded debugging devices are cascaded through the cascade interface. The cascade interface of one of the Ethernet cascaded debugging devices located at the beginning or end of the cascade is connected to the debugging machine. The debugging machine is used to send debugging commands and receive the response data of the sample under test to the debugging commands.
10. The Ethernet cascading debugging system according to claim 8, characterized in that, The cascading interfaces of the multiple Ethernet cascading debugging devices are cascaded via Ethernet cables.